OV - exec - Function miniqmcreference::DiracDeterminantRef<qmcplusplus::DelayedUpdate<double, double> >::evaluateLog(qmcplusplus::ParticleSet&, qmcplusplus::ParticleAttrib<qmcplusplus::TinyVector<double, 3u>, std::allocator<qmcplusplus::TinyVector<double, 3u> > >&, qmcplusplus::ParticleAttrib<double, std::allocator<double> >&)

	Function: miniqmcreference::DiracDeterminantRef<qmcplusplus::DelayedUpdate<double, double> >::evalua ...	Module: exec	Source: DiracDeterminantRef.cpp:235-255 [...]	Coverage (incl. loops): 0.11% \| (excl. loops): 0.00%

/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/inner_product.hpp: 82 - 155

--------------------------------------------------------------------------------

82:   for (int i = 0; i < n; i++)

83:     res += a[i] * b[i];

[...]

155:   for (int i = 0; i < n; i++)

/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/PETE/OperatorTags.h: 63 - 94

--------------------------------------------------------------------------------

63:     return (a * b);

[...]

94:     (const_cast<T1&>(a) += b);

/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/TinyVectorOps.h: 111 - 131

--------------------------------------------------------------------------------

111:       ret[d] = op(lhs, rhs[d]);

[...]

131:       res += lhs[d] * rhs[d];

/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracDeterminantRef.cpp: 235 - 255

--------------------------------------------------------------------------------

235: {

236:   recompute(P);

237:

238:   if (NumPtcls == 1)

239:   {

240:     ValueType y = psiM(0, 0);

241:     GradType rv = y * dpsiM(0, 0);

242:     G[FirstIndex] += rv;

243:     L[FirstIndex] += y * d2psiM(0, 0) - dot(rv, rv);

244:   }

245:   else

246:   {

247:     for (int i = 0, iat = FirstIndex; i < NumPtcls; i++, iat++)

248:     {

249:       mGradType rv   = simd::dot(psiM[i], dpsiM[i], NumOrbitals);

250:       mValueType lap = simd::dot(psiM[i], d2psiM[i], NumOrbitals);

251:       G[iat] += rv;

252:       L[iat] += lap - dot(rv, rv);

253:     }

254:   }

255:   return LogValue;

/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsMatrix.h: 217 - 217

--------------------------------------------------------------------------------

217:   inline Type_t* operator[](size_type i) { return X.data() + i * D2; }

/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/TinyVector.h: 62 - 169

--------------------------------------------------------------------------------

62:       X[d] = T(0);

[...]

169:   inline Type_t& operator[](unsigned int i) { return X[i]; }

/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h: 223 - 248

--------------------------------------------------------------------------------

223:     return X[i];

[...]

248:   inline pointer data() { return X; }

0x44ac50 PUSH	%RBP

0x44ac51 MOV	%RSP,%RBP

0x44ac54 PUSH	%R15

0x44ac56 PUSH	%R14

0x44ac58 PUSH	%R13

0x44ac5a PUSH	%R12

0x44ac5c PUSH	%RBX

0x44ac5d SUB	$0x48,%RSP

0x44ac61 MOV	%RCX,%R14

0x44ac64 MOV	%RDX,%R15

0x44ac67 MOV	%RDI,%RBX

0x44ac6a CALL	44d0d0 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE9recomputeERNS1_11ParticleSetE>

0x44ac6f MOV	0x484(%RBX),%EAX

0x44ac75 CMP	$0x1,%RAX

0x44ac79 MOV	%RBX,-0x48(%RBP)

0x44ac7d JNE	44ad10

0x44ac83 MOV	0x100(%RBX),%RAX

0x44ac8a VMOVDDUP	(%RAX),%XMM0

0x44ac8e MOV	0x140(%RBX),%RAX

0x44ac95 MOVQ	$0,-0x30(%RBP)

0x44ac9d VMULPD	(%RAX),%XMM0,%XMM1

0x44aca1 VMOVUPD	%XMM1,-0x40(%RBP)

0x44aca6 VMULSD	0x10(%RAX),%XMM0,%XMM2

0x44acab VMOVSD	%XMM2,-0x30(%RBP)

0x44acb0 MOVSXD	0x478(%RBX),%RAX

0x44acb7 MOV	0x18(%R15),%RCX

0x44acbb LEA	(%RAX,%RAX,2),%RDX

0x44acbf VADDPD	(%RCX,%RDX,8),%XMM1,%XMM2

0x44acc4 VMOVUPD	%XMM2,(%RCX,%RDX,8)

0x44acc9 VMOVSD	0x10(%RCX,%RDX,8),%XMM2

0x44accf VADDSD	-0x30(%RBP),%XMM2,%XMM2

0x44acd4 VMOVSD	%XMM2,0x10(%RCX,%RDX,8)

0x44acda MOV	0x180(%RBX),%RCX

0x44ace1 VMOVUPD	-0x38(%RBP),%XMM2

0x44ace6 VMULPD	%XMM2,%XMM2,%XMM2

0x44acea VSHUFPD	$0x1,%XMM2,%XMM2,%XMM3

0x44acef VADDSD	%XMM3,%XMM2,%XMM2

0x44acf3 VFMADD231SD	%XMM1,%XMM1,%XMM2

0x44acf8 VFMSUB231SD	(%RCX),%XMM0,%XMM2

0x44acfd MOV	0x18(%R14),%RCX

0x44ad01 VADDSD	(%RCX,%RAX,8),%XMM2,%XMM0

0x44ad06 VMOVSD	%XMM0,(%RCX,%RAX,8)

0x44ad0b JMP	44afa5

0x44ad10 TEST	%EAX,%EAX

0x44ad12 JLE	44afa5

0x44ad18 MOV	-0x48(%RBP),%RSI

0x44ad1c MOV	0x480(%RSI),%ECX

0x44ad22 TEST	%ECX,%ECX

0x44ad24 JLE	44af79

0x44ad2a MOVSXD	0x478(%RSI),%RDX

0x44ad31 MOV	%RDX,-0x68(%RBP)

0x44ad35 MOV	0xd8(%RSI),%R10

0x44ad3c MOV	0x100(%RSI),%RDI

0x44ad43 MOV	0x140(%RSI),%R8

0x44ad4a MOV	0x118(%RSI),%RDX

0x44ad51 DEC	%RAX

0x44ad54 MOV	0x180(%RSI),%R9

0x44ad5b MOV	0x158(%RSI),%R12

0x44ad62 MOV	0x18(%R15),%R11

0x44ad66 MOV	0x18(%R14),%RSI

0x44ad6a MOV	%RSI,-0x50(%RBP)

0x44ad6e MOV	%ECX,%ESI

0x44ad70 SHR	$0x2,%ESI

0x44ad73 MOV	%ECX,%R15D

0x44ad76 AND	$0x7ffffffc,%R15D

0x44ad7d LEA	0x18(%RDI),%R14

0x44ad81 SAL	$0x3,%R10

0x44ad85 MOV	%R10,-0x60(%RBP)

0x44ad89 SAL	$0x3,%RDX

0x44ad8d LEA	(%RDX,%RDX,2),%R13

0x44ad91 MOV	%RSI,%RDX

0x44ad94 SAL	$0x5,%RDX

0x44ad98 LEA	(%RDX,%RDX,2),%RBX

0x44ad9c AND	$0x1fffffff,%ESI

0x44ada2 LEA	(%RSI,%RSI,2),%RDX

0x44ada6 SAL	$0x5,%RDX

0x44adaa LEA	0x10(%RDX,%R8,1),%RDX

0x44adaf ADD	$0x58,%R8

0x44adb3 SAL	$0x3,%R12

0x44adb7 MOV	%R12,-0x58(%RBP)

0x44adbb XOR	%R10D,%R10D

0x44adbe JMP	44ae4b

0x44adc3 NOPW	%CS:(%RAX,%RAX,1)

(1024) 0x44add0 MOV	-0x68(%RBP),%RSI

(1024) 0x44add4 ADD	%R10,%RSI

(1024) 0x44add7 LEA	(%RSI,%RSI,2),%R12

(1024) 0x44addb VMOVUPD	-0x40(%RBP),%XMM1

(1024) 0x44ade0 VADDPD	(%R11,%R12,8),%XMM1,%XMM2

(1024) 0x44ade6 VMOVUPD	%XMM2,(%R11,%R12,8)

(1024) 0x44adec VMOVSD	0x10(%R11,%R12,8),%XMM2

(1024) 0x44adf3 VADDSD	-0x30(%RBP),%XMM2,%XMM2

(1024) 0x44adf8 VMOVSD	%XMM2,0x10(%R11,%R12,8)

(1024) 0x44adff VMOVUPD	-0x38(%RBP),%XMM2

(1024) 0x44ae04 VMULPD	%XMM2,%XMM2,%XMM2

(1024) 0x44ae08 VSHUFPD	$0x1,%XMM2,%XMM2,%XMM3

(1024) 0x44ae0d VADDSD	%XMM3,%XMM2,%XMM2

(1024) 0x44ae11 VFNMSUB231SD	%XMM1,%XMM1,%XMM2

(1024) 0x44ae16 VADDSD	%XMM2,%XMM0,%XMM0

(1024) 0x44ae1a MOV	-0x50(%RBP),%R12

(1024) 0x44ae1e VADDSD	(%R12,%RSI,8),%XMM0,%XMM0

(1024) 0x44ae24 VMOVSD	%XMM0,(%R12,%RSI,8)

(1024) 0x44ae2a MOV	-0x60(%RBP),%RSI

(1024) 0x44ae2e ADD	%RSI,%R14

(1024) 0x44ae31 ADD	%R13,%R8

(1024) 0x44ae34 ADD	%R13,%RDX

(1024) 0x44ae37 ADD	%RSI,%RDI

(1024) 0x44ae3a ADD	-0x58(%RBP),%R9

(1024) 0x44ae3e CMP	%RAX,%R10

(1024) 0x44ae41 LEA	0x1(%R10),%R10

(1024) 0x44ae45 JE	44afa5

(1024) 0x44ae4b VXORPD	%XMM0,%XMM0,%XMM0

(1024) 0x44ae4f VXORPD	%XMM1,%XMM1,%XMM1

(1024) 0x44ae53 CMP	$0x4,%ECX

(1024) 0x44ae56 JB	44aebf

(1024) 0x44ae58 XOR	%ESI,%ESI

(1024) 0x44ae5a MOV	%R14,%R12

(1024) 0x44ae5d NOPL	(%RAX)

  (1027) 0x44ae60 VMOVDDUP	-0x18(%R12),%XMM2

  (1027) 0x44ae67 VFMADD231SD	-0x48(%R8,%RSI,1),%XMM2,%XMM1

  (1027) 0x44ae6e VMOVDDUP	-0x10(%R12),%XMM3

  (1027) 0x44ae75 VFMADD231SD	-0x30(%R8,%RSI,1),%XMM3,%XMM1

  (1027) 0x44ae7c VMOVDDUP	-0x8(%R12),%XMM4

  (1027) 0x44ae83 VFMADD231SD	-0x18(%R8,%RSI,1),%XMM4,%XMM1

  (1027) 0x44ae8a VFMADD231PD	-0x58(%R8,%RSI,1),%XMM2,%XMM0

  (1027) 0x44ae91 VFMADD231PD	-0x40(%R8,%RSI,1),%XMM3,%XMM0

  (1027) 0x44ae98 VFMADD231PD	-0x28(%R8,%RSI,1),%XMM4,%XMM0

  (1027) 0x44ae9f VMOVDDUP	(%R12),%XMM2

  (1027) 0x44aea5 VFMADD231PD	-0x10(%R8,%RSI,1),%XMM2,%XMM0

  (1027) 0x44aeac VFMADD231SD	(%R8,%RSI,1),%XMM2,%XMM1

  (1027) 0x44aeb2 ADD	$0x20,%R12

  (1027) 0x44aeb6 ADD	$0x60,%RSI

  (1027) 0x44aeba CMP	%RSI,%RBX

  (1027) 0x44aebd JNE	44ae60

(1024) 0x44aebf CMP	%ECX,%R15D

(1024) 0x44aec2 JE	44aeed

(1024) 0x44aec4 MOV	%RDX,%RSI

(1024) 0x44aec7 MOV	%R15,%R12

(1024) 0x44aeca NOPW	(%RAX,%RAX,1)

  (1026) 0x44aed0 VMOVDDUP	(%RDI,%R12,8),%XMM2

  (1026) 0x44aed6 VFMADD231PD	-0x10(%RSI),%XMM2,%XMM0

  (1026) 0x44aedc VFMADD231SD	(%RSI),%XMM2,%XMM1

  (1026) 0x44aee1 INC	%R12

  (1026) 0x44aee4 ADD	$0x18,%RSI

  (1026) 0x44aee8 CMP	%R12,%RCX

  (1026) 0x44aeeb JNE	44aed0

(1024) 0x44aeed VMOVUPD	%XMM0,-0x40(%RBP)

(1024) 0x44aef2 VMOVSD	%XMM1,-0x30(%RBP)

(1024) 0x44aef7 TEST	%R15,%R15

(1024) 0x44aefa JE	44af50

(1024) 0x44aefc VXORPD	%XMM0,%XMM0,%XMM0

(1024) 0x44af00 XOR	%ESI,%ESI

(1024) 0x44af02 NOPW	%CS:(%RAX,%RAX,1)

  (1025) 0x44af10 VMOVUPD	(%R9,%RSI,8),%YMM1

  (1025) 0x44af16 VFMADD231PD	(%RDI,%RSI,8),%YMM1,%YMM0

  (1025) 0x44af1c ADD	$0x4,%RSI

  (1025) 0x44af20 CMP	%R15,%RSI

  (1025) 0x44af23 JB	44af10

(1024) 0x44af25 VEXTRACTF128	$0x1,%YMM0,%XMM1

(1024) 0x44af2b VADDPD	%XMM1,%XMM0,%XMM0

(1024) 0x44af2f VSHUFPD	$0x1,%XMM0,%XMM0,%XMM1

(1024) 0x44af34 VADDSD	%XMM1,%XMM0,%XMM0

(1024) 0x44af38 MOV	%R15,%RSI

(1024) 0x44af3b CMP	%ECX,%R15D

(1024) 0x44af3e JNE	44af60

(1024) 0x44af40 JMP	44add0

0x44af45 NOPW	%CS:(%RAX,%RAX,1)

(1024) 0x44af50 VXORPD	%XMM0,%XMM0,%XMM0

(1024) 0x44af54 XOR	%ESI,%ESI

(1024) 0x44af56 NOPW	%CS:(%RAX,%RAX,1)

  (1023) 0x44af60 VMOVSD	(%R9,%RSI,8),%XMM1

  (1023) 0x44af66 VFMADD231SD	(%RDI,%RSI,8),%XMM1,%XMM0

  (1023) 0x44af6c INC	%RSI

  (1023) 0x44af6f CMP	%RSI,%RCX

  (1023) 0x44af72 JNE	44af60

(1024) 0x44af74 JMP	44add0

0x44af79 MOV	%EAX,%ECX

0x44af7b AND	$0x7,%ECX

0x44af7e CMP	$0x8,%EAX

0x44af81 JB	44af96

0x44af83 AND	$0x7ffffff8,%EAX

0x44af88 NOPL	(%RAX,%RAX,1)

(1022) 0x44af90 ADD	$-0x8,%RAX

(1022) 0x44af94 JNE	44af90

0x44af96 TEST	%RCX,%RCX

0x44af99 JE	44afa5

0x44af9b NOPL	(%RAX,%RAX,1)

(1021) 0x44afa0 DEC	%RCX

(1021) 0x44afa3 JNE	44afa0

0x44afa5 MOV	-0x48(%RBP),%RAX

0x44afa9 VMOVSD	0x10(%RAX),%XMM0

0x44afae ADD	$0x48,%RSP

0x44afb2 POP	%RBX

0x44afb3 POP	%R12

0x44afb5 POP	%R13

0x44afb7 POP	%R14

0x44afb9 POP	%R15

0x44afbb POP	%RBP

0x44afbc VZEROUPPER

0x44afbf RET

Coverage (%)	Name	Source Location	Module
►61.57+	qmcplusplus::WaveFunction::eva[...]	WaveFunction.cpp:170	exec
○	main.extracted.112	miniqmc.cpp:397	exec
○	__kmp_invoke_microtask		libiomp5.so
○	__kmp_invoke_task_func		libiomp5.so
►38.43+	qmcplusplus::WaveFunction::eva[...]	WaveFunction.cpp:171	exec
○	main.extracted.112	miniqmc.cpp:397	exec
○	__kmp_invoke_microtask		libiomp5.so
○	__kmp_invoke_task_func		libiomp5.so

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run orig_0

Source file and lines	DiracDeterminantRef.cpp:235-255
Module	exec

The function is defined in:

/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/inner_product.hpp:82-83,155
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/PETE/OperatorTags.h:63,94
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/TinyVectorOps.h:111,131
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracDeterminantRef.cpp:235-255
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsMatrix.h:217
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/TinyVector.h:62,169
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:223,248

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 18.00 to 5.33 cycles (3.37x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is poorly vectorized. Only 14% of vector register length is used (average across all SSE/AVX instructions). By fully vectorizing your function, you can lower the cost of an iteration from 18.00 to 1.66 cycles (10.88x speedup).

Details

21% of SSE/AVX instructions are used in vector version (process two or more data elements in vector registers):

21% of SSE/AVX loads are used in vector version.
18% of SSE/AVX stores are used in vector version.
25% of SSE/AVX addition or subtraction instructions are used in vector version.
66% of SSE/AVX multiply instructions are used in vector version.
0% of SSE/AVX fused multiply-add instructions are used in vector version.
20% of SSE/AVX instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

FMA

Detected 2 FMA (fused multiply-add) operations. Presence of both ADD/SUB and MUL operations.

Workaround

Try to change order in which elements are evaluated (using parentheses) in arithmetic expressions containing both ADD/SUB and MUL operations to enable your compiler to generate FMA instructions wherever possible. For instance a + b*c is a valid FMA (MUL then ADD). However (a+b)* c cannot be translated into an FMA (ADD then MUL).

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

miniqmcreference::DiracDeterminantRef
>::recompute(qmcplusplus::ParticleSet&): 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracDeterminantRef.cpp:236

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

VZEROUPPER: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracDeterminantRef.cpp:255

Type of elements and instruction set

6 SSE or AVX instructions are processing arithmetic or math operations on double precision FP elements in scalar mode (one at a time). 3 SSE or AVX instructions are processing arithmetic or math operations on double precision FP elements in vector mode (two at a time).

Matching between your function (in the source code) and the binary function

The binary function is composed of 14 FP arithmetical operations:

7: addition or subtraction (2 inside FMA instructions)
7: multiply (2 inside FMA instructions)

The binary function is loading 240 bytes (30 double precision FP elements). The binary function is storing 104 bytes (13 double precision FP elements).

Arithmetic intensity

Arithmetic intensity is 0.04 FP operations per loaded or stored byte.

General properties

nb instructions	104
nb uops	106
loop length	455
used x86 registers	16
used mmx registers	0
used xmm registers	4
used ymm registers	0
used zmm registers	0
nb stack references	8
ADD-SUB / MUL ratio	1.33

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	18.00 cycles
front end	18.00 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11
uops	8.00	5.60	12.00	12.00	9.00	5.50	7.50	9.00	9.00	9.00	5.40	12.00
cycles	8.00	5.60	12.00	12.00	9.00	5.50	7.50	9.00	9.00	9.00	5.40	12.00

Execution ports to units layout:

P0 (256 bits): VPU, BRU, ALU, DIV/SQRT
P1 (256 bits): ALU, VPU
P2 (512 bits): load
P3 (512 bits): load
P4 (512 bits): store data
P5 (512 bits): ALU, VPU
P6: ALU, BRU
P7: store address
P8: store address
P9 (512 bits): store data
P10: ALU
P11 (512 bits): load

Cycles executing div or sqrt instructions

Cycles summary

Front-end	18.00
Dispatch	12.00
Overall L1	18.00

Vectorization ratios

INT

all	5%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
other	11%

all	36%
load	30%
store	40%
mul	66%
add-sub	25%
fma	0%
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	100%

INT+FP

all	21%
load	21%
store	18%
mul	66%
add-sub	25%
fma	0%
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	20%

Vector efficiency ratios

INT

all	11%
load	12%
store	11%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
other	11%

all	17%
load	16%
store	17%
mul	20%
add-sub	15%
fma	12%
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	25%

INT+FP

all	14%
load	15%
store	14%
mul	20%
add-sub	15%
fma	12%
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	12%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 18.00 cycles. At this rate:

6% of peak load performance is reached (13.33 out of 192.00 bytes loaded per cycle (GB/s @ 1GHz))
4% of peak store performance is reached (5.78 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Performance is limited by instruction throughput (loading/decoding program instructions to execution core) (front-end is a bottleneck). By removing all these bottlenecks, you can lower the cost of an iteration from 18.00 to 12.00 cycles (1.50x speedup).

ASM code

In the binary file, the address of the function is: 44ac50

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
PUSH %R15	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R14	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R13	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R12	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %RBX	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
SUB $0x48,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RCX,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RDX,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RDI,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 44d0d0 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE9recomputeERNS1_11ParticleSetE>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV 0x484(%RBX),%EAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP $0x1,%RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV %RBX,-0x48(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JNE 44ad10 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE11evaluateLogERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEE+0xc0>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV 0x100(%RBX),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VMOVDDUP (%RAX),%XMM0	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x140(%RBX),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOVQ $0,-0x30(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
VMULPD (%RAX),%XMM0,%XMM1	1	0.50	0.50	0.33	0.33	0	0	0	0	0	0	0	0.33	4	0.50	vect (25.0%)
VMOVUPD %XMM1,-0x40(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
VMULSD 0x10(%RAX),%XMM0,%XMM2	1	0.50	0.50	0.33	0.33	0	0	0	0	0	0	0	0.33	4	0.50	scal (12.5%)
VMOVSD %XMM2,-0x30(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOVSXD 0x478(%RBX),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x18(%R15),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%RAX,%RAX,2),%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VADDPD (%RCX,%RDX,8),%XMM1,%XMM2	1	0	0.50	0.33	0.33	0	0.50	0	0	0	0	0	0.33	3	0.50	vect (25.0%)
VMOVUPD %XMM2,(%RCX,%RDX,8)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
VMOVSD 0x10(%RCX,%RDX,8),%XMM2	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VADDSD -0x30(%RBP),%XMM2,%XMM2	1	0	0.50	0.33	0.33	0	0.50	0	0	0	0	0	0.33	3	0.50	scal (12.5%)
VMOVSD %XMM2,0x10(%RCX,%RDX,8)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x180(%RBX),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VMOVUPD -0x38(%RBP),%XMM2	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	0-1	0.33	vect (25.0%)
VMULPD %XMM2,%XMM2,%XMM2	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	vect (25.0%)
VSHUFPD $0x1,%XMM2,%XMM2,%XMM3	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
VADDSD %XMM3,%XMM2,%XMM2	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	3	0.50	scal (12.5%)
VFMADD231SD %XMM1,%XMM1,%XMM2	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VFMSUB231SD (%RCX),%XMM0,%XMM2	1	0.50	0.50	0.33	0.33	0	0	0	0	0	0	0	0.33	4	0.50	scal (12.5%)
MOV 0x18(%R14),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VADDSD (%RCX,%RAX,8),%XMM2,%XMM0	1	0	0.50	0.33	0.33	0	0.50	0	0	0	0	0	0.33	3	0.50	scal (12.5%)
VMOVSD %XMM0,(%RCX,%RAX,8)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JMP 44afa5 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE11evaluateLogERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEE+0x355>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
TEST %EAX,%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (6.3%)
JLE 44afa5 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE11evaluateLogERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEE+0x355>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x48(%RBP),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x480(%RSI),%ECX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
TEST %ECX,%ECX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (6.3%)
JLE 44af79 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE11evaluateLogERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEE+0x329>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOVSXD 0x478(%RSI),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RDX,-0x68(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0xd8(%RSI),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x100(%RSI),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x140(%RSI),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x118(%RSI),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
DEC %RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x180(%RSI),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x158(%RSI),%R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x18(%R15),%R11	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x18(%R14),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RSI,-0x50(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %ECX,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SHR $0x2,%ESI	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
MOV %ECX,%R15D	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
AND $0x7ffffffc,%R15D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
LEA 0x18(%RDI),%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
SAL $0x3,%R10	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	scal (12.5%)
MOV %R10,-0x60(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
SAL $0x3,%RDX	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
LEA (%RDX,%RDX,2),%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RSI,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SAL $0x5,%RDX	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
LEA (%RDX,%RDX,2),%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
AND $0x1fffffff,%ESI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
LEA (%RSI,%RSI,2),%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
SAL $0x5,%RDX	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
LEA 0x10(%RDX,%R8,1),%RDX	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
ADD $0x58,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SAL $0x3,%R12	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	scal (12.5%)
MOV %R12,-0x58(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
XOR %R10D,%R10D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
JMP 44ae4b <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE11evaluateLogERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEE+0x1fb>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %EAX,%ECX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
AND $0x7,%ECX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
CMP $0x8,%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
JB 44af96 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE11evaluateLogERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEE+0x346>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
AND $0x7ffffff8,%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
TEST %RCX,%RCX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (12.5%)
JE 44afa5 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE11evaluateLogERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEE+0x355>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0x48(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VMOVSD 0x10(%RAX),%XMM0	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
ADD $0x48,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %RBP	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
VZEROUPPER	2	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
RET	1	0.50	0	0.33	0.33	0	0	0.50	0	0	0	0	0.33	0	2.13	N/A

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run orig_0

Source file and lines	DiracDeterminantRef.cpp:235-255
Module	exec

The function is defined in:

/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/inner_product.hpp:82-83,155
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/PETE/OperatorTags.h:63,94
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/TinyVectorOps.h:111,131
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracDeterminantRef.cpp:235-255
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsMatrix.h:217
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/TinyVector.h:62,169
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:223,248

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 18.00 to 5.33 cycles (3.37x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

21% of SSE/AVX instructions are used in vector version (process two or more data elements in vector registers):

21% of SSE/AVX loads are used in vector version.
18% of SSE/AVX stores are used in vector version.
25% of SSE/AVX addition or subtraction instructions are used in vector version.
66% of SSE/AVX multiply instructions are used in vector version.
0% of SSE/AVX fused multiply-add instructions are used in vector version.
20% of SSE/AVX instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

FMA

Detected 2 FMA (fused multiply-add) operations. Presence of both ADD/SUB and MUL operations.

Workaround

CALL instructions

Detected function call instructions.

Details

miniqmcreference::DiracDeterminantRef
>::recompute(qmcplusplus::ParticleSet&): 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracDeterminantRef.cpp:236

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

VZEROUPPER: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracDeterminantRef.cpp:255

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

The binary function is composed of 14 FP arithmetical operations:

7: addition or subtraction (2 inside FMA instructions)
7: multiply (2 inside FMA instructions)

The binary function is loading 240 bytes (30 double precision FP elements). The binary function is storing 104 bytes (13 double precision FP elements).

Arithmetic intensity

Arithmetic intensity is 0.04 FP operations per loaded or stored byte.

General properties

nb instructions	104
nb uops	106
loop length	455
used x86 registers	16
used mmx registers	0
used xmm registers	4
used ymm registers	0
used zmm registers	0
nb stack references	8
ADD-SUB / MUL ratio	1.33

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	18.00 cycles
front end	18.00 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11
uops	8.00	5.60	12.00	12.00	9.00	5.50	7.50	9.00	9.00	9.00	5.40	12.00
cycles	8.00	5.60	12.00	12.00	9.00	5.50	7.50	9.00	9.00	9.00	5.40	12.00

Execution ports to units layout:

P0 (256 bits): VPU, BRU, ALU, DIV/SQRT
P1 (256 bits): ALU, VPU
P2 (512 bits): load
P3 (512 bits): load
P4 (512 bits): store data
P5 (512 bits): ALU, VPU
P6: ALU, BRU
P7: store address
P8: store address
P9 (512 bits): store data
P10: ALU
P11 (512 bits): load

Cycles executing div or sqrt instructions

Cycles summary

Front-end	18.00
Dispatch	12.00
Overall L1	18.00

Vectorization ratios

INT

all	5%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
other	11%

all	36%
load	30%
store	40%
mul	66%
add-sub	25%
fma	0%
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	100%

INT+FP

all	21%
load	21%
store	18%
mul	66%
add-sub	25%
fma	0%
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	20%

Vector efficiency ratios

INT

all	11%
load	12%
store	11%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
other	11%

all	17%
load	16%
store	17%
mul	20%
add-sub	15%
fma	12%
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	25%

INT+FP

all	14%
load	15%
store	14%
mul	20%
add-sub	15%
fma	12%
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	12%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 18.00 cycles. At this rate:

6% of peak load performance is reached (13.33 out of 192.00 bytes loaded per cycle (GB/s @ 1GHz))
4% of peak store performance is reached (5.78 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

ASM code

In the binary file, the address of the function is: 44ac50

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
PUSH %R15	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R14	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R13	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R12	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %RBX	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
SUB $0x48,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RCX,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RDX,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RDI,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 44d0d0 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE9recomputeERNS1_11ParticleSetE>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV 0x484(%RBX),%EAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP $0x1,%RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV %RBX,-0x48(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JNE 44ad10 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE11evaluateLogERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEE+0xc0>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV 0x100(%RBX),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VMOVDDUP (%RAX),%XMM0	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x140(%RBX),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOVQ $0,-0x30(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
VMULPD (%RAX),%XMM0,%XMM1	1	0.50	0.50	0.33	0.33	0	0	0	0	0	0	0	0.33	4	0.50	vect (25.0%)
VMOVUPD %XMM1,-0x40(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
VMULSD 0x10(%RAX),%XMM0,%XMM2	1	0.50	0.50	0.33	0.33	0	0	0	0	0	0	0	0.33	4	0.50	scal (12.5%)
VMOVSD %XMM2,-0x30(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOVSXD 0x478(%RBX),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x18(%R15),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%RAX,%RAX,2),%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VADDPD (%RCX,%RDX,8),%XMM1,%XMM2	1	0	0.50	0.33	0.33	0	0.50	0	0	0	0	0	0.33	3	0.50	vect (25.0%)
VMOVUPD %XMM2,(%RCX,%RDX,8)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
VMOVSD 0x10(%RCX,%RDX,8),%XMM2	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VADDSD -0x30(%RBP),%XMM2,%XMM2	1	0	0.50	0.33	0.33	0	0.50	0	0	0	0	0	0.33	3	0.50	scal (12.5%)
VMOVSD %XMM2,0x10(%RCX,%RDX,8)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x180(%RBX),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VMOVUPD -0x38(%RBP),%XMM2	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	0-1	0.33	vect (25.0%)
VMULPD %XMM2,%XMM2,%XMM2	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	vect (25.0%)
VSHUFPD $0x1,%XMM2,%XMM2,%XMM3	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
VADDSD %XMM3,%XMM2,%XMM2	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	3	0.50	scal (12.5%)
VFMADD231SD %XMM1,%XMM1,%XMM2	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VFMSUB231SD (%RCX),%XMM0,%XMM2	1	0.50	0.50	0.33	0.33	0	0	0	0	0	0	0	0.33	4	0.50	scal (12.5%)
MOV 0x18(%R14),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VADDSD (%RCX,%RAX,8),%XMM2,%XMM0	1	0	0.50	0.33	0.33	0	0.50	0	0	0	0	0	0.33	3	0.50	scal (12.5%)
VMOVSD %XMM0,(%RCX,%RAX,8)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JMP 44afa5 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE11evaluateLogERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEE+0x355>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
TEST %EAX,%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (6.3%)
JLE 44afa5 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE11evaluateLogERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEE+0x355>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x48(%RBP),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x480(%RSI),%ECX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
TEST %ECX,%ECX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (6.3%)
JLE 44af79 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE11evaluateLogERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEE+0x329>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOVSXD 0x478(%RSI),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RDX,-0x68(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0xd8(%RSI),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x100(%RSI),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x140(%RSI),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x118(%RSI),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
DEC %RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x180(%RSI),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x158(%RSI),%R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x18(%R15),%R11	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x18(%R14),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RSI,-0x50(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %ECX,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SHR $0x2,%ESI	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
MOV %ECX,%R15D	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
AND $0x7ffffffc,%R15D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
LEA 0x18(%RDI),%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
SAL $0x3,%R10	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	scal (12.5%)
MOV %R10,-0x60(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
SAL $0x3,%RDX	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
LEA (%RDX,%RDX,2),%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RSI,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SAL $0x5,%RDX	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
LEA (%RDX,%RDX,2),%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
AND $0x1fffffff,%ESI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
LEA (%RSI,%RSI,2),%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
SAL $0x5,%RDX	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
LEA 0x10(%RDX,%R8,1),%RDX	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
ADD $0x58,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SAL $0x3,%R12	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	scal (12.5%)
MOV %R12,-0x58(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
XOR %R10D,%R10D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
JMP 44ae4b <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE11evaluateLogERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEE+0x1fb>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %EAX,%ECX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
AND $0x7,%ECX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
CMP $0x8,%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
JB 44af96 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE11evaluateLogERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEE+0x346>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
AND $0x7ffffff8,%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
TEST %RCX,%RCX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (12.5%)
JE 44afa5 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE11evaluateLogERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEE+0x355>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0x48(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VMOVSD 0x10(%RAX),%XMM0	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
ADD $0x48,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %RBP	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
VZEROUPPER	2	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
RET	1	0.50	0	0.33	0.33	0	0	0.50	0	0	0	0	0.33	0	2.13	N/A

Name	Coverage (%)	Time (s)
▼miniqmcreference::DiracDeterminantRef >::evaluateLog(qmcplusplus::ParticleSet&, qmcplusplus::ParticleAttrib, std::allocator > >&, qmcplusplus...–	0.11	0.10
▼Loop 1024 - inner_product.hpp:82-155 - exec–	0.00	0.00
○Loop 1027 - inner_product.hpp:155-155 - exec	0.09	0.08
○Loop 1025 - inner_product.hpp:82-83 - exec	0.02	0.02
○Loop 1023 - inner_product.hpp:82-83 - exec	0.00	0.00
○Loop 1026 - inner_product.hpp:155-155 - exec	0.00	0.00
○Loop 1022 - DiracDeterminantRef.cpp:247-247 - exec	0.00	0.00
○Loop 1021 - DiracDeterminantRef.cpp:247-247 - exec	0.00	0.00

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FMA

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Complex instructions

Details

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

Arithmetic intensity

General properties

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Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code

Code clean check

Workaround

Vectorization

Details

Workaround

Execution units bottlenecks

FMA

Workaround

CALL instructions

Details

Complex instructions

Details

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

Arithmetic intensity

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code