OV - exec - Function qmcplusplus::DiracMatrix<double, double>::invert_transpose(qmcplusplus::Matrix<double, std::allocator<double> > const&, qmcplusplus::Matrix<double, std::allocator<double> >&, double&, double&)

	Function: qmcplusplus::DiracMatrix<double, double>::invert_transpose(qmcplusplus::Matrix<double, std ...	Module: exec	Source: DiracMatrix.h:31-121 [...]	Coverage (incl. loops): 0.23% \| (excl. loops): 0.00%

/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracMatrix.h: 31 - 121

--------------------------------------------------------------------------------

31:   for (size_t i = 0; i < n; i++)

32:   {

33:     sign_det *= (pivot[i] == i + 1) ? 1 : -1;

34:     sign_det *= (diag[i] > 0) ? 1 : -1;

35:     logdet += std::log(std::abs(diag[i]));

36:   }

37:   phase = (sign_det > 0) ? T(0) : M_PI;

[...]

76:     m_pivot.resize(lda);

77:     Lwork = -1;

[...]

83:     Lwork = static_cast<int>(lw);

84:     m_work.resize(Lwork);

85:     LU_diag.resize(lda);

[...]

95:   {

96:     BlasThreadingEnv knob(getNextLevelNumThreads());

97:     const int n   = invMat.rows();

98:     const int lda = invMat.cols();

99:     T_FP* invMat_ptr(nullptr);

100: #if !defined(MIXED_PRECISION)

101:     simd::transpose(amat.data(), n, amat.cols(), invMat.data(), n, invMat.cols());

[...]

108:     if (Lwork < lda)

109:       reset(invMat_ptr, lda);

110:     int status;

111:     LAPACK::getrf(n, n, invMat_ptr, lda, m_pivot.data(), status);

112:     for (int i = 0; i < n; i++)

113:       LU_diag[i] = invMat_ptr[i * lda + i];

114:     real_type_fp Phase_tmp;

115:     LogDet = computeLogDet(LU_diag.data(), n, m_pivot.data(), Phase_tmp);

116:     Phase  = Phase_tmp;

117:     LAPACK::getri(n, invMat_ptr, lda, m_pivot.data(), m_work.data(), Lwork, status);

118: #if defined(MIXED_PRECISION)

119:     invMat = psiM_fp;

120: #endif

121:   }

/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/ext/new_allocator.h: 145 - 145

--------------------------------------------------------------------------------

145: 	::operator delete(__p

/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/basic_string.h: 195 - 245

--------------------------------------------------------------------------------

195:       { return _M_dataplus._M_p; }

[...]

211: 	return std::pointer_traits<const_pointer>::pointer_to(*_M_local_buf);

[...]

230:       { return _M_data() == _M_local_data(); }

[...]

239: 	if (!_M_is_local())

240: 	  _M_destroy(_M_allocated_capacity);

241:       }

242:

243:       void

244:       _M_destroy(size_type __size) throw()

245:       { _Alloc_traits::deallocate(_M_get_allocator(), _M_data(), __size + 1); }

/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/std_abs.h: 72 - 72

--------------------------------------------------------------------------------

72:   { return __builtin_fabs(__x); }

/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/inner_product.hpp: 210 - 212

--------------------------------------------------------------------------------

210:   for (size_t i = 0; i < n; ++i)

211:     for (size_t j = 0; j < m; ++j)

212:       B[i * ldb + j] = A[j * lda + i];

/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/BLAS.hpp: 790 - 827

--------------------------------------------------------------------------------

790:     dgetrf(n, m, a, n0, piv, st);

[...]

827:     dgetri(n, a, n0, piv, work, n1, status);

/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Utilities/OpenMP.h: 37 - 43

--------------------------------------------------------------------------------

37:   int num_threads = 1;

38: #pragma omp parallel

39:   {

40: #pragma omp master

41:     num_threads = omp_get_num_threads();

42:   }

43:   return num_threads;

/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/stl_vector.h: 353 - 1798

--------------------------------------------------------------------------------

353: 	if (__p)

[...]

919:       { return size_type(this->_M_impl._M_finish - this->_M_impl._M_start); }

[...]

939: 	if (__new_size > size())

940: 	  _M_default_append(__new_size - size());

941: 	else if (__new_size < size())

942: 	  _M_erase_at_end(this->_M_impl._M_start + __new_size);

[...]

1169:       { return _M_data_ptr(this->_M_impl._M_start); }

[...]

1758: 	if (max_size() - size() < __n)

1759: 	  __throw_length_error(__N(__s));

1760:

1761: 	const size_type __len = size() + (std::max)(size(), __n);

1762: 	return (__len < size() || __len > max_size()) ? max_size() : __len;

[...]

1794: 	if (size_type __n = this->_M_impl._M_finish - __pos)

1795: 	  {

1796: 	    std::_Destroy(__pos, this->_M_impl._M_finish,

1797: 			  _M_get_Tp_allocator());

1798: 	    this->_M_impl._M_finish = __pos;

/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsMatrix.h: 77 - 78

--------------------------------------------------------------------------------

77:   inline size_type rows() const { return D1; }

78:   inline size_type cols() const { return D2; }

/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/stl_uninitialized.h: 687 - 1031

--------------------------------------------------------------------------------

687: 	  for (; __n > 0; --__n, (void) ++__cur)

[...]

1031:       for (; __first != __last; ++__first, (void)++__cur)

/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/alloc_traits.h: 261 - 261

--------------------------------------------------------------------------------

261: 	  ::new((void*)__p) _Tp(std::forward<_Args>(__args)...);

/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/vector.tcc: 617 - 683

--------------------------------------------------------------------------------

617: 	  size_type __navail = size_type(this->_M_impl._M_end_of_storage

618: 					 - this->_M_impl._M_finish);

619:

620: 	  if (__size > max_size() || __navail > max_size() - __size)

621: 	    __builtin_unreachable();

622:

623: 	  if (__navail >= __n)

624: 	    {

625: 	      _GLIBCXX_ASAN_ANNOTATE_GROW(__n);

626: 	      this->_M_impl._M_finish =

[...]

640: 		      std::__uninitialized_default_n_a(__new_start + __size,

[...]

678: 	      this->_M_impl._M_start = __new_start;

679: 	      this->_M_impl._M_finish = __new_start + __size + __n;

680: 	      this->_M_impl._M_end_of_storage = __new_start + __len;

681: 	    }

682: 	}

683:     }

/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h: 248 - 249

--------------------------------------------------------------------------------

248:   inline pointer data() { return X; }

249:   inline const_pointer data() const { return X; }

/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/Mallocator.hpp: 50 - 78

--------------------------------------------------------------------------------

50:     std::size_t asize = n * sizeof(T);

51:     std::size_t amod  = asize % ALIGN;

52:     if (amod != 0)

[...]

61:     pt = aligned_alloc(ALIGN, asize);

[...]

68:     if (pt == nullptr)

69:       throw std::runtime_error("Allocation failed in Mallocator, requested size in bytes = " +

70:                                std::to_string(n * sizeof(T)));

[...]

76:     if (n == 0)

77:       throw std::runtime_error("Mallocator::deallocate does not accept size 0 allocations.");

78:     free(p);

0x448160 PUSH	%RBP

0x448161 MOV	%RSP,%RBP

0x448164 PUSH	%R15

0x448166 PUSH	%R14

0x448168 PUSH	%R13

0x44816a PUSH	%R12

0x44816c PUSH	%RBX

0x44816d SUB	$0xa8,%RSP

0x448174 MOV	%R8,-0x98(%RBP)

0x44817b MOV	%RCX,-0x90(%RBP)

0x448182 MOV	%RDX,%R14

0x448185 MOV	%RSI,%RBX

0x448188 MOV	%RDI,%R12

0x44818b MOVL	$0x1,-0x3c(%RBP)

0x448192 LEA	-0x3c(%RBP),%RCX

0x448196 MOV	$0x567b90,%EDI

0x44819b MOV	$0x4446c0,%EDX

0x4481a0 MOV	$0x1,%ESI

0x4481a5 XOR	%EAX,%EAX

0x4481a7 CALL	4041d0 <__kmpc_fork_call@plt>

0x4481ac MOV	-0x3c(%RBP),%ESI

0x4481af LEA	-0x78(%RBP),%RDI

0x4481b3 CALL	4df1c0 <_ZN11qmcplusplus16BlasThreadingEnvC1Ei>

0x4481b8 MOV	(%R14),%RAX

0x4481bb MOV	%EAX,-0x3c(%RBP)

0x4481be MOV	0x8(%R14),%R15

0x4481c2 MOV	%R15D,-0x4c(%RBP)

0x4481c6 MOV	0x30(%R14),%R14

0x4481ca SAL	$0x20,%RAX

0x4481ce MOV	%R14,-0x38(%RBP)

0x4481d2 MOV	%R12,-0xa0(%RBP)

0x4481d9 JE	448444

0x4481df MOV	0x8(%RBX),%RCX

0x4481e3 MOV	0x30(%RBX),%RDX

0x4481e7 SAR	$0x20,%RAX

0x4481eb CMP	$0x1,%RAX

0x4481ef ADC	$0,%RAX

0x4481f3 VPBROADCASTQ	%RCX,%YMM0

0x4481f9 CMP	$0x1,%RAX

0x4481fd MOV	%R15,-0x30(%RBP)

0x448201 JE	44838c

0x448207 MOV	%RAX,%RDI

0x44820a AND	$-0x2,%RDI

0x44820e MOV	%RAX,%R8

0x448211 AND	$-0x4,%R8

0x448215 LEA	-0x1(%R8),%R9

0x448219 MOV	%R15,%R10

0x44821c SAL	$0x4,%R10

0x448220 LEA	(,%RCX,8),%R11

0x448228 LEA	(%R14,%R15,8),%RBX

0x44822c MOV	%R14,%R15

0x44822f MOV	$0x1,%R14D

0x448235 XOR	%ESI,%ESI

0x448237 VPMOVSXBQ	0xb7e80(%RIP),%YMM1

0x448240 JMP	448267

0x448242 NOPW	%CS:(%RAX,%RAX,1)

(1006) 0x448250 ADD	$0x2,%RSI

(1006) 0x448254 ADD	%R10,%R15

(1006) 0x448257 ADD	%R10,%RBX

(1006) 0x44825a ADD	$0x2,%R14

(1006) 0x44825e CMP	%RDI,%RSI

(1006) 0x448261 JE	44838e

(1006) 0x448267 TEST	%R8,%R8

(1006) 0x44826a JE	4482c0

(1006) 0x44826c VPBROADCASTQ	%RSI,%YMM2

(1006) 0x448272 XOR	%R12D,%R12D

(1006) 0x448275 NOPW	%CS:(%RAX,%RAX,1)

  (1008) 0x448280 VPBROADCASTQ	%R12,%YMM3

  (1008) 0x448286 VPADDQ	%YMM1,%YMM3,%YMM3

  (1008) 0x44828a VPMULLQ	%YMM3,%YMM0,%YMM3

  (1008) 0x448290 VPADDQ	%YMM2,%YMM3,%YMM3

  (1008) 0x448294 VXORPD	%XMM4,%XMM4,%XMM4

  (1008) 0x448298 KXNORW	%K0,%K0,%K1

  (1008) 0x44829c VGATHERQPD	(%RDX,%YMM3,8),%YMM4{%K1}

  (1008) 0x4482a3 VMOVUPD	%YMM4,(%R15,%R12,8)

  (1008) 0x4482a9 ADD	$0x4,%R12

  (1008) 0x4482ad CMP	%R9,%R12

  (1008) 0x4482b0 JBE	448280

(1006) 0x4482b2 MOV	%R8,%R12

(1006) 0x4482b5 CMP	%R8,%RAX

(1006) 0x4482b8 JNE	4482c3

(1006) 0x4482ba JMP	4482f7

0x4482bc NOPL	(%RAX)

(1006) 0x4482c0 XOR	%R12D,%R12D

(1006) 0x4482c3 MOV	%RCX,%R13

(1006) 0x4482c6 IMUL	%R12,%R13

(1006) 0x4482ca ADD	%RSI,%R13

(1006) 0x4482cd LEA	(%RDX,%R13,8),%R13

(1006) 0x4482d1 NOPW	%CS:(%RAX,%RAX,1)

  (1004) 0x4482e0 VMOVQ	(%R13),%XMM2

  (1004) 0x4482e6 VMOVQ	%XMM2,(%R15,%R12,8)

  (1004) 0x4482ec INC	%R12

  (1004) 0x4482ef ADD	%R11,%R13

  (1004) 0x4482f2 CMP	%R12,%RAX

  (1004) 0x4482f5 JNE	4482e0

(1006) 0x4482f7 TEST	%R8,%R8

(1006) 0x4482fa JE	448350

(1006) 0x4482fc LEA	0x1(%RSI),%R12

(1006) 0x448300 VPBROADCASTQ	%R12,%YMM2

(1006) 0x448306 XOR	%R12D,%R12D

(1006) 0x448309 NOPL	(%RAX)

  (1007) 0x448310 VPBROADCASTQ	%R12,%YMM3

  (1007) 0x448316 VPADDQ	%YMM1,%YMM3,%YMM3

  (1007) 0x44831a VPMULLQ	%YMM3,%YMM0,%YMM3

  (1007) 0x448320 VPADDQ	%YMM2,%YMM3,%YMM3

  (1007) 0x448324 VXORPD	%XMM4,%XMM4,%XMM4

  (1007) 0x448328 KXNORW	%K0,%K0,%K1

  (1007) 0x44832c VGATHERQPD	(%RDX,%YMM3,8),%YMM4{%K1}

  (1007) 0x448333 VMOVUPD	%YMM4,(%RBX,%R12,8)

  (1007) 0x448339 ADD	$0x4,%R12

  (1007) 0x44833d CMP	%R9,%R12

  (1007) 0x448340 JBE	448310

(1006) 0x448342 MOV	%R8,%R12

(1006) 0x448345 CMP	%R8,%RAX

(1006) 0x448348 JE	448250

(1006) 0x44834e JMP	448353

(1006) 0x448350 XOR	%R12D,%R12D

(1006) 0x448353 MOV	%RCX,%R13

(1006) 0x448356 IMUL	%R12,%R13

(1006) 0x44835a ADD	%R14,%R13

(1006) 0x44835d LEA	(%RDX,%R13,8),%R13

(1006) 0x448361 NOPW	%CS:(%RAX,%RAX,1)

  (1005) 0x448370 VMOVQ	(%R13),%XMM2

  (1005) 0x448376 VMOVQ	%XMM2,(%RBX,%R12,8)

  (1005) 0x44837c INC	%R12

  (1005) 0x44837f ADD	%R11,%R13

  (1005) 0x448382 CMP	%R12,%RAX

  (1005) 0x448385 JNE	448370

(1006) 0x448387 JMP	448250

0x44838c XOR	%ESI,%ESI

0x44838e TEST	$0x1,%AL

0x448390 MOV	-0xa0(%RBP),%R12

0x448397 MOV	-0x38(%RBP),%R14

0x44839b MOV	-0x30(%RBP),%R15

0x44839f JE	448444

0x4483a5 MOV	%RAX,%RDI

0x4483a8 AND	$-0x4,%RDI

0x4483ac JE	448409

0x4483ae LEA	-0x1(%RDI),%R8

0x4483b2 VPBROADCASTQ	%RSI,%YMM1

0x4483b8 MOV	%RSI,%R9

0x4483bb IMUL	%R15,%R9

0x4483bf LEA	(%R14,%R9,8),%R9

0x4483c3 XOR	%R10D,%R10D

0x4483c6 VPMOVSXBQ	0xb7cf1(%RIP),%YMM2

0x4483cf NOP

(1003) 0x4483d0 VPBROADCASTQ	%R10,%YMM3

(1003) 0x4483d6 VPADDQ	%YMM2,%YMM3,%YMM3

(1003) 0x4483da VPMULLQ	%YMM3,%YMM0,%YMM3

(1003) 0x4483e0 VPADDQ	%YMM1,%YMM3,%YMM3

(1003) 0x4483e4 KXNORW	%K0,%K0,%K1

(1003) 0x4483e8 VXORPD	%XMM4,%XMM4,%XMM4

(1003) 0x4483ec VGATHERQPD	(%RDX,%YMM3,8),%YMM4{%K1}

(1003) 0x4483f3 VMOVUPD	%YMM4,(%R9,%R10,8)

(1003) 0x4483f9 ADD	$0x4,%R10

(1003) 0x4483fd CMP	%R8,%R10

(1003) 0x448400 JBE	4483d0

0x448402 CMP	%RDI,%RAX

0x448405 JNE	44840b

0x448407 JMP	448444

0x448409 XOR	%EDI,%EDI

0x44840b MOV	%RDI,%R8

0x44840e IMUL	%RCX,%R8

0x448412 ADD	%RSI,%R8

0x448415 LEA	(%RDX,%R8,8),%RDX

0x448419 SAL	$0x3,%RCX

0x44841d IMUL	%R15,%RSI

0x448421 LEA	(%R14,%RSI,8),%RSI

0x448425 NOPW	%CS:(%RAX,%RAX,1)

(1002) 0x448430 VMOVQ	(%RDX),%XMM0

(1002) 0x448434 VMOVQ	%XMM0,(%RSI,%RDI,8)

(1002) 0x448439 INC	%RDI

(1002) 0x44843c ADD	%RCX,%RDX

(1002) 0x44843f CMP	%RDI,%RAX

(1002) 0x448442 JNE	448430

0x448444 LEA	0x30(%R12),%RAX

0x448449 MOV	%RAX,-0xa8(%RBP)

0x448450 CMP	%R15D,0x30(%R12)

0x448455 JGE	448729

0x44845b MOV	%RSP,-0x88(%RBP)

0x448462 MOV	%RSP,%RBX

0x448465 ADD	$-0x10,%RBX

0x448469 MOV	%RBX,%RSP

0x44846c MOV	%RSP,%R13

0x44846f ADD	$-0x10,%R13

0x448473 MOV	%R13,%RSP

0x448476 MOV	%RSP,%RAX

0x448479 ADD	$-0x10,%RAX

0x44847d MOV	%RAX,-0x70(%RBP)

0x448481 MOV	%RAX,%RSP

0x448484 MOV	%RSP,%R10

0x448487 ADD	$-0x10,%R10

0x44848b MOV	%R10,%RSP

0x44848e MOVSXD	%R15D,%R14

0x448491 MOV	0x18(%R12),%RCX

0x448496 MOV	0x20(%R12),%RAX

0x44849b MOV	%RAX,%RDX

0x44849e SUB	%RCX,%RDX

0x4484a1 SAR	$0x2,%RDX

0x4484a5 MOV	%R14,-0x60(%RBP)

0x4484a9 SUB	%RDX,%R14

0x4484ac JBE	448612

0x4484b2 MOV	%RSP,-0xc8(%RBP)

0x4484b9 MOV	%RSP,%RDX

0x4484bc ADD	$-0x20,%RDX

0x4484c0 MOV	%RDX,%RSP

0x4484c3 MOV	%RSP,%RCX

0x4484c6 ADD	$-0x20,%RCX

0x4484ca MOV	%RCX,%RSP

0x4484cd MOV	0x20(%R12),%RDI

0x4484d2 MOV	0x28(%R12),%RSI

0x4484d7 MOV	%RSI,%RAX

0x4484da SUB	%RDI,%RAX

0x4484dd SAR	$0x2,%RAX

0x4484e1 CMP	%R14,%RAX

0x4484e4 MOV	%R10,-0xd0(%RBP)

0x4484eb MOV	%RDI,-0x58(%RBP)

0x4484ef JAE	44862c

0x4484f5 MOV	%RBX,-0xc0(%RBP)

0x4484fc MOV	%RSI,-0xb8(%RBP)

0x448503 MOV	%RDX,-0x68(%RBP)

0x448507 MOV	%RCX,-0x48(%RBP)

0x44850b MOV	%R15,-0x30(%RBP)

0x44850f MOV	0x18(%R12),%RAX

0x448514 MOV	%RDI,%RCX

0x448517 MOV	%RAX,-0x80(%RBP)

0x44851b SUB	%RAX,%RCX

0x44851e MOV	%RCX,%RBX

0x448521 SAR	$0x2,%RCX

0x448525 MOV	$0x1fffffffffffffff,%RAX

0x44852f MOV	%RCX,%RDX

0x448532 XOR	%RAX,%RDX

0x448535 CMP	%R14,%RDX

0x448538 JB	448b53

0x44853e CMP	%R14,%RCX

0x448541 MOV	%R14,%R15

0x448544 CMOVA	%RCX,%R15

0x448548 ADD	%RCX,%R15

0x44854b CMP	%RAX,%R15

0x44854e CMOVAE	%RAX,%R15

0x448552 LEA	(,%R15,4),%RAX

0x44855a MOV	%RAX,%RSI

0x44855d AND	$-0x40,%RSI

0x448561 ADD	$0x40,%RSI

0x448565 TEST	$0xf,%R15B

0x448569 MOV	%RAX,-0xb0(%RBP)

0x448570 CMOVE	%RAX,%RSI

0x448574 MOV	$0x40,%EDI

0x448579 VZEROUPPER

0x44857c CALL	404800 <aligned_alloc@plt>

0x448581 TEST	%RAX,%RAX

0x448584 JE	448b60

0x44858a LEA	(%RAX,%RBX,1),%RDI

0x44858e LEA	(,%R14,4),%RDX

0x448596 MOV	%RAX,-0x48(%RBP)

0x44859a MOV	%RDI,-0x68(%RBP)

0x44859e XOR	%ESI,%ESI

0x4485a0 CALL	4efda0 <_intel_fast_memset>

0x4485a5 MOV	-0x80(%RBP),%RDI

0x4485a9 CMP	-0x58(%RBP),%RDI

0x4485ad JE	4485cf

0x4485af ADD	$-0x4,%RBX

0x4485b3 AND	$-0x4,%RBX

0x4485b7 ADD	$0x4,%RBX

0x4485bb MOV	-0x48(%RBP),%RDI

0x4485bf MOV	-0x80(%RBP),%RSI

0x4485c3 MOV	%RBX,%RDX

0x4485c6 CALL	4efce0 <_intel_fast_memcpy>

0x4485cb MOV	-0x80(%RBP),%RDI

0x4485cf TEST	%RDI,%RDI

0x4485d2 MOV	-0xc0(%RBP),%RBX

0x4485d9 JE	4485ed

0x4485db CMP	%RDI,-0xb8(%RBP)

0x4485e2 JE	448bb3

0x4485e8 CALL	404460 <free@plt>

0x4485ed MOV	-0x48(%RBP),%RCX

0x4485f1 MOV	%RCX,0x18(%R12)

0x4485f6 MOV	-0x68(%RBP),%RAX

0x4485fa LEA	(%RAX,%R14,4),%RAX

0x4485fe MOV	%RAX,0x20(%R12)

0x448603 LEA	(%RCX,%R15,4),%RAX

0x448607 MOV	%RAX,0x28(%R12)

0x44860c MOV	-0x30(%RBP),%R15

0x448610 JMP	44864b

0x448612 JAE	448664

0x448614 MOV	-0x60(%RBP),%RDX

0x448618 LEA	(%RCX,%RDX,4),%RDX

0x44861c CMP	%RDX,%RAX

0x44861f MOV	-0x38(%RBP),%R14

0x448623 JE	448668

0x448625 MOV	%RDX,0x20(%R12)

0x44862a JMP	448668

0x44862c LEA	(,%R14,4),%RDX

0x448634 XOR	%ESI,%ESI

0x448636 VZEROUPPER

0x448639 CALL	4efda0 <_intel_fast_memset>

0x44863e MOV	-0x58(%RBP),%RAX

0x448642 LEA	(%RAX,%R14,4),%RAX

0x448646 MOV	%RAX,0x20(%R12)

0x44864b MOV	-0xc8(%RBP),%RSP

0x448652 MOV	0x18(%R12),%RCX

0x448657 MOV	-0x38(%RBP),%R14

0x44865b MOV	-0xd0(%RBP),%R10

0x448662 JMP	448668

0x448664 MOV	-0x38(%RBP),%R14

0x448668 MOV	-0xa8(%RBP),%R9

0x44866f MOVL	$-0x1,(%R9)

0x448676 MOV	%R15D,(%RBX)

0x448679 MOV	%R15D,(%R13)

0x44867d SUB	$0x8,%RSP

0x448681 MOV	%RBX,%RDI

0x448684 MOV	%R14,%RSI

0x448687 MOV	%R13,%RDX

0x44868a MOV	-0x70(%RBP),%RBX

0x44868e MOV	%RBX,%R8

0x448691 PUSH	%R10

0x448693 VZEROUPPER

0x448696 CALL	4043a0 <dgetri_@plt>

0x44869b ADD	$0x10,%RSP

0x44869f VCVTTSD2SI	(%RBX),%EAX

0x4486a3 MOV	%EAX,0x30(%R12)

0x4486a8 CLTQ

0x4486aa MOV	(%R12),%RDX

0x4486ae MOV	0x8(%R12),%RCX

0x4486b3 MOV	%RCX,%RDI

0x4486b6 SUB	%RDX,%RDI

0x4486b9 SAR	$0x3,%RDI

0x4486bd MOV	%RAX,%RSI

0x4486c0 SUB	%RDI,%RSI

0x4486c3 JBE	4486cf

0x4486c5 MOV	%R12,%RDI

0x4486c8 CALL	448c90 <_ZNSt6vectorIdN11qmcplusplus10MallocatorIdLm64EEEE17_M_default_appendEm>

0x4486cd JMP	4486df

0x4486cf JAE	4486df

0x4486d1 LEA	(%RDX,%RAX,8),%RAX

0x4486d5 CMP	%RAX,%RCX

0x4486d8 JE	4486df

0x4486da MOV	%RAX,0x8(%R12)

0x4486df MOV	0x78(%R12),%RCX

0x4486e4 MOV	0x80(%R12),%RAX

0x4486ec MOV	%RAX,%RDX

0x4486ef SUB	%RCX,%RDX

0x4486f2 SAR	$0x3,%RDX

0x4486f6 MOV	-0x60(%RBP),%RSI

0x4486fa SUB	%RDX,%RSI

0x4486fd JBE	44870b

0x4486ff LEA	0x78(%R12),%RDI

0x448704 CALL	448c90 <_ZNSt6vectorIdN11qmcplusplus10MallocatorIdLm64EEEE17_M_default_appendEm>

0x448709 JMP	448722

0x44870b JAE	448722

0x44870d MOV	-0x60(%RBP),%RDX

0x448711 LEA	(%RCX,%RDX,8),%RCX

0x448715 CMP	%RCX,%RAX

0x448718 JE	448722

0x44871a MOV	%RCX,0x80(%R12)

0x448722 MOV	-0x88(%RBP),%RSP

0x448729 MOV	0x18(%R12),%R8

0x44872e LEA	-0x3c(%RBP),%RDI

0x448732 LEA	-0x4c(%RBP),%RCX

0x448736 LEA	-0x74(%RBP),%R9

0x44873a MOV	%RDI,%RSI

0x44873d MOV	%R14,%RDX

0x448740 VZEROUPPER

0x448743 CALL	404680 <dgetrf_@plt>

0x448748 MOVSXD	-0x3c(%RBP),%R15

0x44874c MOV	0x78(%R12),%R13

0x448751 TEST	%R15,%R15

0x448754 MOV	%R13,-0x30(%RBP)

0x448758 MOV	%R15,-0x58(%RBP)

0x44875c JLE	4488fa

0x448762 MOV	-0x4c(%RBP),%R11D

0x448766 LEA	0x1(%R11),%EAX

0x44876a CMP	$0x8,%R15D

0x44876e JB	4488ae

0x448774 LEA	(,%R11,8),%ECX

0x44877c LEA	0x8(,%R11,8),%EDX

0x448784 LEA	(%R11,%R11,2),%ESI

0x448788 LEA	0x6(%RSI,%RSI,1),%ESI

0x44878c SUB	%R11D,%ECX

0x44878f ADD	$0x7,%ECX

0x448792 MOV	-0x58(%RBP),%RDI

0x448796 LEA	(,%RDI,8),%RDI

0x44879e AND	$-0x40,%RDI

0x4487a2 LEA	0x5(%R11,%R11,4),%R8D

0x4487a7 LEA	0x4(,%R11,4),%R9D

0x4487af LEA	0x3(%R11,%R11,2),%R10D

0x4487b4 LEA	0x2(%R11,%R11,1),%R11D

0x4487b9 XOR	%EBX,%EBX

0x4487bb XOR	%R15D,%R15D

0x4487be XCHG	%AX,%AX

(1000) 0x4487c0 MOVSXD	%EBX,%RBX

(1000) 0x4487c3 VMOVSD	(%R14,%RBX,8),%XMM0

(1000) 0x4487c9 VMOVSD	%XMM0,(%R13,%R15,1)

(1000) 0x4487d0 LEA	(%RAX,%RBX,1),%R14D

(1000) 0x4487d4 MOVSXD	%R14D,%R14

(1000) 0x4487d7 MOV	-0x38(%RBP),%R13

(1000) 0x4487db VMOVSD	(%R13,%R14,8),%XMM0

(1000) 0x4487e2 MOV	-0x30(%RBP),%R14

(1000) 0x4487e6 VMOVSD	%XMM0,0x8(%R14,%R15,1)

(1000) 0x4487ed LEA	(%R11,%RBX,1),%R14D

(1000) 0x4487f1 MOVSXD	%R14D,%R14

(1000) 0x4487f4 MOV	-0x38(%RBP),%R13

(1000) 0x4487f8 VMOVSD	(%R13,%R14,8),%XMM0

(1000) 0x4487ff MOV	-0x30(%RBP),%R14

(1000) 0x448803 VMOVSD	%XMM0,0x10(%R14,%R15,1)

(1000) 0x44880a LEA	(%R10,%RBX,1),%R14D

(1000) 0x44880e MOVSXD	%R14D,%R14

(1000) 0x448811 MOV	-0x38(%RBP),%R13

(1000) 0x448815 VMOVSD	(%R13,%R14,8),%XMM0

(1000) 0x44881c MOV	-0x30(%RBP),%R14

(1000) 0x448820 VMOVSD	%XMM0,0x18(%R14,%R15,1)

(1000) 0x448827 LEA	(%R9,%RBX,1),%R14D

(1000) 0x44882b MOVSXD	%R14D,%R14

(1000) 0x44882e MOV	-0x38(%RBP),%R13

(1000) 0x448832 VMOVSD	(%R13,%R14,8),%XMM0

(1000) 0x448839 MOV	-0x30(%RBP),%R14

(1000) 0x44883d VMOVSD	%XMM0,0x20(%R14,%R15,1)

(1000) 0x448844 LEA	(%R8,%RBX,1),%R14D

(1000) 0x448848 MOVSXD	%R14D,%R14

(1000) 0x44884b MOV	-0x38(%RBP),%R13

(1000) 0x44884f VMOVSD	(%R13,%R14,8),%XMM0

(1000) 0x448856 MOV	-0x30(%RBP),%R14

(1000) 0x44885a VMOVSD	%XMM0,0x28(%R14,%R15,1)

(1000) 0x448861 LEA	(%RSI,%RBX,1),%R14D

(1000) 0x448865 MOVSXD	%R14D,%R14

(1000) 0x448868 MOV	-0x38(%RBP),%R13

(1000) 0x44886c VMOVSD	(%R13,%R14,8),%XMM0

(1000) 0x448873 MOV	-0x30(%RBP),%R14

(1000) 0x448877 VMOVSD	%XMM0,0x30(%R14,%R15,1)

(1000) 0x44887e LEA	(%RCX,%RBX,1),%R14D

(1000) 0x448882 MOVSXD	%R14D,%R14

(1000) 0x448885 MOV	-0x38(%RBP),%R13

(1000) 0x448889 VMOVQ	(%R13,%R14,8),%XMM0

(1000) 0x448890 MOV	-0x30(%RBP),%R13

(1000) 0x448894 MOV	-0x38(%RBP),%R14

(1000) 0x448898 VMOVQ	%XMM0,0x38(%R13,%R15,1)

(1000) 0x44889f ADD	$0x40,%R15

(1000) 0x4488a3 ADD	%EDX,%EBX

(1000) 0x4488a5 CMP	%R15,%RDI

(1000) 0x4488a8 JNE	4487c0

0x4488ae MOV	-0x58(%RBP),%R15

0x4488b2 MOV	%R15D,%ECX

0x4488b5 AND	$0x7ffffff8,%ECX

0x4488bb CMP	%R15,%RCX

0x4488be JE	4488fa

0x4488c0 MOV	%R15D,%EDX

0x4488c3 SHR	$0x3,%EDX

0x4488c6 AND	$0xfffffff,%EDX

0x4488cc IMUL	%EAX,%EDX

0x4488cf SAL	$0x3,%EDX

0x4488d2 NOPW	%CS:(%RAX,%RAX,1)

(999) 0x4488e0 MOVSXD	%EDX,%RDX

(999) 0x4488e3 VMOVQ	(%R14,%RDX,8),%XMM0

(999) 0x4488e9 VMOVQ	%XMM0,(%R13,%RCX,8)

(999) 0x4488f0 INC	%RCX

(999) 0x4488f3 ADD	%EAX,%EDX

(999) 0x4488f5 CMP	%RCX,%R15

(999) 0x4488f8 JNE	4488e0

0x4488fa MOV	0x18(%R12),%RCX

0x4488ff TEST	%R15D,%R15D

0x448902 JE	44891d

0x448904 CMP	$0x4,%R15

0x448908 MOV	%RCX,-0x60(%RBP)

0x44890c JAE	448939

0x44890e VXORPD	%XMM11,%XMM11,%XMM11

0x448913 MOV	$0x1,%EBX

0x448918 JMP	448a3d

0x44891d VXORPD	%XMM11,%XMM11,%XMM11

0x448922 VPXOR	%XMM0,%XMM0,%XMM0

0x448926 MOV	-0x98(%RBP),%RAX

0x44892d MOV	-0x90(%RBP),%RDX

0x448934 JMP	448aeb

0x448939 MOV	%R15,%RSI

0x44893c SHR	$0x2,%RSI

0x448940 VXORPD	%XMM11,%XMM11,%XMM11

0x448945 MOV	$0x1,%EBX

0x44894a MOV	$0x2,%EDI

0x44894f VBROADCASTSD	0xb59a0(%RIP),%YMM8

0x448958 VXORPD	%XMM9,%XMM9,%XMM9

0x44895d NOPL	(%RAX)

(997) 0x448960 MOVSXD	-0x8(%RCX,%RDI,4),%RAX

(997) 0x448965 LEA	-0x1(%RDI),%RDX

(997) 0x448969 MOV	%EBX,%R14D

(997) 0x44896c NEG	%R14D

(997) 0x44896f CMP	%RAX,%RDX

(997) 0x448972 CMOVE	%EBX,%R14D

(997) 0x448976 MOV	%R14D,%EBX

(997) 0x448979 NEG	%EBX

(997) 0x44897b MOVSXD	-0x4(%RCX,%RDI,4),%R13

(997) 0x448980 MOVSXD	(%RCX,%RDI,4),%R12

(997) 0x448984 LEA	0x1(%RDI),%R15

(997) 0x448988 MOVSXD	0x4(%RCX,%RDI,4),%RAX

(997) 0x44898d MOV	%RAX,-0x70(%RBP)

(997) 0x448991 LEA	0x2(%RDI),%RAX

(997) 0x448995 MOV	%RAX,-0x88(%RBP)

(997) 0x44899c MOV	-0x30(%RBP),%RAX

(997) 0x4489a0 VMOVUPD	-0x10(%RAX,%RDI,8),%YMM10

(997) 0x4489a6 VANDPD	%YMM8,%YMM10,%YMM0

(997) 0x4489ab MOV	$0x4eebc0,%RAX

(997) 0x4489b2 CALL	%RAX

(997) 0x4489b4 MOV	-0x60(%RBP),%RCX

(997) 0x4489b8 VCMPPD	$0x1,%YMM10,%YMM9,%K0

(997) 0x4489bf KMOVD	%K0,%EAX

(997) 0x4489c3 TEST	$0x1,%AL

(997) 0x4489c5 CMOVNE	%R14D,%EBX

(997) 0x4489c9 MOV	%EBX,%R8D

(997) 0x4489cc NEG	%R8D

(997) 0x4489cf CMP	%R13,%RDI

(997) 0x4489d2 CMOVE	%EBX,%R8D

(997) 0x4489d6 MOV	%R8D,%EDX

(997) 0x4489d9 NEG	%EDX

(997) 0x4489db TEST	$0x2,%AL

(997) 0x4489dd CMOVNE	%R8D,%EDX

(997) 0x4489e1 MOV	%EDX,%R8D

(997) 0x4489e4 NEG	%R8D

(997) 0x4489e7 CMP	%R12,%R15

(997) 0x4489ea CMOVE	%EDX,%R8D

(997) 0x4489ee MOV	%R8D,%EDX

(997) 0x4489f1 NEG	%EDX

(997) 0x4489f3 TEST	$0x4,%AL

(997) 0x4489f5 CMOVNE	%R8D,%EDX

(997) 0x4489f9 MOV	%EDX,%R8D

(997) 0x4489fc NEG	%R8D

(997) 0x4489ff MOV	-0x88(%RBP),%R9

(997) 0x448a06 CMP	-0x70(%RBP),%R9

(997) 0x448a0a CMOVE	%EDX,%R8D

(997) 0x448a0e MOV	%R8D,%EBX

(997) 0x448a11 NEG	%EBX

(997) 0x448a13 TEST	$0x8,%AL

(997) 0x448a15 CMOVNE	%R8D,%EBX

(997) 0x448a19 VEXTRACTF128	$0x1,%YMM0,%XMM1

(997) 0x448a1f VADDPD	%XMM1,%XMM0,%XMM0

(997) 0x448a23 VSHUFPD	$0x1,%XMM0,%XMM0,%XMM1

(997) 0x448a28 VADDSD	%XMM1,%XMM0,%XMM0

(997) 0x448a2c VADDSD	%XMM0,%XMM11,%XMM11

(997) 0x448a30 ADD	$0x4,%RDI

(997) 0x448a34 DEC	%RSI

(997) 0x448a37 JNE	448960

0x448a3d MOV	-0x58(%RBP),%R15

0x448a41 MOV	%R15,%R14

0x448a44 AND	$-0x4,%R14

0x448a48 CMP	%R15,%R14

0x448a4b JE	448ab7

0x448a4d MOV	%R15,%R12

0x448a50 NEG	%R12

0x448a53 INC	%R14

0x448a56 MOV	-0x30(%RBP),%R13

0x448a5a NOPW	(%RAX,%RAX,1)

(998) 0x448a60 VMOVSD	%XMM11,-0x70(%RBP)

(998) 0x448a65 MOVSXD	-0x4(%RCX,%R14,4),%RAX

(998) 0x448a6a MOV	%EBX,%ECX

(998) 0x448a6c NEG	%ECX

(998) 0x448a6e CMP	%RAX,%R14

(998) 0x448a71 CMOVE	%EBX,%ECX

(998) 0x448a74 VMOVSD	-0x8(%R13,%R14,8),%XMM0

(998) 0x448a7b MOV	%ECX,%EBX

(998) 0x448a7d NEG	%EBX

(998) 0x448a7f VUCOMISD	0xb7c71(%RIP),%XMM0

(998) 0x448a87 CMOVA	%ECX,%EBX

(998) 0x448a8a VANDPD	0xb5864(%RIP){1to2},%XMM0,%XMM0

(998) 0x448a94 VZEROUPPER

(998) 0x448a97 CALL	4df2c0 <log>

(998) 0x448a9c VMOVSD	-0x70(%RBP),%XMM11

(998) 0x448aa1 MOV	-0x60(%RBP),%RCX

(998) 0x448aa5 VADDSD	%XMM0,%XMM11,%XMM11

(998) 0x448aa9 LEA	0x1(%R12,%R14,1),%RAX

(998) 0x448aae INC	%R14

(998) 0x448ab1 CMP	$0x1,%RAX

(998) 0x448ab5 JNE	448a60

0x448ab7 TEST	%EBX,%EBX

0x448ab9 SETG	%AL

0x448abc KMOVD	%EAX,%K1

0x448ac0 VPXOR	%XMM1,%XMM1,%XMM1

0x448ac4 VMOVSD	0xb7c24(%RIP),%XMM0

0x448acc VMOVSD	%XMM1,%XMM0,%XMM0{%K1}

0x448ad2 MOV	-0x98(%RBP),%RAX

0x448ad9 MOV	-0xa0(%RBP),%R12

0x448ae0 MOV	-0x90(%RBP),%RDX

0x448ae7 MOV	-0x38(%RBP),%R14

0x448aeb LEA	-0x74(%RBP),%R10

0x448aef MOV	%RSP,%RBX

0x448af2 VMOVSD	%XMM11,(%RDX)

0x448af6 VMOVQ	%XMM0,(%RAX)

0x448afa MOV	-0x4c(%RBP),%EAX

0x448afd MOV	(%R12),%R8

0x448b01 MOV	%RSP,%R9

0x448b04 LEA	-0x10(%R9),%RDI

0x448b08 MOV	%RDI,%RSP

0x448b0b MOV	%RSP,%RSI

0x448b0e LEA	-0x10(%RSI),%RDX

0x448b12 MOV	%RDX,%RSP

0x448b15 MOV	%R15D,-0x10(%R9)

0x448b19 MOV	%EAX,-0x10(%RSI)

0x448b1c SUB	$0x8,%RSP

0x448b20 MOV	%R14,%RSI

0x448b23 MOV	-0xa8(%RBP),%R9

0x448b2a PUSH	%R10

0x448b2c VZEROUPPER

0x448b2f CALL	4043a0 <dgetri_@plt>

0x448b34 ADD	$0x10,%RSP

0x448b38 MOV	%RBX,%RSP

0x448b3b LEA	-0x78(%RBP),%RDI

0x448b3f CALL	4df1e0 <_ZN11qmcplusplus16BlasThreadingEnvD1Ev>

0x448b44 LEA	-0x28(%RBP),%RSP

0x448b48 POP	%RBX

0x448b49 POP	%R12

0x448b4b POP	%R13

0x448b4d POP	%R14

0x448b4f POP	%R15

0x448b51 POP	%RBP

0x448b52 RET

0x448b53 MOV	$0x4fe63e,%EDI

0x448b58 VZEROUPPER

0x448b5b CALL	404260 <_ZSt20__throw_length_errorPKc@plt>

0x448b60 MOV	$0x10,%EDI

0x448b65 CALL	404510 <__cxa_allocate_exception@plt>

0x448b6a MOV	%RAX,%RBX

0x448b6d MOV	-0x48(%RBP),%RDI

0x448b71 MOV	-0xb0(%RBP),%RSI

0x448b78 CALL	40f7b0 <_ZNSt7__cxx119to_stringEm>

0x448b7d MOV	$0x4fe137,%ESI

0x448b82 MOV	-0x68(%RBP),%RDI

0x448b86 MOV	-0x48(%RBP),%RDX

0x448b8a CALL	40ee60 <_ZStplIcSt11char_traitsIcESaIcEENSt7__cxx1112basic_stringIT_T0_T1_EEPKS5_OS8_>

0x448b8f MOV	$0x1,%R15B

0x448b92 MOV	%RBX,%RDI

0x448b95 MOV	-0x68(%RBP),%RSI

0x448b99 CALL	404120 <_ZNSt13runtime_errorC1ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE@plt>

0x448b9e XOR	%R15D,%R15D

0x448ba1 MOV	$0x5657c0,%ESI

0x448ba6 MOV	$0x404770,%EDX

0x448bab MOV	%RBX,%RDI

0x448bae CALL	404230 <__cxa_throw@plt>

0x448bb3 MOV	$0x10,%EDI

0x448bb8 CALL	404510 <__cxa_allocate_exception@plt>

0x448bbd MOV	%RAX,%RBX

0x448bc0 MOV	$0x4fe173,%ESI

0x448bc5 MOV	%RAX,%RDI

0x448bc8 CALL	404110 <_ZNSt13runtime_errorC1EPKc@plt>

0x448bcd MOV	$0x5657c0,%ESI

0x448bd2 MOV	$0x404770,%EDX

0x448bd7 MOV	%RBX,%RDI

0x448bda CALL	404230 <__cxa_throw@plt>

0x448bdf MOV	%RAX,%R14

0x448be2 MOV	-0x68(%RBP),%RCX

0x448be6 MOV	(%RCX),%RDI

0x448be9 ADD	$0x10,%RCX

0x448bed CMP	%RCX,%RDI

0x448bf0 JE	448bfd

0x448bf2 MOV	(%RCX),%RSI

0x448bf5 INC	%RSI

0x448bf8 CALL	404070 <_ZdlPvm@plt>

0x448bfd MOV	-0x48(%RBP),%RCX

0x448c01 MOV	(%RCX),%RDI

0x448c04 ADD	$0x10,%RCX

0x448c08 CMP	%RCX,%RDI

0x448c0b JNE	448c23

0x448c0d TEST	%R15B,%R15B

0x448c10 JNE	448c5d

(1001) 0x448c12 LEA	-0x78(%RBP),%RDI

(1001) 0x448c16 CALL	4df1e0 <_ZN11qmcplusplus16BlasThreadingEnvD1Ev>

(1001) 0x448c1b MOV	%R14,%RDI

(1001) 0x448c1e CALL	404270 <_Unwind_Resume@plt>

(1001) 0x448c23 MOV	(%RCX),%RSI

(1001) 0x448c26 INC	%RSI

(1001) 0x448c29 CALL	404070 <_ZdlPvm@plt>

(1001) 0x448c2e TEST	%R15B,%R15B

(1001) 0x448c31 JE	448c12

0x448c33 JMP	448c5d

0x448c35 MOV	%RAX,%R14

0x448c38 MOV	-0x48(%RBP),%RCX

0x448c3c MOV	(%RCX),%RDI

0x448c3f ADD	$0x10,%RCX

0x448c43 CMP	%RCX,%RDI

0x448c46 JE	448c5d

0x448c48 MOV	(%RCX),%RSI

0x448c4b INC	%RSI

0x448c4e CALL	404070 <_ZdlPvm@plt>

0x448c53 JMP	448c5d

0x448c55 MOV	%RAX,%R14

0x448c58 JMP	448c5d

0x448c5a MOV	%RAX,%R14

0x448c5d MOV	%RBX,%RDI

0x448c60 CALL	4047a0 <__cxa_free_exception@plt>

0x448c65 LEA	-0x78(%RBP),%RDI

0x448c69 CALL	4df1e0 <_ZN11qmcplusplus16BlasThreadingEnvD1Ev>

0x448c6e MOV	%R14,%RDI

0x448c71 CALL	404270 <_Unwind_Resume@plt>

0x448c76 JMP	448c7a

0x448c78 JMP	448c7a

0x448c7a MOV	%RAX,%R14

0x448c7d LEA	-0x78(%RBP),%RDI

0x448c81 CALL	4df1e0 <_ZN11qmcplusplus16BlasThreadingEnvD1Ev>

0x448c86 MOV	%R14,%RDI

0x448c89 CALL	404270 <_Unwind_Resume@plt>

0x448c8e XCHG	%AX,%AX

Coverage (%)	Name	Source Location	Module
►51.01+	miniqmcreference::DiracDetermi[...]	DelayedUpdate.h:79	exec
○	miniqmcreference::DiracDetermi[...]	DiracDeterminantRef.cpp:238	exec
○	qmcplusplus::WaveFunction::eva[...]	WaveFunction.cpp:170	exec
○	main.extracted.112	miniqmc.cpp:397	exec
○	__kmp_invoke_microtask		libiomp5.so
○	__kmp_invoke_task_func		libiomp5.so
►48.99+	miniqmcreference::DiracDetermi[...]	DelayedUpdate.h:79	exec
○	miniqmcreference::DiracDetermi[...]	DiracDeterminantRef.cpp:238	exec
○	qmcplusplus::WaveFunction::eva[...]	WaveFunction.cpp:171	exec
○	main.extracted.112	miniqmc.cpp:397	exec
○	__kmp_invoke_microtask		libiomp5.so
○	__kmp_invoke_task_func		libiomp5.so

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run orig_0

Source file and lines	DiracMatrix.h:31-121
Module	exec

The function is defined in:

/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracMatrix.h:31-37,76-77,83-85,95-101,108-121
/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/ext/new_allocator.h:145
/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/basic_string.h:195,211,230,239-245
/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/std_abs.h:72
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/inner_product.hpp:210-212
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/BLAS.hpp:790,827
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Utilities/OpenMP.h:37-43
/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/stl_vector.h:353,919,939-942,1169,1758-1762,1794-1798
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsMatrix.h:77-78
/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/stl_uninitialized.h:687,1031
/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/alloc_traits.h:261
/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/vector.tcc:617-626,640,678-683
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:248-249
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/Mallocator.hpp:50-52,61,68-70,76-78

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 83.50 to 17.00 cycles (4.91x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is probably not vectorized. Only 12% of vector register length is used (average across all SSE/AVX instructions).

Details

Store and arithmetical SSE/AVX instructions are used in scalar version (process only one data element in vector registers).

Workaround

Read the "512-bits vectorization" report at "Potential" confidence level.

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

512-bits vectorization

On some x86 processors supporting 512-bits vectorization, compilers are often too conservative and limit vectorization to 256 bits. Performance can then be improved by enforcing 512-bits vectorization, especially with many vectorized and high trip count loops. 512-bits vectorization performance overhead (compared to 256-bits) is generally lower on newer processors.

Workaround

Recompile with -mprefer-vector-width=512

Masked instructions

Detected masked instructions.

Details

Vector registers are partially exploited, which is expected if your function is irregular or mixes elements of different sizes.

Workaround

If your function is irregular, try to remove or hoist conditional structures out of your function. If it mixes elements of different sizes, try to uniformize them.

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

_Unwind_Resume@plt: 2 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracMatrix.h:121
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracMatrix.h:121
__cxa_allocate_exception@plt: 2 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/Mallocator.hpp:69
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/Mallocator.hpp:77
__cxa_free_exception@plt: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/Mallocator.hpp:77
__cxa_throw@plt: 2 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/Mallocator.hpp:69
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/Mallocator.hpp:77
__kmpc_fork_call@plt: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Utilities/OpenMP.h:38
_intel_fast_memcpy: 1 occurrences►
- /usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/alloc_traits.h:261
_intel_fast_memset: 2 occurrences►
- /usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/alloc_traits.h:261
- /usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/alloc_traits.h:261
aligned_alloc@plt: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/Mallocator.hpp:61
dgetrf_@plt: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/BLAS.hpp:790
dgetri_@plt: 2 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/BLAS.hpp:827
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/BLAS.hpp:827
free@plt: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/Mallocator.hpp:78
operator delete(void*, unsigned long): 2 occurrences►
- /usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/ext/new_allocator.h:145
- /usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/ext/new_allocator.h:145
qmcplusplus::BlasThreadingEnv::BlasThreadingEnv(int): 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracMatrix.h:96
qmcplusplus::BlasThreadingEnv::~BlasThreadingEnv(): 3 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracMatrix.h:121
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracMatrix.h:121
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracMatrix.h:121
std::__cxx11::basic_string
, std::allocator
> std::operator+
, std::allocator
>(char const*, std::__cxx11::basic_string, std::allocator >&&): 1 occurrences►
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/Mallocator.hpp:69
std::__cxx11::to_string(unsigned long): 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/Mallocator.hpp:70
std::__throw_length_error(char const*): 1 occurrences►
- /usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/stl_vector.h:1759
std::runtime_error::runtime_error(char const*): 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/Mallocator.hpp:77
std::runtime_error::runtime_error(std::__cxx11::basic_string
, std::allocator
> const&): 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/Mallocator.hpp:69
std::vector
>::_M_default_append(unsigned long): 2 occurrences►
- /usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/stl_vector.h:940
- /usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/stl_vector.h:940

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

CMOVA: 1 occurrences►
- /usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/stl_vector.h:1761
VCVTTSD2SI: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracMatrix.h:83
VPMOVSXBQ: 2 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/inner_product.hpp:211
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/inner_product.hpp:212
VZEROUPPER: 6 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/Mallocator.hpp:61
- /usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/alloc_traits.h:261
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/BLAS.hpp:827
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/BLAS.hpp:790
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/BLAS.hpp:827
- /usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/stl_vector.h:1759

Conversion instructions

Detected expensive conversion instructions.

Details

CLTQ: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracMatrix.h:84
VCVTTSD2SI (FP64 to INT32/64, scalar): 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracMatrix.h:83
VPMOVSXBQ: 2 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/inner_product.hpp:211
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/inner_product.hpp:212

Workaround

Avoid mixing data with different types. In particular, check if the type of constants is the same as array elements.

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 596 bytes. The binary function is storing 300 bytes.

General properties

nb instructions	462
nb uops	501
loop length	1877
used x86 registers	16
used mmx registers	0
used xmm registers	4
used ymm registers	4
used zmm registers	0
nb stack references	23

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	83.50 cycles
front end	83.50 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11
uops	28.90	28.80	28.33	28.33	39.50	28.80	28.70	39.50	39.50	39.50	28.80	28.33
cycles	28.90	28.80	28.33	28.33	39.50	28.80	28.70	39.50	39.50	39.50	28.80	28.33

Execution ports to units layout:

P0 (256 bits): VPU, BRU, ALU, DIV/SQRT
P1 (256 bits): ALU, VPU
P2 (512 bits): load
P3 (512 bits): load
P4 (512 bits): store data
P5 (512 bits): ALU, VPU
P6: ALU, BRU
P7: store address
P8: store address
P9 (512 bits): store data
P10: ALU
P11 (512 bits): load

Cycles executing div or sqrt instructions

Cycles summary

Front-end	83.50
Dispatch	39.50
Overall L1	83.50

Vectorization ratios

INT

all	9%
load	25%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
other	16%

all	44%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	57%

INT+FP

all	12%
load	18%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	21%

Vector efficiency ratios

INT

all	12%
load	10%
store	11%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
other	13%

all	18%
load	12%
store	12%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	19%

INT+FP

all	12%
load	10%
store	11%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	14%

Cycles and memory resources usage

Detected masked instructions: assuming all mask elements are active. Assuming all data fit into the L1 cache, each call to the function takes 83.50 cycles. At this rate:

3% of peak load performance is reached (7.14 out of 192.00 bytes loaded per cycle (GB/s @ 1GHz))
2% of peak store performance is reached (3.59 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Performance is limited by instruction throughput (loading/decoding program instructions to execution core) (front-end is a bottleneck). By removing all these bottlenecks, you can lower the cost of an iteration from 83.50 to 39.50 cycles (2.11x speedup).

ASM code

In the binary file, the address of the function is: 448160

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
PUSH %R15	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R14	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R13	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R12	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %RBX	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
SUB $0xa8,%RSP	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV %R8,-0x98(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RCX,-0x90(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RDX,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RSI,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RDI,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVL $0x1,-0x3c(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
LEA -0x3c(%RBP),%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV $0x567b90,%EDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV $0x4446c0,%EDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV $0x1,%ESI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CALL 4041d0 <__kmpc_fork_call@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV -0x3c(%RBP),%ESI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA -0x78(%RBP),%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CALL 4df1c0 <_ZN11qmcplusplus16BlasThreadingEnvC1Ei>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV (%R14),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %EAX,-0x3c(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOV 0x8(%R14),%R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %R15D,-0x4c(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOV 0x30(%R14),%R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
SAL $0x20,%RAX	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
MOV %R14,-0x38(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R12,-0xa0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JE 448444 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x2e4>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV 0x8(%RBX),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x30(%RBX),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
SAR $0x20,%RAX	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
CMP $0x1,%RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
ADC $0,%RAX	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	1	0.50	N/A
VPBROADCASTQ %RCX,%YMM0	1	0	0	0	0	0	1	0	0	0	0	0	0	3	1	scal (12.5%)
CMP $0x1,%RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV %R15,-0x30(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JE 44838c <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x22c>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %RAX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
AND $-0x2,%RDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
MOV %RAX,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
AND $-0x4,%R8	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
LEA -0x1(%R8),%R9	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R15,%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
SAL $0x4,%R10	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	scal (12.5%)
LEA (,%RCX,8),%R11	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA (%R14,%R15,8),%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R14,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV $0x1,%R14D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
XOR %ESI,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VPMOVSXBQ 0xb7e80(%RIP),%YMM1	2	0	0	0.33	0.33	0	1	0	0	0	0	0	0.33	3	1	vect (6.3%)
JMP 448267 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x107>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XOR %ESI,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
TEST $0x1,%AL	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	N/A
MOV -0xa0(%RBP),%R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x38(%RBP),%R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x30(%RBP),%R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
JE 448444 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x2e4>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %RAX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
AND $-0x4,%RDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
JE 448409 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x2a9>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
LEA -0x1(%RDI),%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VPBROADCASTQ %RSI,%YMM1	1	0	0	0	0	0	1	0	0	0	0	0	0	3	1	scal (12.5%)
MOV %RSI,%R9	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
IMUL %R15,%R9	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
LEA (%R14,%R9,8),%R9	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XOR %R10D,%R10D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
VPMOVSXBQ 0xb7cf1(%RIP),%YMM2	2	0	0	0.33	0.33	0	1	0	0	0	0	0	0.33	3	1	vect (6.3%)
NOP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP %RDI,%RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JNE 44840b <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x2ab>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
JMP 448444 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x2e4>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
XOR %EDI,%EDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RDI,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
IMUL %RCX,%R8	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
ADD %RSI,%R8	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
LEA (%RDX,%R8,8),%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
SAL $0x3,%RCX	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
IMUL %R15,%RSI	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
LEA (%R14,%RSI,8),%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA 0x30(%R12),%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RAX,-0xa8(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
CMP %R15D,0x30(%R12)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (6.3%)
JGE 448729 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x5c9>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %RSP,-0x88(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RSP,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD $-0x10,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RBX,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %RSP,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD $-0x10,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R13,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %RSP,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD $-0x10,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RAX,-0x70(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RAX,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %RSP,%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
ADD $-0x10,%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %R10,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOVSXD %R15D,%R14	1	0	0.33	0	0	0	0.33	0	0	0	0	0.33	0	1	0.33	N/A
MOV 0x18(%R12),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x20(%R12),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB %RCX,%RDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
SAR $0x2,%RDX	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
MOV %R14,-0x60(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
SUB %RDX,%R14	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
JBE 448612 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x4b2>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %RSP,-0xc8(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RSP,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD $-0x20,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RDX,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %RSP,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD $-0x20,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RCX,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV 0x20(%R12),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x28(%R12),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RSI,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB %RDI,%RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
SAR $0x2,%RAX	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
CMP %R14,%RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV %R10,-0xd0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RDI,-0x58(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JAE 44862c <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x4cc>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %RBX,-0xc0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RSI,-0xb8(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RDX,-0x68(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RCX,-0x48(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R15,-0x30(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x18(%R12),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RDI,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RAX,-0x80(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
SUB %RAX,%RCX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %RCX,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SAR $0x2,%RCX	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
MOV $0x1fffffffffffffff,%RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.28	N/A
MOV %RCX,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
XOR %RAX,%RDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
CMP %R14,%RDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JB 448b53 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x9f3>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP %R14,%RCX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV %R14,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMOVA %RCX,%R15	2	1	0	0	0	0	0	1	0	0	0	0	0	1-2	1	N/A
ADD %RCX,%R15	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
CMP %RAX,%R15	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
CMOVAE %RAX,%R15	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	1	0.50	N/A
LEA (,%R15,4),%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RAX,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
AND $-0x40,%RSI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
ADD $0x40,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
TEST $0xf,%R15B	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	N/A
MOV %RAX,-0xb0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
CMOVE %RAX,%RSI	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	1	0.50	N/A
MOV $0x40,%EDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
VZEROUPPER	2	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 404800 <aligned_alloc@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
TEST %RAX,%RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (12.5%)
JE 448b60 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0xa00>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
LEA (%RAX,%RBX,1),%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA (,%R14,4),%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RAX,-0x48(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RDI,-0x68(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
XOR %ESI,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CALL 4efda0 <_intel_fast_memset>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV -0x80(%RBP),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP -0x58(%RBP),%RDI	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JE 4485cf <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x46f>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
ADD $-0x4,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
AND $-0x4,%RBX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
ADD $0x4,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV -0x48(%RBP),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x80(%RBP),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RBX,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 4efce0 <_intel_fast_memcpy>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV -0x80(%RBP),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
TEST %RDI,%RDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (12.5%)
MOV -0xc0(%RBP),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
JE 4485ed <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x48d>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP %RDI,-0xb8(%RBP)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JE 448bb3 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0xa53>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CALL 404460 <free@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV -0x48(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RCX,0x18(%R12)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV -0x68(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%RAX,%R14,4),%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RAX,0x20(%R12)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
LEA (%RCX,%R15,4),%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RAX,0x28(%R12)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV -0x30(%RBP),%R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
JMP 44864b <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x4eb>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
JAE 448664 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x504>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x60(%RBP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%RCX,%RDX,4),%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP %RDX,%RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV -0x38(%RBP),%R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
JE 448668 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x508>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %RDX,0x20(%R12)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JMP 448668 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x508>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
LEA (,%R14,4),%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XOR %ESI,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VZEROUPPER	2	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 4efda0 <_intel_fast_memset>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV -0x58(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%RAX,%R14,4),%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RAX,0x20(%R12)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV -0xc8(%RBP),%RSP	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x18(%R12),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x38(%RBP),%R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0xd0(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
JMP 448668 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x508>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
MOV -0x38(%RBP),%R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0xa8(%RBP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOVL $-0x1,(%R9)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOV %R15D,(%RBX)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOV %R15D,(%R13)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
SUB $0x8,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %RBX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R14,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R13,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV -0x70(%RBP),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RBX,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
PUSH %R10	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
VZEROUPPER	2	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 4043a0 <dgetri_@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
ADD $0x10,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
VCVTTSD2SI (%RBX),%EAX	2	1.50	0.50	0.33	0.33	0	0	0	0	0	0	0	0.33	7	1	scal (12.5%)
MOV %EAX,0x30(%R12)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
CLTQ	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.33	scal (12.5%)
MOV (%R12),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x8(%R12),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RCX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB %RDX,%RDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
SAR $0x3,%RDI	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
MOV %RAX,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB %RDI,%RSI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
JBE 4486cf <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x56f>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %R12,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 448c90 <_ZNSt6vectorIdN11qmcplusplus10MallocatorIdLm64EEEE17_M_default_appendEm>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
JMP 4486df <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x57f>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
JAE 4486df <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x57f>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
LEA (%RDX,%RAX,8),%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP %RAX,%RCX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 4486df <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x57f>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %RAX,0x8(%R12)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x78(%R12),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x80(%R12),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB %RCX,%RDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
SAR $0x3,%RDX	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
MOV -0x60(%RBP),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
SUB %RDX,%RSI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
JBE 44870b <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x5ab>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
LEA 0x78(%R12),%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CALL 448c90 <_ZNSt6vectorIdN11qmcplusplus10MallocatorIdLm64EEEE17_M_default_appendEm>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
JMP 448722 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x5c2>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
JAE 448722 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x5c2>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x60(%RBP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%RCX,%RDX,8),%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP %RCX,%RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 448722 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x5c2>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %RCX,0x80(%R12)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV -0x88(%RBP),%RSP	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x18(%R12),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA -0x3c(%RBP),%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA -0x4c(%RBP),%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA -0x74(%RBP),%R9	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RDI,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R14,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
VZEROUPPER	2	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 404680 <dgetrf_@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOVSXD -0x3c(%RBP),%R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x78(%R12),%R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
TEST %R15,%R15	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (12.5%)
MOV %R13,-0x30(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R15,-0x58(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JLE 4488fa <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x79a>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x4c(%RBP),%R11D	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA 0x1(%R11),%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
CMP $0x8,%R15D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
JB 4488ae <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x74e>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
LEA (,%R11,8),%ECX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
LEA 0x8(,%R11,8),%EDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
LEA (%R11,%R11,2),%ESI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
LEA 0x6(%RSI,%RSI,1),%ESI	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
SUB %R11D,%ECX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
ADD $0x7,%ECX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV -0x58(%RBP),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (,%RDI,8),%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
AND $-0x40,%RDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
LEA 0x5(%R11,%R11,4),%R8D	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
LEA 0x4(,%R11,4),%R9D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
LEA 0x3(%R11,%R11,2),%R10D	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
LEA 0x2(%R11,%R11,1),%R11D	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
XOR %EBX,%EBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XOR %R15D,%R15D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XCHG %AX,%AX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0x58(%RBP),%R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %R15D,%ECX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
AND $0x7ffffff8,%ECX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
CMP %R15,%RCX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 4488fa <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x79a>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %R15D,%EDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SHR $0x3,%EDX	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
AND $0xfffffff,%EDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
IMUL %EAX,%EDX	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
SAL $0x3,%EDX	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV 0x18(%R12),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
TEST %R15D,%R15D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (6.3%)
JE 44891d <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x7bd>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP $0x4,%R15	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV %RCX,-0x60(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JAE 448939 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x7d9>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
VXORPD %XMM11,%XMM11,%XMM11	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
MOV $0x1,%EBX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
JMP 448a3d <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x8dd>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
VXORPD %XMM11,%XMM11,%XMM11	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
VPXOR %XMM0,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
MOV -0x98(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x90(%RBP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
JMP 448aeb <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x98b>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
MOV %R15,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SHR $0x2,%RSI	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
VXORPD %XMM11,%XMM11,%XMM11	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
MOV $0x1,%EBX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV $0x2,%EDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
VBROADCASTSD 0xb59a0(%RIP),%YMM8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	3	0.33	scal (12.5%)
VXORPD %XMM9,%XMM9,%XMM9	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0x58(%RBP),%R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %R15,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
AND $-0x4,%R14	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
CMP %R15,%R14	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 448ab7 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x957>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %R15,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
NEG %R12	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
INC %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV -0x30(%RBP),%R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
TEST %EBX,%EBX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (6.3%)
SETG %AL	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	1	0.50	N/A
KMOVD %EAX,%K1	1	0	0	0	0	0	1	0	0	0	0	0	0	3	1	N/A
VPXOR %XMM1,%XMM1,%XMM1	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
VMOVSD 0xb7c24(%RIP),%XMM0	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMOVSD %XMM1,%XMM0,%XMM0{%K1}	1	0.33	0.33	0	0	0	0.33	0	0	0	0	0	0	1	0.33	scal (12.5%)
MOV -0x98(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0xa0(%RBP),%R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x90(%RBP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x38(%RBP),%R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA -0x74(%RBP),%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RSP,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
VMOVSD %XMM11,(%RDX)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
VMOVQ %XMM0,(%RAX)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV -0x4c(%RBP),%EAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%R12),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RSP,%R9	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LEA -0x10(%R9),%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RDI,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %RSP,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LEA -0x10(%RSI),%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RDX,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %R15D,-0x10(%R9)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOV %EAX,-0x10(%RSI)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
SUB $0x8,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %R14,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV -0xa8(%RBP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
PUSH %R10	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
VZEROUPPER	2	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 4043a0 <dgetri_@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
ADD $0x10,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %RBX,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
LEA -0x78(%RBP),%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CALL 4df1e0 <_ZN11qmcplusplus16BlasThreadingEnvD1Ev>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
LEA -0x28(%RBP),%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
POP %RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %RBP	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
RET	1	0.50	0	0.33	0.33	0	0	0.50	0	0	0	0	0.33	0	2.13	N/A
MOV $0x4fe63e,%EDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
VZEROUPPER	2	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 404260 <_ZSt20__throw_length_errorPKc@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV $0x10,%EDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
CALL 404510 <__cxa_allocate_exception@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV %RAX,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV -0x48(%RBP),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0xb0(%RBP),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CALL 40f7b0 <_ZNSt7__cxx119to_stringEm>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV $0x4fe137,%ESI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV -0x68(%RBP),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x48(%RBP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CALL 40ee60 <_ZStplIcSt11char_traitsIcESaIcEENSt7__cxx1112basic_stringIT_T0_T1_EEPKS5_OS8_>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV $0x1,%R15B	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %RBX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV -0x68(%RBP),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CALL 404120 <_ZNSt13runtime_errorC1ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
XOR %R15D,%R15D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV $0x5657c0,%ESI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV $0x404770,%EDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %RBX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 404230 <__cxa_throw@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV $0x10,%EDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
CALL 404510 <__cxa_allocate_exception@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV %RAX,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV $0x4fe173,%ESI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %RAX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 404110 <_ZNSt13runtime_errorC1EPKc@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV $0x5657c0,%ESI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV $0x404770,%EDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %RBX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 404230 <__cxa_throw@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV %RAX,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV -0x68(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RCX),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
ADD $0x10,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP %RCX,%RDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 448bfd <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0xa9d>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV (%RCX),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
INC %RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 404070 <_ZdlPvm@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV -0x48(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RCX),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
ADD $0x10,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP %RCX,%RDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JNE 448c23 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0xac3>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
TEST %R15B,%R15B	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	N/A
JNE 448c5d <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0xafd>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
JMP 448c5d <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0xafd>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
MOV %RAX,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV -0x48(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RCX),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
ADD $0x10,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP %RCX,%RDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 448c5d <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0xafd>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV (%RCX),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
INC %RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 404070 <_ZdlPvm@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
JMP 448c5d <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0xafd>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
MOV %RAX,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JMP 448c5d <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0xafd>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
MOV %RAX,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RBX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 4047a0 <__cxa_free_exception@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
LEA -0x78(%RBP),%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CALL 4df1e0 <_ZN11qmcplusplus16BlasThreadingEnvD1Ev>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV %R14,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 404270 <_Unwind_Resume@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
JMP 448c7a <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0xb1a>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
JMP 448c7a <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0xb1a>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
MOV %RAX,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LEA -0x78(%RBP),%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CALL 4df1e0 <_ZN11qmcplusplus16BlasThreadingEnvD1Ev>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV %R14,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 404270 <_Unwind_Resume@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
XCHG %AX,%AX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run orig_0

Source file and lines	DiracMatrix.h:31-121
Module	exec

The function is defined in:

/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracMatrix.h:31-37,76-77,83-85,95-101,108-121
/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/ext/new_allocator.h:145
/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/basic_string.h:195,211,230,239-245
/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/std_abs.h:72
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/inner_product.hpp:210-212
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/BLAS.hpp:790,827
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Utilities/OpenMP.h:37-43
/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/stl_vector.h:353,919,939-942,1169,1758-1762,1794-1798
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsMatrix.h:77-78
/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/stl_uninitialized.h:687,1031
/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/alloc_traits.h:261
/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/vector.tcc:617-626,640,678-683
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:248-249
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/Mallocator.hpp:50-52,61,68-70,76-78

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is probably not vectorized. Only 12% of vector register length is used (average across all SSE/AVX instructions).

Details

Store and arithmetical SSE/AVX instructions are used in scalar version (process only one data element in vector registers).

Workaround

Read the "512-bits vectorization" report at "Potential" confidence level.

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

512-bits vectorization

Workaround

Recompile with -mprefer-vector-width=512

Masked instructions

Detected masked instructions.

Details

Vector registers are partially exploited, which is expected if your function is irregular or mixes elements of different sizes.

Workaround

If your function is irregular, try to remove or hoist conditional structures out of your function. If it mixes elements of different sizes, try to uniformize them.

CALL instructions

Detected function call instructions.

Details

_Unwind_Resume@plt: 2 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracMatrix.h:121
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracMatrix.h:121
__cxa_allocate_exception@plt: 2 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/Mallocator.hpp:69
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/Mallocator.hpp:77
__cxa_free_exception@plt: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/Mallocator.hpp:77
__cxa_throw@plt: 2 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/Mallocator.hpp:69
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/Mallocator.hpp:77
__kmpc_fork_call@plt: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Utilities/OpenMP.h:38
_intel_fast_memcpy: 1 occurrences►
- /usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/alloc_traits.h:261
_intel_fast_memset: 2 occurrences►
- /usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/alloc_traits.h:261
- /usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/alloc_traits.h:261
aligned_alloc@plt: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/Mallocator.hpp:61
dgetrf_@plt: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/BLAS.hpp:790
dgetri_@plt: 2 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/BLAS.hpp:827
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/BLAS.hpp:827
free@plt: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/Mallocator.hpp:78
operator delete(void*, unsigned long): 2 occurrences►
- /usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/ext/new_allocator.h:145
- /usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/ext/new_allocator.h:145
qmcplusplus::BlasThreadingEnv::BlasThreadingEnv(int): 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracMatrix.h:96
qmcplusplus::BlasThreadingEnv::~BlasThreadingEnv(): 3 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracMatrix.h:121
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracMatrix.h:121
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracMatrix.h:121
std::__cxx11::basic_string
, std::allocator
> std::operator+
, std::allocator
>(char const*, std::__cxx11::basic_string, std::allocator >&&): 1 occurrences►
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/Mallocator.hpp:69
std::__cxx11::to_string(unsigned long): 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/Mallocator.hpp:70
std::__throw_length_error(char const*): 1 occurrences►
- /usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/stl_vector.h:1759
std::runtime_error::runtime_error(char const*): 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/Mallocator.hpp:77
std::runtime_error::runtime_error(std::__cxx11::basic_string
, std::allocator
> const&): 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/Mallocator.hpp:69
std::vector
>::_M_default_append(unsigned long): 2 occurrences►
- /usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/stl_vector.h:940
- /usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/stl_vector.h:940

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

CMOVA: 1 occurrences►
- /usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/stl_vector.h:1761
VCVTTSD2SI: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracMatrix.h:83
VPMOVSXBQ: 2 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/inner_product.hpp:211
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/inner_product.hpp:212
VZEROUPPER: 6 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/Mallocator.hpp:61
- /usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/alloc_traits.h:261
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/BLAS.hpp:827
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/BLAS.hpp:790
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/BLAS.hpp:827
- /usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/stl_vector.h:1759

Conversion instructions

Detected expensive conversion instructions.

Details

CLTQ: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracMatrix.h:84
VCVTTSD2SI (FP64 to INT32/64, scalar): 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracMatrix.h:83
VPMOVSXBQ: 2 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/inner_product.hpp:211
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/inner_product.hpp:212

Workaround

Avoid mixing data with different types. In particular, check if the type of constants is the same as array elements.

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 596 bytes. The binary function is storing 300 bytes.

General properties

nb instructions	462
nb uops	501
loop length	1877
used x86 registers	16
used mmx registers	0
used xmm registers	4
used ymm registers	4
used zmm registers	0
nb stack references	23

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	83.50 cycles
front end	83.50 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11
uops	28.90	28.80	28.33	28.33	39.50	28.80	28.70	39.50	39.50	39.50	28.80	28.33
cycles	28.90	28.80	28.33	28.33	39.50	28.80	28.70	39.50	39.50	39.50	28.80	28.33

Execution ports to units layout:

P0 (256 bits): VPU, BRU, ALU, DIV/SQRT
P1 (256 bits): ALU, VPU
P2 (512 bits): load
P3 (512 bits): load
P4 (512 bits): store data
P5 (512 bits): ALU, VPU
P6: ALU, BRU
P7: store address
P8: store address
P9 (512 bits): store data
P10: ALU
P11 (512 bits): load

Cycles executing div or sqrt instructions

Cycles summary

Front-end	83.50
Dispatch	39.50
Overall L1	83.50

Vectorization ratios

INT

all	9%
load	25%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
other	16%

all	44%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	57%

INT+FP

all	12%
load	18%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	21%

Vector efficiency ratios

INT

all	12%
load	10%
store	11%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
other	13%

all	18%
load	12%
store	12%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	19%

INT+FP

all	12%
load	10%
store	11%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	14%

Cycles and memory resources usage

Detected masked instructions: assuming all mask elements are active. Assuming all data fit into the L1 cache, each call to the function takes 83.50 cycles. At this rate:

3% of peak load performance is reached (7.14 out of 192.00 bytes loaded per cycle (GB/s @ 1GHz))
2% of peak store performance is reached (3.59 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

ASM code

In the binary file, the address of the function is: 448160

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
PUSH %R15	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R14	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R13	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R12	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %RBX	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
SUB $0xa8,%RSP	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV %R8,-0x98(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RCX,-0x90(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RDX,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RSI,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RDI,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVL $0x1,-0x3c(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
LEA -0x3c(%RBP),%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV $0x567b90,%EDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV $0x4446c0,%EDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV $0x1,%ESI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CALL 4041d0 <__kmpc_fork_call@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV -0x3c(%RBP),%ESI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA -0x78(%RBP),%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CALL 4df1c0 <_ZN11qmcplusplus16BlasThreadingEnvC1Ei>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV (%R14),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %EAX,-0x3c(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOV 0x8(%R14),%R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %R15D,-0x4c(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOV 0x30(%R14),%R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
SAL $0x20,%RAX	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
MOV %R14,-0x38(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R12,-0xa0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JE 448444 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x2e4>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV 0x8(%RBX),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x30(%RBX),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
SAR $0x20,%RAX	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
CMP $0x1,%RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
ADC $0,%RAX	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	1	0.50	N/A
VPBROADCASTQ %RCX,%YMM0	1	0	0	0	0	0	1	0	0	0	0	0	0	3	1	scal (12.5%)
CMP $0x1,%RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV %R15,-0x30(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JE 44838c <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x22c>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %RAX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
AND $-0x2,%RDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
MOV %RAX,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
AND $-0x4,%R8	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
LEA -0x1(%R8),%R9	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R15,%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
SAL $0x4,%R10	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	scal (12.5%)
LEA (,%RCX,8),%R11	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA (%R14,%R15,8),%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R14,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV $0x1,%R14D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
XOR %ESI,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VPMOVSXBQ 0xb7e80(%RIP),%YMM1	2	0	0	0.33	0.33	0	1	0	0	0	0	0	0.33	3	1	vect (6.3%)
JMP 448267 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x107>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XOR %ESI,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
TEST $0x1,%AL	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	N/A
MOV -0xa0(%RBP),%R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x38(%RBP),%R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x30(%RBP),%R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
JE 448444 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x2e4>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %RAX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
AND $-0x4,%RDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
JE 448409 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x2a9>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
LEA -0x1(%RDI),%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VPBROADCASTQ %RSI,%YMM1	1	0	0	0	0	0	1	0	0	0	0	0	0	3	1	scal (12.5%)
MOV %RSI,%R9	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
IMUL %R15,%R9	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
LEA (%R14,%R9,8),%R9	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XOR %R10D,%R10D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
VPMOVSXBQ 0xb7cf1(%RIP),%YMM2	2	0	0	0.33	0.33	0	1	0	0	0	0	0	0.33	3	1	vect (6.3%)
NOP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP %RDI,%RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JNE 44840b <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x2ab>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
JMP 448444 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x2e4>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
XOR %EDI,%EDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RDI,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
IMUL %RCX,%R8	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
ADD %RSI,%R8	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
LEA (%RDX,%R8,8),%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
SAL $0x3,%RCX	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
IMUL %R15,%RSI	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
LEA (%R14,%RSI,8),%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA 0x30(%R12),%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RAX,-0xa8(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
CMP %R15D,0x30(%R12)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (6.3%)
JGE 448729 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x5c9>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %RSP,-0x88(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RSP,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD $-0x10,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RBX,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %RSP,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD $-0x10,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R13,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %RSP,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD $-0x10,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RAX,-0x70(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RAX,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %RSP,%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
ADD $-0x10,%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %R10,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOVSXD %R15D,%R14	1	0	0.33	0	0	0	0.33	0	0	0	0	0.33	0	1	0.33	N/A
MOV 0x18(%R12),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x20(%R12),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB %RCX,%RDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
SAR $0x2,%RDX	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
MOV %R14,-0x60(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
SUB %RDX,%R14	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
JBE 448612 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x4b2>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %RSP,-0xc8(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RSP,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD $-0x20,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RDX,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %RSP,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD $-0x20,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RCX,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV 0x20(%R12),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x28(%R12),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RSI,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB %RDI,%RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
SAR $0x2,%RAX	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
CMP %R14,%RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV %R10,-0xd0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RDI,-0x58(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JAE 44862c <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x4cc>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %RBX,-0xc0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RSI,-0xb8(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RDX,-0x68(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RCX,-0x48(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R15,-0x30(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x18(%R12),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RDI,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RAX,-0x80(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
SUB %RAX,%RCX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %RCX,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SAR $0x2,%RCX	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
MOV $0x1fffffffffffffff,%RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.28	N/A
MOV %RCX,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
XOR %RAX,%RDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
CMP %R14,%RDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JB 448b53 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x9f3>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP %R14,%RCX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV %R14,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMOVA %RCX,%R15	2	1	0	0	0	0	0	1	0	0	0	0	0	1-2	1	N/A
ADD %RCX,%R15	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
CMP %RAX,%R15	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
CMOVAE %RAX,%R15	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	1	0.50	N/A
LEA (,%R15,4),%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RAX,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
AND $-0x40,%RSI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
ADD $0x40,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
TEST $0xf,%R15B	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	N/A
MOV %RAX,-0xb0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
CMOVE %RAX,%RSI	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	1	0.50	N/A
MOV $0x40,%EDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
VZEROUPPER	2	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 404800 <aligned_alloc@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
TEST %RAX,%RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (12.5%)
JE 448b60 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0xa00>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
LEA (%RAX,%RBX,1),%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA (,%R14,4),%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RAX,-0x48(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RDI,-0x68(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
XOR %ESI,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CALL 4efda0 <_intel_fast_memset>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV -0x80(%RBP),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP -0x58(%RBP),%RDI	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JE 4485cf <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x46f>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
ADD $-0x4,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
AND $-0x4,%RBX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
ADD $0x4,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV -0x48(%RBP),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x80(%RBP),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RBX,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 4efce0 <_intel_fast_memcpy>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV -0x80(%RBP),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
TEST %RDI,%RDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (12.5%)
MOV -0xc0(%RBP),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
JE 4485ed <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x48d>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP %RDI,-0xb8(%RBP)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JE 448bb3 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0xa53>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CALL 404460 <free@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV -0x48(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RCX,0x18(%R12)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV -0x68(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%RAX,%R14,4),%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RAX,0x20(%R12)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
LEA (%RCX,%R15,4),%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RAX,0x28(%R12)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV -0x30(%RBP),%R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
JMP 44864b <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x4eb>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
JAE 448664 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x504>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x60(%RBP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%RCX,%RDX,4),%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP %RDX,%RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV -0x38(%RBP),%R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
JE 448668 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x508>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %RDX,0x20(%R12)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JMP 448668 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x508>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
LEA (,%R14,4),%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XOR %ESI,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VZEROUPPER	2	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 4efda0 <_intel_fast_memset>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV -0x58(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%RAX,%R14,4),%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RAX,0x20(%R12)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV -0xc8(%RBP),%RSP	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x18(%R12),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x38(%RBP),%R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0xd0(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
JMP 448668 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x508>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
MOV -0x38(%RBP),%R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0xa8(%RBP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOVL $-0x1,(%R9)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOV %R15D,(%RBX)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOV %R15D,(%R13)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
SUB $0x8,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %RBX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R14,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R13,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV -0x70(%RBP),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RBX,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
PUSH %R10	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
VZEROUPPER	2	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 4043a0 <dgetri_@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
ADD $0x10,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
VCVTTSD2SI (%RBX),%EAX	2	1.50	0.50	0.33	0.33	0	0	0	0	0	0	0	0.33	7	1	scal (12.5%)
MOV %EAX,0x30(%R12)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
CLTQ	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.33	scal (12.5%)
MOV (%R12),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x8(%R12),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RCX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB %RDX,%RDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
SAR $0x3,%RDI	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
MOV %RAX,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB %RDI,%RSI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
JBE 4486cf <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x56f>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %R12,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 448c90 <_ZNSt6vectorIdN11qmcplusplus10MallocatorIdLm64EEEE17_M_default_appendEm>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
JMP 4486df <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x57f>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
JAE 4486df <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x57f>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
LEA (%RDX,%RAX,8),%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP %RAX,%RCX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 4486df <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x57f>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %RAX,0x8(%R12)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x78(%R12),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x80(%R12),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB %RCX,%RDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
SAR $0x3,%RDX	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
MOV -0x60(%RBP),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
SUB %RDX,%RSI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
JBE 44870b <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x5ab>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
LEA 0x78(%R12),%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CALL 448c90 <_ZNSt6vectorIdN11qmcplusplus10MallocatorIdLm64EEEE17_M_default_appendEm>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
JMP 448722 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x5c2>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
JAE 448722 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x5c2>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x60(%RBP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%RCX,%RDX,8),%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP %RCX,%RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 448722 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x5c2>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %RCX,0x80(%R12)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV -0x88(%RBP),%RSP	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x18(%R12),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA -0x3c(%RBP),%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA -0x4c(%RBP),%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA -0x74(%RBP),%R9	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RDI,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R14,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
VZEROUPPER	2	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 404680 <dgetrf_@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOVSXD -0x3c(%RBP),%R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x78(%R12),%R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
TEST %R15,%R15	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (12.5%)
MOV %R13,-0x30(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R15,-0x58(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JLE 4488fa <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x79a>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x4c(%RBP),%R11D	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA 0x1(%R11),%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
CMP $0x8,%R15D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
JB 4488ae <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x74e>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
LEA (,%R11,8),%ECX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
LEA 0x8(,%R11,8),%EDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
LEA (%R11,%R11,2),%ESI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
LEA 0x6(%RSI,%RSI,1),%ESI	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
SUB %R11D,%ECX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
ADD $0x7,%ECX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV -0x58(%RBP),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (,%RDI,8),%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
AND $-0x40,%RDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
LEA 0x5(%R11,%R11,4),%R8D	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
LEA 0x4(,%R11,4),%R9D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
LEA 0x3(%R11,%R11,2),%R10D	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
LEA 0x2(%R11,%R11,1),%R11D	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
XOR %EBX,%EBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XOR %R15D,%R15D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XCHG %AX,%AX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0x58(%RBP),%R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %R15D,%ECX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
AND $0x7ffffff8,%ECX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
CMP %R15,%RCX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 4488fa <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x79a>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %R15D,%EDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SHR $0x3,%EDX	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
AND $0xfffffff,%EDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
IMUL %EAX,%EDX	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
SAL $0x3,%EDX	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV 0x18(%R12),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
TEST %R15D,%R15D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (6.3%)
JE 44891d <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x7bd>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP $0x4,%R15	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV %RCX,-0x60(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JAE 448939 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x7d9>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
VXORPD %XMM11,%XMM11,%XMM11	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
MOV $0x1,%EBX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
JMP 448a3d <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x8dd>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
VXORPD %XMM11,%XMM11,%XMM11	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
VPXOR %XMM0,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
MOV -0x98(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x90(%RBP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
JMP 448aeb <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x98b>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
MOV %R15,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SHR $0x2,%RSI	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
VXORPD %XMM11,%XMM11,%XMM11	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
MOV $0x1,%EBX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV $0x2,%EDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
VBROADCASTSD 0xb59a0(%RIP),%YMM8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	3	0.33	scal (12.5%)
VXORPD %XMM9,%XMM9,%XMM9	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0x58(%RBP),%R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %R15,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
AND $-0x4,%R14	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
CMP %R15,%R14	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 448ab7 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x957>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %R15,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
NEG %R12	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
INC %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV -0x30(%RBP),%R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
TEST %EBX,%EBX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (6.3%)
SETG %AL	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	1	0.50	N/A
KMOVD %EAX,%K1	1	0	0	0	0	0	1	0	0	0	0	0	0	3	1	N/A
VPXOR %XMM1,%XMM1,%XMM1	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
VMOVSD 0xb7c24(%RIP),%XMM0	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMOVSD %XMM1,%XMM0,%XMM0{%K1}	1	0.33	0.33	0	0	0	0.33	0	0	0	0	0	0	1	0.33	scal (12.5%)
MOV -0x98(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0xa0(%RBP),%R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x90(%RBP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x38(%RBP),%R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA -0x74(%RBP),%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RSP,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
VMOVSD %XMM11,(%RDX)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
VMOVQ %XMM0,(%RAX)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV -0x4c(%RBP),%EAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%R12),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RSP,%R9	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LEA -0x10(%R9),%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RDI,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %RSP,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LEA -0x10(%RSI),%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RDX,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %R15D,-0x10(%R9)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOV %EAX,-0x10(%RSI)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
SUB $0x8,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %R14,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV -0xa8(%RBP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
PUSH %R10	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
VZEROUPPER	2	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 4043a0 <dgetri_@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
ADD $0x10,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %RBX,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
LEA -0x78(%RBP),%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CALL 4df1e0 <_ZN11qmcplusplus16BlasThreadingEnvD1Ev>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
LEA -0x28(%RBP),%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
POP %RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %RBP	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
RET	1	0.50	0	0.33	0.33	0	0	0.50	0	0	0	0	0.33	0	2.13	N/A
MOV $0x4fe63e,%EDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
VZEROUPPER	2	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 404260 <_ZSt20__throw_length_errorPKc@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV $0x10,%EDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
CALL 404510 <__cxa_allocate_exception@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV %RAX,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV -0x48(%RBP),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0xb0(%RBP),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CALL 40f7b0 <_ZNSt7__cxx119to_stringEm>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV $0x4fe137,%ESI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV -0x68(%RBP),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x48(%RBP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CALL 40ee60 <_ZStplIcSt11char_traitsIcESaIcEENSt7__cxx1112basic_stringIT_T0_T1_EEPKS5_OS8_>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV $0x1,%R15B	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %RBX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV -0x68(%RBP),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CALL 404120 <_ZNSt13runtime_errorC1ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
XOR %R15D,%R15D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV $0x5657c0,%ESI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV $0x404770,%EDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %RBX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 404230 <__cxa_throw@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV $0x10,%EDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
CALL 404510 <__cxa_allocate_exception@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV %RAX,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV $0x4fe173,%ESI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %RAX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 404110 <_ZNSt13runtime_errorC1EPKc@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV $0x5657c0,%ESI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV $0x404770,%EDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %RBX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 404230 <__cxa_throw@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV %RAX,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV -0x68(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RCX),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
ADD $0x10,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP %RCX,%RDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 448bfd <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0xa9d>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV (%RCX),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
INC %RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 404070 <_ZdlPvm@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV -0x48(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RCX),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
ADD $0x10,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP %RCX,%RDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JNE 448c23 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0xac3>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
TEST %R15B,%R15B	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	N/A
JNE 448c5d <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0xafd>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
JMP 448c5d <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0xafd>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
MOV %RAX,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV -0x48(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RCX),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
ADD $0x10,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP %RCX,%RDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 448c5d <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0xafd>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV (%RCX),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
INC %RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 404070 <_ZdlPvm@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
JMP 448c5d <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0xafd>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
MOV %RAX,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JMP 448c5d <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0xafd>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
MOV %RAX,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RBX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 4047a0 <__cxa_free_exception@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
LEA -0x78(%RBP),%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CALL 4df1e0 <_ZN11qmcplusplus16BlasThreadingEnvD1Ev>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV %R14,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 404270 <_Unwind_Resume@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
JMP 448c7a <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0xb1a>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
JMP 448c7a <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0xb1a>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
MOV %RAX,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LEA -0x78(%RBP),%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CALL 4df1e0 <_ZN11qmcplusplus16BlasThreadingEnvD1Ev>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV %R14,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 404270 <_Unwind_Resume@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
XCHG %AX,%AX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A

Name	Coverage (%)	Time (s)
▼qmcplusplus::DiracMatrix::invert_transpose(qmcplusplus::Matrix > const&, qmcplusplus::Matrix >&, double&, double&)–	0.23	0.20
○Loop 1000 - DiracMatrix.h:112-113 - exec	0.00	0.00
▼Loop 1006 - inner_product.hpp:210-212 - exec–	0.00	0.00
○Loop 1008 - inner_product.hpp:211-212 - exec	0.13	0.11
○Loop 1007 - inner_product.hpp:211-212 - exec	0.10	0.08
○Loop 1004 - inner_product.hpp:211-212 - exec	0.00	0.00
○Loop 1005 - inner_product.hpp:211-212 - exec	0.00	0.00
○Loop 999 - DiracMatrix.h:112-113 - exec	0.00	0.00
○Loop 1002 - inner_product.hpp:211-212 - exec	0.00	0.00
○Loop 1001 - Mallocator.hpp:69-69 - exec	0.00	0.00
○Loop 998 - DiracMatrix.h:31-35 - exec	0.00	0.00
○Loop 997 - DiracMatrix.h:31-35 - exec	0.00	0.00
○Loop 1003 - inner_product.hpp:211-212 - exec	0.00	0.00

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Complex instructions

Details

Conversion instructions

Details

Workaround

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code

Code clean check

Workaround

Vectorization

Details

Workaround

Execution units bottlenecks

512-bits vectorization

Workaround

Masked instructions

Details

Workaround

CALL instructions

Details

Complex instructions

Details

Conversion instructions

Details

Workaround

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code