OV - exec - Function qmcplusplus::SoaDistanceTableAAOMPTarget<double, 3u, 40>::update(int)

	Function: qmcplusplus::SoaDistanceTableAAOMPTarget<double, 3u, 40>::update(int)	Module: exec	Source: SoaDistanceTableAAOMPTarget.h:430-445 [...]	Coverage (incl. loops): 15.66% \| (excl. loops): 0.01%

/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/VectorSoAContainer.h: 231 - 271

--------------------------------------------------------------------------------

231:   inline const AoSElement_t operator[](size_t i) const { return AoSElement_t(myData + i, nGhosts); }

[...]

244:         *(_base + M * i) = rhs[i];

[...]

263:   inline Accessor operator()(size_t i) { return Accessor(myData + i, nGhosts); }

[...]

271:   inline T* restrict data(size_t i) { return myData + i * nGhosts; }

/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.h: 242 - 249

--------------------------------------------------------------------------------

242:   ScopeGuard(TIMER& t) : timer(t) { timer.start(); }

[...]

249:   ~ScopeGuard() { timer.stop(); }

/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/stl_vector.h: 1046 - 1046

--------------------------------------------------------------------------------

1046: 	return *(this->_M_impl._M_start + __n);

/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/stl_algobase.h: 431 - 431

--------------------------------------------------------------------------------

431: 	    __builtin_memmove(__result, __first, sizeof(_Tp) * _Num);

/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/TinyVector.h: 145 - 182

--------------------------------------------------------------------------------

145:       X[i] = base[i * offset];

[...]

182:       inverse[d] = -X[d];

/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/stl_algo.h: 751 - 751

--------------------------------------------------------------------------------

751:       if (__n2 <= 0)

/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h: 223 - 248

--------------------------------------------------------------------------------

223:     return X[i];

[...]

248:   inline pointer data() { return X; }

/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Particle/SoaDistanceTableAAOMPTarget.h: 430 - 445

--------------------------------------------------------------------------------

430:   {

431:     ScopedTimer local_timer(update_timer_);

432:     //update [0, iat) columns

433:     const int nupdate = iat;

434:     //copy row

435:     assert(nupdate <= temp_r_.size());

436:     std::copy_n(temp_r_.data(), nupdate, distances_[iat].data());

437:     for (int idim = 0; idim < D; ++idim)

438:       std::copy_n(temp_dr_.data(idim), nupdate, displacements_[iat].data(idim));

439:     //copy column

440:     for (size_t i = iat + 1; i < num_targets_; ++i)

441:     {

442:       distances_[i][iat]     = temp_r_[i];

443:       displacements_[i](iat) = -temp_dr_[i];

444:     }

445:   }

0x4e2380 PUSH	%RBP

0x4e2381 MOV	%RSP,%RBP

0x4e2384 PUSH	%R15

0x4e2386 PUSH	%R14

0x4e2388 PUSH	%R13

0x4e238a PUSH	%R12

0x4e238c PUSH	%RBX

0x4e238d SUB	$0x28,%RSP

0x4e2391 MOV	%ESI,%R15D

0x4e2394 MOV	%RDI,%R14

0x4e2397 MOV	0x288(%RDI),%RDI

0x4e239e MOV	%RDI,-0x50(%RBP)

0x4e23a2 CALL	4b6140 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv>

0x4e23a7 MOVSXD	%R15D,%R13

0x4e23aa TEST	%R13D,%R13D

0x4e23ad JLE	4e2447

0x4e23b3 LEA	(,%R13,8),%R12

0x4e23bb LEA	(%R12,%R12,4),%RBX

0x4e23bf MOV	0x48(%R14),%RAX

0x4e23c3 MOV	0x90(%R14),%RSI

0x4e23ca MOV	0x18(%RAX,%RBX,1),%RDI

0x4e23cf MOV	%R12,%RDX

0x4e23d2 CALL	4040b0 <memmove@plt>

0x4e23d7 MOV	0x60(%R14),%RAX

0x4e23db MOV	0xb8(%R14),%RSI

0x4e23e2 MOV	0x18(%RAX,%RBX,1),%RDI

0x4e23e7 MOV	%R12,%RDX

0x4e23ea CALL	4040b0 <memmove@plt>

0x4e23ef MOV	0x60(%R14),%RAX

0x4e23f3 MOV	0xa8(%R14),%RSI

0x4e23fa MOV	0x8(%RAX,%RBX,1),%RDI

0x4e23ff SAL	$0x3,%RDI

0x4e2403 ADD	0x18(%RAX,%RBX,1),%RDI

0x4e2408 SAL	$0x3,%RSI

0x4e240c ADD	0xb8(%R14),%RSI

0x4e2413 MOV	%R12,%RDX

0x4e2416 CALL	4040b0 <memmove@plt>

0x4e241b MOV	0x60(%R14),%RAX

0x4e241f MOV	0xa8(%R14),%RSI

0x4e2426 MOV	0x8(%RAX,%RBX,1),%RDI

0x4e242b SAL	$0x4,%RDI

0x4e242f ADD	0x18(%RAX,%RBX,1),%RDI

0x4e2434 SAL	$0x4,%RSI

0x4e2438 ADD	0xb8(%R14),%RSI

0x4e243f MOV	%R12,%RDX

0x4e2442 CALL	4040b0 <memmove@plt>

0x4e2447 INC	%R15D

0x4e244a MOVSXD	%R15D,%RAX

0x4e244d MOV	0x18(%R14),%RDX

0x4e2451 CMP	%RAX,%RDX

0x4e2454 JBE	4e2644

0x4e245a MOV	0x90(%R14),%RDI

0x4e2461 MOV	0x48(%R14),%RSI

0x4e2465 MOV	0x60(%R14),%RAX

0x4e2469 MOV	0xb8(%R14),%RCX

0x4e2470 MOVSXD	0xa8(%R14),%R10

0x4e2477 MOV	%RDX,%R8

0x4e247a SUB	%R13,%R8

0x4e247d LEA	(%R10,%R10,1),%RBX

0x4e2481 MOV	%R13,%R9

0x4e2484 NOT	%R9

0x4e2487 ADD	%RDX,%R9

0x4e248a CMP	$0x2,%R8

0x4e248e MOV	%RCX,-0x48(%RBP)

0x4e2492 MOV	%RDI,-0x40(%RBP)

0x4e2496 MOV	%R10,-0x38(%RBP)

0x4e249a MOV	%RBX,-0x30(%RBP)

0x4e249e JNE	4e24c0

0x4e24a0 XOR	%R10D,%R10D

0x4e24a3 JMP	4e25b7

0x4e24a8 NOPW	%CS:(%RAX,%RAX,1)

0x4e24b7 NOPW	(%RAX,%RAX,1)

0x4e24c0 MOV	%R9,%R11

0x4e24c3 AND	$-0x2,%R11

0x4e24c7 LEA	0xd(%R13,%R13,4),%R14

0x4e24cc LEA	(%R13,%RBX,1),%RDX

0x4e24d1 LEA	0x10(%RCX,%RDX,8),%R15

0x4e24d6 LEA	(%R13,%R10,1),%RDX

0x4e24db LEA	0x10(%RCX,%RDX,8),%R12

0x4e24e0 LEA	0x10(%RCX,%R13,8),%RDX

0x4e24e5 LEA	0x10(%RDI,%R13,8),%R8

0x4e24ea XOR	%R10D,%R10D

0x4e24ed VMOVDDUP	0x54b53(%RIP),%XMM0

0x4e24f5 NOPW	%CS:(%RAX,%RAX,1)

(1962) 0x4e2500 MOV	-0x28(%RSI,%R14,8),%RBX

(1962) 0x4e2505 VMOVSD	-0x8(%R8,%R10,8),%XMM1

(1962) 0x4e250c VMOVSD	%XMM1,(%RBX,%R13,8)

(1962) 0x4e2512 VMOVSD	-0x8(%RDX,%R10,8),%XMM1

(1962) 0x4e2519 VXORPS	%XMM0,%XMM1,%XMM1

(1962) 0x4e251d VMOVSD	-0x8(%R12,%R10,8),%XMM2

(1962) 0x4e2524 VXORPS	%XMM0,%XMM2,%XMM2

(1962) 0x4e2528 VMOVSD	-0x8(%R15,%R10,8),%XMM3

(1962) 0x4e252f VXORPS	%XMM0,%XMM3,%XMM3

(1962) 0x4e2533 MOV	-0x38(%RAX,%R14,8),%RBX

(1962) 0x4e2538 MOV	-0x28(%RAX,%R14,8),%RDI

(1962) 0x4e253d VMOVLPS	%XMM1,(%RDI,%R13,8)

(1962) 0x4e2543 LEA	(%RBX,%R13,1),%RCX

(1962) 0x4e2547 VMOVLPS	%XMM2,(%RDI,%RCX,8)

(1962) 0x4e254c LEA	(%R13,%RBX,2),%RCX

(1962) 0x4e2551 VMOVLPS	%XMM3,(%RDI,%RCX,8)

(1962) 0x4e2556 MOV	(%RSI,%R14,8),%RCX

(1962) 0x4e255a VMOVSD	(%R8,%R10,8),%XMM1

(1962) 0x4e2560 VMOVSD	%XMM1,(%RCX,%R13,8)

(1962) 0x4e2566 VMOVSD	(%RDX,%R10,8),%XMM1

(1962) 0x4e256c VXORPS	%XMM0,%XMM1,%XMM1

(1962) 0x4e2570 VMOVSD	(%R12,%R10,8),%XMM2

(1962) 0x4e2576 VXORPS	%XMM0,%XMM2,%XMM2

(1962) 0x4e257a VMOVSD	(%R15,%R10,8),%XMM3

(1962) 0x4e2580 MOV	-0x10(%RAX,%R14,8),%RCX

(1962) 0x4e2585 MOV	(%RAX,%R14,8),%RDI

(1962) 0x4e2589 VMOVLPS	%XMM1,(%RDI,%R13,8)

(1962) 0x4e258f LEA	(%RCX,%R13,1),%RBX

(1962) 0x4e2593 VMOVLPS	%XMM2,(%RDI,%RBX,8)

(1962) 0x4e2598 VXORPS	%XMM0,%XMM3,%XMM1

(1962) 0x4e259c LEA	(%R13,%RCX,2),%RCX

(1962) 0x4e25a1 VMOVLPS	%XMM1,(%RDI,%RCX,8)

(1962) 0x4e25a6 ADD	$0x2,%R10

(1962) 0x4e25aa ADD	$0xa,%R14

(1962) 0x4e25ae CMP	%R10,%R11

(1962) 0x4e25b1 JNE	4e2500

0x4e25b7 TEST	$0x1,%R9B

0x4e25bb JE	4e2644

0x4e25c1 ADD	%R13,%R10

0x4e25c4 LEA	0x8(,%R10,8),%RDX

0x4e25cc LEA	(%RDX,%RDX,4),%RDX

0x4e25d0 MOV	0x18(%RSI,%RDX,1),%RSI

0x4e25d5 MOV	-0x40(%RBP),%RCX

0x4e25d9 VMOVSD	0x8(%RCX,%R10,8),%XMM0

0x4e25e0 VMOVSD	%XMM0,(%RSI,%R13,8)

0x4e25e6 MOV	-0x38(%RBP),%RCX

0x4e25ea LEA	0x1(%RCX,%R10,1),%RSI

0x4e25ef MOV	-0x30(%RBP),%RCX

0x4e25f3 LEA	0x1(%RCX,%R10,1),%RDI

0x4e25f8 MOV	-0x48(%RBP),%RCX

0x4e25fc VMOVSD	0x8(%RCX,%R10,8),%XMM0

0x4e2603 VMOVDDUP	0x54a3d(%RIP),%XMM1

0x4e260b VXORPS	%XMM1,%XMM0,%XMM0

0x4e260f VMOVSD	(%RCX,%RSI,8),%XMM2

0x4e2614 VXORPS	%XMM1,%XMM2,%XMM2

0x4e2618 VMOVSD	(%RCX,%RDI,8),%XMM3

0x4e261d VXORPS	%XMM1,%XMM3,%XMM1

0x4e2621 MOV	0x8(%RAX,%RDX,1),%RCX

0x4e2626 MOV	0x18(%RAX,%RDX,1),%RAX

0x4e262b VMOVLPS	%XMM0,(%RAX,%R13,8)

0x4e2631 LEA	(%RCX,%R13,1),%RDX

0x4e2635 VMOVLPS	%XMM2,(%RAX,%RDX,8)

0x4e263a LEA	(%R13,%RCX,2),%RCX

0x4e263f VMOVLPS	%XMM1,(%RAX,%RCX,8)

0x4e2644 MOV	-0x50(%RBP),%RDI

0x4e2648 CALL	4b63c0 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv>

0x4e264d ADD	$0x28,%RSP

0x4e2651 POP	%RBX

0x4e2652 POP	%R12

0x4e2654 POP	%R13

0x4e2656 POP	%R14

0x4e2658 POP	%R15

0x4e265a POP	%RBP

0x4e265b RET

0x4e265c NOPW	%CS:(%RAX,%RAX,1)

0x4e266b NOPW	%CS:(%RAX,%RAX,1)

0x4e267a NOPW	(%RAX,%RAX,1)

0x4e2680 MOV	%RAX,%RDI

0x4e2683 CALL	410460 <__clang_call_terminate>

0x4e2688 NOPW	%CS:(%RAX,%RAX,1)

0x4e2692 NOPW	%CS:(%RAX,%RAX,1)

0x4e269c NOPW	%CS:(%RAX,%RAX,1)

0x4e26a6 NOPW	%CS:(%RAX,%RAX,1)

0x4e26b0 NOPW	%CS:(%RAX,%RAX,1)

0x4e26ba NOPW	(%RAX,%RAX,1)

Coverage (%)	Name	Source Location	Module
►100.00+	qmcplusplus::ParticleSet::acce[...]	ParticleSet.cpp:389	exec
○	main.extracted.107	miniqmc.cpp:452	exec
○	__kmp_invoke_microtask		libiomp5.so
○	__kmp_invoke_task_func		libiomp5.so

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.01% of application time for run icx_4

Source file and lines	SoaDistanceTableAAOMPTarget.h:430-445
Module	exec

The function is defined in:

/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/VectorSoAContainer.h:231,244,263,271
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.h:242,249
/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/stl_vector.h:1046
/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/stl_algobase.h:431
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/TinyVector.h:145,182
/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/stl_algo.h:751
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:223,248
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Particle/SoaDistanceTableAAOMPTarget.h:430-445

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 23.67 to 3.67 cycles (6.45x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is poorly vectorized. Only 13% of vector register length is used (average across all SSE/AVX instructions). By fully vectorizing your function, you can lower the cost of an iteration from 23.67 to 1.71 cycles (13.82x speedup).

Details

20% of SSE/AVX instructions are used in vector version (process two or more data elements in vector registers):

0% of SSE/AVX loads are used in vector version.
33% of SSE/AVX stores are used in vector version.
0% of SSE/AVX addition or subtraction instructions are used in vector version.
25% of SSE/AVX instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

__clang_call_terminate: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.h:249
memmove@plt: 4 occurrences►
- /usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/stl_algobase.h:431
- /usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/stl_algobase.h:431
- /usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/stl_algobase.h:431
- /usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/stl_algobase.h:431
qmcplusplus::TimerType
::start(): 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.h:242
qmcplusplus::TimerType
::stop(): 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.h:249

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 292 bytes. The binary function is storing 72 bytes.

General properties

nb instructions	133
nb uops	140
loop length	649
used x86 registers	16
used mmx registers	0
used xmm registers	4
used ymm registers	0
used zmm registers	0
nb stack references	5

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	23.67 cycles
front end	23.67 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11
uops	7.10	7.00	14.67	14.67	11.00	7.00	6.90	11.00	11.00	11.00	7.00	14.67
cycles	7.10	10.47	14.67	14.67	11.00	7.00	6.90	11.00	11.00	11.00	7.00	14.67

Execution ports to units layout:

P0 (256 bits): VPU, BRU, ALU, DIV/SQRT
P1 (256 bits): ALU, VPU
P2 (512 bits): load
P3 (512 bits): load
P4 (512 bits): store data
P5 (512 bits): ALU, VPU
P6: ALU, BRU
P7: store address
P8: store address
P9 (512 bits): store data
P10: ALU
P11 (512 bits): load

Cycles executing div or sqrt instructions

Cycles summary

Front-end	23.67
Dispatch	14.67
Overall L1	23.67

Vectorization ratios

INT

all	0%
load	NA (no load vectorizable/vectorized instructions)
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
other	0%

all	46%
load	0%
store	75%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	100%

INT+FP

all	20%
load	0%
store	33%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	25%

Vector efficiency ratios

INT

all	11%
load	NA (no load vectorizable/vectorized instructions)
store	12%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	10%
fma	NA (no fma vectorizable/vectorized instructions)
other	11%

all	15%
load	12%
store	12%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	25%

INT+FP

all	13%
load	12%
store	12%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	10%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	14%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 23.67 cycles. At this rate:

6% of peak load performance is reached (12.34 out of 192.00 bytes loaded per cycle (GB/s @ 1GHz))
2% of peak store performance is reached (3.04 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Performance is limited by instruction throughput (loading/decoding program instructions to execution core) (front-end is a bottleneck). By removing all these bottlenecks, you can lower the cost of an iteration from 23.67 to 14.67 cycles (1.61x speedup).

ASM code

In the binary file, the address of the function is: 4e2380

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
PUSH %R15	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R14	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R13	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R12	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %RBX	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
SUB $0x28,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %ESI,%R15D	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
MOV %RDI,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x288(%RDI),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RDI,-0x50(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
CALL 4b6140 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOVSXD %R15D,%R13	1	0	0.33	0	0	0	0.33	0	0	0	0	0.33	0	1	0.33	N/A
TEST %R13D,%R13D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (6.3%)
JLE 4e2447 <_ZN11qmcplusplus27SoaDistanceTableAAOMPTargetIdLj3ELi40EE6updateEi+0xc7>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
LEA (,%R13,8),%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA (%R12,%R12,4),%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV 0x48(%R14),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x90(%R14),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x18(%RAX,%RBX,1),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %R12,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 4040b0 <memmove@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV 0x60(%R14),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0xb8(%R14),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x18(%RAX,%RBX,1),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %R12,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 4040b0 <memmove@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV 0x60(%R14),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0xa8(%R14),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x8(%RAX,%RBX,1),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
SAL $0x3,%RDI	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
ADD 0x18(%RAX,%RBX,1),%RDI	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	N/A
SAL $0x3,%RSI	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
ADD 0xb8(%R14),%RSI	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	N/A
MOV %R12,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 4040b0 <memmove@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV 0x60(%R14),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0xa8(%R14),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x8(%RAX,%RBX,1),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
SAL $0x4,%RDI	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
ADD 0x18(%RAX,%RBX,1),%RDI	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	N/A
SAL $0x4,%RSI	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
ADD 0xb8(%R14),%RSI	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	N/A
MOV %R12,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 4040b0 <memmove@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
INC %R15D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
MOVSXD %R15D,%RAX	1	0	0.33	0	0	0	0.33	0	0	0	0	0.33	0	1	0.33	N/A
MOV 0x18(%R14),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP %RAX,%RDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JBE 4e2644 <_ZN11qmcplusplus27SoaDistanceTableAAOMPTargetIdLj3ELi40EE6updateEi+0x2c4>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV 0x90(%R14),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x48(%R14),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x60(%R14),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0xb8(%R14),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOVSXD 0xa8(%R14),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RDX,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
SUB %R13,%R8	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
LEA (%R10,%R10,1),%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R13,%R9	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
NOT %R9	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
ADD %RDX,%R9	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
CMP $0x2,%R8	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV %RCX,-0x48(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RDI,-0x40(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R10,-0x38(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RBX,-0x30(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JNE 4e24c0 <_ZN11qmcplusplus27SoaDistanceTableAAOMPTargetIdLj3ELi40EE6updateEi+0x140>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
XOR %R10D,%R10D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
JMP 4e25b7 <_ZN11qmcplusplus27SoaDistanceTableAAOMPTargetIdLj3ELi40EE6updateEi+0x237>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R9,%R11	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
AND $-0x2,%R11	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	scal (12.5%)
LEA 0xd(%R13,%R13,4),%R14	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
LEA (%R13,%RBX,1),%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA 0x10(%RCX,%RDX,8),%R15	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
LEA (%R13,%R10,1),%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA 0x10(%RCX,%RDX,8),%R12	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
LEA 0x10(%RCX,%R13,8),%RDX	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
LEA 0x10(%RDI,%R13,8),%R8	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
XOR %R10D,%R10D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VMOVDDUP 0x54b53(%RIP),%XMM0	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
TEST $0x1,%R9B	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	N/A
JE 4e2644 <_ZN11qmcplusplus27SoaDistanceTableAAOMPTargetIdLj3ELi40EE6updateEi+0x2c4>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
ADD %R13,%R10	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
LEA 0x8(,%R10,8),%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA (%RDX,%RDX,4),%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV 0x18(%RSI,%RDX,1),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x40(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VMOVSD 0x8(%RCX,%R10,8),%XMM0	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMOVSD %XMM0,(%RSI,%R13,8)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV -0x38(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA 0x1(%RCX,%R10,1),%RSI	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
MOV -0x30(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA 0x1(%RCX,%R10,1),%RDI	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
MOV -0x48(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VMOVSD 0x8(%RCX,%R10,8),%XMM0	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMOVDDUP 0x54a3d(%RIP),%XMM1	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VXORPS %XMM1,%XMM0,%XMM0	1	0.33	0.33	0	0	0	0.33	0	0	0	0	0	0	0-1	0.33	vect (25.0%)
VMOVSD (%RCX,%RSI,8),%XMM2	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VXORPS %XMM1,%XMM2,%XMM2	1	0.33	0.33	0	0	0	0.33	0	0	0	0	0	0	0-1	0.33	vect (25.0%)
VMOVSD (%RCX,%RDI,8),%XMM3	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VXORPS %XMM1,%XMM3,%XMM1	1	0.33	0.33	0	0	0	0.33	0	0	0	0	0	0	0-1	0.33	vect (25.0%)
MOV 0x8(%RAX,%RDX,1),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x18(%RAX,%RDX,1),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VMOVLPS %XMM0,(%RAX,%R13,8)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	4-12	0.50	vect (12.5%)
LEA (%RCX,%R13,1),%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VMOVLPS %XMM2,(%RAX,%RDX,8)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	4-12	0.50	vect (12.5%)
LEA (%R13,%RCX,2),%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VMOVLPS %XMM1,(%RAX,%RCX,8)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	4-12	0.50	vect (12.5%)
MOV -0x50(%RBP),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CALL 4b63c0 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
ADD $0x28,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %RBP	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
RET	1	0.50	0	0.33	0.33	0	0	0.50	0	0	0	0	0.33	0	2.13	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RAX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 410460 <__clang_call_terminate>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A

The code analyzed by CQA in that panel excludes loops and represents 0.01% of application time for run icx_4

Source file and lines	SoaDistanceTableAAOMPTarget.h:430-445
Module	exec

The function is defined in:

/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/VectorSoAContainer.h:231,244,263,271
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.h:242,249
/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/stl_vector.h:1046
/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/stl_algobase.h:431
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/TinyVector.h:145,182
/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/stl_algo.h:751
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:223,248
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Particle/SoaDistanceTableAAOMPTarget.h:430-445

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 23.67 to 3.67 cycles (6.45x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

20% of SSE/AVX instructions are used in vector version (process two or more data elements in vector registers):

0% of SSE/AVX loads are used in vector version.
33% of SSE/AVX stores are used in vector version.
0% of SSE/AVX addition or subtraction instructions are used in vector version.
25% of SSE/AVX instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

__clang_call_terminate: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.h:249
memmove@plt: 4 occurrences►
- /usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/stl_algobase.h:431
- /usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/stl_algobase.h:431
- /usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/stl_algobase.h:431
- /usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/stl_algobase.h:431
qmcplusplus::TimerType
::start(): 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.h:242
qmcplusplus::TimerType
::stop(): 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.h:249

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 292 bytes. The binary function is storing 72 bytes.

General properties

nb instructions	133
nb uops	140
loop length	649
used x86 registers	16
used mmx registers	0
used xmm registers	4
used ymm registers	0
used zmm registers	0
nb stack references	5

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	23.67 cycles
front end	23.67 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11
uops	7.10	7.00	14.67	14.67	11.00	7.00	6.90	11.00	11.00	11.00	7.00	14.67
cycles	7.10	10.47	14.67	14.67	11.00	7.00	6.90	11.00	11.00	11.00	7.00	14.67

Execution ports to units layout:

P0 (256 bits): VPU, BRU, ALU, DIV/SQRT
P1 (256 bits): ALU, VPU
P2 (512 bits): load
P3 (512 bits): load
P4 (512 bits): store data
P5 (512 bits): ALU, VPU
P6: ALU, BRU
P7: store address
P8: store address
P9 (512 bits): store data
P10: ALU
P11 (512 bits): load

Cycles executing div or sqrt instructions

Cycles summary

Front-end	23.67
Dispatch	14.67
Overall L1	23.67

Vectorization ratios

INT

all	0%
load	NA (no load vectorizable/vectorized instructions)
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
other	0%

all	46%
load	0%
store	75%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	100%

INT+FP

all	20%
load	0%
store	33%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	25%

Vector efficiency ratios

INT

all	11%
load	NA (no load vectorizable/vectorized instructions)
store	12%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	10%
fma	NA (no fma vectorizable/vectorized instructions)
other	11%

all	15%
load	12%
store	12%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	25%

INT+FP

all	13%
load	12%
store	12%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	10%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	14%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 23.67 cycles. At this rate:

6% of peak load performance is reached (12.34 out of 192.00 bytes loaded per cycle (GB/s @ 1GHz))
2% of peak store performance is reached (3.04 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

ASM code

In the binary file, the address of the function is: 4e2380

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
PUSH %R15	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R14	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R13	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R12	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %RBX	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
SUB $0x28,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %ESI,%R15D	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
MOV %RDI,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x288(%RDI),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RDI,-0x50(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
CALL 4b6140 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOVSXD %R15D,%R13	1	0	0.33	0	0	0	0.33	0	0	0	0	0.33	0	1	0.33	N/A
TEST %R13D,%R13D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (6.3%)
JLE 4e2447 <_ZN11qmcplusplus27SoaDistanceTableAAOMPTargetIdLj3ELi40EE6updateEi+0xc7>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
LEA (,%R13,8),%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA (%R12,%R12,4),%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV 0x48(%R14),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x90(%R14),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x18(%RAX,%RBX,1),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %R12,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 4040b0 <memmove@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV 0x60(%R14),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0xb8(%R14),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x18(%RAX,%RBX,1),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %R12,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 4040b0 <memmove@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV 0x60(%R14),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0xa8(%R14),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x8(%RAX,%RBX,1),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
SAL $0x3,%RDI	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
ADD 0x18(%RAX,%RBX,1),%RDI	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	N/A
SAL $0x3,%RSI	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
ADD 0xb8(%R14),%RSI	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	N/A
MOV %R12,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 4040b0 <memmove@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV 0x60(%R14),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0xa8(%R14),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x8(%RAX,%RBX,1),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
SAL $0x4,%RDI	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
ADD 0x18(%RAX,%RBX,1),%RDI	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	N/A
SAL $0x4,%RSI	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
ADD 0xb8(%R14),%RSI	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	N/A
MOV %R12,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 4040b0 <memmove@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
INC %R15D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
MOVSXD %R15D,%RAX	1	0	0.33	0	0	0	0.33	0	0	0	0	0.33	0	1	0.33	N/A
MOV 0x18(%R14),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP %RAX,%RDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JBE 4e2644 <_ZN11qmcplusplus27SoaDistanceTableAAOMPTargetIdLj3ELi40EE6updateEi+0x2c4>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV 0x90(%R14),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x48(%R14),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x60(%R14),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0xb8(%R14),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOVSXD 0xa8(%R14),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RDX,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
SUB %R13,%R8	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
LEA (%R10,%R10,1),%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R13,%R9	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
NOT %R9	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
ADD %RDX,%R9	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
CMP $0x2,%R8	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV %RCX,-0x48(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RDI,-0x40(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R10,-0x38(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RBX,-0x30(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JNE 4e24c0 <_ZN11qmcplusplus27SoaDistanceTableAAOMPTargetIdLj3ELi40EE6updateEi+0x140>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
XOR %R10D,%R10D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
JMP 4e25b7 <_ZN11qmcplusplus27SoaDistanceTableAAOMPTargetIdLj3ELi40EE6updateEi+0x237>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R9,%R11	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
AND $-0x2,%R11	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	scal (12.5%)
LEA 0xd(%R13,%R13,4),%R14	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
LEA (%R13,%RBX,1),%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA 0x10(%RCX,%RDX,8),%R15	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
LEA (%R13,%R10,1),%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA 0x10(%RCX,%RDX,8),%R12	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
LEA 0x10(%RCX,%R13,8),%RDX	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
LEA 0x10(%RDI,%R13,8),%R8	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
XOR %R10D,%R10D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VMOVDDUP 0x54b53(%RIP),%XMM0	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
TEST $0x1,%R9B	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	N/A
JE 4e2644 <_ZN11qmcplusplus27SoaDistanceTableAAOMPTargetIdLj3ELi40EE6updateEi+0x2c4>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
ADD %R13,%R10	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
LEA 0x8(,%R10,8),%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA (%RDX,%RDX,4),%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV 0x18(%RSI,%RDX,1),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x40(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VMOVSD 0x8(%RCX,%R10,8),%XMM0	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMOVSD %XMM0,(%RSI,%R13,8)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV -0x38(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA 0x1(%RCX,%R10,1),%RSI	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
MOV -0x30(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA 0x1(%RCX,%R10,1),%RDI	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
MOV -0x48(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VMOVSD 0x8(%RCX,%R10,8),%XMM0	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMOVDDUP 0x54a3d(%RIP),%XMM1	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VXORPS %XMM1,%XMM0,%XMM0	1	0.33	0.33	0	0	0	0.33	0	0	0	0	0	0	0-1	0.33	vect (25.0%)
VMOVSD (%RCX,%RSI,8),%XMM2	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VXORPS %XMM1,%XMM2,%XMM2	1	0.33	0.33	0	0	0	0.33	0	0	0	0	0	0	0-1	0.33	vect (25.0%)
VMOVSD (%RCX,%RDI,8),%XMM3	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VXORPS %XMM1,%XMM3,%XMM1	1	0.33	0.33	0	0	0	0.33	0	0	0	0	0	0	0-1	0.33	vect (25.0%)
MOV 0x8(%RAX,%RDX,1),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x18(%RAX,%RDX,1),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VMOVLPS %XMM0,(%RAX,%R13,8)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	4-12	0.50	vect (12.5%)
LEA (%RCX,%R13,1),%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VMOVLPS %XMM2,(%RAX,%RDX,8)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	4-12	0.50	vect (12.5%)
LEA (%R13,%RCX,2),%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VMOVLPS %XMM1,(%RAX,%RCX,8)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	4-12	0.50	vect (12.5%)
MOV -0x50(%RBP),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CALL 4b63c0 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
ADD $0x28,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %RBP	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
RET	1	0.50	0	0.33	0.33	0	0	0.50	0	0	0	0	0.33	0	2.13	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RAX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 410460 <__clang_call_terminate>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A

Name	Coverage (%)	Time (s)
▼qmcplusplus::SoaDistanceTableAAOMPTarget::update(int)–	15.66	13.40
○Loop 1962 - SoaDistanceTableAAOMPTarget.h:440-442 - exec	15.65	13.22

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