OV - exec - Function qmcplusplus::TimerType<std::chrono::_V2::system

	Function: qmcplusplus::TimerType<std::chrono::_V2::system_clock>::start()	Module: exec	Source: NewTimer.cpp:39-81 [...]	Coverage (incl. loops): 0.03% \| (excl. loops): 0.03%

/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.cpp: 39 - 81

--------------------------------------------------------------------------------

39:   if (active)

[...]

53:     for (int level = omp_get_level(); level > 0; level--)

54:       if (omp_get_ancestor_thread_num(level) != 0)

55:         is_true_master = false;

56:     if (is_true_master)

57:     {

58:       if (manager)

59:       {

60:         // compute current_stack_key

61:         TimerType* parent = manager->current_timer();

62:         if (parent)

63:         {

64:           current_stack_key = parent->get_stack_key();

65:           current_stack_key.add_id(timer_id);

66:         }

67:         else

68:         {

69:           current_stack_key = StackKey();

70:           current_stack_key.add_id(timer_id);

71:         }

72:

73:         manager->push_timer(this);

74:       }

75:       start_time = CLOCK::now();

[...]

81: }

/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.h: 90 - 97

--------------------------------------------------------------------------------

90:     short_buckets[level] = c1;

91:     if (level >= max_level - 1)

92:     {

93:       timer_max_level_exceeded = true;

94:     }

95:     else

96:     {

97:       level++;

/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Utilities/TimerManager.h: 92 - 93

--------------------------------------------------------------------------------

92:     if (CurrentTimerStack.size() > 0)

93:       current = CurrentTimerStack.back();

/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/stl_vector.h: 919 - 919

--------------------------------------------------------------------------------

919:       { return size_type(this->_M_impl._M_finish - this->_M_impl._M_start); }

0x4b6140 CMPB	$0,0x38(%RDI)

0x4b6144 JE	4b636e

0x4b614a PUSH	%RBP

0x4b614b MOV	%RSP,%RBP

0x4b614e PUSH	%R15

0x4b6150 PUSH	%R14

0x4b6152 PUSH	%R13

0x4b6154 PUSH	%R12

0x4b6156 PUSH	%RBX

0x4b6157 SUB	$0x28,%RSP

0x4b615b MOV	%RDI,%R14

0x4b615e CALL	404620 <omp_get_level@plt>

0x4b6163 TEST	%EAX,%EAX

0x4b6165 JLE	4b6286

0x4b616b MOV	%EAX,%EBX

0x4b616d MOV	%R14,-0x48(%RBP)

0x4b6171 MOV	$0x1,%R13D

0x4b6177 CMP	$0x8,%EAX

0x4b617a JB	4b6246

0x4b6180 MOV	%EBX,%R14D

0x4b6183 SHR	$0x3,%R14D

0x4b6187 MOV	$0x1,%R13D

0x4b618d MOV	%EBX,%R15D

(1661) 0x4b6190 MOV	%R15D,%EDI

(1661) 0x4b6193 VZEROUPPER

(1661) 0x4b6196 CALL	404250 <omp_get_ancestor_thread_num@plt>

(1661) 0x4b619b MOV	%EAX,-0x40(%RBP)

(1661) 0x4b619e LEA	-0x1(%R15),%EDI

(1661) 0x4b61a2 CALL	404250 <omp_get_ancestor_thread_num@plt>

(1661) 0x4b61a7 MOV	%EAX,-0x3c(%RBP)

(1661) 0x4b61aa LEA	-0x2(%R15),%EDI

(1661) 0x4b61ae CALL	404250 <omp_get_ancestor_thread_num@plt>

(1661) 0x4b61b3 MOV	%EAX,-0x38(%RBP)

(1661) 0x4b61b6 LEA	-0x3(%R15),%EDI

(1661) 0x4b61ba CALL	404250 <omp_get_ancestor_thread_num@plt>

(1661) 0x4b61bf MOV	%EAX,-0x30(%RBP)

(1661) 0x4b61c2 LEA	-0x4(%R15),%EDI

(1661) 0x4b61c6 CALL	404250 <omp_get_ancestor_thread_num@plt>

(1661) 0x4b61cb MOV	%EAX,-0x34(%RBP)

(1661) 0x4b61ce LEA	-0x5(%R15),%EDI

(1661) 0x4b61d2 CALL	404250 <omp_get_ancestor_thread_num@plt>

(1661) 0x4b61d7 MOV	%EAX,-0x2c(%RBP)

(1661) 0x4b61da LEA	-0x6(%R15),%EDI

(1661) 0x4b61de CALL	404250 <omp_get_ancestor_thread_num@plt>

(1661) 0x4b61e3 MOV	%EAX,%R12D

(1661) 0x4b61e6 LEA	-0x7(%R15),%EDI

(1661) 0x4b61ea CALL	404250 <omp_get_ancestor_thread_num@plt>

(1661) 0x4b61ef VMOVD	-0x30(%RBP),%XMM0

(1661) 0x4b61f4 VPINSRD	$0x1,-0x38(%RBP),%XMM0,%XMM0

(1661) 0x4b61fb VPINSRD	$0x2,-0x3c(%RBP),%XMM0,%XMM0

(1661) 0x4b6202 VPINSRD	$0x3,-0x40(%RBP),%XMM0,%XMM0

(1661) 0x4b6209 VMOVD	%EAX,%XMM1

(1661) 0x4b620d VPINSRD	$0x1,%R12D,%XMM1,%XMM1

(1661) 0x4b6213 VPINSRD	$0x2,-0x2c(%RBP),%XMM1,%XMM1

(1661) 0x4b621a VPINSRD	$0x3,-0x34(%RBP),%XMM1,%XMM1

(1661) 0x4b6221 VINSERTI128	$0x1,%XMM0,%YMM1,%YMM0

(1661) 0x4b6227 VPTEST	%YMM0,%YMM0

(1661) 0x4b622c MOVZX	%R13B,%R13D

(1661) 0x4b6230 MOV	$0,%EAX

(1661) 0x4b6235 CMOVNE	%EAX,%R13D

(1661) 0x4b6239 ADD	$-0x8,%R15D

(1661) 0x4b623d DEC	%R14D

(1661) 0x4b6240 JNE	4b6190

0x4b6246 MOV	%EBX,%EAX

0x4b6248 AND	$0x7ffffff8,%EAX

0x4b624d SUB	%EAX,%EBX

0x4b624f JE	4b6278

0x4b6251 XOR	%R14D,%R14D

0x4b6254 NOPW	%CS:(%RAX,%RAX,1)

(1660) 0x4b6260 MOV	%EBX,%EDI

(1660) 0x4b6262 VZEROUPPER

(1660) 0x4b6265 CALL	404250 <omp_get_ancestor_thread_num@plt>

(1660) 0x4b626a TEST	%EAX,%EAX

(1660) 0x4b626c MOVZX	%R13B,%R13D

(1660) 0x4b6270 CMOVNE	%R14D,%R13D

(1660) 0x4b6274 DEC	%EBX

(1660) 0x4b6276 JNE	4b6260

0x4b6278 TEST	$0x1,%R13B

0x4b627c MOV	-0x48(%RBP),%R14

0x4b6280 JE	4b6360

0x4b6286 MOV	0x48(%R14),%RAX

0x4b628a TEST	%RAX,%RAX

0x4b628d JE	4b6355

0x4b6293 MOV	0x48(%RAX),%RCX

0x4b6297 CMP	0x40(%RAX),%RCX

0x4b629b JE	4b6300

0x4b629d MOV	-0x8(%RCX),%RAX

0x4b62a1 TEST	%RAX,%RAX

0x4b62a4 JE	4b6300

0x4b62a6 VMOVDQU	0x50(%RAX),%XMM0

0x4b62ab VMOVDQU	%XMM0,0x50(%R14)

0x4b62b1 MOVSXD	0x60(%RAX),%RAX

0x4b62b5 MOV	%EAX,0x60(%R14)

0x4b62b9 MOVZX	0x40(%R14),%ECX

0x4b62be MOV	%CL,0x50(%R14,%RAX,1)

0x4b62c3 MOV	0x60(%R14),%EAX

0x4b62c7 CMP	$0xf,%EAX

0x4b62ca JL	4b6340

0x4b62cc MOVB	$0x1,0xecb04(%RIP)

0x4b62d3 JMP	4b6346

0x4b62d5 NOPW	%CS:(%RAX,%RAX,1)

0x4b62e4 NOPW	%CS:(%RAX,%RAX,1)

0x4b62f3 NOPW	%CS:(%RAX,%RAX,1)

0x4b6300 VPXOR	%XMM0,%XMM0,%XMM0

0x4b6304 VMOVDQU	%XMM0,0x50(%R14)

0x4b630a MOVZX	0x40(%R14),%EAX

0x4b630f MOV	%AL,0x50(%R14)

0x4b6313 MOVL	$0x1,0x60(%R14)

0x4b631b JMP	4b6346

0x4b631d NOPW	%CS:(%RAX,%RAX,1)

0x4b632c NOPW	%CS:(%RAX,%RAX,1)

0x4b633b NOPL	(%RAX,%RAX,1)

0x4b6340 INC	%EAX

0x4b6342 MOV	%EAX,0x60(%R14)

0x4b6346 MOV	0x48(%R14),%RDI

0x4b634a MOV	%R14,%RSI

0x4b634d VZEROUPPER

0x4b6350 CALL	4bee00 <_ZN11qmcplusplus12TimerManagerINS_9TimerTypeINSt6chrono3_V212system_clockEEEE10push_timerEPS5_>

0x4b6355 VZEROUPPER

0x4b6358 CALL	4046e0 <_ZNSt6chrono3_V212system_clock3nowEv@plt>

0x4b635d MOV	%RAX,(%R14)

0x4b6360 ADD	$0x28,%RSP

0x4b6364 POP	%RBX

0x4b6365 POP	%R12

0x4b6367 POP	%R13

0x4b6369 POP	%R14

0x4b636b POP	%R15

0x4b636d POP	%RBP

0x4b636e VZEROUPPER

0x4b6371 RET

0x4b6372 NOPW	%CS:(%RAX,%RAX,1)

0x4b637c NOPL	(%RAX)

Coverage (%)	Name	Source Location	Module
►15.73+	qmcplusplus::ParticleSet::acce[...]	ParticleSet.cpp:389	exec
○	main.extracted.107	miniqmc.cpp:452	exec
○	__kmp_invoke_microtask		libiomp5.so
○	__kmp_invoke_task_func		libiomp5.so
►13.17+	qmcplusplus::SoaDistanceTableA[...]	SoaDistanceTableABOMPTarget.h:374	exec
○	qmcplusplus::ParticleSet::acce[...]	ParticleSet.cpp:389	exec
○	main.extracted.107	miniqmc.cpp:452	exec
○	__kmp_invoke_microtask		libiomp5.so
○	__kmp_invoke_task_func		libiomp5.so
►11.74+	qmcplusplus::ParticleSet::upda[...]	ParticleSet.cpp:242	exec
○	qmcplusplus::NonLocalPP<double[...]	NonLocalPP.hpp:134	exec
○	main.extracted.107	NewTimer.h:249	exec
○	__kmp_invoke_microtask		libiomp5.so
○	__kmp_invoke_task_func		libiomp5.so
►7.83+	__kmp_invoke_microtask		libiomp5.so
○	__kmp_invoke_task_func		libiomp5.so
►6.12+	qmcplusplus::NonLocalPP<double[...]	NonLocalPP.hpp:134	exec
○	main.extracted.107	NewTimer.h:249	exec
○	__kmp_invoke_microtask		libiomp5.so
○	__kmp_invoke_task_func		libiomp5.so
►5.69+	qmcplusplus::WaveFunction::rat[...]	WaveFunction.cpp:196	exec
○	main.extracted.107	refwrap.h:338	exec
○	__kmp_invoke_microtask		libiomp5.so
○	__kmp_invoke_task_func		libiomp5.so
►5.27+	main.extracted.107	refwrap.h:338	exec
○	__kmp_invoke_microtask		libiomp5.so
○	__kmp_invoke_task_func		libiomp5.so
►4.91+	qmcplusplus::ParticleSet::comp[...]	ParticleSet.cpp:343	exec
○	main.extracted.107	refwrap.h:338	exec
○	__kmp_invoke_microtask		libiomp5.so
○	__kmp_invoke_task_func		libiomp5.so
►4.70+	qmcplusplus::NonLocalPP<double[...]	NonLocalPP.hpp:135	exec
○	main.extracted.107	NewTimer.h:249	exec
○	__kmp_invoke_microtask		libiomp5.so
○	__kmp_invoke_task_func		libiomp5.so
►4.13+	miniqmcreference::DiracDetermi[...]	unique_ptr.h:173	exec
○	qmcplusplus::WaveFunction::rat[...]	WaveFunction.cpp:196	exec
○	main.extracted.107	refwrap.h:338	exec
○	__kmp_invoke_microtask		libiomp5.so
○	__kmp_invoke_task_func		libiomp5.so
►2.85+	main.extracted.107	miniqmc.cpp:452	exec
○	__kmp_invoke_microtask		libiomp5.so
○	__kmp_invoke_task_func		libiomp5.so
►2.63+	main.extracted.107	refwrap.h:338	exec
○	__kmp_invoke_microtask		libiomp5.so
○	__kmp_invoke_task_func		libiomp5.so
►2.14+	main.extracted.107	refwrap.h:338	exec
○	__kmp_invoke_microtask		libiomp5.so
○	__kmp_invoke_task_func		libiomp5.so
►1.64+	qmcplusplus::WaveFunction::eva[...]	stl_vector.h:919	exec
○	main.extracted.107	refwrap.h:338	exec
○	__kmp_invoke_microtask		libiomp5.so
○	__kmp_invoke_task_func		libiomp5.so
►1.42+	miniqmcreference::DiracDetermi[...]	DiracDeterminantRef.cpp:100	exec
○	qmcplusplus::WaveFunction::rat[...]	WaveFunction.cpp:196	exec
○	main.extracted.107	refwrap.h:338	exec
○	__kmp_invoke_microtask		libiomp5.so
○	__kmp_invoke_task_func		libiomp5.so
►1.42+	main.extracted.107	TinyVector.h:62	exec
○	__kmp_invoke_microtask		libiomp5.so
○	__kmp_invoke_task_func		libiomp5.so
►1.21+	main.extracted.107	refwrap.h:338	exec
○	__kmp_invoke_microtask		libiomp5.so
○	__kmp_invoke_task_func		libiomp5.so

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.03% of application time for run icx_4

Source file and lines	NewTimer.cpp:39-81
Module	exec

The function is defined in:

/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.cpp:39,53-75,81
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.h:90-97
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Utilities/TimerManager.h:92-93
/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/stl_vector.h:919

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 15.00 to 4.50 cycles (3.33x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is poorly vectorized. Only 12% of vector register length is used (average across all SSE/AVX instructions). By fully vectorizing your function, you can lower the cost of an iteration from 15.00 to 0.64 cycles (23.37x speedup).

Details

26% of SSE/AVX instructions are used in vector version (process two or more data elements in vector registers):

33% of SSE/AVX loads are used in vector version.
25% of SSE/AVX stores are used in vector version.
0% of SSE/AVX addition or subtraction instructions are used in vector version.
25% of SSE/AVX instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

omp_get_level@plt: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.cpp:53
qmcplusplus::TimerManager
>::push_timer(qmcplusplus::TimerType
*): 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.cpp:73
std::chrono::_V2::system_clock::now(): 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.cpp:75

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

VZEROUPPER: 3 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.cpp:73
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.cpp:75
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.cpp:81

Conversion instructions

Detected expensive conversion instructions.

Details

MOVZX: 2 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.cpp:65
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.cpp:70

Workaround

Avoid mixing data with different types. In particular, check if the type of constants is the same as array elements.

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 75 bytes. The binary function is storing 63 bytes.

General properties

nb instructions	84
nb uops	90
loop length	370
used x86 registers	11
used mmx registers	0
used xmm registers	1
used ymm registers	0
used zmm registers	0
nb stack references	1

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	15.00 cycles
front end	15.00 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11
uops	5.50	4.40	6.33	6.33	9.50	4.40	5.50	9.50	9.50	9.50	4.20	6.33
cycles	5.50	4.40	6.33	6.33	9.50	4.40	5.50	9.50	9.50	9.50	4.20	6.33

Execution ports to units layout:

P0 (256 bits): VPU, BRU, ALU, DIV/SQRT
P1 (256 bits): ALU, VPU
P2 (512 bits): load
P3 (512 bits): load
P4 (512 bits): store data
P5 (512 bits): ALU, VPU
P6: ALU, BRU
P7: store address
P8: store address
P9 (512 bits): store data
P10: ALU
P11 (512 bits): load

Cycles executing div or sqrt instructions

Cycles summary

Front-end	15.00
Dispatch	9.50
Overall L1	15.00

Vectorization ratios

all	26%
load	33%
store	25%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	25%

Vector efficiency ratios

all	12%
load	13%
store	11%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	6%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	12%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 15.00 cycles. At this rate:

2% of peak load performance is reached (5.00 out of 192.00 bytes loaded per cycle (GB/s @ 1GHz))
3% of peak store performance is reached (4.20 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Performance is limited by instruction throughput (loading/decoding program instructions to execution core) (front-end is a bottleneck). By removing all these bottlenecks, you can lower the cost of an iteration from 15.00 to 9.50 cycles (1.58x speedup).

ASM code

In the binary file, the address of the function is: 4b6140

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	Latency	Recip. throughput	Vectorization
CMPB $0,0x38(%RDI)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (1.6%)
JE 4b636e <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0x22e>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
PUSH %RBP	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
PUSH %R15	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R14	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R13	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R12	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %RBX	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
SUB $0x28,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RDI,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 404620 <omp_get_level@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
TEST %EAX,%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (6.3%)
JLE 4b6286 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0x146>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %EAX,%EBX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
MOV %R14,-0x48(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV $0x1,%R13D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
CMP $0x8,%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
JB 4b6246 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0x106>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %EBX,%R14D	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SHR $0x3,%R14D	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
MOV $0x1,%R13D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
MOV %EBX,%R15D	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
MOV %EBX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
AND $0x7ffffff8,%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
SUB %EAX,%EBX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
JE 4b6278 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0x138>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
XOR %R14D,%R14D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
TEST $0x1,%R13B	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	N/A
MOV -0x48(%RBP),%R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
JE 4b6360 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0x220>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV 0x48(%R14),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
TEST %RAX,%RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (12.5%)
JE 4b6355 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0x215>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV 0x48(%RAX),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP 0x40(%RAX),%RCX	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JE 4b6300 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0x1c0>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x8(%RCX),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
TEST %RAX,%RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (12.5%)
JE 4b6300 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0x1c0>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
VMOVDQU 0x50(%RAX),%XMM0	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	0-1	0.33	vect (25.0%)
VMOVDQU %XMM0,0x50(%R14)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
MOVSXD 0x60(%RAX),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %EAX,0x60(%R14)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOVZX 0x40(%R14),%ECX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %CL,0x50(%R14,%RAX,1)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	N/A
MOV 0x60(%R14),%EAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP $0xf,%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
JL 4b6340 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0x200>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOVB $0x1,0xecb04(%RIP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (1.6%)
JMP 4b6346 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0x206>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VPXOR %XMM0,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
VMOVDQU %XMM0,0x50(%R14)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
MOVZX 0x40(%R14),%EAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %AL,0x50(%R14)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	N/A
MOVL $0x1,0x60(%R14)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
JMP 4b6346 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0x206>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
INC %EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %EAX,0x60(%R14)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOV 0x48(%R14),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %R14,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
VZEROUPPER	2	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 4bee00 <_ZN11qmcplusplus12TimerManagerINS_9TimerTypeINSt6chrono3_V212system_clockEEEE10push_timerEPS5_>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
VZEROUPPER	2	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 4046e0 <_ZNSt6chrono3_V212system_clock3nowEv@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV %RAX,(%R14)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
ADD $0x28,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %RBP	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
VZEROUPPER	2	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
RET	1	0.50	0	0.33	0.33	0	0	0.50	0	0	0	0	0.33	0	2.13	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A

The code analyzed by CQA in that panel excludes loops and represents 0.03% of application time for run icx_4

Source file and lines	NewTimer.cpp:39-81
Module	exec

The function is defined in:

/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.cpp:39,53-75,81
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.h:90-97
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Utilities/TimerManager.h:92-93
/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/stl_vector.h:919

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 15.00 to 4.50 cycles (3.33x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

26% of SSE/AVX instructions are used in vector version (process two or more data elements in vector registers):

33% of SSE/AVX loads are used in vector version.
25% of SSE/AVX stores are used in vector version.
0% of SSE/AVX addition or subtraction instructions are used in vector version.
25% of SSE/AVX instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

omp_get_level@plt: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.cpp:53
qmcplusplus::TimerManager
>::push_timer(qmcplusplus::TimerType
*): 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.cpp:73
std::chrono::_V2::system_clock::now(): 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.cpp:75

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

VZEROUPPER: 3 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.cpp:73
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.cpp:75
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.cpp:81

Conversion instructions

Detected expensive conversion instructions.

Details

MOVZX: 2 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.cpp:65
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.cpp:70

Workaround

Avoid mixing data with different types. In particular, check if the type of constants is the same as array elements.

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 75 bytes. The binary function is storing 63 bytes.

General properties

nb instructions	84
nb uops	90
loop length	370
used x86 registers	11
used mmx registers	0
used xmm registers	1
used ymm registers	0
used zmm registers	0
nb stack references	1

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	15.00 cycles
front end	15.00 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11
uops	5.50	4.40	6.33	6.33	9.50	4.40	5.50	9.50	9.50	9.50	4.20	6.33
cycles	5.50	4.40	6.33	6.33	9.50	4.40	5.50	9.50	9.50	9.50	4.20	6.33

Execution ports to units layout:

P0 (256 bits): VPU, BRU, ALU, DIV/SQRT
P1 (256 bits): ALU, VPU
P2 (512 bits): load
P3 (512 bits): load
P4 (512 bits): store data
P5 (512 bits): ALU, VPU
P6: ALU, BRU
P7: store address
P8: store address
P9 (512 bits): store data
P10: ALU
P11 (512 bits): load

Cycles executing div or sqrt instructions

Cycles summary

Front-end	15.00
Dispatch	9.50
Overall L1	15.00

Vectorization ratios

all	26%
load	33%
store	25%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	25%

Vector efficiency ratios

all	12%
load	13%
store	11%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	6%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	12%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 15.00 cycles. At this rate:

2% of peak load performance is reached (5.00 out of 192.00 bytes loaded per cycle (GB/s @ 1GHz))
3% of peak store performance is reached (4.20 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

ASM code

In the binary file, the address of the function is: 4b6140

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	Latency	Recip. throughput	Vectorization
CMPB $0,0x38(%RDI)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (1.6%)
JE 4b636e <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0x22e>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
PUSH %RBP	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
PUSH %R15	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R14	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R13	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R12	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %RBX	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
SUB $0x28,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RDI,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 404620 <omp_get_level@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
TEST %EAX,%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (6.3%)
JLE 4b6286 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0x146>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %EAX,%EBX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
MOV %R14,-0x48(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV $0x1,%R13D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
CMP $0x8,%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
JB 4b6246 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0x106>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %EBX,%R14D	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SHR $0x3,%R14D	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
MOV $0x1,%R13D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
MOV %EBX,%R15D	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
MOV %EBX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
AND $0x7ffffff8,%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
SUB %EAX,%EBX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
JE 4b6278 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0x138>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
XOR %R14D,%R14D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
TEST $0x1,%R13B	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	N/A
MOV -0x48(%RBP),%R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
JE 4b6360 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0x220>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV 0x48(%R14),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
TEST %RAX,%RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (12.5%)
JE 4b6355 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0x215>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV 0x48(%RAX),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP 0x40(%RAX),%RCX	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JE 4b6300 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0x1c0>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x8(%RCX),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
TEST %RAX,%RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (12.5%)
JE 4b6300 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0x1c0>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
VMOVDQU 0x50(%RAX),%XMM0	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	0-1	0.33	vect (25.0%)
VMOVDQU %XMM0,0x50(%R14)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
MOVSXD 0x60(%RAX),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %EAX,0x60(%R14)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOVZX 0x40(%R14),%ECX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %CL,0x50(%R14,%RAX,1)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	N/A
MOV 0x60(%R14),%EAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP $0xf,%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
JL 4b6340 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0x200>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOVB $0x1,0xecb04(%RIP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (1.6%)
JMP 4b6346 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0x206>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VPXOR %XMM0,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
VMOVDQU %XMM0,0x50(%R14)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
MOVZX 0x40(%R14),%EAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %AL,0x50(%R14)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	N/A
MOVL $0x1,0x60(%R14)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
JMP 4b6346 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0x206>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
INC %EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %EAX,0x60(%R14)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOV 0x48(%R14),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %R14,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
VZEROUPPER	2	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 4bee00 <_ZN11qmcplusplus12TimerManagerINS_9TimerTypeINSt6chrono3_V212system_clockEEEE10push_timerEPS5_>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
VZEROUPPER	2	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 4046e0 <_ZNSt6chrono3_V212system_clock3nowEv@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV %RAX,(%R14)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
ADD $0x28,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %RBP	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
VZEROUPPER	2	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
RET	1	0.50	0	0.33	0.33	0	0	0.50	0	0	0	0	0.33	0	2.13	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A

Name	Coverage (%)	Time (s)
▼qmcplusplus::TimerType::start()–	0.03	0.03
○Loop 1660 - NewTimer.cpp:53-54 - exec	0.00	0.01
○Loop 1661 - NewTimer.cpp:53-54 - exec	0.00	0.00

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Matching between your function (in the source code) and the binary function

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Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code