OV - exec - Function miniqmcreference::DiracDeterminantRef<qmcplusplus::DelayedUpdate<double, double> >::evaluateLog(qmcplusplus::ParticleSet&, qmcplusplus::ParticleAttrib<qmcplusplus::TinyVector<double, 3u>, std::allocator<qmcplusplus::TinyVector<double, 3u> > >&, qmcplusplus::ParticleAttrib<double, std::allocator<double> >&)

	Function: miniqmcreference::DiracDeterminantRef<qmcplusplus::DelayedUpdate<double, double> >::evalua ...	Module: exec	Source: DiracDeterminantRef.cpp:235-255 [...]	Coverage (incl. loops): 0.11% \| (excl. loops): 0.00%

/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/inner_product.hpp: 82 - 155

--------------------------------------------------------------------------------

82:   for (int i = 0; i < n; i++)

83:     res += a[i] * b[i];

[...]

155:   for (int i = 0; i < n; i++)

/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/PETE/OperatorTags.h: 63 - 94

--------------------------------------------------------------------------------

63:     return (a * b);

[...]

94:     (const_cast<T1&>(a) += b);

/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/TinyVectorOps.h: 111 - 131

--------------------------------------------------------------------------------

111:       ret[d] = op(lhs, rhs[d]);

[...]

131:       res += lhs[d] * rhs[d];

/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracDeterminantRef.cpp: 235 - 255

--------------------------------------------------------------------------------

235: {

236:   recompute(P);

237:

238:   if (NumPtcls == 1)

239:   {

240:     ValueType y = psiM(0, 0);

241:     GradType rv = y * dpsiM(0, 0);

242:     G[FirstIndex] += rv;

243:     L[FirstIndex] += y * d2psiM(0, 0) - dot(rv, rv);

244:   }

245:   else

246:   {

247:     for (int i = 0, iat = FirstIndex; i < NumPtcls; i++, iat++)

248:     {

249:       mGradType rv   = simd::dot(psiM[i], dpsiM[i], NumOrbitals);

250:       mValueType lap = simd::dot(psiM[i], d2psiM[i], NumOrbitals);

251:       G[iat] += rv;

252:       L[iat] += lap - dot(rv, rv);

253:     }

254:   }

255:   return LogValue;

/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsMatrix.h: 217 - 217

--------------------------------------------------------------------------------

217:   inline Type_t* operator[](size_type i) { return X.data() + i * D2; }

/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/TinyVector.h: 62 - 169

--------------------------------------------------------------------------------

62:       X[d] = T(0);

[...]

169:   inline Type_t& operator[](unsigned int i) { return X[i]; }

/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h: 223 - 248

--------------------------------------------------------------------------------

223:     return X[i];

[...]

248:   inline pointer data() { return X; }

0x45d140 PUSH	%RBP

0x45d141 MOV	%RSP,%RBP

0x45d144 PUSH	%R15

0x45d146 PUSH	%R14

0x45d148 PUSH	%R13

0x45d14a PUSH	%R12

0x45d14c PUSH	%RBX

0x45d14d SUB	$0x48,%RSP

0x45d151 MOV	%RCX,%R14

0x45d154 MOV	%RDX,%R15

0x45d157 MOV	%RDI,%RBX

0x45d15a CALL	45fe00 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE9recomputeERNS1_11ParticleSetE>

0x45d15f MOV	0x484(%RBX),%EAX

0x45d165 CMP	$0x1,%RAX

0x45d169 MOV	%RBX,-0x48(%RBP)

0x45d16d JNE	45d200

0x45d173 MOV	0x100(%RBX),%RAX

0x45d17a VMOVDDUP	(%RAX),%XMM0

0x45d17e MOV	0x140(%RBX),%RAX

0x45d185 MOVQ	$0,-0x30(%RBP)

0x45d18d VMULPD	(%RAX),%XMM0,%XMM1

0x45d191 VMOVUPD	%XMM1,-0x40(%RBP)

0x45d196 VMULSD	0x10(%RAX),%XMM0,%XMM2

0x45d19b VMOVSD	%XMM2,-0x30(%RBP)

0x45d1a0 MOVSXD	0x478(%RBX),%RAX

0x45d1a7 MOV	0x18(%R15),%RCX

0x45d1ab LEA	(%RAX,%RAX,2),%RDX

0x45d1af VADDPD	(%RCX,%RDX,8),%XMM1,%XMM2

0x45d1b4 VMOVUPD	%XMM2,(%RCX,%RDX,8)

0x45d1b9 VMOVSD	0x10(%RCX,%RDX,8),%XMM2

0x45d1bf VADDSD	-0x30(%RBP),%XMM2,%XMM2

0x45d1c4 VMOVSD	%XMM2,0x10(%RCX,%RDX,8)

0x45d1ca MOV	0x180(%RBX),%RCX

0x45d1d1 VMOVUPD	-0x38(%RBP),%XMM2

0x45d1d6 VMULPD	%XMM2,%XMM2,%XMM2

0x45d1da VSHUFPD	$0x1,%XMM2,%XMM2,%XMM3

0x45d1df VADDSD	%XMM3,%XMM2,%XMM2

0x45d1e3 VFMADD231SD	%XMM1,%XMM1,%XMM2

0x45d1e8 VFMSUB231SD	(%RCX),%XMM0,%XMM2

0x45d1ed MOV	0x18(%R14),%RCX

0x45d1f1 VADDSD	(%RCX,%RAX,8),%XMM2,%XMM0

0x45d1f6 VMOVSD	%XMM0,(%RCX,%RAX,8)

0x45d1fb JMP	45d4a5

0x45d200 TEST	%EAX,%EAX

0x45d202 JLE	45d4a5

0x45d208 MOV	-0x48(%RBP),%RSI

0x45d20c MOV	0x480(%RSI),%ECX

0x45d212 TEST	%ECX,%ECX

0x45d214 JLE	45d480

0x45d21a MOVSXD	0x478(%RSI),%RDX

0x45d221 MOV	%RDX,-0x68(%RBP)

0x45d225 MOV	0xd8(%RSI),%R10

0x45d22c MOV	0x100(%RSI),%RDI

0x45d233 MOV	0x140(%RSI),%R8

0x45d23a MOV	0x118(%RSI),%RDX

0x45d241 DEC	%RAX

0x45d244 MOV	0x180(%RSI),%R9

0x45d24b MOV	0x158(%RSI),%RSI

0x45d252 MOV	%RSI,-0x50(%RBP)

0x45d256 MOV	0x18(%R15),%R11

0x45d25a MOV	0x18(%R14),%RSI

0x45d25e MOV	%RSI,-0x58(%RBP)

0x45d262 MOV	%ECX,%ESI

0x45d264 SHR	$0x2,%ESI

0x45d267 MOV	%ECX,%R15D

0x45d26a AND	$0x7ffffffc,%R15D

0x45d271 SAL	$0x3,%R10

0x45d275 MOV	%R10,-0x60(%RBP)

0x45d279 SAL	$0x3,%RDX

0x45d27d LEA	(%RDX,%RDX,2),%R12

0x45d281 MOV	%RSI,%RDX

0x45d284 SAL	$0x5,%RDX

0x45d288 LEA	(%RDX,%RDX,2),%R13

0x45d28c AND	$0x1fffffff,%ESI

0x45d292 LEA	(%RSI,%RSI,2),%RDX

0x45d296 SAL	$0x5,%RDX

0x45d29a LEA	0x10(%RDX,%R8,1),%RBX

0x45d29f ADD	$0x58,%R8

0x45d2a3 SALQ	$0x3,-0x50(%RBP)

0x45d2a8 XOR	%EDX,%EDX

0x45d2aa LEA	0x18(%RDI),%R14

0x45d2ae JMP	45d33b

0x45d2b3 NOPW	%CS:(%RAX,%RAX,1)

(1028) 0x45d2c0 MOV	-0x68(%RBP),%RSI

(1028) 0x45d2c4 ADD	%RDX,%RSI

(1028) 0x45d2c7 LEA	(%RSI,%RSI,2),%R10

(1028) 0x45d2cb VMOVUPD	-0x40(%RBP),%XMM1

(1028) 0x45d2d0 VADDPD	(%R11,%R10,8),%XMM1,%XMM2

(1028) 0x45d2d6 VMOVUPD	%XMM2,(%R11,%R10,8)

(1028) 0x45d2dc VMOVSD	0x10(%R11,%R10,8),%XMM2

(1028) 0x45d2e3 VADDSD	-0x30(%RBP),%XMM2,%XMM2

(1028) 0x45d2e8 VMOVSD	%XMM2,0x10(%R11,%R10,8)

(1028) 0x45d2ef VMOVUPD	-0x38(%RBP),%XMM2

(1028) 0x45d2f4 VMULPD	%XMM2,%XMM2,%XMM2

(1028) 0x45d2f8 VSHUFPD	$0x1,%XMM2,%XMM2,%XMM3

(1028) 0x45d2fd VADDSD	%XMM3,%XMM2,%XMM2

(1028) 0x45d301 VFNMSUB231SD	%XMM1,%XMM1,%XMM2

(1028) 0x45d306 VADDSD	%XMM2,%XMM0,%XMM0

(1028) 0x45d30a MOV	-0x58(%RBP),%R10

(1028) 0x45d30e VADDSD	(%R10,%RSI,8),%XMM0,%XMM0

(1028) 0x45d314 VMOVSD	%XMM0,(%R10,%RSI,8)

(1028) 0x45d31a MOV	-0x60(%RBP),%RSI

(1028) 0x45d31e ADD	%RSI,%R14

(1028) 0x45d321 ADD	%R12,%R8

(1028) 0x45d324 ADD	%R12,%RBX

(1028) 0x45d327 ADD	%RSI,%RDI

(1028) 0x45d32a ADD	-0x50(%RBP),%R9

(1028) 0x45d32e CMP	%RAX,%RDX

(1028) 0x45d331 LEA	0x1(%RDX),%RDX

(1028) 0x45d335 JE	45d4a5

(1028) 0x45d33b VXORPD	%XMM0,%XMM0,%XMM0

(1028) 0x45d33f VXORPD	%XMM1,%XMM1,%XMM1

(1028) 0x45d343 CMP	$0x4,%ECX

(1028) 0x45d346 JB	45d3ab

(1028) 0x45d348 XOR	%ESI,%ESI

(1028) 0x45d34a MOV	%R14,%R10

(1028) 0x45d34d NOPL	(%RAX)

  (1031) 0x45d350 VMOVDDUP	-0x18(%R10),%XMM2

  (1031) 0x45d356 VFMADD231SD	-0x48(%R8,%RSI,1),%XMM2,%XMM1

  (1031) 0x45d35d VMOVDDUP	-0x10(%R10),%XMM3

  (1031) 0x45d363 VFMADD231SD	-0x30(%R8,%RSI,1),%XMM3,%XMM1

  (1031) 0x45d36a VMOVDDUP	-0x8(%R10),%XMM4

  (1031) 0x45d370 VFMADD231SD	-0x18(%R8,%RSI,1),%XMM4,%XMM1

  (1031) 0x45d377 VFMADD231PD	-0x58(%R8,%RSI,1),%XMM2,%XMM0

  (1031) 0x45d37e VFMADD231PD	-0x40(%R8,%RSI,1),%XMM3,%XMM0

  (1031) 0x45d385 VFMADD231PD	-0x28(%R8,%RSI,1),%XMM4,%XMM0

  (1031) 0x45d38c VMOVDDUP	(%R10),%XMM2

  (1031) 0x45d391 VFMADD231PD	-0x10(%R8,%RSI,1),%XMM2,%XMM0

  (1031) 0x45d398 VFMADD231SD	(%R8,%RSI,1),%XMM2,%XMM1

  (1031) 0x45d39e ADD	$0x20,%R10

  (1031) 0x45d3a2 ADD	$0x60,%RSI

  (1031) 0x45d3a6 CMP	%RSI,%R13

  (1031) 0x45d3a9 JNE	45d350

(1028) 0x45d3ab CMP	%ECX,%R15D

(1028) 0x45d3ae JE	45d3dd

(1028) 0x45d3b0 MOV	%RBX,%RSI

(1028) 0x45d3b3 MOV	%R15,%R10

(1028) 0x45d3b6 NOPW	%CS:(%RAX,%RAX,1)

  (1030) 0x45d3c0 VMOVDDUP	(%RDI,%R10,8),%XMM2

  (1030) 0x45d3c6 VFMADD231PD	-0x10(%RSI),%XMM2,%XMM0

  (1030) 0x45d3cc VFMADD231SD	(%RSI),%XMM2,%XMM1

  (1030) 0x45d3d1 INC	%R10

  (1030) 0x45d3d4 ADD	$0x18,%RSI

  (1030) 0x45d3d8 CMP	%R10,%RCX

  (1030) 0x45d3db JNE	45d3c0

(1028) 0x45d3dd VMOVUPD	%XMM0,-0x40(%RBP)

(1028) 0x45d3e2 VMOVSD	%XMM1,-0x30(%RBP)

(1028) 0x45d3e7 TEST	%R15,%R15

(1028) 0x45d3ea JE	45d440

(1028) 0x45d3ec VXORPD	%XMM0,%XMM0,%XMM0

(1028) 0x45d3f0 XOR	%ESI,%ESI

(1028) 0x45d3f2 NOPW	%CS:(%RAX,%RAX,1)

  (1029) 0x45d400 VMOVUPD	(%R9,%RSI,8),%YMM1

  (1029) 0x45d406 VFMADD231PD	(%RDI,%RSI,8),%YMM1,%YMM0

  (1029) 0x45d40c ADD	$0x4,%RSI

  (1029) 0x45d410 CMP	%R15,%RSI

  (1029) 0x45d413 JB	45d400

(1028) 0x45d415 VEXTRACTF128	$0x1,%YMM0,%XMM1

(1028) 0x45d41b VADDPD	%XMM1,%XMM0,%XMM0

(1028) 0x45d41f VSHUFPD	$0x1,%XMM0,%XMM0,%XMM1

(1028) 0x45d424 VADDSD	%XMM1,%XMM0,%XMM0

(1028) 0x45d428 MOV	%R15,%RSI

(1028) 0x45d42b CMP	%ECX,%R15D

(1028) 0x45d42e JNE	45d450

(1028) 0x45d430 JMP	45d2c0

0x45d435 NOPW	%CS:(%RAX,%RAX,1)

(1028) 0x45d440 VXORPD	%XMM0,%XMM0,%XMM0

(1028) 0x45d444 XOR	%ESI,%ESI

(1028) 0x45d446 NOPW	%CS:(%RAX,%RAX,1)

  (1027) 0x45d450 VMOVSD	(%R9,%RSI,8),%XMM1

  (1027) 0x45d456 VFMADD231SD	(%RDI,%RSI,8),%XMM1,%XMM0

  (1027) 0x45d45c INC	%RSI

  (1027) 0x45d45f CMP	%RSI,%RCX

  (1027) 0x45d462 JNE	45d450

(1028) 0x45d464 JMP	45d2c0

0x45d469 NOPW	%CS:(%RAX,%RAX,1)

0x45d478 NOPL	(%RAX,%RAX,1)

0x45d480 MOV	%EAX,%ECX

0x45d482 AND	$0x7,%ECX

0x45d485 CMP	$0x8,%EAX

0x45d488 JB	45d496

0x45d48a AND	$0x7ffffff8,%EAX

0x45d48f NOP

(1026) 0x45d490 ADD	$-0x8,%RAX

(1026) 0x45d494 JNE	45d490

0x45d496 TEST	%RCX,%RCX

0x45d499 JE	45d4a5

0x45d49b NOPL	(%RAX,%RAX,1)

(1025) 0x45d4a0 DEC	%RCX

(1025) 0x45d4a3 JNE	45d4a0

0x45d4a5 MOV	-0x48(%RBP),%RAX

0x45d4a9 VMOVSD	0x10(%RAX),%XMM0

0x45d4ae ADD	$0x48,%RSP

0x45d4b2 POP	%RBX

0x45d4b3 POP	%R12

0x45d4b5 POP	%R13

0x45d4b7 POP	%R14

0x45d4b9 POP	%R15

0x45d4bb POP	%RBP

0x45d4bc VZEROUPPER

0x45d4bf RET

Coverage (%)	Name	Source Location	Module
►61.91+	qmcplusplus::WaveFunction::eva[...]	WaveFunction.cpp:170	exec
○	main.extracted.112	miniqmc.cpp:397	exec
○	__kmp_invoke_microtask		libiomp5.so
○	__kmp_invoke_task_func		libiomp5.so
►38.09+	qmcplusplus::WaveFunction::eva[...]	WaveFunction.cpp:171	exec
○	main.extracted.112	miniqmc.cpp:397	exec
○	__kmp_invoke_microtask		libiomp5.so
○	__kmp_invoke_task_func		libiomp5.so

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run icx_4

Source file and lines	DiracDeterminantRef.cpp:235-255
Module	exec

The function is defined in:

/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/inner_product.hpp:82-83,155
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/PETE/OperatorTags.h:63,94
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/TinyVectorOps.h:111,131
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracDeterminantRef.cpp:235-255
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsMatrix.h:217
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/TinyVector.h:62,169
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:223,248

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 18.67 to 5.33 cycles (3.50x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is poorly vectorized. Only 14% of vector register length is used (average across all SSE/AVX instructions). By fully vectorizing your function, you can lower the cost of an iteration from 18.67 to 1.69 cycles (11.01x speedup).

Details

22% of SSE/AVX instructions are used in vector version (process two or more data elements in vector registers):

21% of SSE/AVX loads are used in vector version.
16% of SSE/AVX stores are used in vector version.
25% of SSE/AVX addition or subtraction instructions are used in vector version.
66% of SSE/AVX multiply instructions are used in vector version.
0% of SSE/AVX fused multiply-add instructions are used in vector version.
25% of SSE/AVX instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

FMA

Detected 2 FMA (fused multiply-add) operations. Presence of both ADD/SUB and MUL operations.

Workaround

Try to change order in which elements are evaluated (using parentheses) in arithmetic expressions containing both ADD/SUB and MUL operations to enable your compiler to generate FMA instructions wherever possible. For instance a + b*c is a valid FMA (MUL then ADD). However (a+b)* c cannot be translated into an FMA (ADD then MUL).

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

miniqmcreference::DiracDeterminantRef
>::recompute(qmcplusplus::ParticleSet&): 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracDeterminantRef.cpp:236

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

SAL: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/inner_product.hpp:155
VZEROUPPER: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracDeterminantRef.cpp:255

Type of elements and instruction set

6 SSE or AVX instructions are processing arithmetic or math operations on double precision FP elements in scalar mode (one at a time). 3 SSE or AVX instructions are processing arithmetic or math operations on double precision FP elements in vector mode (two at a time).

Matching between your function (in the source code) and the binary function

The binary function is composed of 14 FP arithmetical operations:

7: addition or subtraction (2 inside FMA instructions)
7: multiply (2 inside FMA instructions)

The binary function is loading 248 bytes (31 double precision FP elements). The binary function is storing 112 bytes (14 double precision FP elements).

Arithmetic intensity

Arithmetic intensity is 0.04 FP operations per loaded or stored byte.

General properties

nb instructions	106
nb uops	110
loop length	471
used x86 registers	16
used mmx registers	0
used xmm registers	4
used ymm registers	0
used zmm registers	0
nb stack references	8
ADD-SUB / MUL ratio	1.33

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	18.67 cycles
front end	18.67 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11
uops	8.00	5.60	12.33	12.33	9.50	5.50	7.50	9.50	9.50	9.50	5.40	12.33
cycles	8.00	5.60	12.33	12.33	9.50	5.50	7.50	9.50	9.50	9.50	5.40	12.33

Execution ports to units layout:

P0 (256 bits): VPU, BRU, ALU, DIV/SQRT
P1 (256 bits): ALU, VPU
P2 (512 bits): load
P3 (512 bits): load
P4 (512 bits): store data
P5 (512 bits): ALU, VPU
P6: ALU, BRU
P7: store address
P8: store address
P9 (512 bits): store data
P10: ALU
P11 (512 bits): load

Cycles executing div or sqrt instructions

Cycles summary

Front-end	18.67
Dispatch	12.33
Overall L1	18.67

Vectorization ratios

INT

all	5%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
other	14%

all	36%
load	30%
store	40%
mul	66%
add-sub	25%
fma	0%
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	100%

INT+FP

all	22%
load	21%
store	16%
mul	66%
add-sub	25%
fma	0%
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	25%

Vector efficiency ratios

INT

all	11%
load	12%
store	11%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
other	11%

all	17%
load	16%
store	17%
mul	20%
add-sub	15%
fma	12%
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	25%

INT+FP

all	14%
load	15%
store	14%
mul	20%
add-sub	15%
fma	12%
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	13%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 18.67 cycles. At this rate:

6% of peak load performance is reached (13.29 out of 192.00 bytes loaded per cycle (GB/s @ 1GHz))
4% of peak store performance is reached (6.00 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Performance is limited by instruction throughput (loading/decoding program instructions to execution core) (front-end is a bottleneck). By removing all these bottlenecks, you can lower the cost of an iteration from 18.67 to 12.33 cycles (1.51x speedup).

ASM code

In the binary file, the address of the function is: 45d140

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
PUSH %R15	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R14	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R13	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R12	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %RBX	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
SUB $0x48,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RCX,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RDX,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RDI,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 45fe00 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE9recomputeERNS1_11ParticleSetE>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV 0x484(%RBX),%EAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP $0x1,%RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV %RBX,-0x48(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JNE 45d200 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE11evaluateLogERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEE+0xc0>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV 0x100(%RBX),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VMOVDDUP (%RAX),%XMM0	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x140(%RBX),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOVQ $0,-0x30(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
VMULPD (%RAX),%XMM0,%XMM1	1	0.50	0.50	0.33	0.33	0	0	0	0	0	0	0	0.33	4	0.50	vect (25.0%)
VMOVUPD %XMM1,-0x40(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
VMULSD 0x10(%RAX),%XMM0,%XMM2	1	0.50	0.50	0.33	0.33	0	0	0	0	0	0	0	0.33	4	0.50	scal (12.5%)
VMOVSD %XMM2,-0x30(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOVSXD 0x478(%RBX),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x18(%R15),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%RAX,%RAX,2),%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VADDPD (%RCX,%RDX,8),%XMM1,%XMM2	1	0	0.50	0.33	0.33	0	0.50	0	0	0	0	0	0.33	3	0.50	vect (25.0%)
VMOVUPD %XMM2,(%RCX,%RDX,8)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
VMOVSD 0x10(%RCX,%RDX,8),%XMM2	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VADDSD -0x30(%RBP),%XMM2,%XMM2	1	0	0.50	0.33	0.33	0	0.50	0	0	0	0	0	0.33	3	0.50	scal (12.5%)
VMOVSD %XMM2,0x10(%RCX,%RDX,8)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x180(%RBX),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VMOVUPD -0x38(%RBP),%XMM2	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	0-1	0.33	vect (25.0%)
VMULPD %XMM2,%XMM2,%XMM2	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	vect (25.0%)
VSHUFPD $0x1,%XMM2,%XMM2,%XMM3	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
VADDSD %XMM3,%XMM2,%XMM2	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	3	0.50	scal (12.5%)
VFMADD231SD %XMM1,%XMM1,%XMM2	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VFMSUB231SD (%RCX),%XMM0,%XMM2	1	0.50	0.50	0.33	0.33	0	0	0	0	0	0	0	0.33	4	0.50	scal (12.5%)
MOV 0x18(%R14),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VADDSD (%RCX,%RAX,8),%XMM2,%XMM0	1	0	0.50	0.33	0.33	0	0.50	0	0	0	0	0	0.33	3	0.50	scal (12.5%)
VMOVSD %XMM0,(%RCX,%RAX,8)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JMP 45d4a5 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE11evaluateLogERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEE+0x365>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
TEST %EAX,%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (6.3%)
JLE 45d4a5 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE11evaluateLogERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEE+0x365>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x48(%RBP),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x480(%RSI),%ECX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
TEST %ECX,%ECX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (6.3%)
JLE 45d480 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE11evaluateLogERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEE+0x340>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOVSXD 0x478(%RSI),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RDX,-0x68(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0xd8(%RSI),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x100(%RSI),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x140(%RSI),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x118(%RSI),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
DEC %RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x180(%RSI),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x158(%RSI),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RSI,-0x50(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x18(%R15),%R11	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x18(%R14),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RSI,-0x58(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %ECX,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SHR $0x2,%ESI	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
MOV %ECX,%R15D	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
AND $0x7ffffffc,%R15D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
SAL $0x3,%R10	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	scal (12.5%)
MOV %R10,-0x60(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
SAL $0x3,%RDX	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
LEA (%RDX,%RDX,2),%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RSI,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SAL $0x5,%RDX	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
LEA (%RDX,%RDX,2),%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
AND $0x1fffffff,%ESI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
LEA (%RSI,%RSI,2),%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
SAL $0x5,%RDX	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
LEA 0x10(%RDX,%R8,1),%RBX	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
ADD $0x58,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SALQ $0x3,-0x50(%RBP)	3	0.50	0	0.33	0.33	0.50	0	0.50	0.50	0.50	0.50	0	0.33	0-2	0.50	scal (12.5%)
XOR %EDX,%EDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA 0x18(%RDI),%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
JMP 45d33b <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE11evaluateLogERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEE+0x1fb>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %EAX,%ECX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
AND $0x7,%ECX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
CMP $0x8,%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
JB 45d496 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE11evaluateLogERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEE+0x356>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
AND $0x7ffffff8,%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
NOP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
TEST %RCX,%RCX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (12.5%)
JE 45d4a5 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE11evaluateLogERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEE+0x365>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0x48(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VMOVSD 0x10(%RAX),%XMM0	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
ADD $0x48,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %RBP	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
VZEROUPPER	2	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
RET	1	0.50	0	0.33	0.33	0	0	0.50	0	0	0	0	0.33	0	2.13	N/A

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run icx_4

Source file and lines	DiracDeterminantRef.cpp:235-255
Module	exec

The function is defined in:

/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/inner_product.hpp:82-83,155
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/PETE/OperatorTags.h:63,94
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/TinyVectorOps.h:111,131
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracDeterminantRef.cpp:235-255
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsMatrix.h:217
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/TinyVector.h:62,169
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:223,248

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 18.67 to 5.33 cycles (3.50x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

22% of SSE/AVX instructions are used in vector version (process two or more data elements in vector registers):

21% of SSE/AVX loads are used in vector version.
16% of SSE/AVX stores are used in vector version.
25% of SSE/AVX addition or subtraction instructions are used in vector version.
66% of SSE/AVX multiply instructions are used in vector version.
0% of SSE/AVX fused multiply-add instructions are used in vector version.
25% of SSE/AVX instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

FMA

Detected 2 FMA (fused multiply-add) operations. Presence of both ADD/SUB and MUL operations.

Workaround

CALL instructions

Detected function call instructions.

Details

miniqmcreference::DiracDeterminantRef
>::recompute(qmcplusplus::ParticleSet&): 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracDeterminantRef.cpp:236

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

SAL: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/inner_product.hpp:155
VZEROUPPER: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracDeterminantRef.cpp:255

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

The binary function is composed of 14 FP arithmetical operations:

7: addition or subtraction (2 inside FMA instructions)
7: multiply (2 inside FMA instructions)

The binary function is loading 248 bytes (31 double precision FP elements). The binary function is storing 112 bytes (14 double precision FP elements).

Arithmetic intensity

Arithmetic intensity is 0.04 FP operations per loaded or stored byte.

General properties

nb instructions	106
nb uops	110
loop length	471
used x86 registers	16
used mmx registers	0
used xmm registers	4
used ymm registers	0
used zmm registers	0
nb stack references	8
ADD-SUB / MUL ratio	1.33

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	18.67 cycles
front end	18.67 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11
uops	8.00	5.60	12.33	12.33	9.50	5.50	7.50	9.50	9.50	9.50	5.40	12.33
cycles	8.00	5.60	12.33	12.33	9.50	5.50	7.50	9.50	9.50	9.50	5.40	12.33

Execution ports to units layout:

P0 (256 bits): VPU, BRU, ALU, DIV/SQRT
P1 (256 bits): ALU, VPU
P2 (512 bits): load
P3 (512 bits): load
P4 (512 bits): store data
P5 (512 bits): ALU, VPU
P6: ALU, BRU
P7: store address
P8: store address
P9 (512 bits): store data
P10: ALU
P11 (512 bits): load

Cycles executing div or sqrt instructions

Cycles summary

Front-end	18.67
Dispatch	12.33
Overall L1	18.67

Vectorization ratios

INT

all	5%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
other	14%

all	36%
load	30%
store	40%
mul	66%
add-sub	25%
fma	0%
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	100%

INT+FP

all	22%
load	21%
store	16%
mul	66%
add-sub	25%
fma	0%
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	25%

Vector efficiency ratios

INT

all	11%
load	12%
store	11%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
other	11%

all	17%
load	16%
store	17%
mul	20%
add-sub	15%
fma	12%
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	25%

INT+FP

all	14%
load	15%
store	14%
mul	20%
add-sub	15%
fma	12%
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	13%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 18.67 cycles. At this rate:

6% of peak load performance is reached (13.29 out of 192.00 bytes loaded per cycle (GB/s @ 1GHz))
4% of peak store performance is reached (6.00 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

ASM code

In the binary file, the address of the function is: 45d140

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
PUSH %R15	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R14	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R13	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R12	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %RBX	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
SUB $0x48,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RCX,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RDX,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RDI,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 45fe00 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE9recomputeERNS1_11ParticleSetE>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV 0x484(%RBX),%EAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP $0x1,%RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV %RBX,-0x48(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JNE 45d200 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE11evaluateLogERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEE+0xc0>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV 0x100(%RBX),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VMOVDDUP (%RAX),%XMM0	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x140(%RBX),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOVQ $0,-0x30(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
VMULPD (%RAX),%XMM0,%XMM1	1	0.50	0.50	0.33	0.33	0	0	0	0	0	0	0	0.33	4	0.50	vect (25.0%)
VMOVUPD %XMM1,-0x40(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
VMULSD 0x10(%RAX),%XMM0,%XMM2	1	0.50	0.50	0.33	0.33	0	0	0	0	0	0	0	0.33	4	0.50	scal (12.5%)
VMOVSD %XMM2,-0x30(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOVSXD 0x478(%RBX),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x18(%R15),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%RAX,%RAX,2),%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VADDPD (%RCX,%RDX,8),%XMM1,%XMM2	1	0	0.50	0.33	0.33	0	0.50	0	0	0	0	0	0.33	3	0.50	vect (25.0%)
VMOVUPD %XMM2,(%RCX,%RDX,8)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
VMOVSD 0x10(%RCX,%RDX,8),%XMM2	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VADDSD -0x30(%RBP),%XMM2,%XMM2	1	0	0.50	0.33	0.33	0	0.50	0	0	0	0	0	0.33	3	0.50	scal (12.5%)
VMOVSD %XMM2,0x10(%RCX,%RDX,8)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x180(%RBX),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VMOVUPD -0x38(%RBP),%XMM2	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	0-1	0.33	vect (25.0%)
VMULPD %XMM2,%XMM2,%XMM2	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	vect (25.0%)
VSHUFPD $0x1,%XMM2,%XMM2,%XMM3	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
VADDSD %XMM3,%XMM2,%XMM2	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	3	0.50	scal (12.5%)
VFMADD231SD %XMM1,%XMM1,%XMM2	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VFMSUB231SD (%RCX),%XMM0,%XMM2	1	0.50	0.50	0.33	0.33	0	0	0	0	0	0	0	0.33	4	0.50	scal (12.5%)
MOV 0x18(%R14),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VADDSD (%RCX,%RAX,8),%XMM2,%XMM0	1	0	0.50	0.33	0.33	0	0.50	0	0	0	0	0	0.33	3	0.50	scal (12.5%)
VMOVSD %XMM0,(%RCX,%RAX,8)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JMP 45d4a5 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE11evaluateLogERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEE+0x365>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
TEST %EAX,%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (6.3%)
JLE 45d4a5 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE11evaluateLogERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEE+0x365>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x48(%RBP),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x480(%RSI),%ECX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
TEST %ECX,%ECX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (6.3%)
JLE 45d480 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE11evaluateLogERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEE+0x340>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOVSXD 0x478(%RSI),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RDX,-0x68(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0xd8(%RSI),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x100(%RSI),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x140(%RSI),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x118(%RSI),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
DEC %RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x180(%RSI),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x158(%RSI),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RSI,-0x50(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x18(%R15),%R11	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x18(%R14),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RSI,-0x58(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %ECX,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SHR $0x2,%ESI	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
MOV %ECX,%R15D	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
AND $0x7ffffffc,%R15D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
SAL $0x3,%R10	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	scal (12.5%)
MOV %R10,-0x60(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
SAL $0x3,%RDX	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
LEA (%RDX,%RDX,2),%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RSI,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SAL $0x5,%RDX	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
LEA (%RDX,%RDX,2),%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
AND $0x1fffffff,%ESI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
LEA (%RSI,%RSI,2),%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
SAL $0x5,%RDX	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
LEA 0x10(%RDX,%R8,1),%RBX	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
ADD $0x58,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SALQ $0x3,-0x50(%RBP)	3	0.50	0	0.33	0.33	0.50	0	0.50	0.50	0.50	0.50	0	0.33	0-2	0.50	scal (12.5%)
XOR %EDX,%EDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA 0x18(%RDI),%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
JMP 45d33b <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE11evaluateLogERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEE+0x1fb>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %EAX,%ECX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
AND $0x7,%ECX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
CMP $0x8,%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
JB 45d496 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE11evaluateLogERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEE+0x356>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
AND $0x7ffffff8,%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
NOP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
TEST %RCX,%RCX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (12.5%)
JE 45d4a5 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE11evaluateLogERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEE+0x365>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0x48(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VMOVSD 0x10(%RAX),%XMM0	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
ADD $0x48,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %RBP	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
VZEROUPPER	2	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
RET	1	0.50	0	0.33	0.33	0	0	0.50	0	0	0	0	0.33	0	2.13	N/A

Name	Coverage (%)	Time (s)
▼miniqmcreference::DiracDeterminantRef >::evaluateLog(qmcplusplus::ParticleSet&, qmcplusplus::ParticleAttrib, std::allocator > >&, qmcplusplus...–	0.11	0.10
▼Loop 1028 - inner_product.hpp:82-155 - exec–	0.00	0.00
○Loop 1031 - inner_product.hpp:155-155 - exec	0.09	0.08
○Loop 1029 - inner_product.hpp:82-83 - exec	0.02	0.02
○Loop 1027 - inner_product.hpp:82-83 - exec	0.00	0.00
○Loop 1030 - inner_product.hpp:155-155 - exec	0.00	0.00
○Loop 1026 - DiracDeterminantRef.cpp:247-247 - exec	0.00	0.00
○Loop 1025 - DiracDeterminantRef.cpp:247-247 - exec	0.00	0.00

Report Configuration

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Workaround

Execution units bottlenecks

FMA

Workaround

CALL instructions

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Complex instructions

Details

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

Arithmetic intensity

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code

Code clean check

Workaround

Vectorization

Details

Workaround

Execution units bottlenecks

FMA

Workaround

CALL instructions

Details

Complex instructions

Details

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

Arithmetic intensity

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code