OV - exec - Function qmcplusplus::DiracMatrix<double, double>::invert_transpose(qmcplusplus::Matrix<double, std::allocator<double> > const&, qmcplusplus::Matrix<double, std::allocator<double> >&, double&, double&)

	Function: qmcplusplus::DiracMatrix<double, double>::invert_transpose(qmcplusplus::Matrix<double, std ...	Module: exec	Source: DiracMatrix.h:31-121 [...]	Coverage (incl. loops): 0.12% \| (excl. loops): 0.00%

/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracMatrix.h: 31 - 121

--------------------------------------------------------------------------------

31:   for (size_t i = 0; i < n; i++)

32:   {

33:     sign_det *= (pivot[i] == i + 1) ? 1 : -1;

34:     sign_det *= (diag[i] > 0) ? 1 : -1;

35:     logdet += std::log(std::abs(diag[i]));

36:   }

37:   phase = (sign_det > 0) ? T(0) : M_PI;

[...]

76:     m_pivot.resize(lda);

77:     Lwork = -1;

[...]

83:     Lwork = static_cast<int>(lw);

84:     m_work.resize(Lwork);

85:     LU_diag.resize(lda);

[...]

95:   {

96:     BlasThreadingEnv knob(getNextLevelNumThreads());

97:     const int n   = invMat.rows();

98:     const int lda = invMat.cols();

99:     T_FP* invMat_ptr(nullptr);

100: #if !defined(MIXED_PRECISION)

101:     simd::transpose(amat.data(), n, amat.cols(), invMat.data(), n, invMat.cols());

[...]

108:     if (Lwork < lda)

109:       reset(invMat_ptr, lda);

110:     int status;

111:     LAPACK::getrf(n, n, invMat_ptr, lda, m_pivot.data(), status);

112:     for (int i = 0; i < n; i++)

113:       LU_diag[i] = invMat_ptr[i * lda + i];

114:     real_type_fp Phase_tmp;

115:     LogDet = computeLogDet(LU_diag.data(), n, m_pivot.data(), Phase_tmp);

116:     Phase  = Phase_tmp;

117:     LAPACK::getri(n, invMat_ptr, lda, m_pivot.data(), m_work.data(), Lwork, status);

118: #if defined(MIXED_PRECISION)

119:     invMat = psiM_fp;

120: #endif

121:   }

/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/ext/new_allocator.h: 145 - 145

--------------------------------------------------------------------------------

145: 	::operator delete(__p

/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/basic_string.h: 195 - 245

--------------------------------------------------------------------------------

195:       { return _M_dataplus._M_p; }

[...]

211: 	return std::pointer_traits<const_pointer>::pointer_to(*_M_local_buf);

[...]

230:       { return _M_data() == _M_local_data(); }

[...]

239: 	if (!_M_is_local())

240: 	  _M_destroy(_M_allocated_capacity);

241:       }

242:

243:       void

244:       _M_destroy(size_type __size) throw()

245:       { _Alloc_traits::deallocate(_M_get_allocator(), _M_data(), __size + 1); }

/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/std_abs.h: 72 - 72

--------------------------------------------------------------------------------

72:   { return __builtin_fabs(__x); }

/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/inner_product.hpp: 210 - 212

--------------------------------------------------------------------------------

210:   for (size_t i = 0; i < n; ++i)

211:     for (size_t j = 0; j < m; ++j)

212:       B[i * ldb + j] = A[j * lda + i];

/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/BLAS.hpp: 790 - 827

--------------------------------------------------------------------------------

790:     dgetrf(n, m, a, n0, piv, st);

[...]

827:     dgetri(n, a, n0, piv, work, n1, status);

/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Utilities/OpenMP.h: 37 - 43

--------------------------------------------------------------------------------

37:   int num_threads = 1;

38: #pragma omp parallel

39:   {

40: #pragma omp master

41:     num_threads = omp_get_num_threads();

42:   }

43:   return num_threads;

/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/stl_vector.h: 353 - 1798

--------------------------------------------------------------------------------

353: 	if (__p)

[...]

919:       { return size_type(this->_M_impl._M_finish - this->_M_impl._M_start); }

[...]

939: 	if (__new_size > size())

940: 	  _M_default_append(__new_size - size());

941: 	else if (__new_size < size())

942: 	  _M_erase_at_end(this->_M_impl._M_start + __new_size);

[...]

1169:       { return _M_data_ptr(this->_M_impl._M_start); }

[...]

1758: 	if (max_size() - size() < __n)

1759: 	  __throw_length_error(__N(__s));

1760:

1761: 	const size_type __len = size() + (std::max)(size(), __n);

1762: 	return (__len < size() || __len > max_size()) ? max_size() : __len;

[...]

1794: 	if (size_type __n = this->_M_impl._M_finish - __pos)

1795: 	  {

1796: 	    std::_Destroy(__pos, this->_M_impl._M_finish,

1797: 			  _M_get_Tp_allocator());

1798: 	    this->_M_impl._M_finish = __pos;

/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsMatrix.h: 77 - 78

--------------------------------------------------------------------------------

77:   inline size_type rows() const { return D1; }

78:   inline size_type cols() const { return D2; }

/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/stl_uninitialized.h: 687 - 1031

--------------------------------------------------------------------------------

687: 	  for (; __n > 0; --__n, (void) ++__cur)

[...]

1031:       for (; __first != __last; ++__first, (void)++__cur)

/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/alloc_traits.h: 261 - 261

--------------------------------------------------------------------------------

261: 	  ::new((void*)__p) _Tp(std::forward<_Args>(__args)...);

/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/vector.tcc: 614 - 680

--------------------------------------------------------------------------------

614:       if (__n != 0)

615: 	{

616: 	  const size_type __size = size();

617: 	  size_type __navail = size_type(this->_M_impl._M_end_of_storage

618: 					 - this->_M_impl._M_finish);

619:

620: 	  if (__size > max_size() || __navail > max_size() - __size)

621: 	    __builtin_unreachable();

622:

623: 	  if (__navail >= __n)

624: 	    {

625: 	      _GLIBCXX_ASAN_ANNOTATE_GROW(__n);

626: 	      this->_M_impl._M_finish =

[...]

640: 		      std::__uninitialized_default_n_a(__new_start + __size,

[...]

678: 	      this->_M_impl._M_start = __new_start;

679: 	      this->_M_impl._M_finish = __new_start + __size + __n;

680: 	      this->_M_impl._M_end_of_storage = __new_start + __len;

/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h: 248 - 249

--------------------------------------------------------------------------------

248:   inline pointer data() { return X; }

249:   inline const_pointer data() const { return X; }

/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/Mallocator.hpp: 50 - 78

--------------------------------------------------------------------------------

50:     std::size_t asize = n * sizeof(T);

51:     std::size_t amod  = asize % ALIGN;

52:     if (amod != 0)

[...]

61:     pt = aligned_alloc(ALIGN, asize);

[...]

68:     if (pt == nullptr)

69:       throw std::runtime_error("Allocation failed in Mallocator, requested size in bytes = " +

70:                                std::to_string(n * sizeof(T)));

[...]

76:     if (n == 0)

77:       throw std::runtime_error("Mallocator::deallocate does not accept size 0 allocations.");

78:     free(p);

0x459d80 PUSH	%RBP

0x459d81 MOV	%RSP,%RBP

0x459d84 PUSH	%R15

0x459d86 PUSH	%R14

0x459d88 PUSH	%R13

0x459d8a PUSH	%R12

0x459d8c PUSH	%RBX

0x459d8d SUB	$0xe8,%RSP

0x459d94 MOV	%R8,-0xe0(%RBP)

0x459d9b MOV	%RCX,-0xd8(%RBP)

0x459da2 MOV	%RDX,%R15

0x459da5 MOV	%RSI,%RBX

0x459da8 MOV	%RDI,-0x90(%RBP)

0x459daf MOVL	$0x1,-0x2c(%RBP)

0x459db6 LEA	-0x2c(%RBP),%RCX

0x459dba MOV	$0x5a1b90,%EDI

0x459dbf MOV	$0x455280,%EDX

0x459dc4 MOV	$0x1,%ESI

0x459dc9 XOR	%EAX,%EAX

0x459dcb CALL	4041e0 <__kmpc_fork_call@plt>

0x459dd0 MOV	-0x2c(%RBP),%ESI

0x459dd3 LEA	-0x80(%RBP),%RDI

0x459dd7 CALL	51f7c0 <_ZN11qmcplusplus16BlasThreadingEnvC1Ei>

0x459ddc MOV	(%R15),%RCX

0x459ddf MOV	%ECX,-0x2c(%RBP)

0x459de2 MOV	0x8(%R15),%RAX

0x459de6 MOV	%RAX,-0x88(%RBP)

0x459ded MOV	%EAX,-0x4c(%RBP)

0x459df0 MOV	0x30(%R15),%RAX

0x459df4 MOV	%RAX,-0x58(%RBP)

0x459df8 SAL	$0x20,%RCX

0x459dfc JE	45a080

0x459e02 MOV	%RCX,%RAX

0x459e05 MOV	0x8(%RBX),%RCX

0x459e09 MOV	0x30(%RBX),%RDX

0x459e0d SAR	$0x20,%RAX

0x459e11 CMP	$0x1,%RAX

0x459e15 ADC	$-0x1,%RAX

0x459e19 MOV	%RAX,-0x100(%RBP)

0x459e20 SHR	$0x6,%RAX

0x459e24 MOV	%RAX,-0xd0(%RBP)

0x459e2b VPBROADCASTQ	%RCX,%YMM0

0x459e31 MOV	%RCX,%RDI

0x459e34 SAL	$0x6,%RDI

0x459e38 MOV	-0x88(%RBP),%RAX

0x459e3f MOV	%RAX,%RSI

0x459e42 SAL	$0x9,%RSI

0x459e46 MOV	%RSI,-0x108(%RBP)

0x459e4d LEA	(,%RAX,8),%R9

0x459e55 MOV	%RCX,-0x48(%RBP)

0x459e59 LEA	(,%RCX,8),%R10

0x459e61 XOR	%ESI,%ESI

0x459e63 VPMOVSXBQ	0xe06bc(%RIP),%YMM1

0x459e6c MOV	-0x58(%RBP),%R15

0x459e70 XOR	%EAX,%EAX

0x459e72 MOV	%RDI,-0x98(%RBP)

0x459e79 JMP	459eae

0x459e7b NOPL	(%RAX,%RAX,1)

(1009) 0x459e80 MOV	-0xa8(%RBP),%R15

(1009) 0x459e87 ADD	-0x108(%RBP),%R15

(1009) 0x459e8e MOV	-0x38(%RBP),%RSI

(1009) 0x459e92 ADD	$0x40,%RSI

(1009) 0x459e96 MOV	-0xa0(%RBP),%RAX

(1009) 0x459e9d CMP	-0xd0(%RBP),%RAX

(1009) 0x459ea4 LEA	0x1(%RAX),%RAX

(1009) 0x459ea8 JE	45a080

(1009) 0x459eae MOV	%RAX,-0xa0(%RBP)

(1009) 0x459eb5 MOV	%RAX,%R8

(1009) 0x459eb8 SAL	$0x6,%R8

(1009) 0x459ebc MOV	-0x100(%RBP),%RCX

(1009) 0x459ec3 MOV	%RCX,%RAX

(1009) 0x459ec6 MOV	%R8,-0x40(%RBP)

(1009) 0x459eca SUB	%R8,%RAX

(1009) 0x459ecd CMP	$0x3f,%RAX

(1009) 0x459ed1 MOV	$0x3f,%R8D

(1009) 0x459ed7 CMOVGE	%R8,%RAX

(1009) 0x459edb MOV	%RSI,-0x38(%RBP)

(1009) 0x459edf MOV	%RSI,%R8

(1009) 0x459ee2 MOV	%R15,-0xa8(%RBP)

(1009) 0x459ee9 XOR	%R11D,%R11D

(1009) 0x459eec JMP	459f36

0x459eee NOPW	%CS:(%RAX,%RAX,1)

0x459efd NOPL	(%RAX)

  (1010) 0x459f00 MOV	-0x68(%RBP),%R15

  (1010) 0x459f04 ADD	$0x200,%R15

  (1010) 0x459f0b MOV	-0x70(%RBP),%RCX

  (1010) 0x459f0f ADD	$-0x40,%RCX

  (1010) 0x459f13 MOV	-0x98(%RBP),%RDI

  (1010) 0x459f1a MOV	-0x78(%RBP),%R8

  (1010) 0x459f1e ADD	%RDI,%R8

  (1010) 0x459f21 MOV	-0x60(%RBP),%R11

  (1010) 0x459f25 CMP	-0xd0(%RBP),%R11

  (1010) 0x459f2c LEA	0x1(%R11),%R11

  (1010) 0x459f30 JE	459e80

  (1010) 0x459f36 CMP	$0x3f,%RCX

  (1010) 0x459f3a MOV	$0x3f,%EBX

  (1010) 0x459f3f MOV	%RCX,-0x70(%RBP)

  (1010) 0x459f43 CMOVL	%RCX,%RBX

  (1010) 0x459f47 INC	%RBX

  (1010) 0x459f4a MOV	%R11,%RCX

  (1010) 0x459f4d SAL	$0x6,%RCX

  (1010) 0x459f51 MOV	-0x100(%RBP),%R13

  (1010) 0x459f58 SUB	%RCX,%R13

  (1010) 0x459f5b CMP	$0x3f,%R13

  (1010) 0x459f5f MOV	$0x3f,%ECX

  (1010) 0x459f64 CMOVGE	%RCX,%R13

  (1010) 0x459f68 INC	%R13

  (1010) 0x459f6b MOV	%R13,%RSI

  (1010) 0x459f6e AND	$-0x4,%RSI

  (1010) 0x459f72 LEA	-0x1(%RSI),%R14

  (1010) 0x459f76 MOV	%R11,-0x60(%RBP)

  (1010) 0x459f7a IMUL	%R11,%RDI

  (1010) 0x459f7e ADD	-0x40(%RBP),%RDI

  (1010) 0x459f82 MOV	%R8,-0x78(%RBP)

  (1010) 0x459f86 MOV	%R8,%R11

  (1010) 0x459f89 MOV	%R15,-0x68(%RBP)

  (1010) 0x459f8d XOR	%R12D,%R12D

  (1010) 0x459f90 JMP	459fd4

0x459f92 NOPW	%CS:(%RAX,%RAX,1)

0x459fa1 NOPW	%CS:(%RAX,%RAX,1)

0x459fb0 NOPW	%CS:(%RAX,%RAX,1)

0x459fbf NOP

    (1011) 0x459fc0 ADD	%R9,%R15

    (1011) 0x459fc3 INC	%R11

    (1011) 0x459fc6 CMP	%RAX,%R12

    (1011) 0x459fc9 LEA	0x1(%R12),%R12

    (1011) 0x459fce JE	459f00

    (1011) 0x459fd4 TEST	%RSI,%RSI

    (1011) 0x459fd7 JE	45a040

    (1011) 0x459fd9 LEA	(%RDI,%R12,1),%RCX

    (1011) 0x459fdd VPBROADCASTQ	%RCX,%YMM2

    (1011) 0x459fe3 XOR	%ECX,%ECX

    (1011) 0x459fe5 NOPW	%CS:(%RAX,%RAX,1)

      (1012) 0x459ff0 VPBROADCASTQ	%RCX,%YMM3

      (1012) 0x459ff6 VPADDQ	%YMM1,%YMM3,%YMM3

      (1012) 0x459ffa VPMULLQ	%YMM3,%YMM0,%YMM3

      (1012) 0x45a000 VPADDQ	%YMM2,%YMM3,%YMM3

      (1012) 0x45a004 VXORPD	%XMM4,%XMM4,%XMM4

      (1012) 0x45a008 KXNORW	%K0,%K0,%K1

      (1012) 0x45a00c VGATHERQPD	(%RDX,%YMM3,8),%YMM4{%K1}

      (1012) 0x45a013 VMOVUPD	%YMM4,(%R15,%RCX,8)

      (1012) 0x45a019 ADD	$0x4,%RCX

      (1012) 0x45a01d CMP	%R14,%RCX

      (1012) 0x45a020 JBE	459ff0

    (1011) 0x45a022 MOV	%RSI,%R8

    (1011) 0x45a025 CMP	%RSI,%R13

    (1011) 0x45a028 JE	459fc0

    (1011) 0x45a02a JMP	45a043

0x45a02c NOPW	%CS:(%RAX,%RAX,1)

0x45a03b NOPL	(%RAX,%RAX,1)

    (1011) 0x45a040 XOR	%R8D,%R8D

    (1011) 0x45a043 MOV	-0x48(%RBP),%RCX

    (1011) 0x45a047 IMUL	%R8,%RCX

    (1011) 0x45a04b ADD	%R11,%RCX

    (1011) 0x45a04e LEA	(%RDX,%RCX,8),%RCX

    (1011) 0x45a052 NOPW	%CS:(%RAX,%RAX,1)

      (1008) 0x45a060 VMOVQ	(%RCX),%XMM2

      (1008) 0x45a064 VMOVQ	%XMM2,(%R15,%R8,8)

      (1008) 0x45a06a INC	%R8

      (1008) 0x45a06d ADD	%R10,%RCX

      (1008) 0x45a070 CMP	%R8,%RBX

      (1008) 0x45a073 JNE	45a060

    (1011) 0x45a075 JMP	459fc0

0x45a07a NOPW	(%RAX,%RAX,1)

0x45a080 MOV	-0x90(%RBP),%R13

0x45a087 LEA	0x30(%R13),%RAX

0x45a08b MOV	%RAX,-0x98(%RBP)

0x45a092 MOV	-0x88(%RBP),%R8

0x45a099 CMP	%R8D,0x30(%R13)

0x45a09d MOV	-0x58(%RBP),%R12

0x45a0a1 JGE	45a3d5

0x45a0a7 MOV	%RSP,%R14

0x45a0aa MOV	%RSP,%RDI

0x45a0ad ADD	$-0x10,%RDI

0x45a0b1 MOV	%RDI,%RSP

0x45a0b4 MOV	%RSP,%RDX

0x45a0b7 ADD	$-0x10,%RDX

0x45a0bb MOV	%RDX,%RSP

0x45a0be MOV	%RSP,%RBX

0x45a0c1 ADD	$-0x10,%RBX

0x45a0c5 MOV	%RBX,%RSP

0x45a0c8 MOV	%RSP,%R15

0x45a0cb ADD	$-0x10,%R15

0x45a0cf MOV	%R15,%RSP

0x45a0d2 MOVSXD	%R8D,%R9

0x45a0d5 MOV	0x18(%R13),%RCX

0x45a0d9 MOV	0x20(%R13),%RSI

0x45a0dd MOV	%RSI,%RAX

0x45a0e0 SUB	%RCX,%RAX

0x45a0e3 SAR	$0x2,%RAX

0x45a0e7 CMP	%RAX,%R9

0x45a0ea MOV	%R9,-0x48(%RBP)

0x45a0ee JBE	45a280

0x45a0f4 MOV	%RSP,%R11

0x45a0f7 MOV	%RSP,%R10

0x45a0fa ADD	$-0x20,%R10

0x45a0fe MOV	%R10,%RSP

0x45a101 MOV	%RSP,%RSI

0x45a104 ADD	$-0x20,%RSI

0x45a108 MOV	%RSI,%RSP

0x45a10b MOV	%R9,%R12

0x45a10e SUB	%RAX,%R12

0x45a111 JE	45a2fa

0x45a117 MOV	0x20(%R13),%R8

0x45a11b MOV	0x28(%R13),%RCX

0x45a11f MOV	%RCX,%RAX

0x45a122 SUB	%R8,%RAX

0x45a125 SAR	$0x2,%RAX

0x45a129 CMP	%R12,%RAX

0x45a12c MOV	%RDX,-0x70(%RBP)

0x45a130 MOV	%RDI,-0x68(%RBP)

0x45a134 MOV	%R14,-0x60(%RBP)

0x45a138 MOV	%R8,-0x78(%RBP)

0x45a13c JAE	45a2c0

0x45a142 MOV	%RCX,-0xa8(%RBP)

0x45a149 MOV	%R11,-0x40(%RBP)

0x45a14d MOV	%R10,-0x38(%RBP)

0x45a151 MOV	%RSI,-0xd0(%RBP)

0x45a158 MOV	0x18(%R13),%RAX

0x45a15c MOV	%RAX,-0x100(%RBP)

0x45a163 SUB	%RAX,%R8

0x45a166 MOV	%R8,%R13

0x45a169 SAR	$0x2,%R8

0x45a16d MOV	$0x1fffffffffffffff,%RAX

0x45a177 MOV	%R8,%RDX

0x45a17a XOR	%RAX,%RDX

0x45a17d CMP	%R12,%RDX

0x45a180 JB	45a880

0x45a186 CMP	%R12,%R8

0x45a189 MOV	%R12,%R14

0x45a18c CMOVA	%R8,%R14

0x45a190 ADD	%R8,%R14

0x45a193 CMP	%RAX,%R14

0x45a196 CMOVAE	%RAX,%R14

0x45a19a LEA	(,%R14,4),%RAX

0x45a1a2 MOV	%RAX,%RSI

0x45a1a5 AND	$-0x40,%RSI

0x45a1a9 ADD	$0x40,%RSI

0x45a1ad TEST	$0xf,%R14B

0x45a1b1 MOV	%RAX,-0xa0(%RBP)

0x45a1b8 CMOVE	%RAX,%RSI

0x45a1bc MOV	$0x40,%EDI

0x45a1c1 VZEROUPPER

0x45a1c4 CALL	404820 <aligned_alloc@plt>

0x45a1c9 TEST	%RAX,%RAX

0x45a1cc JE	45a8c0

0x45a1d2 LEA	(%RAX,%R13,1),%RDI

0x45a1d6 LEA	(,%R12,4),%RDX

0x45a1de MOV	%RAX,-0xd0(%RBP)

0x45a1e5 MOV	%RDI,-0x38(%RBP)

0x45a1e9 XOR	%ESI,%ESI

0x45a1eb CALL	534740 <__intel_avx_rep_memset>

0x45a1f0 MOV	-0x100(%RBP),%RDI

0x45a1f7 CMP	-0x78(%RBP),%RDI

0x45a1fb JE	45a226

0x45a1fd ADD	$-0x4,%R13

0x45a201 AND	$-0x4,%R13

0x45a205 ADD	$0x4,%R13

0x45a209 MOV	-0xd0(%RBP),%RDI

0x45a210 MOV	-0x100(%RBP),%RSI

0x45a217 MOV	%R13,%RDX

0x45a21a CALL	532f70 <__intel_avx_rep_memcpy>

0x45a21f MOV	-0x100(%RBP),%RDI

0x45a226 TEST	%RDI,%RDI

0x45a229 JE	45a23d

0x45a22b CMP	%RDI,-0xa8(%RBP)

0x45a232 JE	45a940

0x45a238 CALL	404480 <free@plt>

0x45a23d MOV	-0x90(%RBP),%R13

0x45a244 MOV	-0xd0(%RBP),%RCX

0x45a24b MOV	%RCX,0x18(%R13)

0x45a24f MOV	-0x38(%RBP),%RAX

0x45a253 LEA	(%RAX,%R12,4),%RAX

0x45a257 MOV	%RAX,0x20(%R13)

0x45a25b LEA	(%RCX,%R14,4),%RAX

0x45a25f MOV	%RAX,0x28(%R13)

0x45a263 MOV	-0x68(%RBP),%RDI

0x45a267 MOV	-0x70(%RBP),%RDX

0x45a26b MOV	-0x88(%RBP),%R8

0x45a272 MOV	-0x60(%RBP),%R14

0x45a276 MOV	-0x40(%RBP),%R11

0x45a27a JMP	45a2fa

0x45a27f NOP

0x45a280 JAE	45a305

0x45a286 MOV	-0x48(%RBP),%RAX

0x45a28a LEA	(%RCX,%RAX,4),%RAX

0x45a28e CMP	%RAX,%RSI

0x45a291 JE	45a305

0x45a293 MOV	%RAX,0x20(%R13)

0x45a297 JMP	45a305

0x45a299 NOPW	%CS:(%RAX,%RAX,1)

0x45a2a8 NOPW	%CS:(%RAX,%RAX,1)

0x45a2b7 NOPW	(%RAX,%RAX,1)

0x45a2c0 LEA	(,%R12,4),%RDX

0x45a2c8 MOV	%R8,%RDI

0x45a2cb XOR	%ESI,%ESI

0x45a2cd MOV	%R11,%R14

0x45a2d0 VZEROUPPER

0x45a2d3 CALL	534740 <__intel_avx_rep_memset>

0x45a2d8 MOV	%R14,%R11

0x45a2db MOV	-0x88(%RBP),%R8

0x45a2e2 MOV	-0x70(%RBP),%RDX

0x45a2e6 MOV	-0x60(%RBP),%R14

0x45a2ea MOV	-0x68(%RBP),%RDI

0x45a2ee MOV	-0x78(%RBP),%RAX

0x45a2f2 LEA	(%RAX,%R12,4),%RAX

0x45a2f6 MOV	%RAX,0x20(%R13)

0x45a2fa MOV	%R11,%RSP

0x45a2fd MOV	0x18(%R13),%RCX

0x45a301 MOV	-0x58(%RBP),%R12

0x45a305 MOV	-0x98(%RBP),%R9

0x45a30c MOVL	$-0x1,(%R9)

0x45a313 MOV	%R8D,(%RDI)

0x45a316 MOV	%R8D,(%RDX)

0x45a319 SUB	$0x8,%RSP

0x45a31d MOV	%R12,%RSI

0x45a320 MOV	%RBX,%R8

0x45a323 PUSH	%R15

0x45a325 VZEROUPPER

0x45a328 CALL	4043c0 <dgetri_@plt>

0x45a32d ADD	$0x10,%RSP

0x45a331 MOV	-0x48(%RBP),%R15

0x45a335 VCVTTSD2SI	(%RBX),%EAX

0x45a339 MOV	%EAX,0x30(%R13)

0x45a33d CLTQ

0x45a33f MOV	(%R13),%RDX

0x45a343 MOV	0x8(%R13),%RCX

0x45a347 MOV	%RCX,%RDI

0x45a34a SUB	%RDX,%RDI

0x45a34d SAR	$0x3,%RDI

0x45a351 MOV	%RAX,%RSI

0x45a354 SUB	%RDI,%RSI

0x45a357 JBE	45a380

0x45a359 MOV	%R13,%RDI

0x45a35c CALL	45abc0 <_ZNSt6vectorIdN11qmcplusplus10MallocatorIdLm64EEEE17_M_default_appendEm>

0x45a361 JMP	45a38f

0x45a363 NOPW	%CS:(%RAX,%RAX,1)

0x45a372 NOPW	%CS:(%RAX,%RAX,1)

0x45a380 JAE	45a38f

0x45a382 LEA	(%RDX,%RAX,8),%RAX

0x45a386 CMP	%RAX,%RCX

0x45a389 JE	45a38f

0x45a38b MOV	%RAX,0x8(%R13)

0x45a38f MOV	0x78(%R13),%RCX

0x45a393 MOV	0x80(%R13),%RAX

0x45a39a MOV	%RAX,%RDX

0x45a39d SUB	%RCX,%RDX

0x45a3a0 SAR	$0x3,%RDX

0x45a3a4 MOV	%R15,%RSI

0x45a3a7 SUB	%RDX,%RSI

0x45a3aa JBE	45a3c0

0x45a3ac LEA	0x78(%R13),%RDI

0x45a3b0 CALL	45abc0 <_ZNSt6vectorIdN11qmcplusplus10MallocatorIdLm64EEEE17_M_default_appendEm>

0x45a3b5 JMP	45a3d2

0x45a3b7 NOPW	(%RAX,%RAX,1)

0x45a3c0 JAE	45a3d2

0x45a3c2 LEA	(%RCX,%R15,8),%RCX

0x45a3c6 CMP	%RCX,%RAX

0x45a3c9 JE	45a3d2

0x45a3cb MOV	%RCX,0x80(%R13)

0x45a3d2 MOV	%R14,%RSP

0x45a3d5 MOV	0x18(%R13),%R8

0x45a3d9 LEA	-0x2c(%RBP),%RDI

0x45a3dd LEA	-0x4c(%RBP),%RCX

0x45a3e1 LEA	-0x7c(%RBP),%R9

0x45a3e5 MOV	%RDI,%RSI

0x45a3e8 MOV	%R12,%RDX

0x45a3eb VZEROUPPER

0x45a3ee CALL	4046a0 <dgetrf_@plt>

0x45a3f3 MOVSXD	-0x2c(%RBP),%R15

0x45a3f7 MOV	0x78(%R13),%RBX

0x45a3fb TEST	%R15,%R15

0x45a3fe MOV	%R15,-0x40(%RBP)

0x45a402 JLE	45a578

0x45a408 MOV	-0x4c(%RBP),%R11D

0x45a40c LEA	0x1(%R11),%EAX

0x45a410 CMP	$0x8,%R15D

0x45a414 JB	45a526

0x45a41a LEA	(,%R11,8),%ECX

0x45a422 LEA	0x8(,%R11,8),%EDX

0x45a42a LEA	(%R11,%R11,2),%ESI

0x45a42e LEA	0x6(%RSI,%RSI,1),%ESI

0x45a432 SUB	%R11D,%ECX

0x45a435 ADD	$0x7,%ECX

0x45a438 MOV	-0x40(%RBP),%RDI

0x45a43c LEA	(,%RDI,8),%RDI

0x45a444 AND	$-0x40,%RDI

0x45a448 LEA	0x5(%R11,%R11,4),%R8D

0x45a44d LEA	0x4(,%R11,4),%R9D

0x45a455 LEA	0x3(%R11,%R11,2),%R10D

0x45a45a LEA	0x2(%R11,%R11,1),%R11D

0x45a45f XOR	%R14D,%R14D

0x45a462 XOR	%R15D,%R15D

0x45a465 MOV	-0x58(%RBP),%R13

0x45a469 NOPL	(%RAX)

(1006) 0x45a470 MOVSXD	%R14D,%R14

(1006) 0x45a473 VMOVSD	(%R12,%R14,8),%XMM0

(1006) 0x45a479 VMOVSD	%XMM0,(%RBX,%R15,1)

(1006) 0x45a47f LEA	(%RAX,%R14,1),%R12D

(1006) 0x45a483 MOVSXD	%R12D,%R12

(1006) 0x45a486 VMOVSD	(%R13,%R12,8),%XMM0

(1006) 0x45a48d VMOVSD	%XMM0,0x8(%RBX,%R15,1)

(1006) 0x45a494 LEA	(%R11,%R14,1),%R12D

(1006) 0x45a498 MOVSXD	%R12D,%R12

(1006) 0x45a49b VMOVSD	(%R13,%R12,8),%XMM0

(1006) 0x45a4a2 VMOVSD	%XMM0,0x10(%RBX,%R15,1)

(1006) 0x45a4a9 LEA	(%R10,%R14,1),%R12D

(1006) 0x45a4ad MOVSXD	%R12D,%R12

(1006) 0x45a4b0 VMOVSD	(%R13,%R12,8),%XMM0

(1006) 0x45a4b7 VMOVSD	%XMM0,0x18(%RBX,%R15,1)

(1006) 0x45a4be LEA	(%R9,%R14,1),%R12D

(1006) 0x45a4c2 MOVSXD	%R12D,%R12

(1006) 0x45a4c5 VMOVSD	(%R13,%R12,8),%XMM0

(1006) 0x45a4cc VMOVSD	%XMM0,0x20(%RBX,%R15,1)

(1006) 0x45a4d3 LEA	(%R8,%R14,1),%R12D

(1006) 0x45a4d7 MOVSXD	%R12D,%R12

(1006) 0x45a4da VMOVSD	(%R13,%R12,8),%XMM0

(1006) 0x45a4e1 VMOVSD	%XMM0,0x28(%RBX,%R15,1)

(1006) 0x45a4e8 LEA	(%RSI,%R14,1),%R12D

(1006) 0x45a4ec MOVSXD	%R12D,%R12

(1006) 0x45a4ef VMOVSD	(%R13,%R12,8),%XMM0

(1006) 0x45a4f6 VMOVSD	%XMM0,0x30(%RBX,%R15,1)

(1006) 0x45a4fd LEA	(%RCX,%R14,1),%R12D

(1006) 0x45a501 MOVSXD	%R12D,%R12

(1006) 0x45a504 VMOVQ	(%R13,%R12,8),%XMM0

(1006) 0x45a50b MOV	-0x58(%RBP),%R12

(1006) 0x45a50f VMOVQ	%XMM0,0x38(%RBX,%R15,1)

(1006) 0x45a516 ADD	$0x40,%R15

(1006) 0x45a51a ADD	%EDX,%R14D

(1006) 0x45a51d CMP	%R15,%RDI

(1006) 0x45a520 JNE	45a470

0x45a526 MOV	-0x40(%RBP),%R15

0x45a52a MOV	%R15D,%ECX

0x45a52d AND	$0x7ffffff8,%ECX

0x45a533 CMP	%R15,%RCX

0x45a536 MOV	-0x90(%RBP),%R13

0x45a53d JE	45a578

0x45a53f MOV	%R15D,%EDX

0x45a542 SHR	$0x3,%EDX

0x45a545 AND	$0xfffffff,%EDX

0x45a54b IMUL	%EAX,%EDX

0x45a54e SAL	$0x3,%EDX

0x45a551 NOPW	%CS:(%RAX,%RAX,1)

(1005) 0x45a560 MOVSXD	%EDX,%RDX

(1005) 0x45a563 VMOVQ	(%R12,%RDX,8),%XMM0

(1005) 0x45a569 VMOVQ	%XMM0,(%RBX,%RCX,8)

(1005) 0x45a56e INC	%RCX

(1005) 0x45a571 ADD	%EAX,%EDX

(1005) 0x45a573 CMP	%RCX,%R15

(1005) 0x45a576 JNE	45a560

0x45a578 MOV	0x18(%R13),%RCX

0x45a57c TEST	%R15D,%R15D

0x45a57f JE	45a5c0

0x45a581 CMP	$0x4,%R15

0x45a585 MOV	%RCX,-0x48(%RBP)

0x45a589 JAE	45a600

0x45a58f VXORPD	%XMM9,%XMM9,%XMM9

0x45a594 MOV	$0x1,%R14D

0x45a59a JMP	45a739

0x45a59f NOPW	%CS:(%RAX,%RAX,1)

0x45a5ae NOPW	%CS:(%RAX,%RAX,1)

0x45a5bd NOPL	(%RAX)

0x45a5c0 VXORPD	%XMM9,%XMM9,%XMM9

0x45a5c5 VPXOR	%XMM0,%XMM0,%XMM0

0x45a5c9 MOV	-0xe0(%RBP),%RAX

0x45a5d0 MOV	-0xd8(%RBP),%RDX

0x45a5d7 JMP	45a7f9

0x45a5dc NOPW	%CS:(%RAX,%RAX,1)

0x45a5eb NOPW	%CS:(%RAX,%RAX,1)

0x45a5fa NOPW	(%RAX,%RAX,1)

0x45a600 MOV	%R15,%RSI

0x45a603 SHR	$0x2,%RSI

0x45a607 VXORPD	%XMM9,%XMM9,%XMM9

0x45a60c MOV	$0x1,%R14D

0x45a612 MOV	$0x2,%EDI

0x45a617 NOPW	(%RAX,%RAX,1)

(1003) 0x45a620 MOVSXD	-0x8(%RCX,%RDI,4),%RAX

(1003) 0x45a625 LEA	-0x1(%RDI),%RDX

(1003) 0x45a629 MOV	%R14D,%R13D

(1003) 0x45a62c NEG	%R13D

(1003) 0x45a62f CMP	%RAX,%RDX

(1003) 0x45a632 CMOVE	%R14D,%R13D

(1003) 0x45a636 MOV	%R13D,%R14D

(1003) 0x45a639 NEG	%R14D

(1003) 0x45a63c MOVSXD	-0x4(%RCX,%RDI,4),%R12

(1003) 0x45a641 MOVSXD	(%RCX,%RDI,4),%RAX

(1003) 0x45a645 MOV	%RAX,-0x68(%RBP)

(1003) 0x45a649 LEA	0x1(%RDI),%RAX

(1003) 0x45a64d MOV	%RAX,-0x60(%RBP)

(1003) 0x45a651 MOVSXD	0x4(%RCX,%RDI,4),%RAX

(1003) 0x45a656 MOV	%RAX,-0x78(%RBP)

(1003) 0x45a65a LEA	0x2(%RDI),%RAX

(1003) 0x45a65e MOV	%RAX,-0x70(%RBP)

(1003) 0x45a662 VMOVUPD	-0x10(%RBX,%RDI,8),%YMM0

(1003) 0x45a668 VMOVUPD	%YMM0,-0x100(%RBP)

(1003) 0x45a670 VANDPD	0xddb8e(%RIP){1to4},%YMM0,%YMM0

(1003) 0x45a67a VMOVUPD	%YMM0,-0xd0(%RBP)

(1003) 0x45a682 MOV	$0x52f020,%R15

(1003) 0x45a689 VZEROUPPER

(1003) 0x45a68c CALL	%R15

(1003) 0x45a68f VMOVAPD	%XMM0,%XMM8

(1003) 0x45a693 VMOVUPD	-0xd0(%RBP),%YMM0

(1003) 0x45a69b VEXTRACTF128	$0x1,%YMM0,%XMM0

(1003) 0x45a6a1 VZEROUPPER

(1003) 0x45a6a4 CALL	%R15

(1003) 0x45a6a7 MOV	-0x48(%RBP),%RCX

(1003) 0x45a6ab VMOVUPD	-0x100(%RBP),%YMM1

(1003) 0x45a6b3 VCMPPD	$0xe,0xddc62(%RIP),%YMM1,%K0

(1003) 0x45a6be KMOVD	%K0,%EAX

(1003) 0x45a6c2 TEST	$0x1,%AL

(1003) 0x45a6c4 CMOVNE	%R13D,%R14D

(1003) 0x45a6c8 MOV	%R14D,%R8D

(1003) 0x45a6cb NEG	%R8D

(1003) 0x45a6ce CMP	%R12,%RDI

(1003) 0x45a6d1 CMOVE	%R14D,%R8D

(1003) 0x45a6d5 MOV	%R8D,%EDX

(1003) 0x45a6d8 NEG	%EDX

(1003) 0x45a6da TEST	$0x2,%AL

(1003) 0x45a6dc CMOVNE	%R8D,%EDX

(1003) 0x45a6e0 MOV	%EDX,%R8D

(1003) 0x45a6e3 NEG	%R8D

(1003) 0x45a6e6 MOV	-0x60(%RBP),%R9

(1003) 0x45a6ea CMP	-0x68(%RBP),%R9

(1003) 0x45a6ee CMOVE	%EDX,%R8D

(1003) 0x45a6f2 MOV	%R8D,%EDX

(1003) 0x45a6f5 NEG	%EDX

(1003) 0x45a6f7 TEST	$0x4,%AL

(1003) 0x45a6f9 CMOVNE	%R8D,%EDX

(1003) 0x45a6fd MOV	%EDX,%R8D

(1003) 0x45a700 NEG	%R8D

(1003) 0x45a703 MOV	-0x70(%RBP),%R9

(1003) 0x45a707 CMP	-0x78(%RBP),%R9

(1003) 0x45a70b CMOVE	%EDX,%R8D

(1003) 0x45a70f MOV	%R8D,%R14D

(1003) 0x45a712 NEG	%R14D

(1003) 0x45a715 TEST	$0x8,%AL

(1003) 0x45a717 CMOVNE	%R8D,%R14D

(1003) 0x45a71b VADDPD	%XMM0,%XMM8,%XMM0

(1003) 0x45a71f VSHUFPD	$0x1,%XMM0,%XMM0,%XMM1

(1003) 0x45a724 VADDSD	%XMM1,%XMM0,%XMM0

(1003) 0x45a728 VADDSD	%XMM0,%XMM9,%XMM9

(1003) 0x45a72c ADD	$0x4,%RDI

(1003) 0x45a730 DEC	%RSI

(1003) 0x45a733 JNE	45a620

0x45a739 MOV	-0x40(%RBP),%R15

0x45a73d MOV	%R15,%R12

0x45a740 AND	$-0x4,%R12

0x45a744 CMP	%R15,%R12

0x45a747 JE	45a7c4

0x45a749 MOV	%R15,%R13

0x45a74c NEG	%R13

0x45a74f INC	%R12

0x45a752 VXORPD	%XMM16,%XMM16,%XMM16

0x45a758 VMOVDDUP	0xddaa6(%RIP),%XMM17

0x45a762 NOPW	%CS:(%RAX,%RAX,1)

(1004) 0x45a770 MOVSXD	-0x4(%RCX,%R12,4),%RAX

(1004) 0x45a775 MOV	%R14D,%ECX

(1004) 0x45a778 NEG	%ECX

(1004) 0x45a77a CMP	%RAX,%R12

(1004) 0x45a77d CMOVE	%R14D,%ECX

(1004) 0x45a781 VMOVSD	-0x8(%RBX,%R12,8),%XMM0

(1004) 0x45a788 MOV	%ECX,%R14D

(1004) 0x45a78b NEG	%R14D

(1004) 0x45a78e VUCOMISD	%XMM16,%XMM0

(1004) 0x45a794 CMOVA	%ECX,%R14D

(1004) 0x45a798 VANDPD	%XMM17,%XMM0,%XMM0

(1004) 0x45a79e VMOVAPD	%XMM9,%XMM18

(1004) 0x45a7a4 VZEROUPPER

(1004) 0x45a7a7 CALL	520920 <__libm_log_l9>

(1004) 0x45a7ac MOV	-0x48(%RBP),%RCX

(1004) 0x45a7b0 VADDSD	%XMM18,%XMM0,%XMM9

(1004) 0x45a7b6 LEA	0x1(%R13,%R12,1),%RAX

(1004) 0x45a7bb INC	%R12

(1004) 0x45a7be CMP	$0x1,%RAX

(1004) 0x45a7c2 JNE	45a770

0x45a7c4 TEST	%R14D,%R14D

0x45a7c7 SETG	%AL

0x45a7ca KMOVD	%EAX,%K1

0x45a7ce VPXOR	%XMM1,%XMM1,%XMM1

0x45a7d2 VMOVSD	0xdfd46(%RIP),%XMM0

0x45a7da VMOVSD	%XMM1,%XMM0,%XMM0{%K1}

0x45a7e0 MOV	-0xe0(%RBP),%RAX

0x45a7e7 MOV	-0x90(%RBP),%R13

0x45a7ee MOV	-0xd8(%RBP),%RDX

0x45a7f5 MOV	-0x58(%RBP),%R12

0x45a7f9 LEA	-0x7c(%RBP),%R10

0x45a7fd MOV	%RSP,%RBX

0x45a800 VMOVSD	%XMM9,(%RDX)

0x45a804 VMOVQ	%XMM0,(%RAX)

0x45a808 MOV	-0x4c(%RBP),%EAX

0x45a80b MOV	(%R13),%R8

0x45a80f MOV	%RSP,%R9

0x45a812 LEA	-0x10(%R9),%RDI

0x45a816 MOV	%RDI,%RSP

0x45a819 MOV	%RSP,%RSI

0x45a81c LEA	-0x10(%RSI),%RDX

0x45a820 MOV	%RDX,%RSP

0x45a823 MOV	%R15D,-0x10(%R9)

0x45a827 MOV	%EAX,-0x10(%RSI)

0x45a82a SUB	$0x8,%RSP

0x45a82e MOV	%R12,%RSI

0x45a831 MOV	-0x98(%RBP),%R9

0x45a838 PUSH	%R10

0x45a83a VZEROUPPER

0x45a83d CALL	4043c0 <dgetri_@plt>

0x45a842 ADD	$0x10,%RSP

0x45a846 MOV	%RBX,%RSP

0x45a849 LEA	-0x80(%RBP),%RDI

0x45a84d CALL	51f7e0 <_ZN11qmcplusplus16BlasThreadingEnvD1Ev>

0x45a852 LEA	-0x28(%RBP),%RSP

0x45a856 POP	%RBX

0x45a857 POP	%R12

0x45a859 POP	%R13

0x45a85b POP	%R14

0x45a85d POP	%R15

0x45a85f POP	%RBP

0x45a860 RET

0x45a861 NOPW	%CS:(%RAX,%RAX,1)

0x45a870 NOPW	%CS:(%RAX,%RAX,1)

0x45a87f NOP

0x45a880 MOV	$0x538542,%EDI

0x45a885 VZEROUPPER

0x45a888 CALL	404270 <_ZSt20__throw_length_errorPKc@plt>

0x45a88d NOPW	%CS:(%RAX,%RAX,1)

0x45a89c NOPW	%CS:(%RAX,%RAX,1)

0x45a8ab NOPW	%CS:(%RAX,%RAX,1)

0x45a8ba NOPW	(%RAX,%RAX,1)

0x45a8c0 MOV	$0x10,%EDI

0x45a8c5 CALL	404530 <__cxa_allocate_exception@plt>

0x45a8ca MOV	%RAX,%RBX

0x45a8cd MOV	-0xd0(%RBP),%RDI

0x45a8d4 MOV	-0xa0(%RBP),%RSI

0x45a8db CALL	411d80 <_ZNSt7__cxx119to_stringEm>

0x45a8e0 MOV	$0x538047,%ESI

0x45a8e5 MOV	-0x38(%RBP),%RDI

0x45a8e9 MOV	-0xd0(%RBP),%RDX

0x45a8f0 CALL	4112c0 <_ZStplIcSt11char_traitsIcESaIcEENSt7__cxx1112basic_stringIT_T0_T1_EEPKS5_OS8_>

0x45a8f5 MOV	$0x1,%R15D

0x45a8fb MOV	%RBX,%RDI

0x45a8fe MOV	-0x38(%RBP),%RSI

0x45a902 CALL	404120 <_ZNSt13runtime_errorC1ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE@plt>

0x45a907 XOR	%R15D,%R15D

0x45a90a MOV	$0x59f7c0,%ESI

0x45a90f MOV	$0x404790,%EDX

0x45a914 MOV	%RBX,%RDI

0x45a917 CALL	404240 <__cxa_throw@plt>

0x45a91c NOPW	%CS:(%RAX,%RAX,1)

0x45a92b NOPW	%CS:(%RAX,%RAX,1)

0x45a93a NOPW	(%RAX,%RAX,1)

0x45a940 MOV	$0x10,%EDI

0x45a945 CALL	404530 <__cxa_allocate_exception@plt>

0x45a94a MOV	%RAX,%RBX

0x45a94d MOV	$0x538083,%ESI

0x45a952 MOV	%RAX,%RDI

0x45a955 CALL	404110 <_ZNSt13runtime_errorC1EPKc@plt>

0x45a95a MOV	$0x59f7c0,%ESI

0x45a95f MOV	$0x404790,%EDX

0x45a964 MOV	%RBX,%RDI

0x45a967 CALL	404240 <__cxa_throw@plt>

0x45a96c NOPW	%CS:(%RAX,%RAX,1)

0x45a97b NOPL	(%RAX,%RAX,1)

0x45a980 MOV	%RAX,%R14

0x45a983 MOV	-0x38(%RBP),%RCX

0x45a987 MOV	(%RCX),%RDI

0x45a98a ADD	$0x10,%RCX

0x45a98e CMP	%RCX,%RDI

0x45a991 JE	45a99e

0x45a993 MOV	(%RCX),%RSI

0x45a996 INC	%RSI

0x45a999 CALL	404070 <_ZdlPvm@plt>

0x45a99e MOV	-0xd0(%RBP),%RCX

0x45a9a5 MOV	(%RCX),%RDI

0x45a9a8 ADD	$0x10,%RCX

0x45a9ac CMP	%RCX,%RDI

0x45a9af JNE	45aa00

0x45a9b1 TEST	%R15B,%R15B

0x45a9b4 JNE	45aac3

(1007) 0x45a9ba LEA	-0x80(%RBP),%RDI

(1007) 0x45a9be CALL	51f7e0 <_ZN11qmcplusplus16BlasThreadingEnvD1Ev>

(1007) 0x45a9c3 MOV	%R14,%RDI

(1007) 0x45a9c6 CALL	404280 <_Unwind_Resume@plt>

(1007) 0x45a9cb NOPW	%CS:(%RAX,%RAX,1)

(1007) 0x45a9da NOPW	%CS:(%RAX,%RAX,1)

(1007) 0x45a9e9 NOPW	%CS:(%RAX,%RAX,1)

(1007) 0x45a9f8 NOPL	(%RAX,%RAX,1)

(1007) 0x45aa00 MOV	(%RCX),%RSI

(1007) 0x45aa03 INC	%RSI

(1007) 0x45aa06 CALL	404070 <_ZdlPvm@plt>

(1007) 0x45aa0b TEST	%R15B,%R15B

(1007) 0x45aa0e JE	45a9ba

0x45aa10 JMP	45aac3

0x45aa15 NOPW	%CS:(%RAX,%RAX,1)

0x45aa24 NOPW	%CS:(%RAX,%RAX,1)

0x45aa33 NOPW	%CS:(%RAX,%RAX,1)

0x45aa40 MOV	%RAX,%R14

0x45aa43 MOV	-0xd0(%RBP),%RCX

0x45aa4a MOV	(%RCX),%RDI

0x45aa4d ADD	$0x10,%RCX

0x45aa51 CMP	%RCX,%RDI

0x45aa54 JE	45aac3

0x45aa56 MOV	(%RCX),%RSI

0x45aa59 INC	%RSI

0x45aa5c CALL	404070 <_ZdlPvm@plt>

0x45aa61 JMP	45aac3

0x45aa63 NOPW	%CS:(%RAX,%RAX,1)

0x45aa72 NOPW	%CS:(%RAX,%RAX,1)

0x45aa80 MOV	%RAX,%R14

0x45aa83 JMP	45aac3

0x45aa85 NOPW	%CS:(%RAX,%RAX,1)

0x45aa94 NOPW	%CS:(%RAX,%RAX,1)

0x45aaa3 NOPW	%CS:(%RAX,%RAX,1)

0x45aab2 NOPW	%CS:(%RAX,%RAX,1)

0x45aac0 MOV	%RAX,%R14

0x45aac3 MOV	%RBX,%RDI

0x45aac6 CALL	4047c0 <__cxa_free_exception@plt>

0x45aacb LEA	-0x80(%RBP),%RDI

0x45aacf CALL	51f7e0 <_ZN11qmcplusplus16BlasThreadingEnvD1Ev>

0x45aad4 MOV	%R14,%RDI

0x45aad7 CALL	404280 <_Unwind_Resume@plt>

0x45aadc NOPW	%CS:(%RAX,%RAX,1)

0x45aaeb NOPW	%CS:(%RAX,%RAX,1)

0x45aafa NOPW	(%RAX,%RAX,1)

0x45ab00 JMP	45ab80

0x45ab02 NOPW	%CS:(%RAX,%RAX,1)

0x45ab11 NOPW	%CS:(%RAX,%RAX,1)

0x45ab20 NOPW	%CS:(%RAX,%RAX,1)

0x45ab2f NOPW	%CS:(%RAX,%RAX,1)

0x45ab3e XCHG	%AX,%AX

0x45ab40 JMP	45ab80

0x45ab42 NOPW	%CS:(%RAX,%RAX,1)

0x45ab51 NOPW	%CS:(%RAX,%RAX,1)

0x45ab60 NOPW	%CS:(%RAX,%RAX,1)

0x45ab6f NOPW	%CS:(%RAX,%RAX,1)

0x45ab7e XCHG	%AX,%AX

0x45ab80 MOV	%RAX,%R14

0x45ab83 LEA	-0x80(%RBP),%RDI

0x45ab87 CALL	51f7e0 <_ZN11qmcplusplus16BlasThreadingEnvD1Ev>

0x45ab8c MOV	%R14,%RDI

0x45ab8f CALL	404280 <_Unwind_Resume@plt>

0x45ab94 NOPW	%CS:(%RAX,%RAX,1)

0x45ab9e NOPW	%CS:(%RAX,%RAX,1)

0x45aba8 NOPW	%CS:(%RAX,%RAX,1)

0x45abb2 NOPW	%CS:(%RAX,%RAX,1)

0x45abbc NOPL	(%RAX)

Coverage (%)	Name	Source Location	Module
►52.80+	miniqmcreference::DiracDetermi[...]	DelayedUpdate.h:79	exec
○	miniqmcreference::DiracDetermi[...]	DiracDeterminantRef.cpp:238	exec
○	qmcplusplus::WaveFunction::eva[...]	WaveFunction.cpp:170	exec
○	main.extracted.112	miniqmc.cpp:397	exec
○	__kmp_invoke_microtask		libiomp5.so
○	__kmp_invoke_task_func		libiomp5.so
►47.20+	miniqmcreference::DiracDetermi[...]	DelayedUpdate.h:79	exec
○	miniqmcreference::DiracDetermi[...]	DiracDeterminantRef.cpp:238	exec
○	qmcplusplus::WaveFunction::eva[...]	WaveFunction.cpp:171	exec
○	main.extracted.112	miniqmc.cpp:397	exec
○	__kmp_invoke_microtask		libiomp5.so
○	__kmp_invoke_task_func		libiomp5.so

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run icx_4

Source file and lines	DiracMatrix.h:31-121
Module	exec

The function is defined in:

/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracMatrix.h:31-37,76-77,83-85,95-101,108-121
/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/ext/new_allocator.h:145
/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/basic_string.h:195,211,230,239-245
/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/std_abs.h:72
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/inner_product.hpp:210-212
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/BLAS.hpp:790,827
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Utilities/OpenMP.h:37-43
/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/stl_vector.h:353,919,939-942,1169,1758-1762,1794-1798
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsMatrix.h:77-78
/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/stl_uninitialized.h:687,1031
/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/alloc_traits.h:261
/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/vector.tcc:614-626,640,678-680
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:248-249
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/Mallocator.hpp:50-52,61,68-70,76-78

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 90.17 to 16.00 cycles (5.64x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is probably not vectorized. Only 13% of vector register length is used (average across all SSE/AVX instructions).

Details

Store and arithmetical SSE/AVX instructions are used in scalar version (process only one data element in vector registers).

Workaround

Read the "512-bits vectorization" report at "Potential" confidence level.

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

512-bits vectorization

On some x86 processors supporting 512-bits vectorization, compilers are often too conservative and limit vectorization to 256 bits. Performance can then be improved by enforcing 512-bits vectorization, especially with many vectorized and high trip count loops. 512-bits vectorization performance overhead (compared to 256-bits) is generally lower on newer processors.

Workaround

Recompile with -mprefer-vector-width=512

Masked instructions

Detected masked instructions.

Details

Vector registers are partially exploited, which is expected if your function is irregular or mixes elements of different sizes.

Workaround

If your function is irregular, try to remove or hoist conditional structures out of your function. If it mixes elements of different sizes, try to uniformize them.

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

_Unwind_Resume@plt: 2 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracMatrix.h:121
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracMatrix.h:121
__cxa_allocate_exception@plt: 2 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/Mallocator.hpp:69
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/Mallocator.hpp:77
__cxa_free_exception@plt: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/Mallocator.hpp:77
__cxa_throw@plt: 2 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/Mallocator.hpp:69
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/Mallocator.hpp:77
__intel_avx_rep_memcpy: 1 occurrences►
- /usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/alloc_traits.h:261
__intel_avx_rep_memset: 2 occurrences►
- /usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/alloc_traits.h:261
- /usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/alloc_traits.h:261
__kmpc_fork_call@plt: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Utilities/OpenMP.h:38
aligned_alloc@plt: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/Mallocator.hpp:61
dgetrf_@plt: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/BLAS.hpp:790
dgetri_@plt: 2 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/BLAS.hpp:827
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/BLAS.hpp:827
free@plt: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/Mallocator.hpp:78
operator delete(void*, unsigned long): 2 occurrences►
- /usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/ext/new_allocator.h:145
- /usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/ext/new_allocator.h:145
qmcplusplus::BlasThreadingEnv::BlasThreadingEnv(int): 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracMatrix.h:96
qmcplusplus::BlasThreadingEnv::~BlasThreadingEnv(): 3 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracMatrix.h:121
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracMatrix.h:121
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracMatrix.h:121
std::__cxx11::basic_string
, std::allocator
> std::operator+
, std::allocator
>(char const*, std::__cxx11::basic_string, std::allocator >&&): 1 occurrences►
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/Mallocator.hpp:69
std::__cxx11::to_string(unsigned long): 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/Mallocator.hpp:70
std::__throw_length_error(char const*): 1 occurrences►
- /usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/stl_vector.h:1759
std::runtime_error::runtime_error(char const*): 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/Mallocator.hpp:77
std::runtime_error::runtime_error(std::__cxx11::basic_string
, std::allocator
> const&): 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/Mallocator.hpp:69
std::vector
>::_M_default_append(unsigned long): 2 occurrences►
- /usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/stl_vector.h:940
- /usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/stl_vector.h:940

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

CMOVA: 1 occurrences►
- /usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/stl_vector.h:1761
VCVTTSD2SI: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracMatrix.h:83
VPMOVSXBQ: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/inner_product.hpp:212
VZEROUPPER: 6 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/Mallocator.hpp:61
- /usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/alloc_traits.h:261
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/BLAS.hpp:827
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/BLAS.hpp:790
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/BLAS.hpp:827
- /usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/stl_vector.h:1759

Conversion instructions

Detected expensive conversion instructions.

Details

CLTQ: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracMatrix.h:84
VCVTTSD2SI (FP64 to INT32/64, scalar): 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracMatrix.h:83
VPMOVSXBQ: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/inner_product.hpp:212

Workaround

Avoid mixing data with different types. In particular, check if the type of constants is the same as array elements.

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 624 bytes. The binary function is storing 316 bytes.

General properties

nb instructions	503
nb uops	541
loop length	2569
used x86 registers	16
used mmx registers	0
used xmm registers	5
used ymm registers	2
used zmm registers	0
nb stack references	23

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	90.17 cycles
front end	90.17 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11
uops	26.10	26.00	29.33	29.33	40.50	26.00	25.90	40.50	40.50	40.50	26.00	29.33
cycles	26.10	26.00	29.33	29.33	40.50	26.00	25.90	40.50	40.50	40.50	26.00	29.33

Execution ports to units layout:

P0 (256 bits): VPU, BRU, ALU, DIV/SQRT
P1 (256 bits): ALU, VPU
P2 (512 bits): load
P3 (512 bits): load
P4 (512 bits): store data
P5 (512 bits): ALU, VPU
P6: ALU, BRU
P7: store address
P8: store address
P9 (512 bits): store data
P10: ALU
P11 (512 bits): load

Cycles executing div or sqrt instructions

Cycles summary

Front-end	90.17
Dispatch	40.50
Overall L1	90.17

Vectorization ratios

INT

all	8%
load	10%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
other	16%

all	44%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	66%

INT+FP

all	11%
load	7%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	22%

Vector efficiency ratios

INT

all	12%
load	11%
store	11%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
other	14%

all	18%
load	12%
store	12%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	20%

INT+FP

all	13%
load	11%
store	11%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	14%

Cycles and memory resources usage

Detected masked instructions: assuming all mask elements are active. Assuming all data fit into the L1 cache, each call to the function takes 90.17 cycles. At this rate:

3% of peak load performance is reached (6.92 out of 192.00 bytes loaded per cycle (GB/s @ 1GHz))
2% of peak store performance is reached (3.50 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Performance is limited by instruction throughput (loading/decoding program instructions to execution core) (front-end is a bottleneck). By removing all these bottlenecks, you can lower the cost of an iteration from 90.17 to 40.50 cycles (2.23x speedup).

ASM code

In the binary file, the address of the function is: 459d80

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
PUSH %R15	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R14	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R13	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R12	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %RBX	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
SUB $0xe8,%RSP	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV %R8,-0xe0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RCX,-0xd8(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RDX,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RSI,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RDI,-0x90(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOVL $0x1,-0x2c(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
LEA -0x2c(%RBP),%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV $0x5a1b90,%EDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV $0x455280,%EDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV $0x1,%ESI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CALL 4041e0 <__kmpc_fork_call@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV -0x2c(%RBP),%ESI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA -0x80(%RBP),%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CALL 51f7c0 <_ZN11qmcplusplus16BlasThreadingEnvC1Ei>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV (%R15),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %ECX,-0x2c(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOV 0x8(%R15),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,-0x88(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %EAX,-0x4c(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOV 0x30(%R15),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,-0x58(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
SAL $0x20,%RCX	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
JE 45a080 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x300>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %RCX,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x8(%RBX),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x30(%RBX),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
SAR $0x20,%RAX	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
CMP $0x1,%RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
ADC $-0x1,%RAX	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	1	0.50	N/A
MOV %RAX,-0x100(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
SHR $0x6,%RAX	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
MOV %RAX,-0xd0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
VPBROADCASTQ %RCX,%YMM0	1	0	0	0	0	0	1	0	0	0	0	0	0	3	1	scal (12.5%)
MOV %RCX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SAL $0x6,%RDI	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
MOV -0x88(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SAL $0x9,%RSI	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
MOV %RSI,-0x108(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
LEA (,%RAX,8),%R9	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RCX,-0x48(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
LEA (,%RCX,8),%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XOR %ESI,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VPMOVSXBQ 0xe06bc(%RIP),%YMM1	2	0	0	0.33	0.33	0	1	0	0	0	0	0	0.33	3	1	vect (6.3%)
MOV -0x58(%RBP),%R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RDI,-0x98(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JMP 459eae <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x12e>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0x90(%RBP),%R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA 0x30(%R13),%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RAX,-0x98(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV -0x88(%RBP),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
CMP %R8D,0x30(%R13)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (6.3%)
MOV -0x58(%RBP),%R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
JGE 45a3d5 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x655>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %RSP,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RSP,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD $-0x10,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RDI,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %RSP,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD $-0x10,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RDX,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %RSP,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD $-0x10,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RBX,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %RSP,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD $-0x10,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R15,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOVSXD %R8D,%R9	1	0	0.33	0	0	0	0.33	0	0	0	0	0.33	0	1	0.33	N/A
MOV 0x18(%R13),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x20(%R13),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RSI,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB %RCX,%RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
SAR $0x2,%RAX	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
CMP %RAX,%R9	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV %R9,-0x48(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JBE 45a280 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x500>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %RSP,%R11	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RSP,%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
ADD $-0x20,%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %R10,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %RSP,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD $-0x20,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RSI,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %R9,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB %RAX,%R12	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
JE 45a2fa <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x57a>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV 0x20(%R13),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x28(%R13),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RCX,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB %R8,%RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
SAR $0x2,%RAX	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
CMP %R12,%RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV %RDX,-0x70(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RDI,-0x68(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R14,-0x60(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R8,-0x78(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JAE 45a2c0 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x540>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %RCX,-0xa8(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R11,-0x40(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R10,-0x38(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RSI,-0xd0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x18(%R13),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,-0x100(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
SUB %RAX,%R8	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV %R8,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SAR $0x2,%R8	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	scal (12.5%)
MOV $0x1fffffffffffffff,%RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.28	N/A
MOV %R8,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
XOR %RAX,%RDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
CMP %R12,%RDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JB 45a880 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0xb00>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP %R12,%R8	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV %R12,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMOVA %R8,%R14	2	1	0	0	0	0	0	1	0	0	0	0	0	1-2	1	N/A
ADD %R8,%R14	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
CMP %RAX,%R14	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
CMOVAE %RAX,%R14	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	1	0.50	N/A
LEA (,%R14,4),%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RAX,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
AND $-0x40,%RSI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
ADD $0x40,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
TEST $0xf,%R14B	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	N/A
MOV %RAX,-0xa0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
CMOVE %RAX,%RSI	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	1	0.50	N/A
MOV $0x40,%EDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
VZEROUPPER	2	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 404820 <aligned_alloc@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
TEST %RAX,%RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (12.5%)
JE 45a8c0 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0xb40>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
LEA (%RAX,%R13,1),%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA (,%R12,4),%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RAX,-0xd0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RDI,-0x38(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
XOR %ESI,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CALL 534740 <__intel_avx_rep_memset>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV -0x100(%RBP),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP -0x78(%RBP),%RDI	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JE 45a226 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x4a6>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
ADD $-0x4,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
AND $-0x4,%R13	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
ADD $0x4,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV -0xd0(%RBP),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x100(%RBP),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %R13,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 532f70 <__intel_avx_rep_memcpy>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV -0x100(%RBP),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
TEST %RDI,%RDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (12.5%)
JE 45a23d <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x4bd>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP %RDI,-0xa8(%RBP)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JE 45a940 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0xbc0>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CALL 404480 <free@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV -0x90(%RBP),%R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0xd0(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RCX,0x18(%R13)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV -0x38(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%RAX,%R12,4),%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RAX,0x20(%R13)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
LEA (%RCX,%R14,4),%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RAX,0x28(%R13)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV -0x68(%RBP),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x70(%RBP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x88(%RBP),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV -0x60(%RBP),%R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x40(%RBP),%R11	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
JMP 45a2fa <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x57a>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
NOP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
JAE 45a305 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x585>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x48(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%RCX,%RAX,4),%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP %RAX,%RSI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 45a305 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x585>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %RAX,0x20(%R13)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JMP 45a305 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x585>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA (,%R12,4),%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R8,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
XOR %ESI,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R11,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
VZEROUPPER	2	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 534740 <__intel_avx_rep_memset>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV %R14,%R11	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV -0x88(%RBP),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV -0x70(%RBP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x60(%RBP),%R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x68(%RBP),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x78(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%RAX,%R12,4),%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RAX,0x20(%R13)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R11,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV 0x18(%R13),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x58(%RBP),%R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x98(%RBP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOVL $-0x1,(%R9)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOV %R8D,(%RDI)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOV %R8D,(%RDX)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
SUB $0x8,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %R12,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RBX,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
PUSH %R15	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
VZEROUPPER	2	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 4043c0 <dgetri_@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
ADD $0x10,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV -0x48(%RBP),%R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VCVTTSD2SI (%RBX),%EAX	2	1.50	0.50	0.33	0.33	0	0	0	0	0	0	0	0.33	7	1	scal (12.5%)
MOV %EAX,0x30(%R13)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
CLTQ	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.33	scal (12.5%)
MOV (%R13),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x8(%R13),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RCX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB %RDX,%RDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
SAR $0x3,%RDI	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
MOV %RAX,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB %RDI,%RSI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
JBE 45a380 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x600>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %R13,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 45abc0 <_ZNSt6vectorIdN11qmcplusplus10MallocatorIdLm64EEEE17_M_default_appendEm>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
JMP 45a38f <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x60f>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
JAE 45a38f <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x60f>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
LEA (%RDX,%RAX,8),%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP %RAX,%RCX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 45a38f <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x60f>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %RAX,0x8(%R13)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x78(%R13),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x80(%R13),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB %RCX,%RDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
SAR $0x3,%RDX	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
MOV %R15,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB %RDX,%RSI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
JBE 45a3c0 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x640>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
LEA 0x78(%R13),%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CALL 45abc0 <_ZNSt6vectorIdN11qmcplusplus10MallocatorIdLm64EEEE17_M_default_appendEm>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
JMP 45a3d2 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x652>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
JAE 45a3d2 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x652>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
LEA (%RCX,%R15,8),%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP %RCX,%RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 45a3d2 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x652>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %RCX,0x80(%R13)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R14,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV 0x18(%R13),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
LEA -0x2c(%RBP),%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA -0x4c(%RBP),%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA -0x7c(%RBP),%R9	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RDI,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R12,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
VZEROUPPER	2	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 4046a0 <dgetrf_@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOVSXD -0x2c(%RBP),%R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x78(%R13),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
TEST %R15,%R15	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (12.5%)
MOV %R15,-0x40(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JLE 45a578 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x7f8>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x4c(%RBP),%R11D	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA 0x1(%R11),%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
CMP $0x8,%R15D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
JB 45a526 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x7a6>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
LEA (,%R11,8),%ECX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
LEA 0x8(,%R11,8),%EDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
LEA (%R11,%R11,2),%ESI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
LEA 0x6(%RSI,%RSI,1),%ESI	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
SUB %R11D,%ECX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
ADD $0x7,%ECX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV -0x40(%RBP),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (,%RDI,8),%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
AND $-0x40,%RDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
LEA 0x5(%R11,%R11,4),%R8D	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
LEA 0x4(,%R11,4),%R9D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
LEA 0x3(%R11,%R11,2),%R10D	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
LEA 0x2(%R11,%R11,1),%R11D	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
XOR %R14D,%R14D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XOR %R15D,%R15D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0x58(%RBP),%R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0x40(%RBP),%R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %R15D,%ECX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
AND $0x7ffffff8,%ECX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
CMP %R15,%RCX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV -0x90(%RBP),%R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
JE 45a578 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x7f8>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %R15D,%EDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SHR $0x3,%EDX	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
AND $0xfffffff,%EDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
IMUL %EAX,%EDX	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
SAL $0x3,%EDX	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV 0x18(%R13),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
TEST %R15D,%R15D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (6.3%)
JE 45a5c0 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x840>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP $0x4,%R15	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV %RCX,-0x48(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JAE 45a600 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x880>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
VXORPD %XMM9,%XMM9,%XMM9	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
MOV $0x1,%R14D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
JMP 45a739 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x9b9>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VXORPD %XMM9,%XMM9,%XMM9	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
VPXOR %XMM0,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
MOV -0xe0(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0xd8(%RBP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
JMP 45a7f9 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0xa79>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R15,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SHR $0x2,%RSI	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
VXORPD %XMM9,%XMM9,%XMM9	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
MOV $0x1,%R14D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV $0x2,%EDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0x40(%RBP),%R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %R15,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
AND $-0x4,%R12	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
CMP %R15,%R12	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 45a7c4 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0xa44>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %R15,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
NEG %R13	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
INC %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
VXORPD %XMM16,%XMM16,%XMM16	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
VMOVDDUP 0xddaa6(%RIP),%XMM17	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
TEST %R14D,%R14D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (6.3%)
SETG %AL	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	1	0.50	N/A
KMOVD %EAX,%K1	1	0	0	0	0	0	1	0	0	0	0	0	0	3	1	N/A
VPXOR %XMM1,%XMM1,%XMM1	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
VMOVSD 0xdfd46(%RIP),%XMM0	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMOVSD %XMM1,%XMM0,%XMM0{%K1}	1	0.33	0.33	0	0	0	0.33	0	0	0	0	0	0	1	0.33	scal (12.5%)
MOV -0xe0(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x90(%RBP),%R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0xd8(%RBP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x58(%RBP),%R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA -0x7c(%RBP),%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RSP,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
VMOVSD %XMM9,(%RDX)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
VMOVQ %XMM0,(%RAX)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV -0x4c(%RBP),%EAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%R13),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV %RSP,%R9	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LEA -0x10(%R9),%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RDI,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %RSP,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LEA -0x10(%RSI),%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RDX,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %R15D,-0x10(%R9)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOV %EAX,-0x10(%RSI)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
SUB $0x8,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %R12,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV -0x98(%RBP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
PUSH %R10	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
VZEROUPPER	2	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 4043c0 <dgetri_@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
ADD $0x10,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %RBX,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
LEA -0x80(%RBP),%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CALL 51f7e0 <_ZN11qmcplusplus16BlasThreadingEnvD1Ev>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
LEA -0x28(%RBP),%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
POP %RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %RBP	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
RET	1	0.50	0	0.33	0.33	0	0	0.50	0	0	0	0	0.33	0	2.13	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV $0x538542,%EDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
VZEROUPPER	2	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 404270 <_ZSt20__throw_length_errorPKc@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV $0x10,%EDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
CALL 404530 <__cxa_allocate_exception@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV %RAX,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV -0xd0(%RBP),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0xa0(%RBP),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CALL 411d80 <_ZNSt7__cxx119to_stringEm>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV $0x538047,%ESI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV -0x38(%RBP),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0xd0(%RBP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CALL 4112c0 <_ZStplIcSt11char_traitsIcESaIcEENSt7__cxx1112basic_stringIT_T0_T1_EEPKS5_OS8_>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV $0x1,%R15D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %RBX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV -0x38(%RBP),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CALL 404120 <_ZNSt13runtime_errorC1ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
XOR %R15D,%R15D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV $0x59f7c0,%ESI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV $0x404790,%EDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %RBX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 404240 <__cxa_throw@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV $0x10,%EDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
CALL 404530 <__cxa_allocate_exception@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV %RAX,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV $0x538083,%ESI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %RAX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 404110 <_ZNSt13runtime_errorC1EPKc@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV $0x59f7c0,%ESI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV $0x404790,%EDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %RBX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 404240 <__cxa_throw@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RAX,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV -0x38(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RCX),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
ADD $0x10,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP %RCX,%RDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 45a99e <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0xc1e>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV (%RCX),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
INC %RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 404070 <_ZdlPvm@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV -0xd0(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RCX),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
ADD $0x10,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP %RCX,%RDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JNE 45aa00 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0xc80>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
TEST %R15B,%R15B	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	N/A
JNE 45aac3 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0xd43>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
JMP 45aac3 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0xd43>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RAX,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV -0xd0(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RCX),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
ADD $0x10,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP %RCX,%RDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 45aac3 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0xd43>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV (%RCX),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
INC %RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 404070 <_ZdlPvm@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
JMP 45aac3 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0xd43>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RAX,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JMP 45aac3 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0xd43>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RAX,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RBX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 4047c0 <__cxa_free_exception@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
LEA -0x80(%RBP),%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CALL 51f7e0 <_ZN11qmcplusplus16BlasThreadingEnvD1Ev>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV %R14,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 404280 <_Unwind_Resume@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
JMP 45ab80 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0xe00>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XCHG %AX,%AX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
JMP 45ab80 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0xe00>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XCHG %AX,%AX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RAX,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LEA -0x80(%RBP),%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CALL 51f7e0 <_ZN11qmcplusplus16BlasThreadingEnvD1Ev>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV %R14,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 404280 <_Unwind_Resume@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run icx_4

Source file and lines	DiracMatrix.h:31-121
Module	exec

The function is defined in:

/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracMatrix.h:31-37,76-77,83-85,95-101,108-121
/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/ext/new_allocator.h:145
/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/basic_string.h:195,211,230,239-245
/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/std_abs.h:72
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/inner_product.hpp:210-212
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/BLAS.hpp:790,827
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Utilities/OpenMP.h:37-43
/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/stl_vector.h:353,919,939-942,1169,1758-1762,1794-1798
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsMatrix.h:77-78
/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/stl_uninitialized.h:687,1031
/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/alloc_traits.h:261
/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/vector.tcc:614-626,640,678-680
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:248-249
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/Mallocator.hpp:50-52,61,68-70,76-78

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is probably not vectorized. Only 13% of vector register length is used (average across all SSE/AVX instructions).

Details

Store and arithmetical SSE/AVX instructions are used in scalar version (process only one data element in vector registers).

Workaround

Read the "512-bits vectorization" report at "Potential" confidence level.

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

512-bits vectorization

Workaround

Recompile with -mprefer-vector-width=512

Masked instructions

Detected masked instructions.

Details

Vector registers are partially exploited, which is expected if your function is irregular or mixes elements of different sizes.

Workaround

If your function is irregular, try to remove or hoist conditional structures out of your function. If it mixes elements of different sizes, try to uniformize them.

CALL instructions

Detected function call instructions.

Details

_Unwind_Resume@plt: 2 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracMatrix.h:121
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracMatrix.h:121
__cxa_allocate_exception@plt: 2 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/Mallocator.hpp:69
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/Mallocator.hpp:77
__cxa_free_exception@plt: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/Mallocator.hpp:77
__cxa_throw@plt: 2 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/Mallocator.hpp:69
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/Mallocator.hpp:77
__intel_avx_rep_memcpy: 1 occurrences►
- /usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/alloc_traits.h:261
__intel_avx_rep_memset: 2 occurrences►
- /usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/alloc_traits.h:261
- /usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/alloc_traits.h:261
__kmpc_fork_call@plt: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Utilities/OpenMP.h:38
aligned_alloc@plt: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/Mallocator.hpp:61
dgetrf_@plt: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/BLAS.hpp:790
dgetri_@plt: 2 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/BLAS.hpp:827
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/BLAS.hpp:827
free@plt: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/Mallocator.hpp:78
operator delete(void*, unsigned long): 2 occurrences►
- /usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/ext/new_allocator.h:145
- /usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/ext/new_allocator.h:145
qmcplusplus::BlasThreadingEnv::BlasThreadingEnv(int): 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracMatrix.h:96
qmcplusplus::BlasThreadingEnv::~BlasThreadingEnv(): 3 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracMatrix.h:121
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracMatrix.h:121
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracMatrix.h:121
std::__cxx11::basic_string
, std::allocator
> std::operator+
, std::allocator
>(char const*, std::__cxx11::basic_string, std::allocator >&&): 1 occurrences►
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/Mallocator.hpp:69
std::__cxx11::to_string(unsigned long): 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/Mallocator.hpp:70
std::__throw_length_error(char const*): 1 occurrences►
- /usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/stl_vector.h:1759
std::runtime_error::runtime_error(char const*): 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/Mallocator.hpp:77
std::runtime_error::runtime_error(std::__cxx11::basic_string
, std::allocator
> const&): 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/Mallocator.hpp:69
std::vector
>::_M_default_append(unsigned long): 2 occurrences►
- /usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/stl_vector.h:940
- /usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/stl_vector.h:940

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

CMOVA: 1 occurrences►
- /usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/stl_vector.h:1761
VCVTTSD2SI: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracMatrix.h:83
VPMOVSXBQ: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/inner_product.hpp:212
VZEROUPPER: 6 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/Mallocator.hpp:61
- /usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/alloc_traits.h:261
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/BLAS.hpp:827
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/BLAS.hpp:790
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/BLAS.hpp:827
- /usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/stl_vector.h:1759

Conversion instructions

Detected expensive conversion instructions.

Details

CLTQ: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracMatrix.h:84
VCVTTSD2SI (FP64 to INT32/64, scalar): 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracMatrix.h:83
VPMOVSXBQ: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/inner_product.hpp:212

Workaround

Avoid mixing data with different types. In particular, check if the type of constants is the same as array elements.

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 624 bytes. The binary function is storing 316 bytes.

General properties

nb instructions	503
nb uops	541
loop length	2569
used x86 registers	16
used mmx registers	0
used xmm registers	5
used ymm registers	2
used zmm registers	0
nb stack references	23

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	90.17 cycles
front end	90.17 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11
uops	26.10	26.00	29.33	29.33	40.50	26.00	25.90	40.50	40.50	40.50	26.00	29.33
cycles	26.10	26.00	29.33	29.33	40.50	26.00	25.90	40.50	40.50	40.50	26.00	29.33

Execution ports to units layout:

P0 (256 bits): VPU, BRU, ALU, DIV/SQRT
P1 (256 bits): ALU, VPU
P2 (512 bits): load
P3 (512 bits): load
P4 (512 bits): store data
P5 (512 bits): ALU, VPU
P6: ALU, BRU
P7: store address
P8: store address
P9 (512 bits): store data
P10: ALU
P11 (512 bits): load

Cycles executing div or sqrt instructions

Cycles summary

Front-end	90.17
Dispatch	40.50
Overall L1	90.17

Vectorization ratios

INT

all	8%
load	10%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
other	16%

all	44%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	66%

INT+FP

all	11%
load	7%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	22%

Vector efficiency ratios

INT

all	12%
load	11%
store	11%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
other	14%

all	18%
load	12%
store	12%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	20%

INT+FP

all	13%
load	11%
store	11%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	14%

Cycles and memory resources usage

Detected masked instructions: assuming all mask elements are active. Assuming all data fit into the L1 cache, each call to the function takes 90.17 cycles. At this rate:

3% of peak load performance is reached (6.92 out of 192.00 bytes loaded per cycle (GB/s @ 1GHz))
2% of peak store performance is reached (3.50 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

ASM code

In the binary file, the address of the function is: 459d80

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
PUSH %R15	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R14	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R13	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R12	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %RBX	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
SUB $0xe8,%RSP	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV %R8,-0xe0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RCX,-0xd8(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RDX,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RSI,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RDI,-0x90(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOVL $0x1,-0x2c(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
LEA -0x2c(%RBP),%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV $0x5a1b90,%EDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV $0x455280,%EDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV $0x1,%ESI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CALL 4041e0 <__kmpc_fork_call@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV -0x2c(%RBP),%ESI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA -0x80(%RBP),%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CALL 51f7c0 <_ZN11qmcplusplus16BlasThreadingEnvC1Ei>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV (%R15),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %ECX,-0x2c(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOV 0x8(%R15),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,-0x88(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %EAX,-0x4c(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOV 0x30(%R15),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,-0x58(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
SAL $0x20,%RCX	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
JE 45a080 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x300>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %RCX,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x8(%RBX),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x30(%RBX),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
SAR $0x20,%RAX	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
CMP $0x1,%RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
ADC $-0x1,%RAX	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	1	0.50	N/A
MOV %RAX,-0x100(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
SHR $0x6,%RAX	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
MOV %RAX,-0xd0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
VPBROADCASTQ %RCX,%YMM0	1	0	0	0	0	0	1	0	0	0	0	0	0	3	1	scal (12.5%)
MOV %RCX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SAL $0x6,%RDI	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
MOV -0x88(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SAL $0x9,%RSI	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
MOV %RSI,-0x108(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
LEA (,%RAX,8),%R9	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RCX,-0x48(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
LEA (,%RCX,8),%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XOR %ESI,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VPMOVSXBQ 0xe06bc(%RIP),%YMM1	2	0	0	0.33	0.33	0	1	0	0	0	0	0	0.33	3	1	vect (6.3%)
MOV -0x58(%RBP),%R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RDI,-0x98(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JMP 459eae <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x12e>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0x90(%RBP),%R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA 0x30(%R13),%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RAX,-0x98(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV -0x88(%RBP),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
CMP %R8D,0x30(%R13)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (6.3%)
MOV -0x58(%RBP),%R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
JGE 45a3d5 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x655>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %RSP,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RSP,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD $-0x10,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RDI,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %RSP,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD $-0x10,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RDX,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %RSP,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD $-0x10,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RBX,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %RSP,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD $-0x10,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R15,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOVSXD %R8D,%R9	1	0	0.33	0	0	0	0.33	0	0	0	0	0.33	0	1	0.33	N/A
MOV 0x18(%R13),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x20(%R13),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RSI,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB %RCX,%RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
SAR $0x2,%RAX	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
CMP %RAX,%R9	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV %R9,-0x48(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JBE 45a280 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x500>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %RSP,%R11	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RSP,%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
ADD $-0x20,%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %R10,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %RSP,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD $-0x20,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RSI,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %R9,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB %RAX,%R12	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
JE 45a2fa <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x57a>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV 0x20(%R13),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x28(%R13),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RCX,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB %R8,%RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
SAR $0x2,%RAX	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
CMP %R12,%RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV %RDX,-0x70(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RDI,-0x68(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R14,-0x60(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R8,-0x78(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JAE 45a2c0 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x540>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %RCX,-0xa8(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R11,-0x40(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R10,-0x38(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RSI,-0xd0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x18(%R13),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,-0x100(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
SUB %RAX,%R8	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV %R8,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SAR $0x2,%R8	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	scal (12.5%)
MOV $0x1fffffffffffffff,%RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.28	N/A
MOV %R8,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
XOR %RAX,%RDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
CMP %R12,%RDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JB 45a880 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0xb00>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP %R12,%R8	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV %R12,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMOVA %R8,%R14	2	1	0	0	0	0	0	1	0	0	0	0	0	1-2	1	N/A
ADD %R8,%R14	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
CMP %RAX,%R14	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
CMOVAE %RAX,%R14	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	1	0.50	N/A
LEA (,%R14,4),%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RAX,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
AND $-0x40,%RSI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
ADD $0x40,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
TEST $0xf,%R14B	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	N/A
MOV %RAX,-0xa0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
CMOVE %RAX,%RSI	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	1	0.50	N/A
MOV $0x40,%EDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
VZEROUPPER	2	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 404820 <aligned_alloc@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
TEST %RAX,%RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (12.5%)
JE 45a8c0 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0xb40>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
LEA (%RAX,%R13,1),%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA (,%R12,4),%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RAX,-0xd0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RDI,-0x38(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
XOR %ESI,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CALL 534740 <__intel_avx_rep_memset>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV -0x100(%RBP),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP -0x78(%RBP),%RDI	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JE 45a226 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x4a6>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
ADD $-0x4,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
AND $-0x4,%R13	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
ADD $0x4,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV -0xd0(%RBP),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x100(%RBP),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %R13,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 532f70 <__intel_avx_rep_memcpy>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV -0x100(%RBP),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
TEST %RDI,%RDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (12.5%)
JE 45a23d <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x4bd>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP %RDI,-0xa8(%RBP)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JE 45a940 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0xbc0>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CALL 404480 <free@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV -0x90(%RBP),%R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0xd0(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RCX,0x18(%R13)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV -0x38(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%RAX,%R12,4),%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RAX,0x20(%R13)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
LEA (%RCX,%R14,4),%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RAX,0x28(%R13)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV -0x68(%RBP),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x70(%RBP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x88(%RBP),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV -0x60(%RBP),%R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x40(%RBP),%R11	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
JMP 45a2fa <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x57a>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
NOP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
JAE 45a305 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x585>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x48(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%RCX,%RAX,4),%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP %RAX,%RSI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 45a305 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x585>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %RAX,0x20(%R13)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JMP 45a305 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x585>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA (,%R12,4),%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R8,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
XOR %ESI,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R11,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
VZEROUPPER	2	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 534740 <__intel_avx_rep_memset>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV %R14,%R11	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV -0x88(%RBP),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV -0x70(%RBP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x60(%RBP),%R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x68(%RBP),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x78(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%RAX,%R12,4),%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RAX,0x20(%R13)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R11,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV 0x18(%R13),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x58(%RBP),%R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x98(%RBP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOVL $-0x1,(%R9)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOV %R8D,(%RDI)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOV %R8D,(%RDX)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
SUB $0x8,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %R12,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RBX,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
PUSH %R15	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
VZEROUPPER	2	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 4043c0 <dgetri_@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
ADD $0x10,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV -0x48(%RBP),%R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VCVTTSD2SI (%RBX),%EAX	2	1.50	0.50	0.33	0.33	0	0	0	0	0	0	0	0.33	7	1	scal (12.5%)
MOV %EAX,0x30(%R13)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
CLTQ	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.33	scal (12.5%)
MOV (%R13),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x8(%R13),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RCX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB %RDX,%RDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
SAR $0x3,%RDI	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
MOV %RAX,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB %RDI,%RSI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
JBE 45a380 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x600>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %R13,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 45abc0 <_ZNSt6vectorIdN11qmcplusplus10MallocatorIdLm64EEEE17_M_default_appendEm>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
JMP 45a38f <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x60f>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
JAE 45a38f <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x60f>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
LEA (%RDX,%RAX,8),%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP %RAX,%RCX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 45a38f <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x60f>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %RAX,0x8(%R13)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x78(%R13),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x80(%R13),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB %RCX,%RDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
SAR $0x3,%RDX	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
MOV %R15,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB %RDX,%RSI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
JBE 45a3c0 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x640>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
LEA 0x78(%R13),%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CALL 45abc0 <_ZNSt6vectorIdN11qmcplusplus10MallocatorIdLm64EEEE17_M_default_appendEm>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
JMP 45a3d2 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x652>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
JAE 45a3d2 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x652>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
LEA (%RCX,%R15,8),%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP %RCX,%RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 45a3d2 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x652>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %RCX,0x80(%R13)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R14,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV 0x18(%R13),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
LEA -0x2c(%RBP),%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA -0x4c(%RBP),%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA -0x7c(%RBP),%R9	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RDI,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R12,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
VZEROUPPER	2	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 4046a0 <dgetrf_@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOVSXD -0x2c(%RBP),%R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x78(%R13),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
TEST %R15,%R15	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (12.5%)
MOV %R15,-0x40(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JLE 45a578 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x7f8>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x4c(%RBP),%R11D	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA 0x1(%R11),%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
CMP $0x8,%R15D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
JB 45a526 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x7a6>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
LEA (,%R11,8),%ECX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
LEA 0x8(,%R11,8),%EDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
LEA (%R11,%R11,2),%ESI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
LEA 0x6(%RSI,%RSI,1),%ESI	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
SUB %R11D,%ECX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
ADD $0x7,%ECX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV -0x40(%RBP),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (,%RDI,8),%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
AND $-0x40,%RDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
LEA 0x5(%R11,%R11,4),%R8D	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
LEA 0x4(,%R11,4),%R9D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
LEA 0x3(%R11,%R11,2),%R10D	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
LEA 0x2(%R11,%R11,1),%R11D	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
XOR %R14D,%R14D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XOR %R15D,%R15D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0x58(%RBP),%R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0x40(%RBP),%R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %R15D,%ECX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
AND $0x7ffffff8,%ECX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
CMP %R15,%RCX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV -0x90(%RBP),%R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
JE 45a578 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x7f8>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %R15D,%EDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SHR $0x3,%EDX	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
AND $0xfffffff,%EDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
IMUL %EAX,%EDX	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
SAL $0x3,%EDX	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV 0x18(%R13),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
TEST %R15D,%R15D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (6.3%)
JE 45a5c0 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x840>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP $0x4,%R15	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV %RCX,-0x48(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JAE 45a600 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x880>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
VXORPD %XMM9,%XMM9,%XMM9	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
MOV $0x1,%R14D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
JMP 45a739 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0x9b9>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VXORPD %XMM9,%XMM9,%XMM9	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
VPXOR %XMM0,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
MOV -0xe0(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0xd8(%RBP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
JMP 45a7f9 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0xa79>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R15,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SHR $0x2,%RSI	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
VXORPD %XMM9,%XMM9,%XMM9	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
MOV $0x1,%R14D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV $0x2,%EDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0x40(%RBP),%R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %R15,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
AND $-0x4,%R12	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
CMP %R15,%R12	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 45a7c4 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0xa44>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %R15,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
NEG %R13	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
INC %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
VXORPD %XMM16,%XMM16,%XMM16	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
VMOVDDUP 0xddaa6(%RIP),%XMM17	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
TEST %R14D,%R14D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (6.3%)
SETG %AL	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	1	0.50	N/A
KMOVD %EAX,%K1	1	0	0	0	0	0	1	0	0	0	0	0	0	3	1	N/A
VPXOR %XMM1,%XMM1,%XMM1	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
VMOVSD 0xdfd46(%RIP),%XMM0	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMOVSD %XMM1,%XMM0,%XMM0{%K1}	1	0.33	0.33	0	0	0	0.33	0	0	0	0	0	0	1	0.33	scal (12.5%)
MOV -0xe0(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x90(%RBP),%R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0xd8(%RBP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x58(%RBP),%R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA -0x7c(%RBP),%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RSP,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
VMOVSD %XMM9,(%RDX)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
VMOVQ %XMM0,(%RAX)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV -0x4c(%RBP),%EAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%R13),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV %RSP,%R9	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LEA -0x10(%R9),%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RDI,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %RSP,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LEA -0x10(%RSI),%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RDX,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %R15D,-0x10(%R9)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOV %EAX,-0x10(%RSI)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
SUB $0x8,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %R12,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV -0x98(%RBP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
PUSH %R10	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
VZEROUPPER	2	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 4043c0 <dgetri_@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
ADD $0x10,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %RBX,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
LEA -0x80(%RBP),%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CALL 51f7e0 <_ZN11qmcplusplus16BlasThreadingEnvD1Ev>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
LEA -0x28(%RBP),%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
POP %RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %RBP	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
RET	1	0.50	0	0.33	0.33	0	0	0.50	0	0	0	0	0.33	0	2.13	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV $0x538542,%EDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
VZEROUPPER	2	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 404270 <_ZSt20__throw_length_errorPKc@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV $0x10,%EDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
CALL 404530 <__cxa_allocate_exception@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV %RAX,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV -0xd0(%RBP),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0xa0(%RBP),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CALL 411d80 <_ZNSt7__cxx119to_stringEm>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV $0x538047,%ESI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV -0x38(%RBP),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0xd0(%RBP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CALL 4112c0 <_ZStplIcSt11char_traitsIcESaIcEENSt7__cxx1112basic_stringIT_T0_T1_EEPKS5_OS8_>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV $0x1,%R15D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %RBX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV -0x38(%RBP),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CALL 404120 <_ZNSt13runtime_errorC1ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
XOR %R15D,%R15D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV $0x59f7c0,%ESI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV $0x404790,%EDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %RBX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 404240 <__cxa_throw@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV $0x10,%EDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
CALL 404530 <__cxa_allocate_exception@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV %RAX,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV $0x538083,%ESI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %RAX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 404110 <_ZNSt13runtime_errorC1EPKc@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV $0x59f7c0,%ESI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV $0x404790,%EDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %RBX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 404240 <__cxa_throw@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RAX,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV -0x38(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RCX),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
ADD $0x10,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP %RCX,%RDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 45a99e <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0xc1e>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV (%RCX),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
INC %RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 404070 <_ZdlPvm@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV -0xd0(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RCX),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
ADD $0x10,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP %RCX,%RDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JNE 45aa00 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0xc80>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
TEST %R15B,%R15B	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	N/A
JNE 45aac3 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0xd43>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
JMP 45aac3 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0xd43>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RAX,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV -0xd0(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RCX),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
ADD $0x10,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP %RCX,%RDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 45aac3 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0xd43>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV (%RCX),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
INC %RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 404070 <_ZdlPvm@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
JMP 45aac3 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0xd43>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RAX,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JMP 45aac3 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0xd43>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RAX,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RBX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 4047c0 <__cxa_free_exception@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
LEA -0x80(%RBP),%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CALL 51f7e0 <_ZN11qmcplusplus16BlasThreadingEnvD1Ev>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV %R14,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 404280 <_Unwind_Resume@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
JMP 45ab80 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0xe00>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XCHG %AX,%AX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
JMP 45ab80 <_ZN11qmcplusplus11DiracMatrixIddE16invert_transposeERKNS_6MatrixIdSaIdEEERS4_RdS8_+0xe00>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XCHG %AX,%AX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RAX,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LEA -0x80(%RBP),%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CALL 51f7e0 <_ZN11qmcplusplus16BlasThreadingEnvD1Ev>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV %R14,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 404280 <_Unwind_Resume@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A

Name	Coverage (%)	Time (s)
▼qmcplusplus::DiracMatrix::invert_transpose(qmcplusplus::Matrix > const&, qmcplusplus::Matrix >&, double&, double&)–	0.12	0.10
○Loop 1006 - DiracMatrix.h:112-113 - exec	0.00	0.00
○Loop 1004 - DiracMatrix.h:31-35 - exec	0.00	0.00
○Loop 1005 - DiracMatrix.h:112-113 - exec	0.00	0.00
○Loop 1003 - DiracMatrix.h:31-35 - exec	0.00	0.00
▼Loop 1009 - inner_product.hpp:210-212 - exec–	0.00	0.00
▼Loop 1010 - inner_product.hpp:210-212 - exec–	0.00	0.00
▼Loop 1011 - inner_product.hpp:211-212 - exec–	0.00	0.01
○Loop 1012 - inner_product.hpp:211-212 - exec	0.12	0.10
○Loop 1008 - inner_product.hpp:211-212 - exec	0.00	0.00
○Loop 1007 - Mallocator.hpp:69-69 - exec	0.00	0.00

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Code clean check

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Execution units bottlenecks

512-bits vectorization

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Masked instructions

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CALL instructions

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Complex instructions

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Conversion instructions

Details

Workaround

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code