OV - exec - Function miniqmcreference::TwoBodyJastrowRef<qmcplusplus::BsplineFunctor<double> >::evaluateRatios(qmcplusplus::VirtualParticleSet&, std::vector<double, std::allocator<double> >&)

	Function: miniqmcreference::TwoBodyJastrowRef<qmcplusplus::BsplineFunctor<double> >::evaluateRatios( ...	Module: exec	Source: TwoBodyJastrowRef.h:106-132 [...]	Coverage (incl. loops): 2.06% \| (excl. loops): 0.00%

/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/optional: 950 - 952

--------------------------------------------------------------------------------

950: 	if (this->_M_is_engaged())

951: 	  return this->_M_get();

952: 	__throw_bad_optional_access();

/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/shared_ptr_base.h: 1296 - 1296

--------------------------------------------------------------------------------

1296:       { return _M_ptr; }

/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/stl_vector.h: 919 - 1169

--------------------------------------------------------------------------------

919:       { return size_type(this->_M_impl._M_finish - this->_M_impl._M_start); }

[...]

1046: 	return *(this->_M_impl._M_start + __n);

[...]

1064: 	return *(this->_M_impl._M_start + __n);

[...]

1169:       { return _M_data_ptr(this->_M_impl._M_start); }

/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/refwrap.h: 338 - 338

--------------------------------------------------------------------------------

338:       { return *_M_data; }

/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h: 236 - 260

--------------------------------------------------------------------------------

236:   for (int jat = 0; jat < iLimit; jat++)

237:   {

238:     real_type r = distArray[jat];

239:     // pick the distances smaller than the cutoff and avoid the reference atom

240:     if (r < cutoff_radius && iStart + jat != iat)

241:       distArrayCompressed[iCount++] = distArray[jat];

242:   }

243:

244:   real_type d = 0.0;

245:   //#pragma omp simd reduction(+:d)

246:   for (int jat = 0; jat < iCount; jat++)

247:   {

248:     real_type r = distArrayCompressed[jat];

249:     r *= DeltaRInv;

250:     int i         = (int)r;

251:     real_type t   = r - real_type(i);

252:     real_type tp0 = t * t * t;

253:     real_type tp1 = t * t;

254:     real_type tp2 = t;

255:

256:     real_type d1 = SplineCoefs[i + 0] * (A[0] * tp0 + A[1] * tp1 + A[2] * tp2 + A[3]);

257:     real_type d2 = SplineCoefs[i + 1] * (A[4] * tp0 + A[5] * tp1 + A[6] * tp2 + A[7]);

258:     real_type d3 = SplineCoefs[i + 2] * (A[8] * tp0 + A[9] * tp1 + A[10] * tp2 + A[11]);

259:     real_type d4 = SplineCoefs[i + 3] * (A[12] * tp0 + A[13] * tp1 + A[14] * tp2 + A[15]);

260:     d += (d1 + d2 + d3 + d4);

/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/TwoBodyJastrowRef.h: 106 - 132

--------------------------------------------------------------------------------

106:   {

107:     for (int k = 0; k < ratios.size(); ++k)

108:       ratios[k] = std::exp(Uat[VP.refPtcl] - computeU(VP.getRefPS(), VP.refPtcl, VP.getDistTableAB(myTableID).getDistRow(k).data()));

109:   }

[...]

126:     const int igt = P.GroupID[iat] * NumGroups;

127:     for (int jg = 0; jg < NumGroups; ++jg)

128:     {

129:       const FuncType& f2(*F[igt + jg]);

130:       int iStart = P.first(jg);

131:       int iEnd   = P.last(jg);

132:       curUat += f2.evaluateV(iat, iStart, iEnd, dist, DistCompressed.data());

/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h: 223 - 249

--------------------------------------------------------------------------------

223:     return X[i];

[...]

229:     return X[i];

[...]

249:   inline const_pointer data() const { return X; }

/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Particle/ParticleSet.h: 313 - 316

--------------------------------------------------------------------------------

313:   inline int first(int igroup) const { return (*group_offsets_)[igroup]; }

314:

315:   ///return the last index of a group i

316:   inline int last(int igroup) const { return (*group_offsets_)[igroup + 1]; }

0x42c000 PUSH	%RBP

0x42c001 MOV	%RSP,%RBP

0x42c004 PUSH	%R15

0x42c006 PUSH	%R14

0x42c008 PUSH	%R13

0x42c00a PUSH	%R12

0x42c00c PUSH	%RBX

0x42c00d AND	$-0x20,%RSP

0x42c011 SUB	$0x160,%RSP

0x42c018 MOV	0x8(%RDX),%RAX

0x42c01c MOV	%RDX,0x48(%RSP)

0x42c021 CMP	(%RDX),%RAX

0x42c024 JE	42c9c0

0x42c02a MOV	%RDI,%R14

0x42c02d MOV	%RSI,%RDI

0x42c030 MOVQ	$0,0x18(%RSP)

0x42c039 VBROADCASTI128	0x10c28e(%RIP),%YMM0

0x42c042 VMOVDQU	%YMM0,0x120(%RSP)

0x42c04b MOV	%R14,0x38(%RSP)

0x42c050 MOV	%RSI,0x40(%RSP)

0x42c055 JMP	42c0ce

0x42c057 NOPW	%CS:(%RAX,%RAX,1)

0x42c066 NOPW	%CS:(%RAX,%RAX,1)

0x42c075 NOPW	%CS:(%RAX,%RAX,1)

(405) 0x42c080 VXORPD	%XMM0,%XMM0,%XMM0

(405) 0x42c084 VMOVSD	0x50(%RSP),%XMM1

(405) 0x42c08a VSUBSD	%XMM0,%XMM1,%XMM0

(405) 0x42c08e VZEROUPPER

(405) 0x42c091 CALL	51f890 <exp>

(405) 0x42c096 MOV	0x48(%RSP),%RCX

(405) 0x42c09b MOV	(%RCX),%RAX

(405) 0x42c09e MOV	0x18(%RSP),%RDX

(405) 0x42c0a3 VMOVSD	%XMM0,(%RAX,%RDX,8)

(405) 0x42c0a8 INC	%RDX

(405) 0x42c0ab MOV	0x8(%RCX),%RCX

(405) 0x42c0af SUB	%RAX,%RCX

(405) 0x42c0b2 SAR	$0x3,%RCX

(405) 0x42c0b6 MOV	%RDX,0x18(%RSP)

(405) 0x42c0bb CMP	%RDX,%RCX

(405) 0x42c0be MOV	0x40(%RSP),%RDI

(405) 0x42c0c3 MOV	0x38(%RSP),%R14

(405) 0x42c0c8 JBE	42c9c0

(405) 0x42c0ce CMPB	$0,0x298(%RDI)

(405) 0x42c0d5 JE	42ca00

(405) 0x42c0db MOVSXD	0x2a0(%RDI),%R12

(405) 0x42c0e2 MOV	0xd8(%R14),%RAX

(405) 0x42c0e9 VMOVQ	(%RAX,%R12,8),%XMM0

(405) 0x42c0ef VMOVQ	%XMM0,0x50(%RSP)

(405) 0x42c0f5 MOV	0x290(%RDI),%RBX

(405) 0x42c0fc MOV	0x248(%R14),%ESI

(405) 0x42c103 VZEROUPPER

(405) 0x42c106 CALL	4795d0 <_ZNK11qmcplusplus11ParticleSet14getDistTableABEi>

(405) 0x42c10b MOV	0xa0(%R14),%RCX

(405) 0x42c112 TEST	%RCX,%RCX

(405) 0x42c115 JE	42c080

(405) 0x42c11b MOV	0x48(%RAX),%RAX

(405) 0x42c11f MOV	0x18(%RSP),%RDX

(405) 0x42c124 LEA	(%RDX,%RDX,4),%RDX

(405) 0x42c128 MOV	0x18(%RAX,%RDX,8),%R8

(405) 0x42c12d MOV	0x18(%RBX),%RDX

(405) 0x42c131 MOV	(%RDX,%R12,4),%ESI

(405) 0x42c135 IMUL	%ECX,%ESI

(405) 0x42c138 MOV	0x1d0(%R14),%RDX

(405) 0x42c13f MOV	0x200(%R14),%R13

(405) 0x42c146 MOVSXD	%ESI,%RAX

(405) 0x42c149 MOV	%RAX,0x70(%RSP)

(405) 0x42c14e MOV	0x268(%RBX),%RAX

(405) 0x42c155 MOV	%RAX,0x78(%RSP)

(405) 0x42c15a DEC	%RCX

(405) 0x42c15d VPBROADCASTD	%R12D,%YMM1

(405) 0x42c163 VPXOR	%XMM0,%XMM0,%XMM0

(405) 0x42c167 XOR	%R9D,%R9D

(405) 0x42c16a VPMOVSXBD	0x10c07d(%RIP),%YMM11

(405) 0x42c173 VPMOVSXBD	0x10c06c(%RIP),%YMM12

(405) 0x42c17c VMOVUPD	0x120(%RSP),%YMM13

(405) 0x42c185 MOV	%RCX,0x68(%RSP)

(405) 0x42c18a MOV	%R8,0x60(%RSP)

(405) 0x42c18f MOV	%R13,0x58(%RSP)

(405) 0x42c194 JMP	42c1d3

0x42c196 NOPW	%CS:(%RAX,%RAX,1)

0x42c1a5 NOPW	%CS:(%RAX,%RAX,1)

0x42c1b4 NOPW	%CS:(%RAX,%RAX,1)

  (406) 0x42c1c0 VADDSD	%XMM0,%XMM19,%XMM0

  (406) 0x42c1c6 CMP	%RCX,%R9

  (406) 0x42c1c9 LEA	0x1(%R9),%R9

  (406) 0x42c1cd JE	42c084

  (406) 0x42c1d3 MOV	0x78(%RSP),%RAX

  (406) 0x42c1d8 MOV	0x18(%RAX),%RSI

  (406) 0x42c1dc MOVSXD	(%RSI,%R9,4),%R14

  (406) 0x42c1e0 MOV	0x4(%RSI,%R9,4),%ESI

  (406) 0x42c1e5 SUB	%R14D,%ESI

  (406) 0x42c1e8 VXORPD	%XMM19,%XMM19,%XMM19

  (406) 0x42c1ee TEST	%ESI,%ESI

  (406) 0x42c1f0 JLE	42c1c0

  (406) 0x42c1f2 MOV	0x70(%RSP),%RAX

  (406) 0x42c1f7 LEA	(%R9,%RAX,1),%RDI

  (406) 0x42c1fb MOV	(%R13,%RDI,8),%R10

  (406) 0x42c200 VMOVSD	0x8(%R10),%XMM2

  (406) 0x42c206 MOV	%ESI,%R15D

  (406) 0x42c209 MOV	%R15,%RBX

  (406) 0x42c20c AND	$0x7ffffff0,%RBX

  (406) 0x42c213 JE	42c240

  (406) 0x42c215 CMP	$0x7,%ESI

  (406) 0x42c218 JA	42c280

  (406) 0x42c21a XOR	%R11D,%R11D

  (406) 0x42c21d XOR	%EBX,%EBX

  (406) 0x42c21f JMP	42c3e0

0x42c224 NOPW	%CS:(%RAX,%RAX,1)

0x42c233 NOPW	%CS:(%RAX,%RAX,1)

  (406) 0x42c240 XOR	%R11D,%R11D

  (406) 0x42c243 XOR	%EBX,%EBX

  (406) 0x42c245 JMP	42c3c8

0x42c24a NOPW	%CS:(%RAX,%RAX,1)

0x42c259 NOPW	%CS:(%RAX,%RAX,1)

0x42c268 NOPW	%CS:(%RAX,%RAX,1)

0x42c277 NOPW	(%RAX,%RAX,1)

  (406) 0x42c280 MOV	%R12,%RCX

  (406) 0x42c283 VBROADCASTSD	%XMM2,%YMM3

  (406) 0x42c288 MOV	%R14D,%R12D

  (406) 0x42c28b LEA	(%R8,%R14,8),%R13

  (406) 0x42c28f XOR	%R11D,%R11D

  (406) 0x42c292 XOR	%ESI,%ESI

  (406) 0x42c294 NOPW	%CS:(%RAX,%RAX,1)

    (410) 0x42c2a0 VMOVUPD	(%R13,%RSI,8),%YMM4

    (410) 0x42c2a7 VMOVUPD	0x20(%R13,%RSI,8),%YMM5

    (410) 0x42c2ae VMOVUPD	0x40(%R13,%RSI,8),%YMM6

    (410) 0x42c2b5 VMOVUPD	0x60(%R13,%RSI,8),%YMM7

    (410) 0x42c2bc LEA	(%R12,%RSI,1),%EDI

    (410) 0x42c2c0 VPBROADCASTD	%EDI,%YMM8

    (410) 0x42c2c6 VPADDD	%YMM12,%YMM8,%YMM9

    (410) 0x42c2cb VPADDD	%YMM11,%YMM8,%YMM8

    (410) 0x42c2d0 VPCMPNEQD	%YMM1,%YMM8,%K0

    (410) 0x42c2d7 VPCMPNEQD	%YMM1,%YMM9,%K2

    (410) 0x42c2de VCMPPD	$0x1,%YMM3,%YMM4,%K5

    (410) 0x42c2e5 VCMPPD	$0x1,%YMM3,%YMM5,%K1

    (410) 0x42c2ec KMOVW	%K1,0x20(%RSP)

    (410) 0x42c2f2 KSHIFTLB	$0x4,%K1,%K3

    (410) 0x42c2f8 KORB	%K3,%K5,%K3

    (410) 0x42c2fc VCMPPD	$0x1,%YMM3,%YMM6,%K6

    (410) 0x42c303 VCMPPD	$0x1,%YMM3,%YMM7,%K4

    (410) 0x42c30a MOVSXD	%R11D,%R11

    (410) 0x42c30d LEA	(%RDX,%R11,8),%RDI

    (410) 0x42c311 KANDB	%K0,%K3,%K7

    (410) 0x42c315 KMOVB	%K7,%EAX

    (410) 0x42c319 KANDW	%K2,%K6,%K7

    (410) 0x42c31d POPCNT	%EAX,%EAX

    (410) 0x42c321 VCOMPRESSPD	%YMM6,(%RDI,%RAX,8){%K7}

    (410) 0x42c328 KANDW	%K0,%K5,%K5

    (410) 0x42c32c VCOMPRESSPD	%YMM4,(%RDX,%R11,8){%K5}

    (410) 0x42c333 KSHIFTLB	$0x4,%K4,%K1

    (410) 0x42c339 KORB	%K1,%K6,%K1

    (410) 0x42c33d KMOVB	%K7,0x16(%RSP)

    (410) 0x42c343 KSHIFTRB	$0x4,%K2,%K6

    (410) 0x42c349 KANDW	%K6,%K4,%K4

    (410) 0x42c34d LEA	(%RDI,%RAX,8),%RAX

    (410) 0x42c351 MOVZX	0x16(%RSP),%R8D

    (410) 0x42c357 POPCNT	%R8D,%R8D

    (410) 0x42c35c VCOMPRESSPD	%YMM7,(%RAX,%R8,8){%K4}

    (410) 0x42c363 KUNPCKBW	%K3,%K1,%K1

    (410) 0x42c367 KMOVB	%K5,0x17(%RSP)

    (410) 0x42c36d KUNPCKBW	%K0,%K2,%K2

    (410) 0x42c371 KSHIFTRB	$0x4,%K0,%K0

    (410) 0x42c377 KMOVW	0x20(%RSP),%K3

    (410) 0x42c37d KANDW	%K0,%K3,%K3

    (410) 0x42c381 MOVZX	0x17(%RSP),%EAX

    (410) 0x42c386 POPCNT	%EAX,%EAX

    (410) 0x42c38a VCOMPRESSPD	%YMM5,(%RDI,%RAX,8){%K3}

    (410) 0x42c391 KANDW	%K2,%K1,%K0

    (410) 0x42c395 KMOVW	%K0,%EAX

    (410) 0x42c399 POPCNT	%EAX,%EAX

    (410) 0x42c39d ADD	%EAX,%R11D

    (410) 0x42c3a0 ADD	$0x10,%RSI

    (410) 0x42c3a4 CMP	%RBX,%RSI

    (410) 0x42c3a7 JB	42c2a0

  (406) 0x42c3ad CMP	%R15D,%EBX

  (406) 0x42c3b0 MOV	%RCX,%R12

  (406) 0x42c3b3 MOV	0x68(%RSP),%RCX

  (406) 0x42c3b8 MOV	0x60(%RSP),%R8

  (406) 0x42c3bd MOV	0x58(%RSP),%R13

  (406) 0x42c3c2 JE	42c617

  (406) 0x42c3c8 VMOVQ	%R15,%XMM4

  (406) 0x42c3cd VMOVD	%EBX,%XMM3

  (406) 0x42c3d1 VPSUBQ	%YMM3,%YMM4,%YMM4

  (406) 0x42c3d5 VMOVQ	%XMM4,%RSI

  (406) 0x42c3da CMP	$0x8,%RSI

  (406) 0x42c3de JAE	42c440

  (406) 0x42c3e0 MOV	%R12D,%ESI

  (406) 0x42c3e3 SUB	%R14D,%ESI

  (406) 0x42c3e6 LEA	(%R8,%R14,8),%RDI

  (406) 0x42c3ea JMP	42c40c

0x42c3ec NOPW	%CS:(%RAX,%RAX,1)

0x42c3fb NOPL	(%RAX,%RAX,1)

    (409) 0x42c400 INC	%RBX

    (409) 0x42c403 CMP	%RBX,%R15

    (409) 0x42c406 JE	42c617

    (409) 0x42c40c VMOVSD	(%RDI,%RBX,8),%XMM3

    (409) 0x42c411 VUCOMISD	%XMM3,%XMM2

    (409) 0x42c415 JBE	42c400

    (409) 0x42c417 CMP	%EBX,%ESI

    (409) 0x42c419 JE	42c400

    (409) 0x42c41b MOVSXD	%R11D,%R11

    (409) 0x42c41e VMOVSD	%XMM3,(%RDX,%R11,8)

    (409) 0x42c424 INC	%R11D

    (409) 0x42c427 JMP	42c400

0x42c429 NOPW	%CS:(%RAX,%RAX,1)

0x42c438 NOPL	(%RAX,%RAX,1)

  (406) 0x42c440 VPBROADCASTQ	%XMM4,%YMM4

  (406) 0x42c445 VPCMPNLEUQ	0x10bf30(%RIP),%YMM4,%K1

  (406) 0x42c450 VPCMPNLEUQ	0x10bf45(%RIP),%YMM4,%K4

  (406) 0x42c45b VPCMPNLEUQ	0x10bf5a(%RIP),%YMM4,%K5

  (406) 0x42c466 VPCMPNLEUQ	0x10bf6f(%RIP),%YMM4,%K6

  (406) 0x42c471 KORB	%K6,%K5,%K0

  (406) 0x42c475 KORB	%K4,%K1,%K2

  (406) 0x42c479 KORTESTB	%K0,%K2

  (406) 0x42c47d JE	42c600

  (406) 0x42c483 KSHIFTLB	$0x4,%K4,%K0

  (406) 0x42c489 KORB	%K0,%K1,%K3

  (406) 0x42c48d KSHIFTLB	$0x4,%K6,%K0

  (406) 0x42c493 KORB	%K0,%K5,%K2

  (406) 0x42c497 ADD	%R14,%RBX

  (406) 0x42c49a VMOVUPD	0x60(%R8,%RBX,8),%YMM4{%K6}{z}

  (406) 0x42c4a2 VMOVUPD	0x40(%R8,%RBX,8),%YMM5{%K5}{z}

  (406) 0x42c4aa VMOVUPD	0x20(%R8,%RBX,8),%YMM6{%K4}{z}

  (406) 0x42c4b2 VMOVUPD	(%R8,%RBX,8),%YMM7{%K1}{z}

  (406) 0x42c4b9 KUNPCKBW	%K3,%K2,%K0

  (406) 0x42c4bd KMOVW	%K0,0x20(%RSP)

  (406) 0x42c4c3 VPBROADCASTD	%R14D,%YMM8

  (406) 0x42c4c9 VPMOVQD	%YMM3,%XMM3

  (406) 0x42c4cf VPBROADCASTD	%XMM3,%YMM3

  (406) 0x42c4d4 VPOR	%YMM3,%YMM11,%YMM9

  (406) 0x42c4d8 VPOR	%YMM3,%YMM12,%YMM3

  (406) 0x42c4dc VPADDD	%YMM3,%YMM8,%YMM3

  (406) 0x42c4e0 VPADDD	%YMM9,%YMM8,%YMM8

  (406) 0x42c4e5 VPCMPNEQD	%YMM1,%YMM8,%K6

  (406) 0x42c4ec VBROADCASTSD	%XMM2,%YMM2

  (406) 0x42c4f1 VCMPPD	$0x1,%YMM2,%YMM7,%K4

  (406) 0x42c4f8 VCMPPD	$0x1,%YMM2,%YMM6,%K5

  (406) 0x42c4ff KSHIFTLB	$0x4,%K5,%K5

  (406) 0x42c505 KORB	%K5,%K4,%K4

  (406) 0x42c509 VCMPPD	$0x1,%YMM2,%YMM5,%K5

  (406) 0x42c510 VCMPPD	$0x1,%YMM2,%YMM4,%K7

  (406) 0x42c517 KSHIFTLB	$0x4,%K7,%K7

  (406) 0x42c51d KORB	%K7,%K5,%K5

  (406) 0x42c521 VPCMPNEQD	%YMM1,%YMM3,%K7

  (406) 0x42c528 KANDB	%K6,%K3,%K0

  (406) 0x42c52c KUNPCKBW	%K6,%K7,%K3

  (406) 0x42c530 KANDB	%K7,%K2,%K2

  (406) 0x42c534 MOVSXD	%R11D,%RAX

  (406) 0x42c537 LEA	(%RDX,%RAX,8),%RSI

  (406) 0x42c53b KANDB	%K4,%K0,%K7

  (406) 0x42c53f VCOMPRESSPD	%YMM7,(%RDX,%RAX,8){%K7}

  (406) 0x42c546 KANDB	%K5,%K2,%K6

  (406) 0x42c54a KMOVB	%K7,%EAX

  (406) 0x42c54e POPCNT	%EAX,%EAX

  (406) 0x42c552 VCOMPRESSPD	%YMM5,(%RSI,%RAX,8){%K6}

  (406) 0x42c559 KUNPCKBW	%K4,%K5,%K2

  (406) 0x42c55d KSHIFTLB	$0x4,%K7,%K0

  (406) 0x42c563 KSHIFTRB	$0x4,%K0,%K0

  (406) 0x42c569 KMOVB	%K0,0x15(%RSP)

  (406) 0x42c56f KSHIFTRB	$0x4,%K7,%K4

  (406) 0x42c575 MOVZX	0x15(%RSP),%EDI

  (406) 0x42c57a POPCNT	%EDI,%EDI

  (406) 0x42c57e VCOMPRESSPD	%YMM6,(%RSI,%RDI,8){%K4}

  (406) 0x42c585 KSHIFTLB	$0x4,%K6,%K0

  (406) 0x42c58b KSHIFTRB	$0x4,%K0,%K0

  (406) 0x42c591 KMOVB	%K0,0x14(%RSP)

  (406) 0x42c597 LEA	(%RSI,%RAX,8),%RAX

  (406) 0x42c59b KSHIFTRB	$0x4,%K6,%K4

  (406) 0x42c5a1 MOVZX	0x14(%RSP),%ESI

  (406) 0x42c5a6 POPCNT	%ESI,%ESI

  (406) 0x42c5aa VCOMPRESSPD	%YMM4,(%RAX,%RSI,8){%K4}

  (406) 0x42c5b1 KMOVW	0x20(%RSP),%K4

  (406) 0x42c5b7 KANDW	%K3,%K4,%K0

  (406) 0x42c5bb KANDW	%K0,%K4,%K0

  (406) 0x42c5bf KANDW	%K2,%K0,%K0

  (406) 0x42c5c3 KMOVW	%K0,%EAX

  (406) 0x42c5c7 POPCNT	%EAX,%ESI

  (406) 0x42c5cb ADD	%R11D,%ESI

  (406) 0x42c5ce JMP	42c602

0x42c5d0 NOPW	%CS:(%RAX,%RAX,1)

0x42c5df NOPW	%CS:(%RAX,%RAX,1)

0x42c5ee NOPW	%CS:(%RAX,%RAX,1)

0x42c5fd NOPL	(%RAX)

  (406) 0x42c600 XOR	%ESI,%ESI

  (406) 0x42c602 VMOVD	%R11D,%XMM2

  (406) 0x42c607 VMOVD	%ESI,%XMM3

  (406) 0x42c60b VINSERTI32X4	$0,%XMM3,%YMM0,%YMM2{%K1}

  (406) 0x42c612 VMOVD	%XMM2,%R11D

  (406) 0x42c617 VXORPD	%XMM19,%XMM19,%XMM19

  (406) 0x42c61d TEST	%R11D,%R11D

  (406) 0x42c620 JLE	42c1c0

  (406) 0x42c626 VMOVSD	0x238(%R10),%XMM2

  (406) 0x42c62f MOV	0x218(%R10),%RBX

  (406) 0x42c636 VMOVSD	0x18(%R10),%XMM4

  (406) 0x42c63c VMOVSD	0x20(%R10),%XMM5

  (406) 0x42c642 VMOVSD	0x28(%R10),%XMM6

  (406) 0x42c648 VMOVSD	0x30(%R10),%XMM7

  (406) 0x42c64e VMOVSD	0x38(%R10),%XMM10

  (406) 0x42c654 VMOVSD	0x40(%R10),%XMM25

  (406) 0x42c65b VMOVSD	0x48(%R10),%XMM9

  (406) 0x42c661 VMOVSD	0x50(%R10),%XMM8

  (406) 0x42c667 VMOVSD	0x58(%R10),%XMM16

  (406) 0x42c66e VMOVSD	0x60(%R10),%XMM14

  (406) 0x42c674 VMOVSD	0x68(%R10),%XMM30

  (406) 0x42c67b VMOVSD	0x70(%R10),%XMM31

  (406) 0x42c682 VMOVSD	0x78(%R10),%XMM17

  (406) 0x42c689 VMOVSD	0x80(%R10),%XMM18

  (406) 0x42c690 VMOVSD	0x88(%R10),%XMM15

  (406) 0x42c699 VMOVSD	0x90(%R10),%XMM20

  (406) 0x42c6a0 MOV	%R11D,%R10D

  (406) 0x42c6a3 MOV	%R10,%R11

  (406) 0x42c6a6 AND	$0x7ffffffc,%R11

  (406) 0x42c6ad JE	42c900

  (406) 0x42c6b3 VBROADCASTSD	%XMM2,%YMM19

  (406) 0x42c6b9 VMOVUPD	%XMM4,0xd0(%RSP)

  (406) 0x42c6c2 VMOVAPD	%XMM20,%XMM11

  (406) 0x42c6c8 VBROADCASTSD	%XMM4,%YMM20

  (406) 0x42c6ce VMOVUPD	%XMM5,0xf0(%RSP)

  (406) 0x42c6d7 VBROADCASTSD	%XMM5,%YMM21

  (406) 0x42c6dd VMOVUPD	%XMM6,0x110(%RSP)

  (406) 0x42c6e6 VBROADCASTSD	%XMM6,%YMM22

  (406) 0x42c6ec VMOVUPD	%XMM7,0x20(%RSP)

  (406) 0x42c6f2 VBROADCASTSD	%XMM7,%YMM23

  (406) 0x42c6f8 VMOVUPD	%XMM10,0xc0(%RSP)

  (406) 0x42c701 VBROADCASTSD	%XMM10,%YMM24

  (406) 0x42c707 VMOVUPD	%XMM25,0x80(%RSP)

  (406) 0x42c70f VBROADCASTSD	%XMM25,%YMM25

  (406) 0x42c715 VMOVUPD	%XMM9,0xe0(%RSP)

  (406) 0x42c71e VBROADCASTSD	%XMM9,%YMM26

  (406) 0x42c724 VMOVUPD	%XMM8,0x100(%RSP)

  (406) 0x42c72d VBROADCASTSD	%XMM8,%YMM27

  (406) 0x42c733 VBROADCASTSD	%XMM16,%YMM28

  (406) 0x42c739 VBROADCASTSD	%XMM14,%YMM29

  (406) 0x42c73f VMOVUPD	%XMM30,0xa0(%RSP)

  (406) 0x42c747 VBROADCASTSD	%XMM30,%YMM30

  (406) 0x42c74d VMOVUPD	%XMM31,0xb0(%RSP)

  (406) 0x42c755 VBROADCASTSD	%XMM31,%YMM31

  (406) 0x42c75b VBROADCASTSD	%XMM17,%YMM3

  (406) 0x42c761 VBROADCASTSD	%XMM18,%YMM4

  (406) 0x42c767 VBROADCASTSD	%XMM15,%YMM5

  (406) 0x42c76c VMOVUPD	%XMM11,0x90(%RSP)

  (406) 0x42c775 VBROADCASTSD	%XMM11,%YMM6

  (406) 0x42c77a VXORPD	%XMM7,%XMM7,%XMM7

  (406) 0x42c77e XOR	%ESI,%ESI

    (408) 0x42c780 VMULPD	(%RDX,%RSI,8),%YMM19,%YMM8

    (408) 0x42c787 VCVTTPD2DQ	%YMM8,%XMM9

    (408) 0x42c78c VROUNDPD	$0xb,%YMM8,%YMM10

    (408) 0x42c792 VSUBPD	%YMM10,%YMM8,%YMM8

    (408) 0x42c797 VMULPD	%YMM8,%YMM8,%YMM12

    (408) 0x42c79c VMULPD	%YMM8,%YMM12,%YMM11

    (408) 0x42c7a1 VMOVAPD	%YMM12,%YMM10

    (408) 0x42c7a6 VFMADD213PD	%YMM23,%YMM21,%YMM10

    (408) 0x42c7ac VFMADD231PD	%YMM20,%YMM11,%YMM10

    (408) 0x42c7b2 VFMADD231PD	%YMM8,%YMM22,%YMM10

    (408) 0x42c7b8 KXNORW	%K0,%K0,%K1

    (408) 0x42c7bc VXORPD	%XMM13,%XMM13,%XMM13

    (408) 0x42c7c1 VGATHERDPD	(%RBX,%XMM9,8),%YMM13{%K1}

    (408) 0x42c7c8 VFMADD213PD	%YMM7,%YMM10,%YMM13

    (408) 0x42c7cd VMOVAPD	%YMM11,%YMM7

    (408) 0x42c7d1 VFMADD213PD	%YMM27,%YMM24,%YMM7

    (408) 0x42c7d7 VFMADD231PD	%YMM12,%YMM25,%YMM7

    (408) 0x42c7dd KXNORW	%K0,%K0,%K1

    (408) 0x42c7e1 VXORPD	%XMM10,%XMM10,%XMM10

    (408) 0x42c7e6 VGATHERDPD	0x8(%RBX,%XMM9,8),%YMM10{%K1}

    (408) 0x42c7ee VFMADD231PD	%YMM8,%YMM26,%YMM7

    (408) 0x42c7f4 VFMADD213PD	%YMM13,%YMM7,%YMM10

    (408) 0x42c7f9 VMOVAPD	%YMM11,%YMM7

    (408) 0x42c7fd VFMADD213PD	%YMM31,%YMM28,%YMM7

    (408) 0x42c803 KXNORW	%K0,%K0,%K1

    (408) 0x42c807 VXORPD	%XMM13,%XMM13,%XMM13

    (408) 0x42c80c VGATHERDPD	0x10(%RBX,%XMM9,8),%YMM13{%K1}

    (408) 0x42c814 VFMADD231PD	%YMM12,%YMM29,%YMM7

    (408) 0x42c81a VFMADD231PD	%YMM8,%YMM30,%YMM7

    (408) 0x42c820 VFMADD213PD	%YMM10,%YMM7,%YMM13

    (408) 0x42c825 KXNORW	%K0,%K0,%K1

    (408) 0x42c829 VXORPD	%XMM7,%XMM7,%XMM7

    (408) 0x42c82d VGATHERDPD	0x18(%RBX,%XMM9,8),%YMM7{%K1}

    (408) 0x42c835 VFMADD213PD	%YMM6,%YMM3,%YMM11

    (408) 0x42c83a VFMADD231PD	%YMM12,%YMM4,%YMM11

    (408) 0x42c83f VFMADD231PD	%YMM8,%YMM5,%YMM11

    (408) 0x42c844 VFMADD213PD	%YMM13,%YMM11,%YMM7

    (408) 0x42c849 ADD	$0x4,%RSI

    (408) 0x42c84d CMP	%R11,%RSI

    (408) 0x42c850 JB	42c780

  (406) 0x42c856 VEXTRACTF128	$0x1,%YMM7,%XMM3

  (406) 0x42c85c VADDPD	%XMM3,%XMM7,%XMM3

  (406) 0x42c860 VSHUFPD	$0x1,%XMM3,%XMM3,%XMM4

  (406) 0x42c865 VADDSD	%XMM4,%XMM3,%XMM19

  (406) 0x42c86b CMP	%R10D,%R11D

  (406) 0x42c86e VPMOVSXBD	0x10b979(%RIP),%YMM11

  (406) 0x42c877 VPMOVSXBD	0x10b968(%RIP),%YMM12

  (406) 0x42c880 VMOVUPD	0x120(%RSP),%YMM13

  (406) 0x42c889 VMOVUPD	0x20(%RSP),%XMM7

  (406) 0x42c88f VMOVUPD	0x110(%RSP),%XMM6

  (406) 0x42c898 VMOVUPD	0x100(%RSP),%XMM8

  (406) 0x42c8a1 VMOVUPD	0xf0(%RSP),%XMM5

  (406) 0x42c8aa VMOVUPD	0xe0(%RSP),%XMM9

  (406) 0x42c8b3 VMOVUPD	0xd0(%RSP),%XMM4

  (406) 0x42c8bc VMOVUPD	0xc0(%RSP),%XMM10

  (406) 0x42c8c5 VMOVUPD	0xb0(%RSP),%XMM31

  (406) 0x42c8cd VMOVUPD	0xa0(%RSP),%XMM30

  (406) 0x42c8d5 VMOVUPD	0x90(%RSP),%XMM20

  (406) 0x42c8dd VMOVUPD	0x80(%RSP),%XMM25

  (406) 0x42c8e5 JE	42c1c0

  (406) 0x42c8eb JMP	42c903

0x42c8ed NOPW	%CS:(%RAX,%RAX,1)

0x42c8fc NOPL	(%RAX)

  (406) 0x42c900 XOR	%R11D,%R11D

  (406) 0x42c903 VPUNPCKLQDQ	%XMM18,%XMM16,%XMM3

  (406) 0x42c909 VPUNPCKLQDQ	%XMM25,%XMM4,%XMM4

  (406) 0x42c90f VINSERTF128	$0x1,%XMM3,%YMM4,%YMM3

  (406) 0x42c915 VPUNPCKLQDQ	%XMM17,%XMM14,%XMM4

  (406) 0x42c91b VPUNPCKLQDQ	%XMM10,%XMM5,%XMM5

  (406) 0x42c920 VINSERTF128	$0x1,%XMM4,%YMM5,%YMM4

  (406) 0x42c926 VPUNPCKLQDQ	%XMM15,%XMM30,%XMM5

  (406) 0x42c92c VPUNPCKLQDQ	%XMM9,%XMM6,%XMM6

  (406) 0x42c931 VINSERTF128	$0x1,%XMM5,%YMM6,%YMM5

  (406) 0x42c937 VPUNPCKLQDQ	%XMM20,%XMM31,%XMM6

  (406) 0x42c93d VPUNPCKLQDQ	%XMM8,%XMM7,%XMM7

  (406) 0x42c942 VINSERTF128	$0x1,%XMM6,%YMM7,%YMM6

  (406) 0x42c948 NOPL	(%RAX,%RAX,1)

    (407) 0x42c950 VMULSD	(%RDX,%R11,8),%XMM2,%XMM7

    (407) 0x42c956 VCVTTSD2SI	%XMM7,%EAX

    (407) 0x42c95a VROUNDSD	$0xb,%XMM7,%XMM7,%XMM8

    (407) 0x42c960 VSUBSD	%XMM8,%XMM7,%XMM7

    (407) 0x42c965 CLTQ

    (407) 0x42c967 VMULSD	%XMM7,%XMM7,%XMM8

    (407) 0x42c96b VMULSD	%XMM7,%XMM8,%XMM9

    (407) 0x42c96f VMOVAPD	%YMM8,%YMM10

    (407) 0x42c974 VPERMT2PD	%YMM9,%YMM13,%YMM10

    (407) 0x42c97a VFMADD213PD	%YMM6,%YMM4,%YMM10

    (407) 0x42c97f VPERMT2PD	%YMM8,%YMM13,%YMM9

    (407) 0x42c985 VFMADD213PD	%YMM10,%YMM3,%YMM9

    (407) 0x42c98a VBROADCASTSD	%XMM7,%YMM7

    (407) 0x42c98f VFMADD213PD	%YMM9,%YMM5,%YMM7

    (407) 0x42c994 VMULPD	(%RBX,%RAX,8),%YMM7,%YMM7

    (407) 0x42c999 VEXTRACTF128	$0x1,%YMM7,%XMM8

    (407) 0x42c99f VADDPD	%XMM7,%XMM8,%XMM7

    (407) 0x42c9a3 VSHUFPD	$0x1,%XMM7,%XMM7,%XMM8

    (407) 0x42c9a8 VADDSD	%XMM7,%XMM8,%XMM7

    (407) 0x42c9ac VADDSD	%XMM7,%XMM19,%XMM19

    (407) 0x42c9b2 INC	%R11

    (407) 0x42c9b5 CMP	%R11,%R10

    (407) 0x42c9b8 JNE	42c950

  (406) 0x42c9ba JMP	42c1c0

0x42c9bf NOP

0x42c9c0 LEA	-0x28(%RBP),%RSP

0x42c9c4 POP	%RBX

0x42c9c5 POP	%R12

0x42c9c7 POP	%R13

0x42c9c9 POP	%R14

0x42c9cb POP	%R15

0x42c9cd POP	%RBP

0x42c9ce RET

0x42c9cf NOPW	%CS:(%RAX,%RAX,1)

0x42c9de NOPW	%CS:(%RAX,%RAX,1)

0x42c9ed NOPW	%CS:(%RAX,%RAX,1)

0x42c9fc NOPL	(%RAX)

0x42ca00 VZEROUPPER

0x42ca03 CALL	42cbd0 <_ZSt27__throw_bad_optional_accessv>

0x42ca08 NOPW	%CS:(%RAX,%RAX,1)

0x42ca12 NOPW	%CS:(%RAX,%RAX,1)

0x42ca1c NOPW	%CS:(%RAX,%RAX,1)

0x42ca26 NOPW	%CS:(%RAX,%RAX,1)

0x42ca30 NOPW	%CS:(%RAX,%RAX,1)

0x42ca3a NOPW	(%RAX,%RAX,1)

Coverage (%)	Name	Source Location	Module
►99.98+	qmcplusplus::WaveFunction::eva[...]	stl_vector.h:919	exec
○	qmcplusplus::NonLocalPP<double[...]	NonLocalPP.hpp:135	exec
○	main.extracted.107	NewTimer.h:249	exec
○	__kmp_invoke_microtask		libiomp5.so
○	__kmp_invoke_task_func		libiomp5.so

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run icx_4

Source file and lines	TwoBodyJastrowRef.h:106-132
Module	exec

The function is defined in:

/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/optional:950-952
/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/shared_ptr_base.h:1296
/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/stl_vector.h:919,1046,1064,1169
/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/refwrap.h:338
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:236-260
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/TwoBodyJastrowRef.h:106-109,126-132
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:223,229,249
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Particle/ParticleSet.h:313-316

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 11.00 to 1.17 cycles (9.43x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is poorly vectorized. Only 18% of vector register length is used (average across all SSE/AVX instructions).

Details

33% of SSE/AVX instructions are used in vector version (process two or more data elements in vector registers):

20% of SSE/AVX stores are used in vector version.
50% of SSE/AVX instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Workaround

Read the "512-bits vectorization" report at "Potential" confidence level.

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

512-bits vectorization

On some x86 processors supporting 512-bits vectorization, compilers are often too conservative and limit vectorization to 256 bits. Performance can then be improved by enforcing 512-bits vectorization, especially with many vectorized and high trip count loops. 512-bits vectorization performance overhead (compared to 256-bits) is generally lower on newer processors.

Workaround

Recompile with -mprefer-vector-width=512

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

std::__throw_bad_optional_access(): 1 occurrences►
- /usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/optional:952

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

VZEROUPPER: 1 occurrences►
- /usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/optional:952

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 32 bytes. The binary function is storing 64 bytes.

General properties

nb instructions	64
nb uops	66
loop length	491
used x86 registers	11
used mmx registers	0
used xmm registers	0
used ymm registers	1
used zmm registers	0
nb stack references	6

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	11.00 cycles
front end	11.00 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11
uops	1.00	1.00	3.33	3.33	6.00	1.00	1.00	6.00	6.00	6.00	1.00	3.33
cycles	1.00	1.00	3.33	3.33	6.00	1.00	1.00	6.00	6.00	6.00	1.00	3.33

Execution ports to units layout:

P0 (256 bits): VPU, BRU, ALU, DIV/SQRT
P1 (256 bits): ALU, VPU
P2 (512 bits): load
P3 (512 bits): load
P4 (512 bits): store data
P5 (512 bits): ALU, VPU
P6: ALU, BRU
P7: store address
P8: store address
P9 (512 bits): store data
P10: ALU
P11 (512 bits): load

Cycles executing div or sqrt instructions

Cycles summary

Front-end	11.00
Dispatch	6.00
Overall L1	11.00

Vectorization ratios

all	33%
load	100%
store	20%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	50%

Vector efficiency ratios

all	18%
load	25%
store	18%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	18%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 11.00 cycles. At this rate:

1% of peak load performance is reached (2.91 out of 192.00 bytes loaded per cycle (GB/s @ 1GHz))
4% of peak store performance is reached (5.82 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Performance is limited by instruction throughput (loading/decoding program instructions to execution core) (front-end is a bottleneck). By removing all these bottlenecks, you can lower the cost of an iteration from 11.00 to 6.00 cycles (1.83x speedup).

ASM code

In the binary file, the address of the function is: 42c000

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
PUSH %R15	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R14	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R13	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R12	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %RBX	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
AND $-0x20,%RSP	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
SUB $0x160,%RSP	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV 0x8(%RDX),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RDX,0x48(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
CMP (%RDX),%RAX	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	N/A
JE 42c9c0 <_ZN16miniqmcreference17TwoBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE14evaluateRatiosERNS1_18VirtualParticleSetERSt6vectorIdSaIdEE+0x9c0>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %RDI,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %RSI,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOVQ $0,0x18(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
VBROADCASTI128 0x10c28e(%RIP),%YMM0	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	5-8	0.33	vect (25.0%)
VMOVDQU %YMM0,0x120(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (50.0%)
MOV %R14,0x38(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RSI,0x40(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JMP 42c0ce <_ZN16miniqmcreference17TwoBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE14evaluateRatiosERNS1_18VirtualParticleSetERSt6vectorIdSaIdEE+0xce>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA -0x28(%RBP),%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
POP %RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %RBP	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
RET	1	0.50	0	0.33	0.33	0	0	0.50	0	0	0	0	0.33	0	2.13	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VZEROUPPER	2	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 42cbd0 <_ZSt27__throw_bad_optional_accessv>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run icx_4

Source file and lines	TwoBodyJastrowRef.h:106-132
Module	exec

The function is defined in:

/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/optional:950-952
/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/shared_ptr_base.h:1296
/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/stl_vector.h:919,1046,1064,1169
/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/refwrap.h:338
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:236-260
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/TwoBodyJastrowRef.h:106-109,126-132
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:223,229,249
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Particle/ParticleSet.h:313-316

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 11.00 to 1.17 cycles (9.43x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is poorly vectorized. Only 18% of vector register length is used (average across all SSE/AVX instructions).

Details

33% of SSE/AVX instructions are used in vector version (process two or more data elements in vector registers):

20% of SSE/AVX stores are used in vector version.
50% of SSE/AVX instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Workaround

Read the "512-bits vectorization" report at "Potential" confidence level.

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

512-bits vectorization

Workaround

Recompile with -mprefer-vector-width=512

CALL instructions

Detected function call instructions.

Details

std::__throw_bad_optional_access(): 1 occurrences►
- /usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/optional:952

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

VZEROUPPER: 1 occurrences►
- /usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/optional:952

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 32 bytes. The binary function is storing 64 bytes.

General properties

nb instructions	64
nb uops	66
loop length	491
used x86 registers	11
used mmx registers	0
used xmm registers	0
used ymm registers	1
used zmm registers	0
nb stack references	6

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	11.00 cycles
front end	11.00 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11
uops	1.00	1.00	3.33	3.33	6.00	1.00	1.00	6.00	6.00	6.00	1.00	3.33
cycles	1.00	1.00	3.33	3.33	6.00	1.00	1.00	6.00	6.00	6.00	1.00	3.33

Execution ports to units layout:

P0 (256 bits): VPU, BRU, ALU, DIV/SQRT
P1 (256 bits): ALU, VPU
P2 (512 bits): load
P3 (512 bits): load
P4 (512 bits): store data
P5 (512 bits): ALU, VPU
P6: ALU, BRU
P7: store address
P8: store address
P9 (512 bits): store data
P10: ALU
P11 (512 bits): load

Cycles executing div or sqrt instructions

Cycles summary

Front-end	11.00
Dispatch	6.00
Overall L1	11.00

Vectorization ratios

all	33%
load	100%
store	20%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	50%

Vector efficiency ratios

all	18%
load	25%
store	18%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	18%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 11.00 cycles. At this rate:

1% of peak load performance is reached (2.91 out of 192.00 bytes loaded per cycle (GB/s @ 1GHz))
4% of peak store performance is reached (5.82 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

ASM code

In the binary file, the address of the function is: 42c000

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
PUSH %R15	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R14	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R13	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R12	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %RBX	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
AND $-0x20,%RSP	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
SUB $0x160,%RSP	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV 0x8(%RDX),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RDX,0x48(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
CMP (%RDX),%RAX	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	N/A
JE 42c9c0 <_ZN16miniqmcreference17TwoBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE14evaluateRatiosERNS1_18VirtualParticleSetERSt6vectorIdSaIdEE+0x9c0>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %RDI,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %RSI,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOVQ $0,0x18(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
VBROADCASTI128 0x10c28e(%RIP),%YMM0	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	5-8	0.33	vect (25.0%)
VMOVDQU %YMM0,0x120(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (50.0%)
MOV %R14,0x38(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RSI,0x40(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JMP 42c0ce <_ZN16miniqmcreference17TwoBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE14evaluateRatiosERNS1_18VirtualParticleSetERSt6vectorIdSaIdEE+0xce>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA -0x28(%RBP),%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
POP %RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %RBP	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
RET	1	0.50	0	0.33	0.33	0	0	0.50	0	0	0	0	0.33	0	2.13	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VZEROUPPER	2	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 42cbd0 <_ZSt27__throw_bad_optional_accessv>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A

Name	Coverage (%)	Time (s)
▼miniqmcreference::TwoBodyJastrowRef >::evaluateRatios(qmcplusplus::VirtualParticleSet&, std::vector >&)–	2.06	1.76
▼Loop 405 - TwoBodyJastrowRef.h:107-132 - exec–	0.01	0.01
▼Loop 406 - BsplineFunctor.h:236-260 - exec–	0.01	0.01
○Loop 410 - BsplineFunctor.h:236-241 - exec	1.95	1.64
○Loop 408 - BsplineFunctor.h:246-260 - exec	0.08	0.07
○Loop 407 - BsplineFunctor.h:246-260 - exec	0.00	0.01
○Loop 409 - BsplineFunctor.h:236-241 - exec	0.00	0.00

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512-bits vectorization

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ASM code

Code clean check

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Vectorization

Details

Workaround

Execution units bottlenecks

512-bits vectorization

Workaround

CALL instructions

Details

Complex instructions

Details

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code