OV - exec - Function miniqmcreference::OneBodyJastrowRef<qmcplusplus::BsplineFunctor<double> >::evaluateRatios(qmcplusplus::VirtualParticleSet&, std::vector<double, std::allocator<double> >&)

	Function: miniqmcreference::OneBodyJastrowRef<qmcplusplus::BsplineFunctor<double> >::evaluateRatios( ...	Module: exec	Source: OneBodyJastrowRef.h:133-155 [...]	Coverage (incl. loops): 0.04% \| (excl. loops): 0.00%

/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/shared_ptr_base.h: 1296 - 1296

--------------------------------------------------------------------------------

1296:       { return _M_ptr; }

/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/stl_vector.h: 919 - 1169

--------------------------------------------------------------------------------

919:       { return size_type(this->_M_impl._M_finish - this->_M_impl._M_start); }

[...]

1046: 	return *(this->_M_impl._M_start + __n);

[...]

1064: 	return *(this->_M_impl._M_start + __n);

[...]

1169:       { return _M_data_ptr(this->_M_impl._M_start); }

/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/OneBodyJastrowRef.h: 133 - 155

--------------------------------------------------------------------------------

133:   {

134:     for (int k = 0; k < ratios.size(); ++k)

135:       ratios[k] = std::exp(Vat[VP.refPtcl] - computeU(VP.getDistTableAB(myTableID).getDistRow(k).data()));

136:   }

137:

138:   inline valT computeU(const valT* dist)

139:   {

140:     valT curVat(0);

141:     if (NumGroups > 0)

142:     {

143:       for (int jg = 0; jg < NumGroups; ++jg)

144:       {

145:         if (F[jg] != nullptr)

146:           curVat += F[jg]->evaluateV(-1, Ions.first(jg), Ions.last(jg), dist, DistCompressed.data());

147:       }

148:     }

149:     else

150:     {

151:       for (int c = 0; c < Nions; ++c)

152:       {

153:         int gid = Ions.GroupID[c];

154:         if (F[gid] != nullptr)

155:           curVat += F[gid]->evaluate(dist[c]);

/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h: 166 - 260

--------------------------------------------------------------------------------

166:     if (r >= cutoff_radius)

167:       return 0.0;

168:     r *= DeltaRInv;

169:     real_type ipart, t;

170:     t     = std::modf(r, &ipart);

171:     int i = (int)ipart;

172:     real_type tp[4];

173:     tp[0] = t * t * t;

[...]

179:       (SplineCoefs[i+0]*(A[ 0]*tp[0] + A[ 1]*tp[1] + A[ 2]*tp[2] + A[ 3]*tp[3])+

180:        SplineCoefs[i+1]*(A[ 4]*tp[0] + A[ 5]*tp[1] + A[ 6]*tp[2] + A[ 7]*tp[3])+

181:        SplineCoefs[i+2]*(A[ 8]*tp[0] + A[ 9]*tp[1] + A[10]*tp[2] + A[11]*tp[3])+

182:        SplineCoefs[i+3]*(A[12]*tp[0] + A[13]*tp[1] + A[14]*tp[2] + A[15]*tp[3]));

[...]

236:   for (int jat = 0; jat < iLimit; jat++)

237:   {

238:     real_type r = distArray[jat];

239:     // pick the distances smaller than the cutoff and avoid the reference atom

240:     if (r < cutoff_radius && iStart + jat != iat)

241:       distArrayCompressed[iCount++] = distArray[jat];

242:   }

243:

244:   real_type d = 0.0;

245:   //#pragma omp simd reduction(+:d)

246:   for (int jat = 0; jat < iCount; jat++)

247:   {

248:     real_type r = distArrayCompressed[jat];

249:     r *= DeltaRInv;

250:     int i         = (int)r;

251:     real_type t   = r - real_type(i);

252:     real_type tp0 = t * t * t;

253:     real_type tp1 = t * t;

254:     real_type tp2 = t;

255:

256:     real_type d1 = SplineCoefs[i + 0] * (A[0] * tp0 + A[1] * tp1 + A[2] * tp2 + A[3]);

257:     real_type d2 = SplineCoefs[i + 1] * (A[4] * tp0 + A[5] * tp1 + A[6] * tp2 + A[7]);

258:     real_type d3 = SplineCoefs[i + 2] * (A[8] * tp0 + A[9] * tp1 + A[10] * tp2 + A[11]);

259:     real_type d4 = SplineCoefs[i + 3] * (A[12] * tp0 + A[13] * tp1 + A[14] * tp2 + A[15]);

260:     d += (d1 + d2 + d3 + d4);

/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h: 223 - 249

--------------------------------------------------------------------------------

223:     return X[i];

[...]

229:     return X[i];

[...]

249:   inline const_pointer data() const { return X; }

/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Particle/ParticleSet.h: 313 - 316

--------------------------------------------------------------------------------

313:   inline int first(int igroup) const { return (*group_offsets_)[igroup]; }

314:

315:   ///return the last index of a group i

316:   inline int last(int igroup) const { return (*group_offsets_)[igroup + 1]; }

0x425300 PUSH	%RBP

0x425301 MOV	%RSP,%RBP

0x425304 PUSH	%R15

0x425306 PUSH	%R14

0x425308 PUSH	%R13

0x42530a PUSH	%R12

0x42530c PUSH	%RBX

0x42530d AND	$-0x20,%RSP

0x425311 SUB	$0x140,%RSP

0x425318 MOV	%RSI,0x38(%RSP)

0x42531d MOV	0x8(%RDX),%RAX

0x425321 MOV	%RDX,0x40(%RSP)

0x425326 CMP	(%RDX),%RAX

0x425329 JE	425e40

0x42532f MOV	%RDI,%RBX

0x425332 XOR	%R14D,%R14D

0x425335 VBROADCASTI128	0x112f92(%RIP),%YMM0

0x42533e VMOVDQU	%YMM0,0x100(%RSP)

0x425347 MOV	%RDI,0x30(%RSP)

0x42534c JMP	4253d3

0x425351 NOPW	%CS:(%RAX,%RAX,1)

0x425360 NOPW	%CS:(%RAX,%RAX,1)

0x42536f NOPW	%CS:(%RAX,%RAX,1)

0x42537e XCHG	%AX,%AX

(324) 0x425380 VXORPD	%XMM20,%XMM20,%XMM20

(324) 0x425386 NOPW	%CS:(%RAX,%RAX,1)

(324) 0x425390 VMOVSD	0x48(%RSP),%XMM0

(324) 0x425396 VSUBSD	%XMM20,%XMM0,%XMM0

(324) 0x42539c VZEROUPPER

(324) 0x42539f CALL	51f890 <exp>

(324) 0x4253a4 MOV	0x40(%RSP),%RCX

(324) 0x4253a9 MOV	(%RCX),%RAX

(324) 0x4253ac MOV	0x50(%RSP),%R14

(324) 0x4253b1 VMOVSD	%XMM0,(%RAX,%R14,8)

(324) 0x4253b7 INC	%R14

(324) 0x4253ba MOV	0x8(%RCX),%RCX

(324) 0x4253be SUB	%RAX,%RCX

(324) 0x4253c1 SAR	$0x3,%RCX

(324) 0x4253c5 CMP	%R14,%RCX

(324) 0x4253c8 MOV	0x30(%RSP),%RBX

(324) 0x4253cd JBE	425e40

(324) 0x4253d3 MOV	0x38(%RSP),%RDI

(324) 0x4253d8 MOVSXD	0x2a0(%RDI),%RAX

(324) 0x4253df MOV	0xf0(%RBX),%RCX

(324) 0x4253e6 VMOVSD	(%RCX,%RAX,8),%XMM0

(324) 0x4253eb VMOVSD	%XMM0,0x48(%RSP)

(324) 0x4253f1 MOV	0xa8(%RBX),%ESI

(324) 0x4253f7 VZEROUPPER

(324) 0x4253fa CALL	4795d0 <_ZNK11qmcplusplus11ParticleSet14getDistTableABEi>

(324) 0x4253ff MOV	0x48(%RAX),%RAX

(324) 0x425403 LEA	(%R14,%R14,4),%RCX

(324) 0x425407 MOV	0x18(%RAX,%RCX,8),%RDX

(324) 0x42540c MOVSXD	0x98(%RBX),%RAX

(324) 0x425413 TEST	%RAX,%RAX

(324) 0x425416 MOV	%RDX,0x28(%RSP)

(324) 0x42541b MOV	%R14,0x50(%RSP)

(324) 0x425420 JLE	425cc0

(324) 0x425426 MOV	0x1c8(%RBX),%R15

(324) 0x42542d MOV	0xa0(%RBX),%R12

(324) 0x425434 MOV	0x148(%RBX),%RSI

(324) 0x42543b DEC	%RAX

(324) 0x42543e VXORPD	%XMM20,%XMM20,%XMM20

(324) 0x425444 XOR	%EDI,%EDI

(324) 0x425446 VMOVUPD	0x100(%RSP),%YMM10

(324) 0x42544f VPMOVSXBD	0x112d7f(%RIP),%YMM18

(324) 0x425459 VPMOVSXBD	0x112d7d(%RIP),%YMM19

(324) 0x425463 MOV	%R15,0x60(%RSP)

(324) 0x425468 MOV	%R12,0x58(%RSP)

(324) 0x42546d JMP	425496

0x42546f NOPW	%CS:(%RAX,%RAX,1)

0x42547e XCHG	%AX,%AX

  (326) 0x425480 LEA	0x1(%RDI),%R8

  (326) 0x425484 VADDSD	%XMM20,%XMM0,%XMM20

  (326) 0x42548a CMP	%RAX,%RDI

  (326) 0x42548d MOV	%R8,%RDI

  (326) 0x425490 JE	425390

  (326) 0x425496 MOV	(%R15,%RDI,8),%R8

  (326) 0x42549a TEST	%R8,%R8

  (326) 0x42549d JE	425500

  (326) 0x42549f MOV	0x268(%R12),%R9

  (326) 0x4254a7 MOV	0x18(%R9),%R9

  (326) 0x4254ab MOVSXD	(%R9,%RDI,4),%R11

  (326) 0x4254af MOV	0x4(%R9,%RDI,4),%R9D

  (326) 0x4254b4 SUB	%R11D,%R9D

  (326) 0x4254b7 VXORPD	%XMM0,%XMM0,%XMM0

  (326) 0x4254bb TEST	%R9D,%R9D

  (326) 0x4254be JLE	425480

  (326) 0x4254c0 VMOVSD	0x8(%R8),%XMM1

  (326) 0x4254c6 MOV	%R9D,%R10D

  (326) 0x4254c9 MOV	%R10,%R14

  (326) 0x4254cc AND	$0x7ffffff0,%R14

  (326) 0x4254d3 JE	425540

  (326) 0x4254d5 CMP	$0x7,%R9D

  (326) 0x4254d9 JA	425580

  (326) 0x4254df XOR	%R9D,%R9D

  (326) 0x4254e2 XOR	%R14D,%R14D

  (326) 0x4254e5 JMP	4256d1

0x4254ea NOPW	%CS:(%RAX,%RAX,1)

0x4254f9 NOPL	(%RAX)

  (326) 0x425500 LEA	0x1(%RDI),%R8

  (326) 0x425504 CMP	%RAX,%RDI

  (326) 0x425507 MOV	%R8,%RDI

  (326) 0x42550a JNE	425496

(324) 0x42550c JMP	425390

0x425511 NOPW	%CS:(%RAX,%RAX,1)

0x425520 NOPW	%CS:(%RAX,%RAX,1)

0x42552f NOPW	%CS:(%RAX,%RAX,1)

0x42553e XCHG	%AX,%AX

  (326) 0x425540 XOR	%R14D,%R14D

  (326) 0x425543 XOR	%R9D,%R9D

  (326) 0x425546 JMP	4256b8

0x42554b NOPW	%CS:(%RAX,%RAX,1)

0x42555a NOPW	%CS:(%RAX,%RAX,1)

0x425569 NOPW	%CS:(%RAX,%RAX,1)

0x425578 NOPL	(%RAX,%RAX,1)

  (326) 0x425580 VBROADCASTSD	%XMM1,%YMM2

  (326) 0x425585 MOV	%R11D,%EBX

  (326) 0x425588 LEA	(%RDX,%R11,8),%R15

  (326) 0x42558c XOR	%R9D,%R9D

  (326) 0x42558f XOR	%R13D,%R13D

  (326) 0x425592 NOPW	%CS:(%RAX,%RAX,1)

    (330) 0x4255a0 VMOVUPD	(%R15,%R13,8),%YMM3

    (330) 0x4255a6 VMOVUPD	0x20(%R15,%R13,8),%YMM4

    (330) 0x4255ad VMOVUPD	0x40(%R15,%R13,8),%YMM5

    (330) 0x4255b4 VMOVUPD	0x60(%R15,%R13,8),%YMM6

    (330) 0x4255bb LEA	(%RBX,%R13,1),%R12D

    (330) 0x4255bf VPBROADCASTD	%R12D,%YMM7

    (330) 0x4255c5 VPCMPNEQD	%YMM18,%YMM7,%K0

    (330) 0x4255cc VPCMPNEQD	%YMM19,%YMM7,%K2

    (330) 0x4255d3 VCMPPD	$0x1,%YMM2,%YMM3,%K4

    (330) 0x4255da VCMPPD	$0x1,%YMM2,%YMM4,%K1

    (330) 0x4255e1 KMOVW	%K1,0x20(%RSP)

    (330) 0x4255e7 KSHIFTLB	$0x4,%K1,%K3

    (330) 0x4255ed KORB	%K3,%K4,%K3

    (330) 0x4255f1 MOVSXD	%R9D,%R9

    (330) 0x4255f4 KANDW	%K0,%K4,%K4

    (330) 0x4255f8 VCOMPRESSPD	%YMM3,(%RSI,%R9,8){%K4}

    (330) 0x4255ff VCMPPD	$0x1,%YMM2,%YMM5,%K6

    (330) 0x425606 VCMPPD	$0x1,%YMM2,%YMM6,%K5

    (330) 0x42560d LEA	(%RSI,%R9,8),%R12

    (330) 0x425611 KANDB	%K0,%K3,%K7

    (330) 0x425615 KMOVB	%K7,%EDX

    (330) 0x425619 KANDW	%K2,%K6,%K7

    (330) 0x42561d POPCNT	%EDX,%EDX

    (330) 0x425621 VCOMPRESSPD	%YMM5,(%R12,%RDX,8){%K7}

    (330) 0x425628 KSHIFTLB	$0x4,%K5,%K1

    (330) 0x42562e KORB	%K1,%K6,%K1

    (330) 0x425632 KMOVB	%K7,0x1e(%RSP)

    (330) 0x425638 KSHIFTRB	$0x4,%K2,%K6

    (330) 0x42563e KANDW	%K6,%K5,%K5

    (330) 0x425642 LEA	(%R12,%RDX,8),%RDX

    (330) 0x425646 MOVZX	0x1e(%RSP),%ECX

    (330) 0x42564b POPCNT	%ECX,%ECX

    (330) 0x42564f VCOMPRESSPD	%YMM6,(%RDX,%RCX,8){%K5}

    (330) 0x425656 KUNPCKBW	%K3,%K1,%K1

    (330) 0x42565a KMOVB	%K4,0x1f(%RSP)

    (330) 0x425660 KUNPCKBW	%K0,%K2,%K2

    (330) 0x425664 KSHIFTRB	$0x4,%K0,%K0

    (330) 0x42566a KMOVW	0x20(%RSP),%K3

    (330) 0x425670 KANDW	%K0,%K3,%K3

    (330) 0x425674 MOVZX	0x1f(%RSP),%ECX

    (330) 0x425679 POPCNT	%ECX,%ECX

    (330) 0x42567d VCOMPRESSPD	%YMM4,(%R12,%RCX,8){%K3}

    (330) 0x425684 KANDW	%K2,%K1,%K0

    (330) 0x425688 KMOVW	%K0,%ECX

    (330) 0x42568c POPCNT	%ECX,%ECX

    (330) 0x425690 ADD	%ECX,%R9D

    (330) 0x425693 ADD	$0x10,%R13

    (330) 0x425697 CMP	%R14,%R13

    (330) 0x42569a JB	4255a0

  (326) 0x4256a0 CMP	%R10D,%R14D

  (326) 0x4256a3 MOV	0x28(%RSP),%RDX

  (326) 0x4256a8 MOV	0x60(%RSP),%R15

  (326) 0x4256ad MOV	0x58(%RSP),%R12

  (326) 0x4256b2 JE	425919

  (326) 0x4256b8 VMOVQ	%R10,%XMM3

  (326) 0x4256bd VMOVD	%R14D,%XMM2

  (326) 0x4256c2 VPSUBQ	%YMM2,%YMM3,%YMM3

  (326) 0x4256c6 VMOVQ	%XMM3,%RBX

  (326) 0x4256cb CMP	$0x8,%RBX

  (326) 0x4256cf JAE	425740

  (326) 0x4256d1 SUB	%R14,%R10

  (326) 0x4256d4 LEA	(%R14,%R11,1),%EBX

  (326) 0x4256d8 NOT	%EBX

  (326) 0x4256da ADD	%R11,%R14

  (326) 0x4256dd LEA	(%RDX,%R14,8),%R11

  (326) 0x4256e1 XOR	%R14D,%R14D

  (326) 0x4256e4 JMP	42570c

0x4256e6 NOPW	%CS:(%RAX,%RAX,1)

0x4256f5 NOPW	%CS:(%RAX,%RAX,1)

    (329) 0x425700 INC	%R14

    (329) 0x425703 CMP	%R14,%R10

    (329) 0x425706 JE	425919

    (329) 0x42570c VMOVSD	(%R11,%R14,8),%XMM2

    (329) 0x425712 VUCOMISD	%XMM2,%XMM1

    (329) 0x425716 JBE	425700

    (329) 0x425718 CMP	%R14D,%EBX

    (329) 0x42571b JE	425700

    (329) 0x42571d MOVSXD	%R9D,%R9

    (329) 0x425720 VMOVSD	%XMM2,(%RSI,%R9,8)

    (329) 0x425726 INC	%R9D

    (329) 0x425729 JMP	425700

0x42572b NOPW	%CS:(%RAX,%RAX,1)

0x42573a NOPW	(%RAX,%RAX,1)

  (326) 0x425740 VPBROADCASTQ	%XMM3,%YMM3

  (326) 0x425745 VPCMPNLEUQ	0x112c30(%RIP),%YMM3,%K1

  (326) 0x425750 VPCMPNLEUQ	0x112c45(%RIP),%YMM3,%K4

  (326) 0x42575b VPCMPNLEUQ	0x112c5a(%RIP),%YMM3,%K5

  (326) 0x425766 VPCMPNLEUQ	0x112c6f(%RIP),%YMM3,%K6

  (326) 0x425771 KORB	%K6,%K5,%K0

  (326) 0x425775 KORB	%K4,%K1,%K2

  (326) 0x425779 KORTESTB	%K0,%K2

  (326) 0x42577d JE	425900

  (326) 0x425783 KSHIFTLB	$0x4,%K4,%K0

  (326) 0x425789 KORB	%K0,%K1,%K3

  (326) 0x42578d KSHIFTLB	$0x4,%K6,%K0

  (326) 0x425793 KORB	%K0,%K5,%K2

  (326) 0x425797 ADD	%R11,%R14

  (326) 0x42579a VMOVUPD	0x60(%RDX,%R14,8),%YMM3{%K6}{z}

  (326) 0x4257a2 VMOVUPD	0x40(%RDX,%R14,8),%YMM4{%K5}{z}

  (326) 0x4257aa VMOVUPD	0x20(%RDX,%R14,8),%YMM5{%K4}{z}

  (326) 0x4257b2 VMOVUPD	(%RDX,%R14,8),%YMM6{%K1}{z}

  (326) 0x4257b9 KUNPCKBW	%K3,%K2,%K0

  (326) 0x4257bd KMOVW	%K0,0x20(%RSP)

  (326) 0x4257c3 VPBROADCASTD	%R11D,%YMM7

  (326) 0x4257c9 VPMOVQD	%YMM2,%XMM2

  (326) 0x4257cf VPBROADCASTD	%XMM2,%YMM2

  (326) 0x4257d4 VPOR	0x112c24(%RIP),%YMM2,%YMM8

  (326) 0x4257dc VPOR	0x112c3c(%RIP),%YMM2,%YMM2

  (326) 0x4257e4 VPADDD	%YMM2,%YMM7,%YMM2

  (326) 0x4257e8 VPADDD	%YMM7,%YMM8,%YMM7

  (326) 0x4257ec VPCMPEQD	%YMM8,%YMM8,%YMM8

  (326) 0x4257f1 VPCMPNEQD	%YMM8,%YMM7,%K6

  (326) 0x4257f8 VBROADCASTSD	%XMM1,%YMM1

  (326) 0x4257fd VCMPPD	$0x1,%YMM1,%YMM6,%K4

  (326) 0x425804 VCMPPD	$0x1,%YMM1,%YMM5,%K5

  (326) 0x42580b KSHIFTLB	$0x4,%K5,%K5

  (326) 0x425811 KORB	%K5,%K4,%K4

  (326) 0x425815 VCMPPD	$0x1,%YMM1,%YMM4,%K5

  (326) 0x42581c VCMPPD	$0x1,%YMM1,%YMM3,%K7

  (326) 0x425823 KSHIFTLB	$0x4,%K7,%K7

  (326) 0x425829 KORB	%K7,%K5,%K5

  (326) 0x42582d VPCMPNEQD	%YMM8,%YMM2,%K7

  (326) 0x425834 KANDB	%K6,%K3,%K0

  (326) 0x425838 KUNPCKBW	%K6,%K7,%K3

  (326) 0x42583c KANDB	%K7,%K2,%K2

  (326) 0x425840 MOVSXD	%R9D,%RCX

  (326) 0x425843 LEA	(%RSI,%RCX,8),%RDX

  (326) 0x425847 KANDB	%K4,%K0,%K7

  (326) 0x42584b VCOMPRESSPD	%YMM6,(%RSI,%RCX,8){%K7}

  (326) 0x425852 KANDB	%K5,%K2,%K6

  (326) 0x425856 KMOVB	%K7,%ECX

  (326) 0x42585a POPCNT	%ECX,%ECX

  (326) 0x42585e VCOMPRESSPD	%YMM4,(%RDX,%RCX,8){%K6}

  (326) 0x425865 KUNPCKBW	%K4,%K5,%K2

  (326) 0x425869 KSHIFTLB	$0x4,%K7,%K0

  (326) 0x42586f KSHIFTRB	$0x4,%K0,%K0

  (326) 0x425875 KMOVB	%K0,0x1d(%RSP)

  (326) 0x42587b KSHIFTRB	$0x4,%K7,%K4

  (326) 0x425881 MOVZX	0x1d(%RSP),%R10D

  (326) 0x425887 POPCNT	%R10D,%R10D

  (326) 0x42588c VCOMPRESSPD	%YMM5,(%RDX,%R10,8){%K4}

  (326) 0x425893 KSHIFTLB	$0x4,%K6,%K0

  (326) 0x425899 KSHIFTRB	$0x4,%K0,%K0

  (326) 0x42589f KMOVB	%K0,0x1c(%RSP)

  (326) 0x4258a5 LEA	(%RDX,%RCX,8),%RCX

  (326) 0x4258a9 KSHIFTRB	$0x4,%K6,%K4

  (326) 0x4258af MOVZX	0x1c(%RSP),%EDX

  (326) 0x4258b4 POPCNT	%EDX,%EDX

  (326) 0x4258b8 VCOMPRESSPD	%YMM3,(%RCX,%RDX,8){%K4}

  (326) 0x4258bf MOV	0x28(%RSP),%RDX

  (326) 0x4258c4 KMOVW	0x20(%RSP),%K4

  (326) 0x4258ca KANDW	%K3,%K4,%K0

  (326) 0x4258ce KANDW	%K0,%K4,%K0

  (326) 0x4258d2 KANDW	%K2,%K0,%K0

  (326) 0x4258d6 KMOVW	%K0,%ECX

  (326) 0x4258da POPCNT	%ECX,%R10D

  (326) 0x4258df ADD	%R9D,%R10D

  (326) 0x4258e2 JMP	425903

0x4258e4 NOPW	%CS:(%RAX,%RAX,1)

0x4258f3 NOPW	%CS:(%RAX,%RAX,1)

  (326) 0x425900 XOR	%R10D,%R10D

  (326) 0x425903 VMOVD	%R9D,%XMM1

  (326) 0x425908 VMOVD	%R10D,%XMM2

  (326) 0x42590d VINSERTI32X4	$0,%XMM2,%YMM0,%YMM1{%K1}

  (326) 0x425914 VMOVD	%XMM1,%R9D

  (326) 0x425919 TEST	%R9D,%R9D

  (326) 0x42591c JLE	425480

  (326) 0x425922 VMOVSD	0x238(%R8),%XMM1

  (326) 0x42592b MOV	0x218(%R8),%R10

  (326) 0x425932 VMOVSD	0x18(%R8),%XMM3

  (326) 0x425938 VMOVSD	0x20(%R8),%XMM4

  (326) 0x42593e VMOVSD	0x28(%R8),%XMM5

  (326) 0x425944 VMOVSD	0x30(%R8),%XMM6

  (326) 0x42594a VMOVSD	0x38(%R8),%XMM9

  (326) 0x425950 VMOVSD	0x40(%R8),%XMM12

  (326) 0x425956 VMOVSD	0x48(%R8),%XMM8

  (326) 0x42595c VMOVSD	0x50(%R8),%XMM7

  (326) 0x425962 VMOVSD	0x58(%R8),%XMM15

  (326) 0x425968 VMOVSD	0x60(%R8),%XMM13

  (326) 0x42596e VMOVSD	0x68(%R8),%XMM28

  (326) 0x425975 VMOVSD	0x70(%R8),%XMM29

  (326) 0x42597c VMOVSD	0x78(%R8),%XMM16

  (326) 0x425983 VMOVSD	0x80(%R8),%XMM17

  (326) 0x42598a VMOVSD	0x88(%R8),%XMM14

  (326) 0x425993 VMOVSD	0x90(%R8),%XMM11

  (326) 0x42599c MOV	%R9D,%R8D

  (326) 0x42599f MOV	%R8,%R9

  (326) 0x4259a2 AND	$0x7ffffffc,%R9

  (326) 0x4259a9 JE	425c00

  (326) 0x4259af VMOVSD	%XMM20,0x20(%RSP)

  (326) 0x4259b7 VBROADCASTSD	%XMM1,%YMM0

  (326) 0x4259bc VMOVUPD	%XMM3,0xa0(%RSP)

  (326) 0x4259c5 VBROADCASTSD	%XMM3,%YMM18

  (326) 0x4259cb VMOVUPD	%XMM4,0xc0(%RSP)

  (326) 0x4259d4 VBROADCASTSD	%XMM4,%YMM19

  (326) 0x4259da VMOVUPD	%XMM5,0xe0(%RSP)

  (326) 0x4259e3 VBROADCASTSD	%XMM5,%YMM20

  (326) 0x4259e9 VMOVUPD	%XMM6,0xf0(%RSP)

  (326) 0x4259f2 VBROADCASTSD	%XMM6,%YMM21

  (326) 0x4259f8 VMOVUPD	%XMM9,0x90(%RSP)

  (326) 0x425a01 VBROADCASTSD	%XMM9,%YMM22

  (326) 0x425a07 VBROADCASTSD	%XMM12,%YMM23

  (326) 0x425a0d VMOVUPD	%XMM8,0xb0(%RSP)

  (326) 0x425a16 VBROADCASTSD	%XMM8,%YMM24

  (326) 0x425a1c VMOVUPD	%XMM7,0xd0(%RSP)

  (326) 0x425a25 VBROADCASTSD	%XMM7,%YMM25

  (326) 0x425a2b VBROADCASTSD	%XMM15,%YMM26

  (326) 0x425a31 VBROADCASTSD	%XMM13,%YMM27

  (326) 0x425a37 VMOVUPD	%XMM28,0x70(%RSP)

  (326) 0x425a3f VBROADCASTSD	%XMM28,%YMM28

  (326) 0x425a45 VMOVUPD	%XMM29,0x80(%RSP)

  (326) 0x425a4d VBROADCASTSD	%XMM29,%YMM29

  (326) 0x425a53 VBROADCASTSD	%XMM16,%YMM30

  (326) 0x425a59 VBROADCASTSD	%XMM17,%YMM31

  (326) 0x425a5f VBROADCASTSD	%XMM14,%YMM2

  (326) 0x425a64 VBROADCASTSD	%XMM11,%YMM3

  (326) 0x425a69 VXORPD	%XMM4,%XMM4,%XMM4

  (326) 0x425a6d XOR	%R11D,%R11D

    (328) 0x425a70 VMULPD	(%RSI,%R11,8),%YMM0,%YMM5

    (328) 0x425a76 VCVTTPD2DQ	%YMM5,%XMM6

    (328) 0x425a7a VROUNDPD	$0xb,%YMM5,%YMM7

    (328) 0x425a80 VSUBPD	%YMM7,%YMM5,%YMM5

    (328) 0x425a84 VMULPD	%YMM5,%YMM5,%YMM9

    (328) 0x425a88 VMULPD	%YMM5,%YMM9,%YMM8

    (328) 0x425a8c VMOVAPD	%YMM9,%YMM7

    (328) 0x425a90 VFMADD213PD	%YMM21,%YMM19,%YMM7

    (328) 0x425a96 VFMADD231PD	%YMM18,%YMM8,%YMM7

    (328) 0x425a9c VFMADD231PD	%YMM5,%YMM20,%YMM7

    (328) 0x425aa2 VXORPD	%XMM10,%XMM10,%XMM10

    (328) 0x425aa7 KXNORW	%K0,%K0,%K1

    (328) 0x425aab VGATHERDPD	(%R10,%XMM6,8),%YMM10{%K1}

    (328) 0x425ab2 VFMADD213PD	%YMM4,%YMM7,%YMM10

    (328) 0x425ab7 VMOVAPD	%YMM8,%YMM4

    (328) 0x425abb VFMADD213PD	%YMM25,%YMM22,%YMM4

    (328) 0x425ac1 VFMADD231PD	%YMM9,%YMM23,%YMM4

    (328) 0x425ac7 VXORPD	%XMM7,%XMM7,%XMM7

    (328) 0x425acb KXNORW	%K0,%K0,%K1

    (328) 0x425acf VGATHERDPD	0x8(%R10,%XMM6,8),%YMM7{%K1}

    (328) 0x425ad7 VFMADD231PD	%YMM5,%YMM24,%YMM4

    (328) 0x425add VFMADD213PD	%YMM10,%YMM4,%YMM7

    (328) 0x425ae2 VMOVAPD	%YMM8,%YMM4

    (328) 0x425ae6 VFMADD213PD	%YMM29,%YMM26,%YMM4

    (328) 0x425aec VXORPD	%XMM10,%XMM10,%XMM10

    (328) 0x425af1 KXNORW	%K0,%K0,%K1

    (328) 0x425af5 VGATHERDPD	0x10(%R10,%XMM6,8),%YMM10{%K1}

    (328) 0x425afd VFMADD231PD	%YMM9,%YMM27,%YMM4

    (328) 0x425b03 VFMADD231PD	%YMM5,%YMM28,%YMM4

    (328) 0x425b09 VFMADD213PD	%YMM7,%YMM4,%YMM10

    (328) 0x425b0e VXORPD	%XMM4,%XMM4,%XMM4

    (328) 0x425b12 KXNORW	%K0,%K0,%K1

    (328) 0x425b16 VGATHERDPD	0x18(%R10,%XMM6,8),%YMM4{%K1}

    (328) 0x425b1e VFMADD213PD	%YMM3,%YMM30,%YMM8

    (328) 0x425b24 VFMADD231PD	%YMM9,%YMM31,%YMM8

    (328) 0x425b2a VFMADD231PD	%YMM5,%YMM2,%YMM8

    (328) 0x425b2f VFMADD213PD	%YMM10,%YMM8,%YMM4

    (328) 0x425b34 ADD	$0x4,%R11

    (328) 0x425b38 CMP	%R9,%R11

    (328) 0x425b3b JB	425a70

  (326) 0x425b41 VEXTRACTF128	$0x1,%YMM4,%XMM0

  (326) 0x425b47 VADDPD	%XMM0,%XMM4,%XMM0

  (326) 0x425b4b VSHUFPD	$0x1,%XMM0,%XMM0,%XMM2

  (326) 0x425b50 VADDSD	%XMM2,%XMM0,%XMM0

  (326) 0x425b54 CMP	%R8D,%R9D

  (326) 0x425b57 VMOVUPD	0x100(%RSP),%YMM10

  (326) 0x425b60 VPMOVSXBD	0x11266e(%RIP),%YMM18

  (326) 0x425b6a VPMOVSXBD	0x11266c(%RIP),%YMM19

  (326) 0x425b74 VMOVSD	0x20(%RSP),%XMM20

  (326) 0x425b7c VMOVUPD	0xf0(%RSP),%XMM6

  (326) 0x425b85 VMOVUPD	0xe0(%RSP),%XMM5

  (326) 0x425b8e VMOVUPD	0xd0(%RSP),%XMM7

  (326) 0x425b97 VMOVUPD	0xc0(%RSP),%XMM4

  (326) 0x425ba0 VMOVUPD	0xb0(%RSP),%XMM8

  (326) 0x425ba9 VMOVUPD	0xa0(%RSP),%XMM3

  (326) 0x425bb2 VMOVUPD	0x90(%RSP),%XMM9

  (326) 0x425bbb VMOVUPD	0x80(%RSP),%XMM29

  (326) 0x425bc3 VMOVUPD	0x70(%RSP),%XMM28

  (326) 0x425bcb JE	425480

  (326) 0x425bd1 JMP	425c07

0x425bd3 NOPW	%CS:(%RAX,%RAX,1)

0x425be2 NOPW	%CS:(%RAX,%RAX,1)

0x425bf1 NOPW	%CS:(%RAX,%RAX,1)

  (326) 0x425c00 VXORPD	%XMM0,%XMM0,%XMM0

  (326) 0x425c04 XOR	%R9D,%R9D

  (326) 0x425c07 VPUNPCKLQDQ	%XMM17,%XMM15,%XMM2

  (326) 0x425c0d VPUNPCKLQDQ	%XMM12,%XMM3,%XMM3

  (326) 0x425c12 VINSERTF128	$0x1,%XMM2,%YMM3,%YMM2

  (326) 0x425c18 VPUNPCKLQDQ	%XMM16,%XMM13,%XMM3

  (326) 0x425c1e VPUNPCKLQDQ	%XMM9,%XMM4,%XMM4

  (326) 0x425c23 VINSERTF128	$0x1,%XMM3,%YMM4,%YMM3

  (326) 0x425c29 VPUNPCKLQDQ	%XMM14,%XMM28,%XMM4

  (326) 0x425c2f VPUNPCKLQDQ	%XMM8,%XMM5,%XMM5

  (326) 0x425c34 VINSERTF128	$0x1,%XMM4,%YMM5,%YMM5

  (326) 0x425c3a VPUNPCKLQDQ	%XMM11,%XMM29,%XMM4

  (326) 0x425c40 VPUNPCKLQDQ	%XMM7,%XMM6,%XMM6

  (326) 0x425c44 VINSERTF128	$0x1,%XMM4,%YMM6,%YMM4

  (326) 0x425c4a NOPW	(%RAX,%RAX,1)

    (327) 0x425c50 VMULSD	(%RSI,%R9,8),%XMM1,%XMM6

    (327) 0x425c56 VCVTTSD2SI	%XMM6,%ECX

    (327) 0x425c5a VROUNDSD	$0xb,%XMM6,%XMM6,%XMM7

    (327) 0x425c60 VSUBSD	%XMM7,%XMM6,%XMM6

    (327) 0x425c64 MOVSXD	%ECX,%RCX

    (327) 0x425c67 VMULSD	%XMM6,%XMM6,%XMM7

    (327) 0x425c6b VMULSD	%XMM6,%XMM7,%XMM8

    (327) 0x425c6f VMOVAPD	%YMM7,%YMM9

    (327) 0x425c73 VPERMT2PD	%YMM8,%YMM10,%YMM9

    (327) 0x425c79 VFMADD213PD	%YMM4,%YMM3,%YMM9

    (327) 0x425c7e VPERMT2PD	%YMM7,%YMM10,%YMM8

    (327) 0x425c84 VFMADD213PD	%YMM9,%YMM2,%YMM8

    (327) 0x425c89 VBROADCASTSD	%XMM6,%YMM6

    (327) 0x425c8e VFMADD213PD	%YMM8,%YMM5,%YMM6

    (327) 0x425c93 VMULPD	(%R10,%RCX,8),%YMM6,%YMM6

    (327) 0x425c99 VEXTRACTF128	$0x1,%YMM6,%XMM7

    (327) 0x425c9f VADDPD	%XMM7,%XMM6,%XMM6

    (327) 0x425ca3 VSHUFPD	$0x1,%XMM6,%XMM6,%XMM7

    (327) 0x425ca8 VADDSD	%XMM7,%XMM6,%XMM6

    (327) 0x425cac VADDSD	%XMM6,%XMM0,%XMM0

    (327) 0x425cb0 INC	%R9

    (327) 0x425cb3 CMP	%R9,%R8

    (327) 0x425cb6 JNE	425c50

  (326) 0x425cb8 JMP	425480

0x425cbd NOPL	(%RAX)

(324) 0x425cc0 MOVSXD	0x90(%RBX),%R14

(324) 0x425cc7 TEST	%R14,%R14

(324) 0x425cca JLE	425380

(324) 0x425cd0 MOV	0xa0(%RBX),%RAX

(324) 0x425cd7 MOV	0x1c8(%RBX),%RBX

(324) 0x425cde MOV	0x18(%RAX),%R15

(324) 0x425ce2 VXORPD	%XMM20,%XMM20,%XMM20

(324) 0x425ce8 XOR	%R13D,%R13D

(324) 0x425ceb JMP	425d12

0x425ced NOPW	%CS:(%RAX,%RAX,1)

0x425cfc NOPL	(%RAX)

  (325) 0x425d00 VADDSD	%XMM20,%XMM1,%XMM20

  (325) 0x425d06 INC	%R13

  (325) 0x425d09 CMP	%R13,%R14

  (325) 0x425d0c JE	425390

  (325) 0x425d12 MOVSXD	(%R15,%R13,4),%RAX

  (325) 0x425d16 MOV	(%RBX,%RAX,8),%R12

  (325) 0x425d1a TEST	%R12,%R12

  (325) 0x425d1d JE	425d06

  (325) 0x425d1f VMOVSD	(%RDX,%R13,8),%XMM0

  (325) 0x425d25 VXORPD	%XMM1,%XMM1,%XMM1

  (325) 0x425d29 VUCOMISD	0x8(%R12),%XMM0

  (325) 0x425d30 JAE	425d00

  (325) 0x425d32 VMULSD	0x238(%R12),%XMM0,%XMM0

  (325) 0x425d3c LEA	0x68(%RSP),%RDI

  (325) 0x425d41 VMOVSD	%XMM20,0x20(%RSP)

  (325) 0x425d49 CALL	51f900 <modf>

  (325) 0x425d4e VMOVSD	0x20(%RSP),%XMM20

  (325) 0x425d56 MOV	0x28(%RSP),%RDX

  (325) 0x425d5b VCVTTSD2SI	0x68(%RSP),%EAX

  (325) 0x425d61 VMULSD	%XMM0,%XMM0,%XMM2

  (325) 0x425d65 VMULSD	%XMM0,%XMM2,%XMM3

  (325) 0x425d69 CLTQ

  (325) 0x425d6b MOV	0x218(%R12),%RCX

  (325) 0x425d73 VMOVSD	0x18(%R12),%XMM1

  (325) 0x425d7a VMOVSD	0x38(%R12),%XMM4

  (325) 0x425d81 VFMADD213SD	0x30(%R12),%XMM3,%XMM1

  (325) 0x425d88 VFMADD231SD	0x20(%R12),%XMM2,%XMM1

  (325) 0x425d8f VFMADD231SD	0x28(%R12),%XMM0,%XMM1

  (325) 0x425d96 VMULSD	(%RCX,%RAX,8),%XMM1,%XMM1

  (325) 0x425d9b VFMADD213SD	0x50(%R12),%XMM3,%XMM4

  (325) 0x425da2 VFMADD231SD	0x40(%R12),%XMM2,%XMM4

  (325) 0x425da9 VFMADD231SD	0x48(%R12),%XMM0,%XMM4

  (325) 0x425db0 VFMADD132SD	0x8(%RCX,%RAX,8),%XMM1,%XMM4

  (325) 0x425db7 VMOVSD	0x58(%R12),%XMM5

  (325) 0x425dbe VFMADD213SD	0x70(%R12),%XMM3,%XMM5

  (325) 0x425dc5 VFMADD231SD	0x60(%R12),%XMM2,%XMM5

  (325) 0x425dcc VFMADD231SD	0x68(%R12),%XMM0,%XMM5

  (325) 0x425dd3 VFMADD132SD	0x10(%RCX,%RAX,8),%XMM4,%XMM5

  (325) 0x425dda VMOVSD	0x78(%R12),%XMM1

  (325) 0x425de1 VFMADD213SD	0x90(%R12),%XMM3,%XMM1

  (325) 0x425deb VFMADD231SD	0x80(%R12),%XMM2,%XMM1

  (325) 0x425df5 VFMADD231SD	0x88(%R12),%XMM0,%XMM1

  (325) 0x425dff VFMADD132SD	0x18(%RCX,%RAX,8),%XMM5,%XMM1

  (325) 0x425e06 JMP	425d00

0x425e0b NOPW	%CS:(%RAX,%RAX,1)

0x425e1a NOPW	%CS:(%RAX,%RAX,1)

0x425e29 NOPW	%CS:(%RAX,%RAX,1)

0x425e38 NOPL	(%RAX,%RAX,1)

0x425e40 LEA	-0x28(%RBP),%RSP

0x425e44 POP	%RBX

0x425e45 POP	%R12

0x425e47 POP	%R13

0x425e49 POP	%R14

0x425e4b POP	%R15

0x425e4d POP	%RBP

0x425e4e RET

0x425e4f NOP

Coverage (%)	Name	Source Location	Module
►99.25+	qmcplusplus::WaveFunction::eva[...]	stl_vector.h:919	exec
○	qmcplusplus::NonLocalPP<double[...]	NonLocalPP.hpp:135	exec
○	main.extracted.107	NewTimer.h:249	exec
○	__kmp_invoke_microtask		libiomp5.so
○	__kmp_invoke_task_func		libiomp5.so

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run icx_4

Source file and lines	OneBodyJastrowRef.h:133-155
Module	exec

The function is defined in:

/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/shared_ptr_base.h:1296
/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/stl_vector.h:919,1046,1064,1169
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/OneBodyJastrowRef.h:133-155
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:166-173,179-182,236-260
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:223,229,249
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Particle/ParticleSet.h:313-316

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 10.17 to 1.00 cycles (10.17x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is poorly vectorized. Only 18% of vector register length is used (average across all SSE/AVX instructions).

Details

28% of SSE/AVX instructions are used in vector version (process two or more data elements in vector registers):

25% of SSE/AVX stores are used in vector version.
33% of SSE/AVX instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Workaround

Read the "512-bits vectorization" report at "Potential" confidence level.

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

512-bits vectorization

On some x86 processors supporting 512-bits vectorization, compilers are often too conservative and limit vectorization to 256 bits. Performance can then be improved by enforcing 512-bits vectorization, especially with many vectorized and high trip count loops. 512-bits vectorization performance overhead (compared to 256-bits) is generally lower on newer processors.

Workaround

Recompile with -mprefer-vector-width=512

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 32 bytes. The binary function is storing 56 bytes.

General properties

nb instructions	61
nb uops	61
loop length	478
used x86 registers	11
used mmx registers	0
used xmm registers	0
used ymm registers	1
used zmm registers	0
nb stack references	5

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	10.17 cycles
front end	10.17 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11
uops	1.00	1.00	3.33	3.33	5.00	1.00	1.00	5.00	5.00	5.00	1.00	3.33
cycles	1.00	1.00	3.33	3.33	5.00	1.00	1.00	5.00	5.00	5.00	1.00	3.33

Execution ports to units layout:

P0 (256 bits): VPU, BRU, ALU, DIV/SQRT
P1 (256 bits): ALU, VPU
P2 (512 bits): load
P3 (512 bits): load
P4 (512 bits): store data
P5 (512 bits): ALU, VPU
P6: ALU, BRU
P7: store address
P8: store address
P9 (512 bits): store data
P10: ALU
P11 (512 bits): load

Cycles executing div or sqrt instructions

Cycles summary

Front-end	10.17
Dispatch	5.00
Overall L1	10.17

Vectorization ratios

all	28%
load	100%
store	25%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	33%

Vector efficiency ratios

all	18%
load	25%
store	21%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	14%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 10.17 cycles. At this rate:

1% of peak load performance is reached (3.15 out of 192.00 bytes loaded per cycle (GB/s @ 1GHz))
4% of peak store performance is reached (5.51 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Performance is limited by instruction throughput (loading/decoding program instructions to execution core) (front-end is a bottleneck). By removing all these bottlenecks, you can lower the cost of an iteration from 10.17 to 5.00 cycles (2.03x speedup).

ASM code

In the binary file, the address of the function is: 425300

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
PUSH %R15	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R14	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R13	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R12	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %RBX	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
AND $-0x20,%RSP	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
SUB $0x140,%RSP	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %RSI,0x38(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x8(%RDX),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RDX,0x40(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
CMP (%RDX),%RAX	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	N/A
JE 425e40 <_ZN16miniqmcreference17OneBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE14evaluateRatiosERNS1_18VirtualParticleSetERSt6vectorIdSaIdEE+0xb40>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %RDI,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
XOR %R14D,%R14D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
VBROADCASTI128 0x112f92(%RIP),%YMM0	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	5-8	0.33	vect (25.0%)
VMOVDQU %YMM0,0x100(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (50.0%)
MOV %RDI,0x30(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JMP 4253d3 <_ZN16miniqmcreference17OneBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE14evaluateRatiosERNS1_18VirtualParticleSetERSt6vectorIdSaIdEE+0xd3>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XCHG %AX,%AX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XCHG %AX,%AX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XCHG %AX,%AX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA -0x28(%RBP),%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
POP %RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %RBP	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
RET	1	0.50	0	0.33	0.33	0	0	0.50	0	0	0	0	0.33	0	2.13	N/A
NOP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run icx_4

Source file and lines	OneBodyJastrowRef.h:133-155
Module	exec

The function is defined in:

/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/shared_ptr_base.h:1296
/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/stl_vector.h:919,1046,1064,1169
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/OneBodyJastrowRef.h:133-155
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:166-173,179-182,236-260
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:223,229,249
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Particle/ParticleSet.h:313-316

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is poorly vectorized. Only 18% of vector register length is used (average across all SSE/AVX instructions).

Details

28% of SSE/AVX instructions are used in vector version (process two or more data elements in vector registers):

25% of SSE/AVX stores are used in vector version.
33% of SSE/AVX instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Workaround

Read the "512-bits vectorization" report at "Potential" confidence level.

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

512-bits vectorization

Workaround

Recompile with -mprefer-vector-width=512

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 32 bytes. The binary function is storing 56 bytes.

General properties

nb instructions	61
nb uops	61
loop length	478
used x86 registers	11
used mmx registers	0
used xmm registers	0
used ymm registers	1
used zmm registers	0
nb stack references	5

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	10.17 cycles
front end	10.17 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11
uops	1.00	1.00	3.33	3.33	5.00	1.00	1.00	5.00	5.00	5.00	1.00	3.33
cycles	1.00	1.00	3.33	3.33	5.00	1.00	1.00	5.00	5.00	5.00	1.00	3.33

Execution ports to units layout:

P0 (256 bits): VPU, BRU, ALU, DIV/SQRT
P1 (256 bits): ALU, VPU
P2 (512 bits): load
P3 (512 bits): load
P4 (512 bits): store data
P5 (512 bits): ALU, VPU
P6: ALU, BRU
P7: store address
P8: store address
P9 (512 bits): store data
P10: ALU
P11 (512 bits): load

Cycles executing div or sqrt instructions

Cycles summary

Front-end	10.17
Dispatch	5.00
Overall L1	10.17

Vectorization ratios

all	28%
load	100%
store	25%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	33%

Vector efficiency ratios

all	18%
load	25%
store	21%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	14%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 10.17 cycles. At this rate:

1% of peak load performance is reached (3.15 out of 192.00 bytes loaded per cycle (GB/s @ 1GHz))
4% of peak store performance is reached (5.51 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

ASM code

In the binary file, the address of the function is: 425300

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
PUSH %R15	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R14	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R13	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R12	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %RBX	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
AND $-0x20,%RSP	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
SUB $0x140,%RSP	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %RSI,0x38(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x8(%RDX),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RDX,0x40(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
CMP (%RDX),%RAX	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	N/A
JE 425e40 <_ZN16miniqmcreference17OneBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE14evaluateRatiosERNS1_18VirtualParticleSetERSt6vectorIdSaIdEE+0xb40>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %RDI,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
XOR %R14D,%R14D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
VBROADCASTI128 0x112f92(%RIP),%YMM0	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	5-8	0.33	vect (25.0%)
VMOVDQU %YMM0,0x100(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (50.0%)
MOV %RDI,0x30(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JMP 4253d3 <_ZN16miniqmcreference17OneBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE14evaluateRatiosERNS1_18VirtualParticleSetERSt6vectorIdSaIdEE+0xd3>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XCHG %AX,%AX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XCHG %AX,%AX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XCHG %AX,%AX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA -0x28(%RBP),%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
POP %RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %RBP	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
RET	1	0.50	0	0.33	0.33	0	0	0.50	0	0	0	0	0.33	0	2.13	N/A
NOP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A

Name	Coverage (%)	Time (s)
▼miniqmcreference::OneBodyJastrowRef >::evaluateRatios(qmcplusplus::VirtualParticleSet&, std::vector >&)–	0.04	0.03
▼Loop 324 - OneBodyJastrowRef.h:134-155 - exec–	0.00	0.01
▼Loop 326 - OneBodyJastrowRef.h:134-146 - exec–	0.00	0.01
○Loop 330 - BsplineFunctor.h:236-241 - exec	0.03	0.03
○Loop 327 - BsplineFunctor.h:246-260 - exec	0.00	0.01
○Loop 328 - BsplineFunctor.h:246-260 - exec	0.00	0.00
○Loop 329 - BsplineFunctor.h:236-241 - exec	0.00	0.00
○Loop 325 - BsplineFunctor.h:166-182 - exec	0.00	0.00

Report Configuration

Code clean check

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Vectorization

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Execution units bottlenecks

512-bits vectorization

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Type of elements and instruction set

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

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Cycles and memory resources usage

Front-end bottlenecks

ASM code

Code clean check

Workaround

Vectorization

Details

Workaround

Execution units bottlenecks

512-bits vectorization

Workaround

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code