OV - exec - Function qmcplusplus::TimerType<std::chrono::_V2::system

	Function: qmcplusplus::TimerType<std::chrono::_V2::system_clock>::start()	Module: exec	Source: NewTimer.cpp:37-81 [...]	Coverage (incl. loops): 0.03% \| (excl. loops): 0.03%

/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.cpp: 37 - 81

--------------------------------------------------------------------------------

37: void TimerType<CLOCK>::start()

38: {

39:   if (active)

[...]

53:     for (int level = omp_get_level(); level > 0; level--)

54:       if (omp_get_ancestor_thread_num(level) != 0)

55:         is_true_master = false;

56:     if (is_true_master)

57:     {

58:       if (manager)

59:       {

60:         // compute current_stack_key

61:         TimerType* parent = manager->current_timer();

62:         if (parent)

63:         {

64:           current_stack_key = parent->get_stack_key();

65:           current_stack_key.add_id(timer_id);

66:         }

67:         else

68:         {

69:           current_stack_key = StackKey();

70:           current_stack_key.add_id(timer_id);

71:         }

72:

73:         manager->push_timer(this);

74:       }

75:       start_time = CLOCK::now();

[...]

81: }

/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.h: 90 - 99

--------------------------------------------------------------------------------

90:     short_buckets[level] = c1;

91:     if (level >= max_level - 1)

92:     {

93:       timer_max_level_exceeded = true;

94:     }

95:     else

96:     {

97:       level++;

98:     }

99:   }

/cluster/comp/gcc/14.2.0/include/c++/14.2.0/bits/stl_vector.h: 993 - 993

--------------------------------------------------------------------------------

993:       { return size_type(this->_M_impl._M_finish - this->_M_impl._M_start); }

/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Utilities/TimerManager.h: 92 - 93

--------------------------------------------------------------------------------

92:     if (CurrentTimerStack.size() > 0)

93:       current = CurrentTimerStack.back();

0x52c850 PUSH	%RBP

0x52c851 MOV	%RSP,%RBP

0x52c854 PUSH	%R14

0x52c856 PUSH	%R13

0x52c858 PUSH	%R12

0x52c85a PUSH	%RBX

0x52c85b MOVZX	0x38(%RDI),%EBX

0x52c85f TEST	%BL,%BL

0x52c861 JNE	52c870

0x52c863 POP	%RBX

0x52c864 POP	%R12

0x52c866 POP	%R13

0x52c868 POP	%R14

0x52c86a POP	%RBP

0x52c86b RET

0x52c86c NOPL	(%RAX)

0x52c870 MOV	%RDI,%R13

0x52c873 CALL	4047a0 <omp_get_level@plt>

0x52c878 MOV	%EAX,%R12D

0x52c87b TEST	%EAX,%EAX

0x52c87d JLE	52c9cc

0x52c883 LEA	-0x1(%RAX),%R14D

0x52c887 AND	$0x7,%EAX

0x52c88a JE	52c92c

0x52c890 CMP	$0x1,%EAX

0x52c893 JE	52c912

0x52c895 CMP	$0x2,%EAX

0x52c898 JE	52c8fe

0x52c89a CMP	$0x3,%EAX

0x52c89d JE	52c8ea

0x52c89f CMP	$0x4,%EAX

0x52c8a2 JE	52c8d7

0x52c8a4 CMP	$0x5,%EAX

0x52c8a7 JE	52c8c4

0x52c8a9 CMP	$0x6,%EAX

0x52c8ac JNE	52ca38

0x52c8b2 MOV	%R12D,%EDI

0x52c8b5 CALL	404610 <omp_get_ancestor_thread_num@plt>

0x52c8ba TEST	%EAX,%EAX

0x52c8bc SETE	%CL

0x52c8bf AND	%ECX,%EBX

0x52c8c1 DEC	%R12D

0x52c8c4 MOV	%R12D,%EDI

0x52c8c7 CALL	404610 <omp_get_ancestor_thread_num@plt>

0x52c8cc TEST	%EAX,%EAX

0x52c8ce SETE	%SIL

0x52c8d2 AND	%ESI,%EBX

0x52c8d4 DEC	%R12D

0x52c8d7 MOV	%R12D,%EDI

0x52c8da CALL	404610 <omp_get_ancestor_thread_num@plt>

0x52c8df TEST	%EAX,%EAX

0x52c8e1 SETE	%DIL

0x52c8e5 AND	%EDI,%EBX

0x52c8e7 DEC	%R12D

0x52c8ea MOV	%R12D,%EDI

0x52c8ed CALL	404610 <omp_get_ancestor_thread_num@plt>

0x52c8f2 TEST	%EAX,%EAX

0x52c8f4 SETE	%R8B

0x52c8f8 AND	%R8D,%EBX

0x52c8fb DEC	%R12D

0x52c8fe MOV	%R12D,%EDI

0x52c901 CALL	404610 <omp_get_ancestor_thread_num@plt>

0x52c906 TEST	%EAX,%EAX

0x52c908 SETE	%R9B

0x52c90c AND	%R9D,%EBX

0x52c90f DEC	%R12D

0x52c912 MOV	%R12D,%EDI

0x52c915 CALL	404610 <omp_get_ancestor_thread_num@plt>

0x52c91a TEST	%EAX,%EAX

0x52c91c SETE	%R10B

0x52c920 AND	%R10D,%EBX

0x52c923 DEC	%R12D

0x52c926 JE	52c9c4

(2124) 0x52c92c MOV	%R12D,%EDI

(2124) 0x52c92f CALL	404610 <omp_get_ancestor_thread_num@plt>

(2124) 0x52c934 TEST	%EAX,%EAX

(2124) 0x52c936 SETE	%R11B

(2124) 0x52c93a LEA	-0x1(%R12),%EDI

(2124) 0x52c93f AND	%R11D,%EBX

(2124) 0x52c942 CALL	404610 <omp_get_ancestor_thread_num@plt>

(2124) 0x52c947 TEST	%EAX,%EAX

(2124) 0x52c949 LEA	-0x2(%R12),%EDI

(2124) 0x52c94e SETE	%R14B

(2124) 0x52c952 CALL	404610 <omp_get_ancestor_thread_num@plt>

(2124) 0x52c957 AND	%R14D,%EBX

(2124) 0x52c95a TEST	%EAX,%EAX

(2124) 0x52c95c SETE	%AL

(2124) 0x52c95f LEA	-0x3(%R12),%EDI

(2124) 0x52c964 AND	%EAX,%EBX

(2124) 0x52c966 CALL	404610 <omp_get_ancestor_thread_num@plt>

(2124) 0x52c96b TEST	%EAX,%EAX

(2124) 0x52c96d SETE	%DL

(2124) 0x52c970 LEA	-0x4(%R12),%EDI

(2124) 0x52c975 AND	%EDX,%EBX

(2124) 0x52c977 CALL	404610 <omp_get_ancestor_thread_num@plt>

(2124) 0x52c97c TEST	%EAX,%EAX

(2124) 0x52c97e SETE	%CL

(2124) 0x52c981 LEA	-0x5(%R12),%EDI

(2124) 0x52c986 AND	%ECX,%EBX

(2124) 0x52c988 CALL	404610 <omp_get_ancestor_thread_num@plt>

(2124) 0x52c98d TEST	%EAX,%EAX

(2124) 0x52c98f SETE	%SIL

(2124) 0x52c993 LEA	-0x6(%R12),%EDI

(2124) 0x52c998 AND	%ESI,%EBX

(2124) 0x52c99a CALL	404610 <omp_get_ancestor_thread_num@plt>

(2124) 0x52c99f TEST	%EAX,%EAX

(2124) 0x52c9a1 LEA	-0x7(%R12),%EDI

(2124) 0x52c9a6 SETE	%R14B

(2124) 0x52c9aa CALL	404610 <omp_get_ancestor_thread_num@plt>

(2124) 0x52c9af AND	%EBX,%R14D

(2124) 0x52c9b2 TEST	%EAX,%EAX

(2124) 0x52c9b4 SETE	%BL

(2124) 0x52c9b7 AND	%R14D,%EBX

(2124) 0x52c9ba SUB	$0x8,%R12D

(2124) 0x52c9be JNE	52c92c

0x52c9c4 TEST	%BL,%BL

0x52c9c6 JE	52c863

0x52c9cc MOV	0x48(%R13),%RDI

0x52c9d0 TEST	%RDI,%RDI

0x52c9d3 JE	52ca1f

0x52c9d5 MOV	0x48(%RDI),%R12

0x52c9d9 MOVZX	0x40(%R13),%R8D

0x52c9de CMP	%R12,0x40(%RDI)

0x52c9e2 JE	52ca60

0x52c9e4 MOV	-0x8(%R12),%R9

0x52c9e9 TEST	%R9,%R9

0x52c9ec JE	52ca60

0x52c9ee VMOVDQU	0x50(%R9),%XMM1

0x52c9f4 VMOVDQU	%XMM1,0x50(%R13)

0x52c9fa MOVSXD	0x60(%R9),%R10

0x52c9fe MOV	%R10D,0x60(%R13)

0x52ca02 MOV	%R10,%R11

0x52ca05 MOV	%R8B,0x50(%R13,%R10,1)

0x52ca0a CMP	$0xe,%R10D

0x52ca0e JG	52ca50

0x52ca10 INC	%R11D

0x52ca13 MOV	%R11D,0x60(%R13)

0x52ca17 MOV	%R13,%RSI

0x52ca1a CALL	5338d0 <_ZN11qmcplusplus12TimerManagerINS_9TimerTypeINSt6chrono3_V212system_clockEEEE10push_timerEPS5_>

0x52ca1f CALL	404670 <_ZNSt6chrono3_V212system_clock3nowEv@plt>

0x52ca24 MOV	%RAX,(%R13)

0x52ca28 POP	%RBX

0x52ca29 POP	%R12

0x52ca2b POP	%R13

0x52ca2d POP	%R14

0x52ca2f POP	%RBP

0x52ca30 RET

0x52ca31 NOPL	(%RAX)

0x52ca38 MOV	%R12D,%EDI

0x52ca3b CALL	404610 <omp_get_ancestor_thread_num@plt>

0x52ca40 TEST	%EAX,%EAX

0x52ca42 SETE	%DL

0x52ca45 AND	%EDX,%EBX

0x52ca47 MOV	%R14D,%R12D

0x52ca4a JMP	52c8b2

0x52ca4f NOP

0x52ca50 MOVB	$0x1,0xaada9(%RIP)

0x52ca57 JMP	52ca17

0x52ca59 NOPL	(%RAX)

0x52ca60 VPXOR	%XMM0,%XMM0,%XMM0

0x52ca64 VMOVDQU	%XMM0,0x50(%R13)

0x52ca6a MOVL	$0x1,0x60(%R13)

0x52ca72 MOV	%R8B,0x50(%R13)

0x52ca76 JMP	52ca17

0x52ca78 NOPL	(%RAX,%RAX,1)

Coverage (%)	Name	Source Location	Module
►20.65+	qmcplusplus::SoaDistanceTableA[...]	stl_vector.h:1128	exec
○	qmcplusplus::ParticleSet::acce[...]	ParticleSet.cpp:389	exec
○	main._omp_fn.1	miniqmc.cpp:453	exec
○	gomp_thread_start	team.c:130	libgomp.so.1.0.0
►11.24+	qmcplusplus::SoaDistanceTableA[...]	SoaDistanceTableABOMPTarget.h:189	exec
○	qmcplusplus::ParticleSet::upda[...]	stl_vector.h:992	exec
○	main._omp_fn.1	NonLocalPP.hpp:135	exec
○	gomp_thread_start	team.c:130	libgomp.so.1.0.0
►7.26+	qmcplusplus::ParticleSet::upda[...]	unique_ptr.h:463	exec
○	main._omp_fn.1	NonLocalPP.hpp:135	exec
○	gomp_thread_start	team.c:130	libgomp.so.1.0.0
►5.90+	qmcplusplus::ParticleSet::acce[...]	ParticleSet.cpp:389	exec
○	main._omp_fn.1	miniqmc.cpp:453	exec
○	gomp_thread_start	team.c:130	libgomp.so.1.0.0
►5.90+	qmcplusplus::WaveFunction::eva[...]	stl_vector.h:1128	exec
○	main._omp_fn.1	NonLocalPP.hpp:126	exec
○	gomp_thread_start	team.c:130	libgomp.so.1.0.0
►5.26+	qmcplusplus::WaveFunction::rat[...]	stl_vector.h:1128	exec
○	main._omp_fn.1	refwrap.h:350	exec
○	gomp_thread_start	team.c:130	libgomp.so.1.0.0
►4.31+	qmcplusplus::SoaDistanceTableA[...]	unique_ptr.h:193	exec
○	qmcplusplus::ParticleSet::make[...]	stl_vector.h:993	exec
○	main._omp_fn.1	stl_vector.h:1128	exec
○	gomp_thread_start	team.c:130	libgomp.so.1.0.0
►3.99+	main._omp_fn.1	miniqmc.cpp:441	exec
○	gomp_thread_start	team.c:130	libgomp.so.1.0.0
►3.43+	main._omp_fn.1	miniqmc.cpp:433	exec
○	gomp_thread_start	team.c:130	libgomp.so.1.0.0
►3.19+	qmcplusplus::WaveFunction::eva[...]	NewTimer.h:242	exec
○	main._omp_fn.1	stl_vector.h:1128	exec
○	gomp_thread_start	team.c:130	libgomp.so.1.0.0
►2.87+	miniqmcreference::DiracDetermi[...]	unique_ptr.h:193	exec
○	qmcplusplus::WaveFunction::rat[...]	WaveFunction.cpp:198	exec
○	main._omp_fn.1	refwrap.h:350	exec
○	gomp_thread_start	team.c:130	libgomp.so.1.0.0
►2.63+	miniqmcreference::DiracDetermi[...]	DiracDeterminantRef.cpp:102	exec
○	qmcplusplus::WaveFunction::rat[...]	WaveFunction.cpp:198	exec
○	main._omp_fn.1	refwrap.h:350	exec
○	gomp_thread_start	team.c:130	libgomp.so.1.0.0
►2.55+	miniqmcreference::einspline_sp[...]	ParticleSet.h:143	exec
○	miniqmcreference::DiracDetermi[...]	DiracDeterminantRef.cpp:100	exec
○	qmcplusplus::WaveFunction::rat[...]	WaveFunction.cpp:198	exec
○	main._omp_fn.1	refwrap.h:350	exec
○	gomp_thread_start	team.c:130	libgomp.so.1.0.0
►2.39+	qmcplusplus::WaveFunction::acc[...]	WaveFunction.cpp:228	exec
○	main._omp_fn.1	refwrap.h:350	exec
○	gomp_thread_start	team.c:130	libgomp.so.1.0.0
►2.39+	qmcplusplus::ParticleSet::acce[...]	unique_ptr.h:193	exec
○	main._omp_fn.1	miniqmc.cpp:453	exec
○	gomp_thread_start	team.c:130	libgomp.so.1.0.0
►1.44+	qmcplusplus::SoaDistanceTableA[...]	OhmmsVector.h:248	exec
○	qmcplusplus::ParticleSet::acce[...]	ParticleSet.cpp:389	exec
○	main._omp_fn.1	miniqmc.cpp:453	exec
○	gomp_thread_start	team.c:130	libgomp.so.1.0.0
►1.36+	main._omp_fn.1	miniqmc.cpp:450	exec
○	gomp_thread_start	team.c:130	libgomp.so.1.0.0
►1.28+	miniqmcreference::DiracDetermi[...]	OhmmsMatrix.h:214	exec
○	qmcplusplus::WaveFunction::eva[...]	stl_vector.h:992	exec
○	main._omp_fn.1	stl_vector.h:1128	exec
○	gomp_thread_start	team.c:130	libgomp.so.1.0.0
►1.12+	miniqmcreference::DiracDetermi[...]	OhmmsMatrix.h:214	exec
○	qmcplusplus::WaveFunction::eva[...]	WaveFunction.cpp:183	exec
○	main._omp_fn.1	stl_vector.h:1128	exec
○	gomp_thread_start	team.c:130	libgomp.so.1.0.0
►1.04+	qmcplusplus::SoaDistanceTableA[...]	OhmmsVector.h:178	exec
○	qmcplusplus::ParticleSet::make[...]	stl_vector.h:993	exec
○	main._omp_fn.1	stl_vector.h:1128	exec
○	gomp_thread_start	team.c:130	libgomp.so.1.0.0

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.03% of application time for run gcc_3

Source file and lines	NewTimer.cpp:37-81
Module	exec

The function is defined in:

/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.cpp:37-39,53-75,81
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.h:90-99
/cluster/comp/gcc/14.2.0/include/c++/14.2.0/bits/stl_vector.h:993
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Utilities/TimerManager.h:92-93

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 22.17 to 7.50 cycles (2.96x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is not vectorized. Only 8% of vector register length is used (average across all SSE/AVX instructions). By fully vectorizing your function, you can lower the cost of an iteration from 22.17 to 0.76 cycles (29.05x speedup).

Details

10% of SSE/AVX instructions are used in vector version (process two or more data elements in vector registers):

25% of SSE/AVX loads are used in vector version.
28% of SSE/AVX stores are used in vector version.
0% of SSE/AVX addition or subtraction instructions are used in vector version.
3% of SSE/AVX instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

omp_get_ancestor_thread_num@plt: 7 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.cpp:54
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.cpp:54
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.cpp:54
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.cpp:54
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.cpp:54
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.cpp:54
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.cpp:54
omp_get_level@plt: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.cpp:53
qmcplusplus::TimerManager
>::push_timer(qmcplusplus::TimerType
*): 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.cpp:73
std::chrono::_V2::system_clock::now(): 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.cpp:75

Conversion instructions

Detected expensive conversion instructions.

Details

MOVZX: 2 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.cpp:39
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.cpp:65

Workaround

Avoid mixing data with different types. In particular, check if the type of constants is the same as array elements.

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 54 bytes. The binary function is storing 55 bytes.

General properties

nb instructions	123
nb uops	133
loop length	408
used x86 registers	15
used mmx registers	0
used xmm registers	2
used ymm registers	0
used zmm registers	0
nb stack references	0

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	22.17 cycles
front end	22.17 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11
uops	12.00	12.00	6.67	6.67	12.00	12.00	12.00	12.00	12.00	12.00	12.00	6.67
cycles	12.00	12.00	6.67	6.67	12.00	12.00	12.00	12.00	12.00	12.00	12.00	6.67

Execution ports to units layout:

P0 (256 bits): VPU, BRU, ALU, DIV/SQRT
P1 (256 bits): ALU, VPU
P2 (512 bits): load
P3 (512 bits): load
P4 (512 bits): store data
P5 (512 bits): ALU, VPU
P6: ALU, BRU
P7: store address
P8: store address
P9 (512 bits): store data
P10: ALU
P11 (512 bits): load

Cycles executing div or sqrt instructions

Cycles summary

Front-end	22.17
Dispatch	12.00
Overall L1	22.17

Vectorization ratios

all	10%
load	25%
store	28%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	3%

Vector efficiency ratios

all	8%
load	10%
store	11%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	6%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	8%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 22.17 cycles. At this rate:

1% of peak load performance is reached (2.44 out of 192.00 bytes loaded per cycle (GB/s @ 1GHz))
1% of peak store performance is reached (2.48 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Performance is limited by instruction throughput (loading/decoding program instructions to execution core) (front-end is a bottleneck). By removing all these bottlenecks, you can lower the cost of an iteration from 22.17 to 12.00 cycles (1.85x speedup).

ASM code

In the binary file, the address of the function is: 52c850

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
PUSH %R14	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R13	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R12	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %RBX	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
MOVZX 0x38(%RDI),%EBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (1.6%)
TEST %BL,%BL	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	N/A
JNE 52c870 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0x20>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
POP %RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %RBP	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
RET	1	0.50	0	0.33	0.33	0	0	0.50	0	0	0	0	0.33	0	2.13	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RDI,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 4047a0 <omp_get_level@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV %EAX,%R12D	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
TEST %EAX,%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (6.3%)
JLE 52c9cc <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0x17c>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
LEA -0x1(%RAX),%R14D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
AND $0x7,%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
JE 52c92c <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0xdc>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP $0x1,%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
JE 52c912 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0xc2>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP $0x2,%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
JE 52c8fe <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0xae>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP $0x3,%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
JE 52c8ea <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0x9a>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP $0x4,%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
JE 52c8d7 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0x87>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP $0x5,%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
JE 52c8c4 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0x74>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP $0x6,%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
JNE 52ca38 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0x1e8>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %R12D,%EDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 404610 <omp_get_ancestor_thread_num@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
TEST %EAX,%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (6.3%)
SETE %CL	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	1	0.50	N/A
AND %ECX,%EBX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	scal (6.3%)
DEC %R12D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %R12D,%EDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 404610 <omp_get_ancestor_thread_num@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
TEST %EAX,%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (6.3%)
SETE %SIL	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	1	0.50	N/A
AND %ESI,%EBX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	scal (6.3%)
DEC %R12D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %R12D,%EDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 404610 <omp_get_ancestor_thread_num@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
TEST %EAX,%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (6.3%)
SETE %DIL	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	1	0.50	N/A
AND %EDI,%EBX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	scal (6.3%)
DEC %R12D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %R12D,%EDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 404610 <omp_get_ancestor_thread_num@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
TEST %EAX,%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (6.3%)
SETE %R8B	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	1	0.50	N/A
AND %R8D,%EBX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	scal (6.3%)
DEC %R12D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %R12D,%EDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 404610 <omp_get_ancestor_thread_num@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
TEST %EAX,%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (6.3%)
SETE %R9B	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	1	0.50	N/A
AND %R9D,%EBX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	scal (6.3%)
DEC %R12D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %R12D,%EDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 404610 <omp_get_ancestor_thread_num@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
TEST %EAX,%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (6.3%)
SETE %R10B	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	1	0.50	N/A
AND %R10D,%EBX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	scal (6.3%)
DEC %R12D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
JE 52c9c4 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0x174>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
TEST %BL,%BL	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	N/A
JE 52c863 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0x13>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV 0x48(%R13),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
TEST %RDI,%RDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (12.5%)
JE 52ca1f <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0x1cf>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV 0x48(%RDI),%R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOVZX 0x40(%R13),%R8D	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (1.6%)
CMP %R12,0x40(%RDI)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JE 52ca60 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0x210>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x8(%R12),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
TEST %R9,%R9	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (12.5%)
JE 52ca60 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0x210>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
VMOVDQU 0x50(%R9),%XMM1	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	0-1	0.33	vect (25.0%)
VMOVDQU %XMM1,0x50(%R13)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
MOVSXD 0x60(%R9),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %R10D,0x60(%R13)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOV %R10,%R11	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %R8B,0x50(%R13,%R10,1)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	N/A
CMP $0xe,%R10D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
JG 52ca50 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0x200>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
INC %R11D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
MOV %R11D,0x60(%R13)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOV %R13,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
CALL 5338d0 <_ZN11qmcplusplus12TimerManagerINS_9TimerTypeINSt6chrono3_V212system_clockEEEE10push_timerEPS5_>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
CALL 404670 <_ZNSt6chrono3_V212system_clock3nowEv@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV %RAX,(%R13)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
POP %RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %RBP	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
RET	1	0.50	0	0.33	0.33	0	0	0.50	0	0	0	0	0.33	0	2.13	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R12D,%EDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 404610 <omp_get_ancestor_thread_num@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
TEST %EAX,%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	N/A
SETE %DL	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	1	0.50	N/A
AND %EDX,%EBX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	scal (6.3%)
MOV %R14D,%R12D	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JMP 52c8b2 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0x62>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
NOP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOVB $0x1,0xaada9(%RIP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (1.6%)
JMP 52ca17 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0x1c7>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VPXOR %XMM0,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
VMOVDQU %XMM0,0x50(%R13)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
MOVL $0x1,0x60(%R13)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOV %R8B,0x50(%R13)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	N/A
JMP 52ca17 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0x1c7>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A

The code analyzed by CQA in that panel excludes loops and represents 0.03% of application time for run gcc_3

Source file and lines	NewTimer.cpp:37-81
Module	exec

The function is defined in:

/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.cpp:37-39,53-75,81
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.h:90-99
/cluster/comp/gcc/14.2.0/include/c++/14.2.0/bits/stl_vector.h:993
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Utilities/TimerManager.h:92-93

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 22.17 to 7.50 cycles (2.96x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

10% of SSE/AVX instructions are used in vector version (process two or more data elements in vector registers):

25% of SSE/AVX loads are used in vector version.
28% of SSE/AVX stores are used in vector version.
0% of SSE/AVX addition or subtraction instructions are used in vector version.
3% of SSE/AVX instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

omp_get_ancestor_thread_num@plt: 7 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.cpp:54
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.cpp:54
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.cpp:54
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.cpp:54
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.cpp:54
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.cpp:54
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.cpp:54
omp_get_level@plt: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.cpp:53
qmcplusplus::TimerManager
>::push_timer(qmcplusplus::TimerType
*): 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.cpp:73
std::chrono::_V2::system_clock::now(): 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.cpp:75

Conversion instructions

Detected expensive conversion instructions.

Details

MOVZX: 2 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.cpp:39
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.cpp:65

Workaround

Avoid mixing data with different types. In particular, check if the type of constants is the same as array elements.

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 54 bytes. The binary function is storing 55 bytes.

General properties

nb instructions	123
nb uops	133
loop length	408
used x86 registers	15
used mmx registers	0
used xmm registers	2
used ymm registers	0
used zmm registers	0
nb stack references	0

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	22.17 cycles
front end	22.17 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11
uops	12.00	12.00	6.67	6.67	12.00	12.00	12.00	12.00	12.00	12.00	12.00	6.67
cycles	12.00	12.00	6.67	6.67	12.00	12.00	12.00	12.00	12.00	12.00	12.00	6.67

Execution ports to units layout:

P0 (256 bits): VPU, BRU, ALU, DIV/SQRT
P1 (256 bits): ALU, VPU
P2 (512 bits): load
P3 (512 bits): load
P4 (512 bits): store data
P5 (512 bits): ALU, VPU
P6: ALU, BRU
P7: store address
P8: store address
P9 (512 bits): store data
P10: ALU
P11 (512 bits): load

Cycles executing div or sqrt instructions

Cycles summary

Front-end	22.17
Dispatch	12.00
Overall L1	22.17

Vectorization ratios

all	10%
load	25%
store	28%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	3%

Vector efficiency ratios

all	8%
load	10%
store	11%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	6%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	8%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 22.17 cycles. At this rate:

1% of peak load performance is reached (2.44 out of 192.00 bytes loaded per cycle (GB/s @ 1GHz))
1% of peak store performance is reached (2.48 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

ASM code

In the binary file, the address of the function is: 52c850

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
PUSH %R14	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R13	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R12	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %RBX	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
MOVZX 0x38(%RDI),%EBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (1.6%)
TEST %BL,%BL	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	N/A
JNE 52c870 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0x20>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
POP %RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %RBP	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
RET	1	0.50	0	0.33	0.33	0	0	0.50	0	0	0	0	0.33	0	2.13	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RDI,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 4047a0 <omp_get_level@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV %EAX,%R12D	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
TEST %EAX,%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (6.3%)
JLE 52c9cc <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0x17c>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
LEA -0x1(%RAX),%R14D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
AND $0x7,%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
JE 52c92c <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0xdc>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP $0x1,%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
JE 52c912 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0xc2>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP $0x2,%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
JE 52c8fe <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0xae>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP $0x3,%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
JE 52c8ea <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0x9a>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP $0x4,%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
JE 52c8d7 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0x87>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP $0x5,%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
JE 52c8c4 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0x74>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP $0x6,%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
JNE 52ca38 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0x1e8>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %R12D,%EDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 404610 <omp_get_ancestor_thread_num@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
TEST %EAX,%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (6.3%)
SETE %CL	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	1	0.50	N/A
AND %ECX,%EBX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	scal (6.3%)
DEC %R12D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %R12D,%EDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 404610 <omp_get_ancestor_thread_num@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
TEST %EAX,%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (6.3%)
SETE %SIL	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	1	0.50	N/A
AND %ESI,%EBX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	scal (6.3%)
DEC %R12D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %R12D,%EDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 404610 <omp_get_ancestor_thread_num@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
TEST %EAX,%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (6.3%)
SETE %DIL	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	1	0.50	N/A
AND %EDI,%EBX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	scal (6.3%)
DEC %R12D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %R12D,%EDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 404610 <omp_get_ancestor_thread_num@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
TEST %EAX,%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (6.3%)
SETE %R8B	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	1	0.50	N/A
AND %R8D,%EBX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	scal (6.3%)
DEC %R12D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %R12D,%EDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 404610 <omp_get_ancestor_thread_num@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
TEST %EAX,%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (6.3%)
SETE %R9B	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	1	0.50	N/A
AND %R9D,%EBX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	scal (6.3%)
DEC %R12D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %R12D,%EDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 404610 <omp_get_ancestor_thread_num@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
TEST %EAX,%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (6.3%)
SETE %R10B	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	1	0.50	N/A
AND %R10D,%EBX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	scal (6.3%)
DEC %R12D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
JE 52c9c4 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0x174>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
TEST %BL,%BL	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	N/A
JE 52c863 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0x13>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV 0x48(%R13),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
TEST %RDI,%RDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (12.5%)
JE 52ca1f <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0x1cf>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV 0x48(%RDI),%R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOVZX 0x40(%R13),%R8D	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (1.6%)
CMP %R12,0x40(%RDI)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JE 52ca60 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0x210>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x8(%R12),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
TEST %R9,%R9	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (12.5%)
JE 52ca60 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0x210>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
VMOVDQU 0x50(%R9),%XMM1	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	0-1	0.33	vect (25.0%)
VMOVDQU %XMM1,0x50(%R13)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
MOVSXD 0x60(%R9),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %R10D,0x60(%R13)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOV %R10,%R11	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %R8B,0x50(%R13,%R10,1)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	N/A
CMP $0xe,%R10D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
JG 52ca50 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0x200>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
INC %R11D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
MOV %R11D,0x60(%R13)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOV %R13,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
CALL 5338d0 <_ZN11qmcplusplus12TimerManagerINS_9TimerTypeINSt6chrono3_V212system_clockEEEE10push_timerEPS5_>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
CALL 404670 <_ZNSt6chrono3_V212system_clock3nowEv@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV %RAX,(%R13)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
POP %RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %RBP	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
RET	1	0.50	0	0.33	0.33	0	0	0.50	0	0	0	0	0.33	0	2.13	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R12D,%EDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 404610 <omp_get_ancestor_thread_num@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
TEST %EAX,%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	N/A
SETE %DL	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	1	0.50	N/A
AND %EDX,%EBX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	scal (6.3%)
MOV %R14D,%R12D	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JMP 52c8b2 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0x62>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
NOP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOVB $0x1,0xaada9(%RIP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (1.6%)
JMP 52ca17 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0x1c7>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VPXOR %XMM0,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
VMOVDQU %XMM0,0x50(%R13)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
MOVL $0x1,0x60(%R13)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOV %R8B,0x50(%R13)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	N/A
JMP 52ca17 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv+0x1c7>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A

Name	Coverage (%)	Time (s)
▼qmcplusplus::TimerType::start()–	0.03	0.03
○Loop 2124 - NewTimer.cpp:53-54 - exec	0.00	0.00

Report Configuration

Code clean check

Workaround

Vectorization

Details

Workaround

Execution units bottlenecks

CALL instructions

Details

Conversion instructions

Details

Workaround

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code

Code clean check

Workaround

Vectorization

Details

Workaround

Execution units bottlenecks

CALL instructions

Details

Conversion instructions

Details

Workaround

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code