OV - exec - Function miniqmcreference::DiracDeterminantRef<qmcplusplus::DelayedUpdate<double, double> >::evaluateGL(qmcplusplus::ParticleSet&, qmcplusplus::ParticleAttrib<qmcplusplus::TinyVector<double, 3u>, std::allocator<qmcplusplus::TinyVector<double, 3u> > >&, qmcplusplus::ParticleAttrib<double, std::allocator<double> >&, bool)

	Function: miniqmcreference::DiracDeterminantRef<qmcplusplus::DelayedUpdate<double, double> >::evalua ...	Module: exec	Source: DiracDeterminantRef.cpp:152-181 [...]	Coverage (incl. loops): 0.81% \| (excl. loops): 0.00%

/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/SPOSet.h: 106 - 111

--------------------------------------------------------------------------------

106:     for (int iat = first, i = 0; iat < last; ++iat, ++i)

107:     {

108:       ValueVector_t v(logdet[i], OrbitalSetSize);

109:       GradVector_t g(dlogdet[i], OrbitalSetSize);

110:       ValueVector_t l(d2logdet[i], OrbitalSetSize);

111:       evaluate(P, iat, v, g, l);

/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/inner_product.hpp: 82 - 156

--------------------------------------------------------------------------------

82:   for (int i = 0; i < n; i++)

83:     res += a[i] * b[i];

[...]

155:   for (int i = 0; i < n; i++)

156:     res += a[i] * b[i];

/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/PETE/OperatorTags.h: 63 - 94

--------------------------------------------------------------------------------

63:     return (a * b);

[...]

94:     (const_cast<T1&>(a) += b);

/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/TinyVectorOps.h: 129 - 131

--------------------------------------------------------------------------------

129:     Type_t res = lhs[0] * rhs[0];

130:     for (unsigned d = 1; d < D; ++d)

131:       res += lhs[d] * rhs[d];

/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracDeterminantRef.cpp: 152 - 181

--------------------------------------------------------------------------------

152: void DiracDeterminantRef<DU_TYPE>::evaluateGL(ParticleSet& P,

153:                                               ParticleSet::ParticleGradient& G,

154:                                               ParticleSet::ParticleLaplacian& L,

155:                                               bool fromscratch)

156: {

157:   if (UpdateMode == ORB_PBYP_RATIO)

158:   { //need to compute dpsiM and d2psiM. Do not touch psiM!

159:     SPOVGLTimer->start();

160:     Phi->evaluate_notranspose(P, FirstIndex, LastIndex, psiM_temp, dpsiM, d2psiM);

161:     SPOVGLTimer->stop();

162:   }

163:

164:   if (NumPtcls == 1)

165:   {

166:     ValueType y = psiM(0, 0);

167:     GradType rv = y * dpsiM(0, 0);

168:     G[FirstIndex] += rv;

169:     L[FirstIndex] += y * d2psiM(0, 0) - dot(rv, rv);

170:   }

171:   else

172:   {

173:     for (size_t i = 0, iat = FirstIndex; i < NumPtcls; ++i, ++iat)

174:     {

175:       mValueType dot_temp = simd::dot(psiM[i], d2psiM[i], NumOrbitals);

176:       mGradType rv        = simd::dot(psiM[i], dpsiM[i], NumOrbitals);

177:       G[iat] += rv;

178:       L[iat] += dot_temp - dot(rv, rv);

179:     }

180:   }

181: }

/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsMatrix.h: 217 - 217

--------------------------------------------------------------------------------

217:   inline Type_t* operator[](size_type i) { return X.data() + i * D2; }

/cluster/comp/gcc/14.2.0/include/c++/14.2.0/bits/unique_ptr.h: 193 - 193

--------------------------------------------------------------------------------

193:       pointer    _M_ptr() const noexcept { return std::get<0>(_M_t); }

/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/TinyVector.h: 62 - 62

--------------------------------------------------------------------------------

62:       X[d] = T(0);

/cluster/comp/gcc/14.2.0/include/c++/14.2.0/bits/new_allocator.h: 104 - 172

--------------------------------------------------------------------------------

104:       ~__new_allocator() _GLIBCXX_USE_NOEXCEPT { }

[...]

172: 	_GLIBCXX_OPERATOR_DELETE(_GLIBCXX_SIZED_DEALLOC(__p, __n));

/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h: 56 - 248

--------------------------------------------------------------------------------

56:   explicit inline Vector(T* ref, size_t n) : nLocal(n), X(ref) {}

[...]

144:   virtual ~Vector() { free(); }

[...]

210:     if (nAllocated)

[...]

221:   inline Type_t& operator[](size_t i)

222:   {

223:     return X[i];

[...]

248:   inline pointer data() { return X; }

0x49c130 LEA	0x8(%RSP),%R10

0x49c135 AND	$-0x20,%RSP

0x49c139 PUSHQ	-0x8(%R10)

0x49c13d PUSH	%RBP

0x49c13e MOV	%RSP,%RBP

0x49c141 PUSH	%R15

0x49c143 PUSH	%R14

0x49c145 MOV	%RDX,%R14

0x49c148 PUSH	%R13

0x49c14a PUSH	%R12

0x49c14c PUSH	%R10

0x49c14e MOV	%RDI,%R10

0x49c151 PUSH	%RBX

0x49c152 SUB	$0xe0,%RSP

0x49c159 MOV	%RCX,-0x100(%RBP)

0x49c160 MOV	0xc(%RDI),%ECX

0x49c163 TEST	%ECX,%ECX

0x49c165 JE	49c9d5

0x49c16b MOV	0x484(%R10),%R13D

0x49c172 MOVSXD	0x478(%R10),%R8

0x49c179 CMP	$0x1,%R13D

0x49c17d JE	49c93a

0x49c183 MOVSXD	%R13D,%RDX

0x49c186 MOV	%RDX,-0x108(%RBP)

0x49c18d TEST	%R13D,%R13D

0x49c190 JE	49c8a4

0x49c196 MOV	0xd8(%R10),%RBX

0x49c19d MOV	-0x100(%RBP),%R13

0x49c1a4 MOV	0x480(%R10),%R9D

0x49c1ab MOV	0x158(%R10),%RSI

0x49c1b2 MOV	0x18(%R13),%RDX

0x49c1b6 LEA	(,%RBX,8),%RAX

0x49c1be LEA	-0x1(%R9),%R11D

0x49c1c2 MOV	0x100(%R10),%R12

0x49c1c9 MOV	0x180(%R10),%RCX

0x49c1d0 MOV	%RBX,-0xe8(%RBP)

0x49c1d7 MOV	0x18(%R14),%R14

0x49c1db MOV	%R9D,%EBX

0x49c1de MOV	%RSI,-0xf0(%RBP)

0x49c1e5 MOV	%RAX,-0xf8(%RBP)

0x49c1ec MOV	%R11D,-0xd4(%RBP)

0x49c1f3 LEA	(%R8,%R8,2),%R15

0x49c1f7 SHR	$0x2,%EBX

0x49c1fa LEA	(%RDX,%R8,8),%R8

0x49c1fe VMOVDQA	0x11b71a(%RIP),%YMM10

0x49c206 VMOVDQA	0x11b732(%RIP),%YMM9

0x49c20e VMOVDQA	0x11b74a(%RIP),%YMM8

0x49c216 VMOVDQA	0x11b762(%RIP),%YMM7

0x49c21e VMOVDQA	0x11b13a(%RIP),%YMM6

0x49c226 VMOVDQA	0x11b152(%RIP),%YMM5

0x49c22e MOV	%RCX,-0xd0(%RBP)

0x49c235 MOV	%R12,-0xe0(%RBP)

0x49c23c MOV	%R8,-0x100(%RBP)

0x49c243 MOV	%R12,%RCX

0x49c246 LEA	(%R14,%R15,8),%RDI

0x49c24a XOR	%R12D,%R12D

0x49c24d XOR	%R13D,%R13D

0x49c250 XOR	%R8D,%R8D

0x49c253 SAL	$0x5,%RBX

0x49c257 NOPW	(%RAX,%RAX,1)

(1130) 0x49c260 LEA	(,%R12,8),%R11

(1130) 0x49c268 TEST	%R9D,%R9D

(1130) 0x49c26b JLE	49c907

(1130) 0x49c271 CMPL	$0x2,-0xd4(%RBP)

(1130) 0x49c278 JBE	49c926

(1130) 0x49c27e LEA	-0x20(%RBX),%R14

(1130) 0x49c282 MOV	-0xd0(%RBP),%RSI

(1130) 0x49c289 SHR	$0x5,%R14

(1130) 0x49c28d INC	%R14

(1130) 0x49c290 LEA	(%RSI,%R11,1),%R15

(1130) 0x49c294 XOR	%EAX,%EAX

(1130) 0x49c296 VXORPD	%XMM12,%XMM12,%XMM12

(1130) 0x49c29b AND	$0x7,%R14D

(1130) 0x49c29f JE	49c33a

(1130) 0x49c2a5 CMP	$0x1,%R14

(1130) 0x49c2a9 JE	49c322

(1130) 0x49c2ab CMP	$0x2,%R14

(1130) 0x49c2af JE	49c313

(1130) 0x49c2b1 CMP	$0x3,%R14

(1130) 0x49c2b5 JE	49c304

(1130) 0x49c2b7 CMP	$0x4,%R14

(1130) 0x49c2bb JE	49c2f5

(1130) 0x49c2bd CMP	$0x5,%R14

(1130) 0x49c2c1 JE	49c2e6

(1130) 0x49c2c3 CMP	$0x6,%R14

(1130) 0x49c2c7 JE	49c2d7

(1130) 0x49c2c9 VMOVUPD	(%RCX),%YMM13

(1130) 0x49c2cd MOV	$0x20,%EAX

(1130) 0x49c2d2 VFMADD231PD	(%R15),%YMM13,%YMM12

(1130) 0x49c2d7 VMOVUPD	(%RCX,%RAX,1),%YMM14

(1130) 0x49c2dc VFMADD231PD	(%R15,%RAX,1),%YMM14,%YMM12

(1130) 0x49c2e2 ADD	$0x20,%RAX

(1130) 0x49c2e6 VMOVUPD	(%RCX,%RAX,1),%YMM15

(1130) 0x49c2eb VFMADD231PD	(%R15,%RAX,1),%YMM15,%YMM12

(1130) 0x49c2f1 ADD	$0x20,%RAX

(1130) 0x49c2f5 VMOVUPD	(%RCX,%RAX,1),%YMM0

(1130) 0x49c2fa VFMADD231PD	(%R15,%RAX,1),%YMM0,%YMM12

(1130) 0x49c300 ADD	$0x20,%RAX

(1130) 0x49c304 VMOVUPD	(%RCX,%RAX,1),%YMM4

(1130) 0x49c309 VFMADD231PD	(%R15,%RAX,1),%YMM4,%YMM12

(1130) 0x49c30f ADD	$0x20,%RAX

(1130) 0x49c313 VMOVUPD	(%RCX,%RAX,1),%YMM3

(1130) 0x49c318 VFMADD231PD	(%R15,%RAX,1),%YMM3,%YMM12

(1130) 0x49c31e ADD	$0x20,%RAX

(1130) 0x49c322 VMOVUPD	(%RCX,%RAX,1),%YMM1

(1130) 0x49c327 VFMADD231PD	(%R15,%RAX,1),%YMM1,%YMM12

(1130) 0x49c32d ADD	$0x20,%RAX

(1130) 0x49c331 CMP	%RAX,%RBX

(1130) 0x49c334 JE	49c3c7

  (1132) 0x49c33a VMOVUPD	(%RCX,%RAX,1),%YMM2

  (1132) 0x49c33f VMOVUPD	0x20(%RCX,%RAX,1),%YMM11

  (1132) 0x49c345 VFMADD231PD	(%R15,%RAX,1),%YMM2,%YMM12

  (1132) 0x49c34b VMOVUPD	0x40(%RCX,%RAX,1),%YMM13

  (1132) 0x49c351 VMOVUPD	0x60(%RCX,%RAX,1),%YMM14

  (1132) 0x49c357 VMOVUPD	0x80(%RCX,%RAX,1),%YMM15

  (1132) 0x49c360 VMOVUPD	0xa0(%RCX,%RAX,1),%YMM0

  (1132) 0x49c369 VFMADD231PD	0x20(%R15,%RAX,1),%YMM11,%YMM12

  (1132) 0x49c370 VMOVUPD	0xc0(%RCX,%RAX,1),%YMM4

  (1132) 0x49c379 VMOVUPD	0xe0(%RCX,%RAX,1),%YMM3

  (1132) 0x49c382 VFMADD231PD	0x40(%R15,%RAX,1),%YMM13,%YMM12

  (1132) 0x49c389 VFMADD231PD	0x60(%R15,%RAX,1),%YMM14,%YMM12

  (1132) 0x49c390 VFMADD231PD	0x80(%R15,%RAX,1),%YMM15,%YMM12

  (1132) 0x49c39a VFMADD231PD	0xa0(%R15,%RAX,1),%YMM0,%YMM12

  (1132) 0x49c3a4 VFMADD231PD	0xc0(%R15,%RAX,1),%YMM4,%YMM12

  (1132) 0x49c3ae VFMADD231PD	0xe0(%R15,%RAX,1),%YMM3,%YMM12

  (1132) 0x49c3b8 ADD	$0x100,%RAX

  (1132) 0x49c3be CMP	%RAX,%RBX

  (1132) 0x49c3c1 JNE	49c33a

(1130) 0x49c3c7 VEXTRACTF64X2	$0x1,%YMM12,%XMM1

(1130) 0x49c3ce VADDPD	%XMM12,%XMM1,%XMM11

(1130) 0x49c3d3 MOV	%R9D,%EDX

(1130) 0x49c3d6 AND	$-0x4,%EDX

(1130) 0x49c3d9 VUNPCKHPD	%XMM11,%XMM11,%XMM12

(1130) 0x49c3de VADDPD	%XMM11,%XMM12,%XMM2

(1130) 0x49c3e3 MOV	%EDX,%EAX

(1130) 0x49c3e5 VMOVAPD	%XMM2,%XMM16

(1130) 0x49c3eb CMP	%EDX,%R9D

(1130) 0x49c3ee JE	49c8f0

(1130) 0x49c3f4 MOV	%R9D,%ESI

(1130) 0x49c3f7 SUB	%EAX,%ESI

(1130) 0x49c3f9 MOV	%ESI,-0xc8(%RBP)

(1130) 0x49c3ff CMP	$0x1,%ESI

(1130) 0x49c402 JE	49c450

(1130) 0x49c404 MOV	-0xe0(%RBP),%R15

(1130) 0x49c40b LEA	(%R13,%RAX,1),%RSI

(1130) 0x49c410 MOV	-0xd0(%RBP),%R14

(1130) 0x49c417 VMOVUPD	(%R15,%RSI,8),%XMM13

(1130) 0x49c41d ADD	%R12,%RAX

(1130) 0x49c420 VFMADD231PD	(%R14,%RAX,8),%XMM13,%XMM11

(1130) 0x49c426 MOV	-0xc8(%RBP),%EAX

(1130) 0x49c42c VUNPCKHPD	%XMM11,%XMM11,%XMM14

(1130) 0x49c431 VADDPD	%XMM11,%XMM14,%XMM2

(1130) 0x49c436 VMOVAPD	%XMM2,%XMM16

(1130) 0x49c43c AND	$0x1,%EAX

(1130) 0x49c43f JE	49c8b8

(1130) 0x49c445 MOV	-0xc8(%RBP),%ESI

(1130) 0x49c44b AND	$-0x2,%ESI

(1130) 0x49c44e ADD	%ESI,%EDX

(1130) 0x49c450 MOVSXD	%EDX,%R15

(1130) 0x49c453 MOV	-0xd0(%RBP),%R14

(1130) 0x49c45a VMOVSD	(%RCX,%R15,8),%XMM11

(1130) 0x49c460 ADD	%R14,%R11

(1130) 0x49c463 VFMADD231SD	(%R11,%R15,8),%XMM11,%XMM16

(1130) 0x49c46a MOV	0x118(%R10),%R11

(1130) 0x49c471 MOV	0x140(%R10),%R15

(1130) 0x49c478 IMUL	%R8,%R11

(1130) 0x49c47c CMPL	$0x2,-0xd4(%RBP)

(1130) 0x49c483 JBE	49c9c4

(1130) 0x49c489 LEA	-0x20(%RBX),%RSI

(1130) 0x49c48d SHR	$0x5,%RSI

(1130) 0x49c491 VXORPD	%XMM2,%XMM2,%XMM2

(1130) 0x49c495 LEA	(%R11,%R11,2),%RAX

(1130) 0x49c499 INC	%RSI

(1130) 0x49c49c LEA	(%R15,%RAX,8),%RAX

(1130) 0x49c4a0 LEA	(%RBX,%RCX,1),%R14

(1130) 0x49c4a4 MOV	%RCX,%RDX

(1130) 0x49c4a7 VMOVAPD	%YMM2,%YMM1

(1130) 0x49c4ab VMOVAPD	%YMM2,%YMM0

(1130) 0x49c4af AND	$0x3,%ESI

(1130) 0x49c4b2 JE	49c5d0

(1130) 0x49c4b8 CMP	$0x1,%RSI

(1130) 0x49c4bc JE	49c572

(1130) 0x49c4c2 CMP	$0x2,%RSI

(1130) 0x49c4c6 JE	49c51d

(1130) 0x49c4c8 VMOVUPD	(%RAX),%YMM0

(1130) 0x49c4cc VMOVUPD	0x20(%RAX),%YMM4

(1130) 0x49c4d1 VMOVUPD	0x40(%RAX),%YMM3

(1130) 0x49c4d6 VMOVAPD	%YMM0,%YMM1

(1130) 0x49c4da VMOVAPD	%YMM0,%YMM12

(1130) 0x49c4de VMOVUPD	(%RCX),%YMM15

(1130) 0x49c4e2 VPERMT2PD	%YMM4,%YMM10,%YMM1

(1130) 0x49c4e8 VPERMT2PD	%YMM4,%YMM8,%YMM12

(1130) 0x49c4ee VPERMT2PD	%YMM4,%YMM6,%YMM0

(1130) 0x49c4f4 VPERMT2PD	%YMM3,%YMM9,%YMM1

(1130) 0x49c4fa VPERMT2PD	%YMM3,%YMM7,%YMM12

(1130) 0x49c500 VPERMT2PD	%YMM3,%YMM5,%YMM0

(1130) 0x49c506 VFMADD132PD	%YMM15,%YMM2,%YMM0

(1130) 0x49c50b VFMADD132PD	%YMM15,%YMM2,%YMM1

(1130) 0x49c510 VFMADD231PD	%YMM15,%YMM12,%YMM2

(1130) 0x49c515 ADD	$0x60,%RAX

(1130) 0x49c519 LEA	0x20(%RCX),%RDX

(1130) 0x49c51d VMOVUPD	(%RAX),%YMM4

(1130) 0x49c521 VMOVUPD	0x20(%RAX),%YMM15

(1130) 0x49c526 VMOVUPD	0x40(%RAX),%YMM14

(1130) 0x49c52b VMOVAPD	%YMM4,%YMM13

(1130) 0x49c52f VMOVAPD	%YMM4,%YMM3

(1130) 0x49c533 VMOVUPD	(%RDX),%YMM11

(1130) 0x49c537 VPERMT2PD	%YMM15,%YMM10,%YMM13

(1130) 0x49c53d VPERMT2PD	%YMM15,%YMM8,%YMM3

(1130) 0x49c543 VPERMT2PD	%YMM15,%YMM6,%YMM4

(1130) 0x49c549 VPERMT2PD	%YMM14,%YMM9,%YMM13

(1130) 0x49c54f VPERMT2PD	%YMM14,%YMM7,%YMM3

(1130) 0x49c555 VPERMT2PD	%YMM14,%YMM5,%YMM4

(1130) 0x49c55b VFMADD231PD	%YMM11,%YMM4,%YMM0

(1130) 0x49c560 VFMADD231PD	%YMM11,%YMM13,%YMM1

(1130) 0x49c565 VFMADD231PD	%YMM11,%YMM3,%YMM2

(1130) 0x49c56a ADD	$0x60,%RAX

(1130) 0x49c56e ADD	$0x20,%RDX

(1130) 0x49c572 VMOVUPD	(%RAX),%YMM4

(1130) 0x49c576 VMOVUPD	0x20(%RAX),%YMM15

(1130) 0x49c57b VMOVUPD	0x40(%RAX),%YMM14

(1130) 0x49c580 VMOVAPD	%YMM4,%YMM13

(1130) 0x49c584 VMOVAPD	%YMM4,%YMM12

(1130) 0x49c588 VMOVUPD	(%RDX),%YMM11

(1130) 0x49c58c VPERMT2PD	%YMM15,%YMM10,%YMM13

(1130) 0x49c592 VPERMT2PD	%YMM15,%YMM8,%YMM12

(1130) 0x49c598 VPERMT2PD	%YMM15,%YMM6,%YMM4

(1130) 0x49c59e VPERMT2PD	%YMM14,%YMM9,%YMM13

(1130) 0x49c5a4 VPERMT2PD	%YMM14,%YMM7,%YMM12

(1130) 0x49c5aa VPERMT2PD	%YMM14,%YMM5,%YMM4

(1130) 0x49c5b0 ADD	$0x20,%RDX

(1130) 0x49c5b4 VFMADD231PD	%YMM11,%YMM4,%YMM0

(1130) 0x49c5b9 VFMADD231PD	%YMM11,%YMM13,%YMM1

(1130) 0x49c5be VFMADD231PD	%YMM11,%YMM12,%YMM2

(1130) 0x49c5c3 ADD	$0x60,%RAX

(1130) 0x49c5c7 CMP	%R14,%RDX

(1130) 0x49c5ca JE	49c739

  (1131) 0x49c5d0 VMOVUPD	(%RAX),%YMM3

  (1131) 0x49c5d4 VMOVUPD	0x20(%RAX),%YMM14

  (1131) 0x49c5d9 VMOVUPD	0x40(%RAX),%YMM13

  (1131) 0x49c5de VMOVAPD	%YMM3,%YMM4

  (1131) 0x49c5e2 VMOVAPD	%YMM3,%YMM11

  (1131) 0x49c5e6 VMOVUPD	(%RDX),%YMM15

  (1131) 0x49c5ea VPERMT2PD	%YMM14,%YMM10,%YMM4

  (1131) 0x49c5f0 VPERMT2PD	%YMM14,%YMM8,%YMM11

  (1131) 0x49c5f6 VPERMT2PD	%YMM13,%YMM9,%YMM4

  (1131) 0x49c5fc VPERMT2PD	%YMM13,%YMM7,%YMM11

  (1131) 0x49c602 VPERMT2PD	%YMM14,%YMM6,%YMM3

  (1131) 0x49c608 VFMADD231PD	%YMM15,%YMM4,%YMM1

  (1131) 0x49c60d VFMADD132PD	%YMM15,%YMM2,%YMM11

  (1131) 0x49c612 VMOVUPD	0x60(%RAX),%YMM4

  (1131) 0x49c617 VPERMT2PD	%YMM13,%YMM5,%YMM3

  (1131) 0x49c61d VFMADD231PD	%YMM15,%YMM3,%YMM0

  (1131) 0x49c622 VMOVUPD	0x80(%RAX),%YMM15

  (1131) 0x49c62a VMOVUPD	0xa0(%RAX),%YMM3

  (1131) 0x49c632 VMOVAPD	%YMM4,%YMM2

  (1131) 0x49c636 VMOVUPD	0x20(%RDX),%YMM13

  (1131) 0x49c63b VMOVAPD	%YMM4,%YMM12

  (1131) 0x49c63f VPERMT2PD	%YMM15,%YMM8,%YMM2

  (1131) 0x49c645 VPERMT2PD	%YMM15,%YMM10,%YMM12

  (1131) 0x49c64b VPERMT2PD	%YMM3,%YMM7,%YMM2

  (1131) 0x49c651 VPERMT2PD	%YMM15,%YMM6,%YMM4

  (1131) 0x49c657 VFMADD132PD	%YMM13,%YMM11,%YMM2

  (1131) 0x49c65c VPERMT2PD	%YMM3,%YMM9,%YMM12

  (1131) 0x49c662 VPERMT2PD	%YMM3,%YMM5,%YMM4

  (1131) 0x49c668 VMOVUPD	0xc0(%RAX),%YMM3

  (1131) 0x49c670 VFMADD132PD	%YMM13,%YMM0,%YMM4

  (1131) 0x49c675 VMOVUPD	0xe0(%RAX),%YMM0

  (1131) 0x49c67d VFMADD132PD	%YMM13,%YMM1,%YMM12

  (1131) 0x49c682 VMOVUPD	0x100(%RAX),%YMM14

  (1131) 0x49c68a VMOVAPD	%YMM3,%YMM1

  (1131) 0x49c68e VMOVUPD	0x40(%RDX),%YMM13

  (1131) 0x49c693 VPERMT2PD	%YMM0,%YMM8,%YMM1

  (1131) 0x49c699 VPERMT2PD	%YMM14,%YMM7,%YMM1

  (1131) 0x49c69f VFMADD132PD	%YMM13,%YMM2,%YMM1

  (1131) 0x49c6a4 VMOVAPD	%YMM3,%YMM11

  (1131) 0x49c6a8 VPERMT2PD	%YMM0,%YMM10,%YMM11

  (1131) 0x49c6ae VPERMT2PD	%YMM0,%YMM6,%YMM3

  (1131) 0x49c6b4 VPERMT2PD	%YMM14,%YMM9,%YMM11

  (1131) 0x49c6ba VPERMT2PD	%YMM14,%YMM5,%YMM3

  (1131) 0x49c6c0 VMOVUPD	0x120(%RAX),%YMM0

  (1131) 0x49c6c8 VFMADD132PD	%YMM13,%YMM4,%YMM3

  (1131) 0x49c6cd VFMADD132PD	%YMM13,%YMM12,%YMM11

  (1131) 0x49c6d2 VMOVUPD	0x140(%RAX),%YMM4

  (1131) 0x49c6da VMOVUPD	0x160(%RAX),%YMM13

  (1131) 0x49c6e2 VMOVAPD	%YMM1,%YMM15

  (1131) 0x49c6e6 VMOVAPD	%YMM0,%YMM2

  (1131) 0x49c6ea VMOVAPD	%YMM0,%YMM1

  (1131) 0x49c6ee VMOVUPD	0x60(%RDX),%YMM12

  (1131) 0x49c6f3 VPERMT2PD	%YMM4,%YMM10,%YMM1

  (1131) 0x49c6f9 VPERMT2PD	%YMM4,%YMM8,%YMM2

  (1131) 0x49c6ff VPERMT2PD	%YMM4,%YMM6,%YMM0

  (1131) 0x49c705 VPERMT2PD	%YMM13,%YMM9,%YMM1

  (1131) 0x49c70b VPERMT2PD	%YMM13,%YMM7,%YMM2

  (1131) 0x49c711 VPERMT2PD	%YMM13,%YMM5,%YMM0

  (1131) 0x49c717 SUB	$-0x80,%RDX

  (1131) 0x49c71b VFMADD132PD	%YMM12,%YMM3,%YMM0

  (1131) 0x49c720 VFMADD132PD	%YMM12,%YMM11,%YMM1

  (1131) 0x49c725 VFMADD132PD	%YMM12,%YMM15,%YMM2

  (1131) 0x49c72a ADD	$0x180,%RAX

  (1131) 0x49c730 CMP	%R14,%RDX

  (1131) 0x49c733 JNE	49c5d0

(1130) 0x49c739 VEXTRACTF64X2	$0x1,%YMM2,%XMM14

(1130) 0x49c740 VEXTRACTF64X2	$0x1,%YMM1,%XMM15

(1130) 0x49c747 VEXTRACTF64X2	$0x1,%YMM0,%XMM4

(1130) 0x49c74e VADDPD	%XMM2,%XMM14,%XMM11

(1130) 0x49c752 VADDPD	%XMM1,%XMM15,%XMM12

(1130) 0x49c756 VADDPD	%XMM0,%XMM4,%XMM14

(1130) 0x49c75a VUNPCKHPD	%XMM11,%XMM11,%XMM3

(1130) 0x49c75f VUNPCKHPD	%XMM12,%XMM12,%XMM1

(1130) 0x49c764 VUNPCKHPD	%XMM14,%XMM14,%XMM0

(1130) 0x49c769 VADDPD	%XMM11,%XMM3,%XMM2

(1130) 0x49c76e VADDPD	%XMM12,%XMM1,%XMM13

(1130) 0x49c773 VADDPD	%XMM14,%XMM0,%XMM11

(1130) 0x49c778 MOV	%R9D,%EDX

(1130) 0x49c77b AND	$-0x4,%EDX

(1130) 0x49c77e VUNPCKLPD	%XMM13,%XMM11,%XMM0

(1130) 0x49c783 MOV	%EDX,%EAX

(1130) 0x49c785 CMP	%R9D,%EDX

(1130) 0x49c788 JE	49c825

(1130) 0x49c78e MOV	%R9D,%R14D

(1130) 0x49c791 SUB	%EAX,%R14D

(1130) 0x49c794 MOV	%R14D,-0xc8(%RBP)

(1130) 0x49c79b CMP	$0x1,%R14D

(1130) 0x49c79f JE	49c801

(1130) 0x49c7a1 MOV	%EAX,%EAX

(1130) 0x49c7a3 LEA	(%RAX,%R11,1),%RSI

(1130) 0x49c7a7 LEA	(%RSI,%RSI,2),%R14

(1130) 0x49c7ab MOV	-0xe0(%RBP),%RSI

(1130) 0x49c7b2 ADD	%R13,%RAX

(1130) 0x49c7b5 VMOVUPD	(%RSI,%RAX,8),%XMM3

(1130) 0x49c7ba LEA	(%R15,%R14,8),%R14

(1130) 0x49c7be VPERMILPD	$0x3,%XMM3,%XMM15

(1130) 0x49c7c4 VMULPD	0x20(%R14),%XMM15,%XMM12

(1130) 0x49c7ca VPERMILPD	$0,%XMM3,%XMM1

(1130) 0x49c7d0 VMOVQ	%XMM2,%XMM2

(1130) 0x49c7d4 VFMADD132PD	0x10(%R14),%XMM2,%XMM3

(1130) 0x49c7da VFMADD231PD	(%R14),%XMM1,%XMM0

(1130) 0x49c7df MOV	-0xc8(%RBP),%EAX

(1130) 0x49c7e5 VUNPCKHPD	%XMM12,%XMM12,%XMM4

(1130) 0x49c7ea VSHUFPD	$0x1,%XMM12,%XMM3,%XMM13

(1130) 0x49c7f0 VADDSD	%XMM4,%XMM3,%XMM2

(1130) 0x49c7f4 VADDPD	%XMM0,%XMM13,%XMM0

(1130) 0x49c7f8 TEST	$0x1,%AL

(1130) 0x49c7fa JE	49c825

(1130) 0x49c7fc AND	$-0x2,%EAX

(1130) 0x49c7ff ADD	%EAX,%EDX

(1130) 0x49c801 MOVSXD	%EDX,%RDX

(1130) 0x49c804 ADD	%RDX,%R11

(1130) 0x49c807 LEA	(%R11,%R11,2),%R11

(1130) 0x49c80b LEA	(%R15,%R11,8),%R15

(1130) 0x49c80f VMOVDDUP	(%RCX,%RDX,8),%XMM11

(1130) 0x49c814 VMOVSD	0x10(%R15),%XMM3

(1130) 0x49c81a VFMADD231PD	(%R15),%XMM11,%XMM0

(1130) 0x49c81f VFMADD231SD	(%RCX,%RDX,8),%XMM3,%XMM2

(1130) 0x49c825 VUNPCKHPD	%XMM0,%XMM0,%XMM15

(1130) 0x49c829 VMULSD	%XMM15,%XMM15,%XMM1

(1130) 0x49c82e VMULSD	%XMM2,%XMM2,%XMM3

(1130) 0x49c832 VMULSD	%XMM0,%XMM0,%XMM4

(1130) 0x49c836 VADDPD	(%RDI),%XMM0,%XMM0

(1130) 0x49c83a VADDSD	0x10(%RDI),%XMM2,%XMM2

(1130) 0x49c83f MOV	-0x100(%RBP),%R14

(1130) 0x49c846 VMOVUPD	%XMM0,(%RDI)

(1130) 0x49c84a VMOVSD	%XMM2,0x10(%RDI)

(1130) 0x49c84f VADDSD	(%R14,%R8,8),%XMM16,%XMM17

(1130) 0x49c856 VADDSD	%XMM4,%XMM1,%XMM1

(1130) 0x49c85a MOV	-0xf8(%RBP),%RSI

(1130) 0x49c861 VSUBSD	%XMM3,%XMM17,%XMM18

(1130) 0x49c867 MOV	-0xe8(%RBP),%RAX

(1130) 0x49c86e MOV	-0xf0(%RBP),%RDX

(1130) 0x49c875 VSUBSD	%XMM1,%XMM18,%XMM13

(1130) 0x49c87b MOV	-0x108(%RBP),%R11

(1130) 0x49c882 ADD	$0x18,%RDI

(1130) 0x49c886 VMOVSD	%XMM13,(%R14,%R8,8)

(1130) 0x49c88c INC	%R8

(1130) 0x49c88f ADD	%RSI,%RCX

(1130) 0x49c892 ADD	%RAX,%R13

(1130) 0x49c895 ADD	%RDX,%R12

(1130) 0x49c898 CMP	%R11,%R8

(1130) 0x49c89b JNE	49c260

0x49c8a1 VZEROUPPER

0x49c8a4 LEA	-0x30(%RBP),%RSP

0x49c8a8 POP	%RBX

0x49c8a9 POP	%RSI

0x49c8aa POP	%R12

0x49c8ac POP	%R13

0x49c8ae POP	%R14

0x49c8b0 POP	%R15

0x49c8b2 POP	%RBP

0x49c8b3 LEA	-0x8(%RSI),%RSP

0x49c8b7 RET

(1130) 0x49c8b8 MOV	0x118(%R10),%R11

(1130) 0x49c8bf MOV	0x140(%R10),%R15

(1130) 0x49c8c6 IMUL	%R8,%R11

(1130) 0x49c8ca CMPL	$0x2,-0xd4(%RBP)

(1130) 0x49c8d1 JA	49c489

(1130) 0x49c8d7 MOVL	$0x2,-0xc8(%RBP)

(1130) 0x49c8e1 VXORPD	%XMM0,%XMM0,%XMM0

(1130) 0x49c8e5 XOR	%EDX,%EDX

(1130) 0x49c8e7 VXORPD	%XMM2,%XMM2,%XMM2

(1130) 0x49c8eb JMP	49c7a1

(1130) 0x49c8f0 MOV	0x118(%R10),%R11

(1130) 0x49c8f7 MOV	0x140(%R10),%R15

(1130) 0x49c8fe IMUL	%R8,%R11

(1130) 0x49c902 JMP	49c489

(1130) 0x49c907 VXORPD	%XMM4,%XMM4,%XMM4

(1130) 0x49c90b VXORPD	%XMM0,%XMM0,%XMM0

(1130) 0x49c90f VMOVAPD	%XMM4,%XMM3

(1130) 0x49c913 VMOVAPD	%XMM4,%XMM1

(1130) 0x49c917 VMOVAPD	%XMM4,%XMM16

(1130) 0x49c91d VMOVAPD	%XMM4,%XMM2

(1130) 0x49c921 JMP	49c836

(1130) 0x49c926 VXORPD	%XMM11,%XMM11,%XMM11

(1130) 0x49c92b XOR	%EAX,%EAX

(1130) 0x49c92d VXORPD	%XMM16,%XMM16,%XMM16

(1130) 0x49c933 XOR	%EDX,%EDX

(1130) 0x49c935 JMP	49c3f4

0x49c93a MOV	0x100(%R10),%R9

0x49c941 MOV	0x140(%R10),%RDI

0x49c948 VMOVSD	(%R9),%XMM10

0x49c94d MOV	0x18(%R14),%R12

0x49c951 VMOVDDUP	%XMM10,%XMM9

0x49c956 VMULPD	(%RDI),%XMM9,%XMM8

0x49c95a VMULSD	0x10(%RDI),%XMM10,%XMM5

0x49c95f LEA	(%R8,%R8,2),%RCX

0x49c963 LEA	(%R12,%RCX,8),%R13

0x49c967 MOV	-0x100(%RBP),%RBX

0x49c96e VADDPD	(%R13),%XMM8,%XMM14

0x49c974 VADDSD	0x10(%R13),%XMM5,%XMM4

0x49c97a MOV	0x18(%RBX),%R15

0x49c97e VMOVUPD	%XMM14,(%R13)

0x49c984 VMOVSD	%XMM4,0x10(%R13)

0x49c98a LEA	(%R15,%R8,8),%R8

0x49c98e MOV	0x180(%R10),%R10

0x49c995 VMOVSD	(%R8),%XMM3

0x49c99a VMULSD	%XMM5,%XMM5,%XMM11

0x49c99e VFMADD132SD	(%R10),%XMM3,%XMM10

0x49c9a3 VUNPCKHPD	%XMM8,%XMM8,%XMM7

0x49c9a8 VMOVAPD	%XMM8,%XMM6

0x49c9ac VFMADD132SD	%XMM7,%XMM11,%XMM7

0x49c9b1 VFNMADD132SD	%XMM8,%XMM10,%XMM6

0x49c9b6 VSUBSD	%XMM7,%XMM6,%XMM15

0x49c9ba VMOVSD	%XMM15,(%R8)

0x49c9bf JMP	49c8a4

(1130) 0x49c9c4 VXORPD	%XMM0,%XMM0,%XMM0

(1130) 0x49c9c8 XOR	%EAX,%EAX

(1130) 0x49c9ca VXORPD	%XMM2,%XMM2,%XMM2

(1130) 0x49c9ce XOR	%EDX,%EDX

(1130) 0x49c9d0 JMP	49c78e

0x49c9d5 MOV	0x468(%RDI),%RDI

0x49c9dc MOV	%RSI,%R12

0x49c9df MOV	%R10,-0xc8(%RBP)

0x49c9e6 CALL	52c850 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv>

0x49c9eb MOV	-0xc8(%RBP),%RSI

0x49c9f2 MOV	0x470(%RSI),%RBX

0x49c9f9 MOV	0x47c(%RSI),%ECX

0x49c9ff MOV	(%RBX),%RAX

0x49ca02 MOV	0x478(%RSI),%R15D

0x49ca09 MOV	0x28(%RAX),%R11

0x49ca0d CMP	$0x47d620,%R11

0x49ca14 JNE	49cbe9

0x49ca1a CMP	%R15D,%ECX

0x49ca1d JLE	49cb55

0x49ca23 SUB	%R15D,%ECX

0x49ca26 MOV	%RCX,-0xd0(%RBP)

0x49ca2d XOR	%R13D,%R13D

(1133) 0x49ca30 MOV	0x98(%RSI),%R8

(1133) 0x49ca37 MOV	0xc0(%RSI),%R9

(1133) 0x49ca3e IMUL	%R13,%R8

(1133) 0x49ca42 MOV	0x118(%RSI),%RAX

(1133) 0x49ca49 MOV	0x140(%RSI),%RDX

(1133) 0x49ca50 LEA	(%R9,%R8,8),%R10

(1133) 0x49ca54 MOV	0x158(%RSI),%R8

(1133) 0x49ca5b IMUL	%R13,%RAX

(1133) 0x49ca5f IMUL	%R13,%R8

(1133) 0x49ca63 MOV	0x180(%RSI),%R9

(1133) 0x49ca6a MOVSXD	0x8(%RBX),%RDI

(1133) 0x49ca6e MOVQ	$0x5b67a8,-0xc0(%RBP)

(1133) 0x49ca79 MOVQ	$0x5b5b98,-0x90(%RBP)

(1133) 0x49ca84 MOVQ	$0x5b67a8,-0x60(%RBP)

(1133) 0x49ca8c LEA	(%RAX,%RAX,2),%R11

(1133) 0x49ca90 LEA	(%RDX,%R11,8),%RCX

(1133) 0x49ca94 MOV	%RSI,-0xc8(%RBP)

(1133) 0x49ca9b LEA	(%R9,%R8,8),%RSI

(1133) 0x49ca9f MOV	%RDI,-0xb8(%RBP)

(1133) 0x49caa6 MOV	%R10,-0xa8(%RBP)

(1133) 0x49caad MOV	%RDI,-0x88(%RBP)

(1133) 0x49cab4 MOV	%RCX,-0x78(%RBP)

(1133) 0x49cab8 MOV	%RDI,-0x58(%RBP)

(1133) 0x49cabc MOV	%RSI,-0x48(%RBP)

(1133) 0x49cac0 MOVQ	$0,-0xb0(%RBP)

(1133) 0x49cacb MOVQ	$0,-0x80(%RBP)

(1133) 0x49cad3 MOVQ	$0,-0x50(%RBP)

(1133) 0x49cadb MOV	(%RBX),%R10

(1133) 0x49cade LEA	(%R15,%R13,1),%EDX

(1133) 0x49cae2 LEA	-0x60(%RBP),%R9

(1133) 0x49cae6 LEA	-0x90(%RBP),%R8

(1133) 0x49caed LEA	-0xc0(%RBP),%RCX

(1133) 0x49caf4 MOV	%R12,%RSI

(1133) 0x49caf7 MOV	%RBX,%RDI

(1133) 0x49cafa CALLQ	0x18(%R10)

(1133) 0x49cafe MOV	-0x50(%RBP),%RDI

(1133) 0x49cb02 MOVQ	$0x5b67a8,-0x60(%RBP)

(1133) 0x49cb0a TEST	%RDI,%RDI

(1133) 0x49cb0d MOV	-0xc8(%RBP),%RSI

(1133) 0x49cb14 JNE	49cbcc

(1133) 0x49cb1a MOV	-0x80(%RBP),%RAX

(1133) 0x49cb1e MOVQ	$0x5b5b98,-0x90(%RBP)

(1133) 0x49cb29 TEST	%RAX,%RAX

(1133) 0x49cb2c JNE	49cba8

(1133) 0x49cb2e MOV	-0xb0(%RBP),%R11

(1133) 0x49cb35 MOVQ	$0x5b67a8,-0xc0(%RBP)

(1133) 0x49cb40 TEST	%R11,%R11

(1133) 0x49cb43 JNE	49cb74

(1133) 0x49cb45 INC	%R13

(1133) 0x49cb48 CMP	%R13,-0xd0(%RBP)

(1133) 0x49cb4f JNE	49ca30

0x49cb55 MOV	0x468(%RSI),%RDI

0x49cb5c MOV	%RSI,-0xc8(%RBP)

0x49cb63 CALL	52ca80 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv>

0x49cb68 MOV	-0xc8(%RBP),%R10

0x49cb6f JMP	49c16b

(1133) 0x49cb74 MOV	-0xa8(%RBP),%RDI

(1133) 0x49cb7b MOV	%RSI,-0xc8(%RBP)

(1133) 0x49cb82 INC	%R13

(1133) 0x49cb85 LEA	(,%R11,8),%RSI

(1133) 0x49cb8d CALL	404070 <_ZdlPvm@plt>

(1133) 0x49cb92 CMP	%R13,-0xd0(%RBP)

(1133) 0x49cb99 MOV	-0xc8(%RBP),%RSI

(1133) 0x49cba0 JNE	49ca30

0x49cba6 JMP	49cb55

(1133) 0x49cba8 MOV	%RSI,-0xc8(%RBP)

(1133) 0x49cbaf MOV	-0x78(%RBP),%RDI

(1133) 0x49cbb3 LEA	(%RAX,%RAX,2),%RSI

(1133) 0x49cbb7 SAL	$0x3,%RSI

(1133) 0x49cbbb CALL	404070 <_ZdlPvm@plt>

(1133) 0x49cbc0 MOV	-0xc8(%RBP),%RSI

(1133) 0x49cbc7 JMP	49cb2e

(1133) 0x49cbcc LEA	(,%RDI,8),%RSI

(1133) 0x49cbd4 MOV	-0x48(%RBP),%RDI

(1133) 0x49cbd8 CALL	404070 <_ZdlPvm@plt>

(1133) 0x49cbdd MOV	-0xc8(%RBP),%RSI

(1133) 0x49cbe4 JMP	49cb1a

0x49cbe9 SUB	$0x8,%RSP

0x49cbed LEA	0x150(%RSI),%RDX

0x49cbf4 PUSH	%RDX

0x49cbf5 MOV	%RSI,-0xc8(%RBP)

0x49cbfc LEA	0x110(%RSI),%R9

0x49cc03 LEA	0x90(%RSI),%R8

0x49cc0a MOV	%R15D,%EDX

0x49cc0d MOV	%R12,%RSI

0x49cc10 MOV	%RBX,%RDI

0x49cc13 CALL	%R11

0x49cc16 POP	%RAX

0x49cc17 MOV	-0xc8(%RBP),%RSI

0x49cc1e POP	%RDX

0x49cc1f JMP	49cb55

0x49cc24 MOV	%RAX,%R14

0x49cc27 MOV	-0x50(%RBP),%R12

0x49cc2b MOVQ	$0x5b67a8,-0x60(%RBP)

0x49cc33 TEST	%R12,%R12

0x49cc36 JE	49cca0

0x49cc38 MOV	-0x48(%RBP),%RDI

0x49cc3c LEA	(,%R12,8),%RSI

0x49cc44 VZEROUPPER

0x49cc47 CALL	404070 <_ZdlPvm@plt>

(1129) 0x49cc4c MOV	-0x80(%RBP),%RBX

(1129) 0x49cc50 MOVQ	$0x5b5b98,-0x90(%RBP)

(1129) 0x49cc5b TEST	%RBX,%RBX

(1129) 0x49cc5e JE	49cc6d

(1129) 0x49cc60 IMUL	$0x18,%RBX,%RSI

(1129) 0x49cc64 MOV	-0x78(%RBP),%RDI

(1129) 0x49cc68 CALL	404070 <_ZdlPvm@plt>

(1129) 0x49cc6d MOV	-0xb0(%RBP),%R15

(1129) 0x49cc74 MOVQ	$0x5b67a8,-0xc0(%RBP)

(1129) 0x49cc7f TEST	%R15,%R15

(1129) 0x49cc82 JE	49cc98

(1129) 0x49cc84 MOV	-0xa8(%RBP),%RDI

(1129) 0x49cc8b LEA	(,%R15,8),%RSI

(1129) 0x49cc93 CALL	404070 <_ZdlPvm@plt>

(1129) 0x49cc98 MOV	%R14,%RDI

(1129) 0x49cc9b CALL	404260 <_Unwind_Resume@plt>

(1129) 0x49cca0 VZEROUPPER

(1129) 0x49cca3 JMP	49cc4c

0x49cca5 NOPW	%CS:(%RAX,%RAX,1)

0x49ccaf NOP

Coverage (%)	Name	Source Location	Module
►49.38+	qmcplusplus::WaveFunction::eva[...]	WaveFunction.cpp:249	exec
○	main._omp_fn.1	refwrap.h:350	exec
○	gomp_thread_start	team.c:130	libgomp.so.1.0.0
►48.46+	qmcplusplus::WaveFunction::eva[...]	WaveFunction.cpp:250	exec
○	main._omp_fn.1	refwrap.h:350	exec
○	gomp_thread_start	team.c:130	libgomp.so.1.0.0
►1.10+	qmcplusplus::WaveFunction::eva[...]	WaveFunction.cpp:249	exec
○	main._omp_fn.1	refwrap.h:350	exec
○	GOMP_parallel	libgomp.h:982	libgomp.so.1.0.0
►1.07+	qmcplusplus::WaveFunction::eva[...]	WaveFunction.cpp:250	exec
○	main._omp_fn.1	refwrap.h:350	exec
○	GOMP_parallel	libgomp.h:982	libgomp.so.1.0.0

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run gcc_3

Source file and lines	DiracDeterminantRef.cpp:152-181
Module	exec

The function is defined in:

/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/SPOSet.h:106-111
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/inner_product.hpp:82-83,155-156
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/PETE/OperatorTags.h:63,94
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/TinyVectorOps.h:129-131
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracDeterminantRef.cpp:152-181
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsMatrix.h:217
/cluster/comp/gcc/14.2.0/include/c++/14.2.0/bits/unique_ptr.h:193
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/TinyVector.h:62
/cluster/comp/gcc/14.2.0/include/c++/14.2.0/bits/new_allocator.h:104,172
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:56,144,210,221-223,248

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 25.50 to 6.83 cycles (3.73x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is poorly vectorized. Only 18% of vector register length is used (average across all SSE/AVX instructions).

Details

26% of SSE/AVX instructions are used in vector version (process two or more data elements in vector registers):

57% of SSE/AVX loads are used in vector version.
5% of SSE/AVX stores are used in vector version.
33% of SSE/AVX addition or subtraction instructions are used in vector version.
33% of SSE/AVX multiply instructions are used in vector version.
0% of SSE/AVX fused multiply-add instructions are used in vector version.
30% of SSE/AVX instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Workaround

Read the "512-bits vectorization" report at "Potential" confidence level.

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

512-bits vectorization

On some x86 processors supporting 512-bits vectorization, compilers are often too conservative and limit vectorization to 256 bits. Performance can then be improved by enforcing 512-bits vectorization, especially with many vectorized and high trip count loops. 512-bits vectorization performance overhead (compared to 256-bits) is generally lower on newer processors.

Workaround

Recompile with -mprefer-vector-width=512

FMA

Detected 3 FMA (fused multiply-add) operations. Presence of both ADD/SUB and MUL operations.

Workaround

Try to change order in which elements are evaluated (using parentheses) in arithmetic expressions containing both ADD/SUB and MUL operations to enable your compiler to generate FMA instructions wherever possible. For instance a + b*c is a valid FMA (MUL then ADD). However (a+b)* c cannot be translated into an FMA (ADD then MUL).

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

operator delete(void*, unsigned long): 1 occurrences►
- /cluster/comp/gcc/14.2.0/include/c++/14.2.0/bits/new_allocator.h:172
qmcplusplus::TimerType
::start(): 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracDeterminantRef.cpp:159
qmcplusplus::TimerType
::stop(): 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracDeterminantRef.cpp:161
unknown: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracDeterminantRef.cpp:160

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

PUSH: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracDeterminantRef.cpp:152
VZEROUPPER: 2 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracDeterminantRef.cpp:173
- /cluster/comp/gcc/14.2.0/include/c++/14.2.0/bits/new_allocator.h:172

Type of elements and instruction set

7 SSE or AVX instructions are processing arithmetic or math operations on double precision FP elements in scalar mode (one at a time). 2 SSE or AVX instructions are processing arithmetic or math operations on double precision FP elements in vector mode (two at a time).

Matching between your function (in the source code) and the binary function

The binary function is composed of 14 FP arithmetical operations:

7: addition or subtraction (3 inside FMA instructions)
7: multiply (3 inside FMA instructions)

The binary function is loading 480 bytes (60 double precision FP elements). The binary function is storing 140 bytes (17 double precision FP elements).

Arithmetic intensity

Arithmetic intensity is 0.02 FP operations per loaded or stored byte.

General properties

nb instructions	146
nb uops	153
loop length	699
used x86 registers	16
used mmx registers	0
used xmm registers	11
used ymm registers	6
used zmm registers	0
nb stack references	14
ADD-SUB / MUL ratio	1.00

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	25.50 cycles
front end	25.50 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11
uops	6.40	6.40	17.67	17.67	15.00	6.40	6.40	15.00	15.00	15.00	6.40	17.67
cycles	6.40	6.40	17.67	17.67	15.00	6.40	6.40	15.00	15.00	15.00	6.40	17.67

Execution ports to units layout:

P0 (256 bits): VPU, BRU, ALU, DIV/SQRT
P1 (256 bits): ALU, VPU
P2 (512 bits): load
P3 (512 bits): load
P4 (512 bits): store data
P5 (512 bits): ALU, VPU
P6: ALU, BRU
P7: store address
P8: store address
P9 (512 bits): store data
P10: ALU
P11 (512 bits): load

Cycles executing div or sqrt instructions

Cycles summary

Front-end	25.50
Dispatch	17.67
Overall L1	25.50

Vectorization ratios

INT

all	28%
load	85%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
other	28%

all	23%
load	28%
store	33%
mul	33%
add-sub	33%
fma	0%
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	33%

INT+FP

all	26%
load	57%
store	5%
mul	33%
add-sub	33%
fma	0%
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	30%

Vector efficiency ratios

INT

all	20%
load	44%
store	11%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
other	12%

all	15%
load	16%
store	16%
mul	16%
add-sub	16%
fma	12%
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	16%

INT+FP

all	18%
load	30%
store	12%
mul	16%
add-sub	16%
fma	12%
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	13%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 25.50 cycles. At this rate:

9% of peak load performance is reached (18.82 out of 192.00 bytes loaded per cycle (GB/s @ 1GHz))
4% of peak store performance is reached (5.49 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Performance is limited by instruction throughput (loading/decoding program instructions to execution core) (front-end is a bottleneck). By removing all these bottlenecks, you can lower the cost of an iteration from 25.50 to 17.67 cycles (1.44x speedup).

ASM code

In the binary file, the address of the function is: 49c130

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	Latency	Recip. throughput	Vectorization
LEA 0x8(%RSP),%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
AND $-0x20,%RSP	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
PUSHQ -0x8(%R10)	2	0	0	0.33	0.33	0.50	0	0	0.50	0.50	0.50	0	0.33	5-12	0.62	N/A
PUSH %RBP	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
PUSH %R15	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R14	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
MOV %RDX,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
PUSH %R13	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R12	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R10	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
MOV %RDI,%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
PUSH %RBX	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
SUB $0xe0,%RSP	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %RCX,-0x100(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0xc(%RDI),%ECX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
TEST %ECX,%ECX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (6.3%)
JE 49c9d5 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10evaluateGLERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEEb+0x8a5>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV 0x484(%R10),%R13D	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOVSXD 0x478(%R10),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP $0x1,%R13D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
JE 49c93a <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10evaluateGLERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEEb+0x80a>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOVSXD %R13D,%RDX	1	0	0.33	0	0	0	0.33	0	0	0	0	0.33	0	1	0.33	N/A
MOV %RDX,-0x108(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
TEST %R13D,%R13D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (6.3%)
JE 49c8a4 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10evaluateGLERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEEb+0x774>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV 0xd8(%R10),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x100(%RBP),%R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x480(%R10),%R9D	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x158(%R10),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x18(%R13),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (,%RBX,8),%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA -0x1(%R9),%R11D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
MOV 0x100(%R10),%R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x180(%R10),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RBX,-0xe8(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x18(%R14),%R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %R9D,%EBX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RSI,-0xf0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RAX,-0xf8(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R11D,-0xd4(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
LEA (%R8,%R8,2),%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
SHR $0x2,%EBX	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
LEA (%RDX,%R8,8),%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VMOVDQA 0x11b71a(%RIP),%YMM10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	0-1	0.33	vect (50.0%)
VMOVDQA 0x11b732(%RIP),%YMM9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	0-1	0.33	vect (50.0%)
VMOVDQA 0x11b74a(%RIP),%YMM8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	0-1	0.33	vect (50.0%)
VMOVDQA 0x11b762(%RIP),%YMM7	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	0-1	0.33	vect (50.0%)
VMOVDQA 0x11b13a(%RIP),%YMM6	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	0-1	0.33	vect (50.0%)
VMOVDQA 0x11b152(%RIP),%YMM5	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	0-1	0.33	vect (50.0%)
MOV %RCX,-0xd0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R12,-0xe0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R8,-0x100(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R12,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LEA (%R14,%R15,8),%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XOR %R12D,%R12D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XOR %R13D,%R13D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XOR %R8D,%R8D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
SAL $0x5,%RBX	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VZEROUPPER	2	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
LEA -0x30(%RBP),%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
POP %RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %RBP	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
LEA -0x8(%RSI),%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
RET	1	0.50	0	0.33	0.33	0	0	0.50	0	0	0	0	0.33	0	2.13	N/A
MOV 0x100(%R10),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x140(%R10),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VMOVSD (%R9),%XMM10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x18(%R14),%R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VMOVDDUP %XMM10,%XMM9	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
VMULPD (%RDI),%XMM9,%XMM8	1	0.50	0.50	0.33	0.33	0	0	0	0	0	0	0	0.33	4	0.50	vect (25.0%)
VMULSD 0x10(%RDI),%XMM10,%XMM5	1	0.50	0.50	0.33	0.33	0	0	0	0	0	0	0	0.33	4	0.50	scal (12.5%)
LEA (%R8,%R8,2),%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA (%R12,%RCX,8),%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0x100(%RBP),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VADDPD (%R13),%XMM8,%XMM14	1	0	0.50	0.33	0.33	0	0.50	0	0	0	0	0	0.33	3	0.50	vect (25.0%)
VADDSD 0x10(%R13),%XMM5,%XMM4	1	0	0.50	0.33	0.33	0	0.50	0	0	0	0	0	0.33	3	0.50	scal (12.5%)
MOV 0x18(%RBX),%R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VMOVUPD %XMM14,(%R13)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
VMOVSD %XMM4,0x10(%R13)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
LEA (%R15,%R8,8),%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV 0x180(%R10),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VMOVSD (%R8),%XMM3	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMULSD %XMM5,%XMM5,%XMM11	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VFMADD132SD (%R10),%XMM3,%XMM10	1	0.50	0.50	0.33	0.33	0	0	0	0	0	0	0	0.33	4	0.50	scal (12.5%)
VUNPCKHPD %XMM8,%XMM8,%XMM7	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
VMOVAPD %XMM8,%XMM6	1	0	0	0	0	0	0	0	0	0	0	0	0	0-1	0.17	vect (25.0%)
VFMADD132SD %XMM7,%XMM11,%XMM7	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VFNMADD132SD %XMM8,%XMM10,%XMM6	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VSUBSD %XMM7,%XMM6,%XMM15	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	3	0.50	scal (12.5%)
VMOVSD %XMM15,(%R8)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JMP 49c8a4 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10evaluateGLERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEEb+0x774>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
MOV 0x468(%RDI),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RSI,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R10,-0xc8(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
CALL 52c850 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV -0xc8(%RBP),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x470(%RSI),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x47c(%RSI),%ECX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RBX),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x478(%RSI),%R15D	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x28(%RAX),%R11	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
CMP $0x47d620,%R11	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JNE 49cbe9 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10evaluateGLERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEEb+0xab9>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP %R15D,%ECX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
JLE 49cb55 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10evaluateGLERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEEb+0xa25>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
SUB %R15D,%ECX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %RCX,-0xd0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
XOR %R13D,%R13D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV 0x468(%RSI),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RSI,-0xc8(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
CALL 52ca80 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV -0xc8(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
JMP 49c16b <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10evaluateGLERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEEb+0x3b>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
JMP 49cb55 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10evaluateGLERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEEb+0xa25>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
SUB $0x8,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LEA 0x150(%RSI),%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
PUSH %RDX	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
MOV %RSI,-0xc8(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
LEA 0x110(%RSI),%R9	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA 0x90(%RSI),%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R15D,%EDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R12,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RBX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL %R11	2	0.50	0	0	0	0.50	0	0.50	0.50	0.50	0.50	0	0	0	2.14	N/A
POP %RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
MOV -0xc8(%RBP),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
POP %RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
JMP 49cb55 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10evaluateGLERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEEb+0xa25>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
MOV %RAX,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV -0x50(%RBP),%R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOVQ $0x5b67a8,-0x60(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
TEST %R12,%R12	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	N/A
JE 49cca0 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10evaluateGLERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEEb+0xb70>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x48(%RBP),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (,%R12,8),%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VZEROUPPER	2	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 404070 <_ZdlPvm@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run gcc_3

Source file and lines	DiracDeterminantRef.cpp:152-181
Module	exec

The function is defined in:

/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/SPOSet.h:106-111
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Platforms/CPU/SIMD/inner_product.hpp:82-83,155-156
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/PETE/OperatorTags.h:63,94
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/TinyVectorOps.h:129-131
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracDeterminantRef.cpp:152-181
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsMatrix.h:217
/cluster/comp/gcc/14.2.0/include/c++/14.2.0/bits/unique_ptr.h:193
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/TinyVector.h:62
/cluster/comp/gcc/14.2.0/include/c++/14.2.0/bits/new_allocator.h:104,172
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:56,144,210,221-223,248

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 25.50 to 6.83 cycles (3.73x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is poorly vectorized. Only 18% of vector register length is used (average across all SSE/AVX instructions).

Details

26% of SSE/AVX instructions are used in vector version (process two or more data elements in vector registers):

57% of SSE/AVX loads are used in vector version.
5% of SSE/AVX stores are used in vector version.
33% of SSE/AVX addition or subtraction instructions are used in vector version.
33% of SSE/AVX multiply instructions are used in vector version.
0% of SSE/AVX fused multiply-add instructions are used in vector version.
30% of SSE/AVX instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Workaround

Read the "512-bits vectorization" report at "Potential" confidence level.

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

512-bits vectorization

Workaround

Recompile with -mprefer-vector-width=512

FMA

Detected 3 FMA (fused multiply-add) operations. Presence of both ADD/SUB and MUL operations.

Workaround

CALL instructions

Detected function call instructions.

Details

operator delete(void*, unsigned long): 1 occurrences►
- /cluster/comp/gcc/14.2.0/include/c++/14.2.0/bits/new_allocator.h:172
qmcplusplus::TimerType
::start(): 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracDeterminantRef.cpp:159
qmcplusplus::TimerType
::stop(): 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracDeterminantRef.cpp:161
unknown: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracDeterminantRef.cpp:160

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

PUSH: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracDeterminantRef.cpp:152
VZEROUPPER: 2 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/DiracDeterminantRef.cpp:173
- /cluster/comp/gcc/14.2.0/include/c++/14.2.0/bits/new_allocator.h:172

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

The binary function is composed of 14 FP arithmetical operations:

7: addition or subtraction (3 inside FMA instructions)
7: multiply (3 inside FMA instructions)

The binary function is loading 480 bytes (60 double precision FP elements). The binary function is storing 140 bytes (17 double precision FP elements).

Arithmetic intensity

Arithmetic intensity is 0.02 FP operations per loaded or stored byte.

General properties

nb instructions	146
nb uops	153
loop length	699
used x86 registers	16
used mmx registers	0
used xmm registers	11
used ymm registers	6
used zmm registers	0
nb stack references	14
ADD-SUB / MUL ratio	1.00

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	25.50 cycles
front end	25.50 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11
uops	6.40	6.40	17.67	17.67	15.00	6.40	6.40	15.00	15.00	15.00	6.40	17.67
cycles	6.40	6.40	17.67	17.67	15.00	6.40	6.40	15.00	15.00	15.00	6.40	17.67

Execution ports to units layout:

P0 (256 bits): VPU, BRU, ALU, DIV/SQRT
P1 (256 bits): ALU, VPU
P2 (512 bits): load
P3 (512 bits): load
P4 (512 bits): store data
P5 (512 bits): ALU, VPU
P6: ALU, BRU
P7: store address
P8: store address
P9 (512 bits): store data
P10: ALU
P11 (512 bits): load

Cycles executing div or sqrt instructions

Cycles summary

Front-end	25.50
Dispatch	17.67
Overall L1	25.50

Vectorization ratios

INT

all	28%
load	85%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
other	28%

all	23%
load	28%
store	33%
mul	33%
add-sub	33%
fma	0%
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	33%

INT+FP

all	26%
load	57%
store	5%
mul	33%
add-sub	33%
fma	0%
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	30%

Vector efficiency ratios

INT

all	20%
load	44%
store	11%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
other	12%

all	15%
load	16%
store	16%
mul	16%
add-sub	16%
fma	12%
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	16%

INT+FP

all	18%
load	30%
store	12%
mul	16%
add-sub	16%
fma	12%
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	13%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 25.50 cycles. At this rate:

9% of peak load performance is reached (18.82 out of 192.00 bytes loaded per cycle (GB/s @ 1GHz))
4% of peak store performance is reached (5.49 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

ASM code

In the binary file, the address of the function is: 49c130

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	Latency	Recip. throughput	Vectorization
LEA 0x8(%RSP),%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
AND $-0x20,%RSP	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
PUSHQ -0x8(%R10)	2	0	0	0.33	0.33	0.50	0	0	0.50	0.50	0.50	0	0.33	5-12	0.62	N/A
PUSH %RBP	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
PUSH %R15	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R14	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
MOV %RDX,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
PUSH %R13	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R12	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R10	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
MOV %RDI,%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
PUSH %RBX	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
SUB $0xe0,%RSP	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %RCX,-0x100(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0xc(%RDI),%ECX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
TEST %ECX,%ECX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (6.3%)
JE 49c9d5 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10evaluateGLERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEEb+0x8a5>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV 0x484(%R10),%R13D	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOVSXD 0x478(%R10),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP $0x1,%R13D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
JE 49c93a <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10evaluateGLERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEEb+0x80a>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOVSXD %R13D,%RDX	1	0	0.33	0	0	0	0.33	0	0	0	0	0.33	0	1	0.33	N/A
MOV %RDX,-0x108(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
TEST %R13D,%R13D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (6.3%)
JE 49c8a4 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10evaluateGLERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEEb+0x774>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV 0xd8(%R10),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x100(%RBP),%R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x480(%R10),%R9D	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x158(%R10),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x18(%R13),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (,%RBX,8),%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA -0x1(%R9),%R11D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
MOV 0x100(%R10),%R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x180(%R10),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RBX,-0xe8(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x18(%R14),%R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %R9D,%EBX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RSI,-0xf0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RAX,-0xf8(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R11D,-0xd4(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
LEA (%R8,%R8,2),%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
SHR $0x2,%EBX	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
LEA (%RDX,%R8,8),%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VMOVDQA 0x11b71a(%RIP),%YMM10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	0-1	0.33	vect (50.0%)
VMOVDQA 0x11b732(%RIP),%YMM9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	0-1	0.33	vect (50.0%)
VMOVDQA 0x11b74a(%RIP),%YMM8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	0-1	0.33	vect (50.0%)
VMOVDQA 0x11b762(%RIP),%YMM7	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	0-1	0.33	vect (50.0%)
VMOVDQA 0x11b13a(%RIP),%YMM6	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	0-1	0.33	vect (50.0%)
VMOVDQA 0x11b152(%RIP),%YMM5	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	0-1	0.33	vect (50.0%)
MOV %RCX,-0xd0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R12,-0xe0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R8,-0x100(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R12,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LEA (%R14,%R15,8),%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XOR %R12D,%R12D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XOR %R13D,%R13D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XOR %R8D,%R8D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
SAL $0x5,%RBX	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VZEROUPPER	2	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
LEA -0x30(%RBP),%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
POP %RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %RBP	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
LEA -0x8(%RSI),%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
RET	1	0.50	0	0.33	0.33	0	0	0.50	0	0	0	0	0.33	0	2.13	N/A
MOV 0x100(%R10),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x140(%R10),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VMOVSD (%R9),%XMM10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x18(%R14),%R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VMOVDDUP %XMM10,%XMM9	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
VMULPD (%RDI),%XMM9,%XMM8	1	0.50	0.50	0.33	0.33	0	0	0	0	0	0	0	0.33	4	0.50	vect (25.0%)
VMULSD 0x10(%RDI),%XMM10,%XMM5	1	0.50	0.50	0.33	0.33	0	0	0	0	0	0	0	0.33	4	0.50	scal (12.5%)
LEA (%R8,%R8,2),%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA (%R12,%RCX,8),%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0x100(%RBP),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VADDPD (%R13),%XMM8,%XMM14	1	0	0.50	0.33	0.33	0	0.50	0	0	0	0	0	0.33	3	0.50	vect (25.0%)
VADDSD 0x10(%R13),%XMM5,%XMM4	1	0	0.50	0.33	0.33	0	0.50	0	0	0	0	0	0.33	3	0.50	scal (12.5%)
MOV 0x18(%RBX),%R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VMOVUPD %XMM14,(%R13)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
VMOVSD %XMM4,0x10(%R13)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
LEA (%R15,%R8,8),%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV 0x180(%R10),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VMOVSD (%R8),%XMM3	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMULSD %XMM5,%XMM5,%XMM11	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VFMADD132SD (%R10),%XMM3,%XMM10	1	0.50	0.50	0.33	0.33	0	0	0	0	0	0	0	0.33	4	0.50	scal (12.5%)
VUNPCKHPD %XMM8,%XMM8,%XMM7	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
VMOVAPD %XMM8,%XMM6	1	0	0	0	0	0	0	0	0	0	0	0	0	0-1	0.17	vect (25.0%)
VFMADD132SD %XMM7,%XMM11,%XMM7	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VFNMADD132SD %XMM8,%XMM10,%XMM6	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VSUBSD %XMM7,%XMM6,%XMM15	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	3	0.50	scal (12.5%)
VMOVSD %XMM15,(%R8)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JMP 49c8a4 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10evaluateGLERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEEb+0x774>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
MOV 0x468(%RDI),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RSI,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R10,-0xc8(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
CALL 52c850 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE5startEv>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV -0xc8(%RBP),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x470(%RSI),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x47c(%RSI),%ECX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RBX),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x478(%RSI),%R15D	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x28(%RAX),%R11	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
CMP $0x47d620,%R11	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JNE 49cbe9 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10evaluateGLERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEEb+0xab9>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
CMP %R15D,%ECX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
JLE 49cb55 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10evaluateGLERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEEb+0xa25>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
SUB %R15D,%ECX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %RCX,-0xd0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
XOR %R13D,%R13D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV 0x468(%RSI),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RSI,-0xc8(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
CALL 52ca80 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV -0xc8(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
JMP 49c16b <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10evaluateGLERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEEb+0x3b>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
JMP 49cb55 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10evaluateGLERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEEb+0xa25>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
SUB $0x8,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LEA 0x150(%RSI),%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
PUSH %RDX	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
MOV %RSI,-0xc8(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
LEA 0x110(%RSI),%R9	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA 0x90(%RSI),%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R15D,%EDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R12,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RBX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL %R11	2	0.50	0	0	0	0.50	0	0.50	0.50	0.50	0.50	0	0	0	2.14	N/A
POP %RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
MOV -0xc8(%RBP),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
POP %RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
JMP 49cb55 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10evaluateGLERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEEb+0xa25>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
MOV %RAX,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV -0x50(%RBP),%R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOVQ $0x5b67a8,-0x60(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
TEST %R12,%R12	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	N/A
JE 49cca0 <_ZN16miniqmcreference19DiracDeterminantRefIN11qmcplusplus13DelayedUpdateIddEEE10evaluateGLERNS1_11ParticleSetERNS1_14ParticleAttribINS1_10TinyVectorIdLj3EEESaIS9_EEERNS7_IdSaIdEEEb+0xb70>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x48(%RBP),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (,%R12,8),%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VZEROUPPER	2	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 404070 <_ZdlPvm@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A

Name	Coverage (%)	Time (s)
▼miniqmcreference::DiracDeterminantRef >::evaluateGL(qmcplusplus::ParticleSet&, qmcplusplus::ParticleAttrib, std::allocator > >&, qmcplusplus:...–	0.81	0.69
▼Loop 1130 - DiracDeterminantRef.cpp:173-178 - exec–	0.00	0.01
○Loop 1131 - inner_product.hpp:155-155 - exec	0.55	0.46
○Loop 1132 - inner_product.hpp:82-83 - exec	0.26	0.22
○Loop 1133 - SPOSet.h:106-111 - exec	0.00	0.00
○Loop 1129 - new_allocator.h:104-172 - exec	0.00	0.00

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512-bits vectorization

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Code clean check

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Vectorization

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Execution units bottlenecks

512-bits vectorization

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FMA

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CALL instructions

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Complex instructions

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Type of elements and instruction set

Matching between your function (in the source code) and the binary function

Arithmetic intensity

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code