OV - exec - Function void miniqmcreference::MultiBsplineEvalRef::evaluate_vgh<double>(qmcplusplus::bspline_traits<double, 3u>::SplineType const*, double, double, double, double*, double*, double*, unsigned long)

	Function: void miniqmcreference::MultiBsplineEvalRef::evaluate_vgh<double>(qmcplusplus::bspline_trai ...	Module: exec	Source: MultiBsplineRef.hpp:174-288 [...]	Coverage (incl. loops): 13.67% \| (excl. loops): 0.01%

/cluster/comp/gcc/14.2.0/include/c++/14.2.0/bits/stl_algobase.h: 951 - 952

--------------------------------------------------------------------------------

951:       for (; __first != __last; ++__first)

952: 	*__first = __tmp;

/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/MultiBsplineEvalHelper.hpp: 53 - 66

--------------------------------------------------------------------------------

53:   if (x < 0)

54:   {

55:     ind = 0;

56:     dx  = T(0);

57:   }

58:   else

59:   {

60:     ind = static_cast<int>(x);

61:     dx = x - ind;

62:     // upper bound

63:     if (ind > nmax)

64:     {

65:       ind = nmax;

66:       dx  = T(1) - std::numeric_limits<T>::epsilon();

/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/MultiBsplineData.hpp: 68 - 77

--------------------------------------------------------------------------------

68:     a[0]   = ((A00 * tx + A01) * tx + A02) * tx + A03;

69:     a[1]   = ((A10 * tx + A11) * tx + A12) * tx + A13;

70:     a[2]   = ((A20 * tx + A21) * tx + A22) * tx + A23;

71:     a[3]   = ((A30 * tx + A31) * tx + A32) * tx + A33;

72:     da[0]  = (dA01 * tx + dA02) * tx + dA03;

73:     da[1]  = (dA11 * tx + dA12) * tx + dA13;

74:     da[2]  = (dA21 * tx + dA22) * tx + dA23;

75:     da[3]  = (dA31 * tx + dA32) * tx + dA33;

76:     d2a[0] = d2A02 * tx + d2A03;

77:     d2a[1] = d2A12 * tx + d2A13;

/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/MultiBsplineRef.hpp: 174 - 288

--------------------------------------------------------------------------------

174: inline void evaluate_vgh(const typename bspline_traits<T, 3>::SplineType* restrict spline_m,

[...]

187:   x -= spline_m->x_grid.start;

188:   y -= spline_m->y_grid.start;

189:   z -= spline_m->z_grid.start;

190:   spline2::getSplineBound(x * spline_m->x_grid.delta_inv, tx, ix, spline_m->x_grid.num - 1);

191:   spline2::getSplineBound(y * spline_m->y_grid.delta_inv, ty, iy, spline_m->y_grid.num - 1);

192:   spline2::getSplineBound(z * spline_m->z_grid.delta_inv, tz, iz, spline_m->z_grid.num - 1);

[...]

198:   const intptr_t xs = spline_m->x_stride;

199:   const intptr_t ys = spline_m->y_stride;

200:   const intptr_t zs = spline_m->z_stride;

201:

202:   const size_t out_offset = spline_m->num_splines;

203:

204:   T* restrict gx = grads;

205:   T* restrict gy = grads + out_offset;

206:   T* restrict gz = grads + 2 * out_offset;

207:

208:   T* restrict hxx = hess;

209:   T* restrict hxy = hess + out_offset;

210:   T* restrict hxz = hess + 2 * out_offset;

211:   T* restrict hyy = hess + 3 * out_offset;

212:   T* restrict hyz = hess + 4 * out_offset;

213:   T* restrict hzz = hess + 5 * out_offset;

[...]

226:   for (int i = 0; i < 4; i++)

227:     for (int j = 0; j < 4; j++)

228:     {

229:       const T* restrict coefs    = spline_m->coefs + (ix + i) * xs + (iy + j) * ys + iz * zs;

230:       const T* restrict coefszs  = coefs + zs;

231:       const T* restrict coefs2zs = coefs + 2 * zs;

232:       const T* restrict coefs3zs = coefs + 3 * zs;

233:

234:       const T pre20 = d2a[i] * b[j];

235:       const T pre10 = da[i] * b[j];

236:       const T pre00 = a[i] * b[j];

237:       const T pre11 = da[i] * db[j];

238:       const T pre01 = a[i] * db[j];

239:       const T pre02 = a[i] * d2b[j];

240:

241:       const int iSplitPoint = num_splines;

242:       for (int n = 0; n < iSplitPoint; n++)

243:       {

244:         T coefsv    = coefs[n];

245:         T coefsvzs  = coefszs[n];

246:         T coefsv2zs = coefs2zs[n];

247:         T coefsv3zs = coefs3zs[n];

248:

249:         T sum0 = c[0] * coefsv + c[1] * coefsvzs + c[2] * coefsv2zs + c[3] * coefsv3zs;

250:         T sum1 = dc[0] * coefsv + dc[1] * coefsvzs + dc[2] * coefsv2zs + dc[3] * coefsv3zs;

251:         T sum2 = d2c[0] * coefsv + d2c[1] * coefsvzs + d2c[2] * coefsv2zs + d2c[3] * coefsv3zs;

252:

253:         hxx[n] += pre20 * sum0;

254:         hxy[n] += pre11 * sum0;

255:         hxz[n] += pre10 * sum1;

256:         hyy[n] += pre02 * sum0;

257:         hyz[n] += pre01 * sum1;

258:         hzz[n] += pre00 * sum2;

259:         gx[n] += pre10 * sum0;

260:         gy[n] += pre01 * sum0;

261:         gz[n] += pre00 * sum1;

262:         vals[n] += pre00 * sum0;

[...]

269:   const T dxx   = dxInv * dxInv;

270:   const T dyy   = dyInv * dyInv;

271:   const T dzz   = dzInv * dzInv;

272:   const T dxy   = dxInv * dyInv;

273:   const T dxz   = dxInv * dzInv;

274:   const T dyz   = dyInv * dzInv;

275:

276:   for (int n = 0; n < num_splines; n++)

277:   {

278:     gx[n] *= dxInv;

279:     gy[n] *= dyInv;

280:     gz[n] *= dzInv;

281:     hxx[n] *= dxx;

282:     hyy[n] *= dyy;

283:     hzz[n] *= dzz;

284:     hxy[n] *= dxy;

285:     hxz[n] *= dxz;

286:     hyz[n] *= dyz;

287:   }

288: }

0x486540 PUSH	%RBP

0x486541 VMOVAPD	%XMM0,%XMM3

0x486545 VXORPD	%XMM4,%XMM4,%XMM4

0x486549 MOV	%RSP,%RBP

0x48654c PUSH	%R15

0x48654e MOV	%RDI,%R10

0x486551 MOV	%RDX,%R11

0x486554 PUSH	%R14

0x486556 MOV	%RCX,%R9

0x486559 PUSH	%R13

0x48655b PUSH	%R12

0x48655d PUSH	%RBX

0x48655e AND	$-0x20,%RSP

0x486562 SUB	$0x1c0,%RSP

0x486569 VSUBSD	0x50(%RDI),%XMM1,%XMM0

0x48656e VSUBSD	0x28(%RDI),%XMM3,%XMM1

0x486573 VMOVSD	0x48(%RDI),%XMM7

0x486578 MOV	%RSI,0xf0(%RSP)

0x486580 VMULSD	%XMM7,%XMM1,%XMM6

0x486584 VSUBSD	0x78(%RDI),%XMM2,%XMM2

0x486589 VCOMISD	%XMM6,%XMM4

0x48658d JA	487049

0x486593 VCVTTSD2SI	%XMM6,%EAX

0x486597 MOV	0x38(%RDI),%EDI

0x48659a DEC	%EDI

0x48659c MOV	%EDI,0xe8(%RSP)

0x4865a3 CMP	%EAX,%EDI

0x4865a5 JL	487020

0x4865ab VRNDSCALESD	$0xb,%XMM6,%XMM6,%XMM22

0x4865b2 VSUBSD	%XMM22,%XMM6,%XMM15

0x4865b8 VMOVSD	0x130fc0(%RIP),%XMM9

0x4865c0 VMOVSD	0x131028(%RIP),%XMM11

0x4865c8 VMULSD	%XMM9,%XMM15,%XMM14

0x4865cd VMOVAPD	%XMM15,%XMM8

0x4865d2 VFNMADD132SD	%XMM11,%XMM11,%XMM8

0x4865d7 VMOVAPD	%XMM15,%XMM5

0x4865db VFMADD213SD	0x13114c(%RIP),%XMM11,%XMM5

0x4865e4 VSUBSD	%XMM14,%XMM11,%XMM21

0x4865ea VMULSD	%XMM15,%XMM15,%XMM12

0x4865ef VFMADD132SD	%XMM15,%XMM11,%XMM8

0x4865f4 VFMADD213SD	0x130fe2(%RIP),%XMM15,%XMM21

0x4865fe VMULSD	%XMM5,%XMM15,%XMM3

0x486602 VMOVSD	0x130fa6(%RIP),%XMM10

0x48660a VMULSD	%XMM12,%XMM14,%XMM1

0x48660f VFMADD132SD	%XMM15,%XMM9,%XMM8

0x486614 VMOVAPD	%XMM15,%XMM13

0x486619 VFMADD132SD	%XMM3,%XMM10,%XMM13

0x48661e VFMADD132SD	%XMM15,%XMM9,%XMM21

0x486624 VMOVSD	0x13110c(%RIP),%XMM9

0x48662c VUNPCKLPD	%XMM1,%XMM8,%XMM4

0x486630 VMOVSD	0x130f90(%RIP),%XMM1

0x486638 VMOVAPD	%XMM15,%XMM14

0x48663d VFMADD132SD	%XMM9,%XMM1,%XMM14

0x486642 VUNPCKLPD	%XMM13,%XMM21,%XMM16

0x486648 VMOVSD	0x130f70(%RIP),%XMM13

0x486650 VINSERTF64X2	$0x1,%XMM4,%YMM16,%YMM26

0x486657 VFNMADD132SD	%XMM15,%XMM13,%XMM9

0x48665c VMULSD	%XMM14,%XMM15,%XMM4

0x486661 VMOVSD	0x131027(%RIP),%XMM14

0x486669 VSUBSD	%XMM6,%XMM22,%XMM17

0x48666f VFMADD231SD	%XMM14,%XMM15,%XMM1

0x486674 VFMADD132SD	%XMM15,%XMM11,%XMM9

0x486679 VADDSD	%XMM11,%XMM3,%XMM5

0x48667e VFNMADD132SD	%XMM15,%XMM13,%XMM14

0x486683 VMULSD	%XMM11,%XMM12,%XMM11

0x486688 VADDSD	%XMM13,%XMM17,%XMM18

0x48668e VXORPD	0x12f80a(%RIP),%XMM5,%XMM3

0x486696 MOV	%EAX,0xe8(%RSP)

0x48669d VUNPCKLPD	%XMM4,%XMM3,%XMM8

0x4866a1 VUNPCKLPD	%XMM11,%XMM9,%XMM12

0x4866a6 VUNPCKLPD	%XMM15,%XMM14,%XMM6

0x4866ab VUNPCKLPD	%XMM1,%XMM18,%XMM19

0x4866b1 VINSERTF64X2	$0x1,%XMM12,%YMM8,%YMM8

0x4866b8 VINSERTF64X2	$0x1,%XMM6,%YMM19,%YMM25

0x4866bf VMOVSD	0x70(%R10),%XMM6

0x4866c5 VXORPD	%XMM15,%XMM15,%XMM15

0x4866ca VMULSD	%XMM0,%XMM6,%XMM0

0x4866ce VCOMISD	%XMM0,%XMM15

0x4866d2 JA	4870df

0x4866d8 VCVTTSD2SI	%XMM0,%EDX

0x4866dc MOV	0x60(%R10),%EDI

0x4866e0 DEC	%EDI

0x4866e2 MOV	%EDI,0xd8(%RSP)

0x4866e9 CMP	%EDX,%EDI

0x4866eb JL	487179

0x4866f1 VRNDSCALESD	$0xb,%XMM0,%XMM0,%XMM4

0x4866f8 VSUBSD	%XMM4,%XMM0,%XMM1

0x4866fc VMOVSD	0x130e7c(%RIP),%XMM12

0x486704 VMOVSD	0x130ee4(%RIP),%XMM9

0x48670c VMULSD	%XMM12,%XMM1,%XMM11

0x486711 VMOVAPD	%XMM1,%XMM13

0x486715 VMOVAPD	%XMM1,%XMM5

0x486719 VFMADD213SD	0x13100e(%RIP),%XMM9,%XMM13

0x486722 VFNMADD132SD	%XMM9,%XMM9,%XMM5

0x486727 VSUBSD	%XMM11,%XMM9,%XMM23

0x48672d VMULSD	%XMM1,%XMM1,%XMM15

0x486731 VMOVAPD	%XMM1,%XMM14

0x486735 VMULSD	%XMM13,%XMM1,%XMM3

0x48673a VFMADD132SD	%XMM1,%XMM9,%XMM5

0x48673f VFMADD213SD	0x130e97(%RIP),%XMM1,%XMM23

0x486749 VMOVAPD	%XMM1,%XMM13

0x48674d VSUBSD	%XMM0,%XMM4,%XMM0

0x486751 VFMADD132SD	%XMM3,%XMM10,%XMM14

0x486756 VFMADD132SD	%XMM1,%XMM12,%XMM5

0x48675b VFMADD132SD	%XMM1,%XMM12,%XMM23

0x486761 VMULSD	%XMM15,%XMM11,%XMM12

0x486766 VADDSD	%XMM9,%XMM3,%XMM3

0x48676b MOV	%EDX,0xd8(%RSP)

0x486772 VUNPCKLPD	%XMM14,%XMM23,%XMM20

0x486778 VUNPCKLPD	%XMM12,%XMM5,%XMM11

0x48677d VINSERTF64X2	$0x1,%XMM11,%YMM20,%YMM27

0x486784 VMOVSD	0x130fac(%RIP),%XMM5

0x48678c VMOVSD	0x130e34(%RIP),%XMM11

0x486794 VXORPD	0x12f704(%RIP),%XMM3,%XMM3

0x48679c VFMADD132SD	%XMM5,%XMM11,%XMM13

0x4867a1 VMULSD	%XMM13,%XMM1,%XMM14

0x4867a6 VMOVSD	0x130e12(%RIP),%XMM13

0x4867ae VFNMADD132SD	%XMM1,%XMM13,%XMM5

0x4867b3 VADDSD	%XMM13,%XMM0,%XMM4

0x4867b8 VUNPCKLPD	%XMM14,%XMM3,%XMM12

0x4867bd VFMADD132SD	%XMM1,%XMM9,%XMM5

0x4867c2 VMULSD	%XMM9,%XMM15,%XMM9

0x4867c7 VUNPCKLPD	%XMM9,%XMM5,%XMM15

0x4867cc VMOVSD	0x130ebc(%RIP),%XMM5

0x4867d4 VINSERTF64X2	$0x1,%XMM15,%YMM12,%YMM3

0x4867db VFMADD231SD	%XMM5,%XMM1,%XMM11

0x4867e0 VFNMADD132SD	%XMM1,%XMM13,%XMM5

0x4867e5 VUNPCKLPD	%XMM11,%XMM4,%XMM11

0x4867ea VUNPCKLPD	%XMM1,%XMM5,%XMM1

0x4867ee VINSERTF64X2	$0x1,%XMM1,%YMM11,%YMM4

0x4867f5 VMOVSD	0x98(%R10),%XMM5

0x4867fe VMULSD	%XMM2,%XMM5,%XMM0

0x486802 VXORPD	%XMM2,%XMM2,%XMM2

0x486806 VCOMISD	%XMM0,%XMM2

0x48680a JA	48707d

0x486810 VCVTTSD2SI	%XMM0,%ECX

0x486814 MOV	0x88(%R10),%EAX

0x48681b DEC	%EAX

0x48681d CMP	%ECX,%EAX

0x48681f JL	487109

0x486825 VRNDSCALESD	$0xb,%XMM0,%XMM0,%XMM14

0x48682c VSUBSD	%XMM14,%XMM0,%XMM9

0x486831 VMOVSD	0x130db7(%RIP),%XMM1

0x486839 VMOVSD	0x130d9d(%RIP),%XMM24

0x486843 VMOVAPD	%XMM9,%XMM11

0x486848 VFMADD213SD	0x130edf(%RIP),%XMM1,%XMM11

0x486851 VMULSD	0x130ecf(%RIP),%XMM9,%XMM12

0x486859 VMOVSD	0x130d1f(%RIP),%XMM13

0x486861 VMOVSD	0x130d55(%RIP),%XMM30

0x48686b VMOVSD	0x130d53(%RIP),%XMM18

0x486875 VMULSD	%XMM11,%XMM9,%XMM2

0x48687a VMOVAPD	%XMM9,%XMM11

0x48687f VFNMADD132SD	%XMM1,%XMM1,%XMM11

0x486884 VADDSD	%XMM1,%XMM12,%XMM15

0x486888 VMOVAPD	%XMM9,%XMM29

0x48688e VMULSD	%XMM9,%XMM9,%XMM28

0x486894 VFMADD132SD	%XMM9,%XMM24,%XMM15

0x48689a VFMADD132SD	%XMM9,%XMM1,%XMM11

0x48689f VMOVSD	0x130de7(%RIP),%XMM21

0x4868a9 VXORPD	0x12f5ef(%RIP),%XMM12,%XMM12

0x4868b1 VSUBSD	%XMM0,%XMM14,%XMM0

0x4868b5 VFMADD132SD	%XMM9,%XMM13,%XMM15

0x4868ba VFMADD132SD	%XMM9,%XMM13,%XMM11

0x4868bf VMOVSD	0x130e71(%RIP),%XMM13

0x4868c7 VFMADD231SD	%XMM2,%XMM9,%XMM10

0x4868cc VFMADD132SD	%XMM13,%XMM18,%XMM29

0x4868d2 VFNMADD132SD	%XMM9,%XMM30,%XMM13

0x4868d8 VFMADD231SD	%XMM21,%XMM9,%XMM18

0x4868de VMULSD	%XMM28,%XMM12,%XMM12

0x4868e4 VMULSD	%XMM1,%XMM28,%XMM17

0x4868ea VMULSD	%XMM29,%XMM9,%XMM19

0x4868f0 VFMADD132SD	%XMM9,%XMM1,%XMM13

0x4868f5 VFNMADD132SD	%XMM9,%XMM30,%XMM21

0x4868fb MOVSXD	%ECX,%RBX

0x4868fe MOV	%RBX,0xb8(%RSP)

0x486906 VSUBSD	%XMM2,%XMM24,%XMM16

0x48690c VADDSD	%XMM30,%XMM0,%XMM14

0x486912 MOVSXD	0xe8(%R10),%RDX

0x486919 MOV	0x20(%R10),%R13

0x48691d SAL	$0x3,%RDX

0x486921 MOV	0x18(%R10),%R12

0x486925 MOV	%R13,0xc0(%RSP)

0x48692d LEA	(%R9,%RDX,1),%R13

0x486931 MOV	%R12,0xc8(%RSP)

0x486939 LEA	(%R13,%RDX,1),%R12

0x48693e LEA	(%R12,%RDX,1),%R14

0x486942 LEA	(%R11,%RDX,1),%R15

0x486946 LEA	(%R14,%RDX,1),%RDI

0x48694a MOV	0x10(%R10),%RSI

0x48694e MOV	%R8,%RBX

0x486951 LEA	(%R15,%RDX,1),%RCX

0x486955 ADD	%RDI,%RDX

0x486958 SAL	$0x3,%RBX

0x48695c MOV	%RSI,0xd0(%RSP)

0x486964 MOV	%RDI,0xe0(%RSP)

0x48696c MOV	%RDX,0xf8(%RSP)

0x486974 MOV	%RBX,0xb0(%RSP)

0x48697c VMOVAPD	%YMM26,0x100(%RSP)

0x486984 VMOVAPD	%YMM8,0x140(%RSP)

0x48698d VMOVAPD	%YMM25,0x180(%RSP)

0x486995 VMOVAPD	%YMM27,0x120(%RSP)

0x48699d VMOVAPD	%YMM3,0x160(%RSP)

0x4869a6 VMOVAPD	%YMM4,0x1a0(%RSP)

0x4869af JE	487198

0x4869b5 MOV	%R10,0x18(%RSP)

0x4869ba MOV	%RCX,0xa8(%RSP)

0x4869c2 MOV	%R9,0x10(%RSP)

0x4869c7 MOV	%R8,0x8(%RSP)

0x4869cc MOV	%R11,0xa0(%RSP)

0x4869d4 MOV	0xf0(%RSP),%RDI

0x4869dc VMOVSD	%XMM21,0x20(%RSP)

0x4869e4 VMOVSD	%XMM18,0x28(%RSP)

0x4869ec VMOVSD	%XMM14,0x30(%RSP)

0x4869f2 VMOVSD	%XMM17,0x38(%RSP)

0x4869fa VMOVSD	%XMM13,0x40(%RSP)

0x486a00 VMOVSD	%XMM19,0x48(%RSP)

0x486a08 VMOVSD	%XMM16,0x50(%RSP)

0x486a10 VMOVSD	%XMM12,0x58(%RSP)

0x486a16 VMOVSD	%XMM11,0x60(%RSP)

0x486a1c VMOVSD	%XMM10,0x68(%RSP)

0x486a22 VMOVSD	%XMM15,0x70(%RSP)

0x486a28 VMOVSD	%XMM9,0x78(%RSP)

0x486a2e VMOVSD	%XMM5,0x80(%RSP)

0x486a37 VMOVSD	%XMM6,0x88(%RSP)

0x486a40 VMOVSD	%XMM7,0x90(%RSP)

0x486a49 XOR	%ESI,%ESI

0x486a4b MOV	%RBX,%RDX

0x486a4e VZEROUPPER

0x486a51 CALL	404140 <memset@plt>

0x486a56 MOV	0xa0(%RSP),%R11

0x486a5e MOV	%RBX,%RDX

0x486a61 MOV	%R11,%RDI

0x486a64 XOR	%ESI,%ESI

0x486a66 MOV	%R11,0x98(%RSP)

0x486a6e CALL	404140 <memset@plt>

0x486a73 MOV	%RBX,%RDX

0x486a76 XOR	%ESI,%ESI

0x486a78 MOV	%R15,%RDI

0x486a7b CALL	404140 <memset@plt>

0x486a80 MOV	0xa8(%RSP),%R8

0x486a88 MOV	%RBX,%RDX

0x486a8b MOV	%R8,%RDI

0x486a8e XOR	%ESI,%ESI

0x486a90 MOV	%R8,0xa0(%RSP)

0x486a98 CALL	404140 <memset@plt>

0x486a9d MOV	0x10(%RSP),%R9

0x486aa2 MOV	%RBX,%RDX

0x486aa5 MOV	%R9,%RDI

0x486aa8 XOR	%ESI,%ESI

0x486aaa MOV	%R9,0xa8(%RSP)

0x486ab2 CALL	404140 <memset@plt>

0x486ab7 MOV	%RBX,%RDX

0x486aba XOR	%ESI,%ESI

0x486abc MOV	%R13,%RDI

0x486abf CALL	404140 <memset@plt>

0x486ac4 MOV	%RBX,%RDX

0x486ac7 XOR	%ESI,%ESI

0x486ac9 MOV	%R12,%RDI

0x486acc CALL	404140 <memset@plt>

0x486ad1 MOV	%RBX,%RDX

0x486ad4 XOR	%ESI,%ESI

0x486ad6 MOV	%R14,%RDI

0x486ad9 CALL	404140 <memset@plt>

0x486ade MOV	0xe0(%RSP),%RDI

0x486ae6 MOV	%RBX,%RDX

0x486ae9 XOR	%ESI,%ESI

0x486aeb CALL	404140 <memset@plt>

0x486af0 MOV	0xf8(%RSP),%RDI

0x486af8 MOV	%RBX,%RDX

0x486afb XOR	%ESI,%ESI

0x486afd CALL	404140 <memset@plt>

0x486b02 MOV	0x8(%RSP),%R8

0x486b07 MOV	0x18(%RSP),%R10

0x486b0c VMOVSD	0x20(%RSP),%XMM21

0x486b14 VMOVSD	0x28(%RSP),%XMM18

0x486b1c VMOVSD	0x30(%RSP),%XMM14

0x486b22 VMOVSD	0x38(%RSP),%XMM17

0x486b2a VMOVSD	0x40(%RSP),%XMM13

0x486b30 VMOVSD	0x48(%RSP),%XMM19

0x486b38 VMOVSD	0x50(%RSP),%XMM16

0x486b40 VMOVSD	0x58(%RSP),%XMM12

0x486b46 VMOVSD	0x60(%RSP),%XMM11

0x486b4c VMOVSD	0x68(%RSP),%XMM10

0x486b52 VMOVSD	0x70(%RSP),%XMM15

0x486b58 VMOVSD	0x78(%RSP),%XMM9

0x486b5e VMOVSD	0x80(%RSP),%XMM5

0x486b67 VMOVSD	0x88(%RSP),%XMM6

0x486b70 VMOVSD	0x90(%RSP),%XMM7

0x486b79 MOV	0x98(%RSP),%R11

0x486b81 MOV	0xa0(%RSP),%RCX

0x486b89 MOV	0xa8(%RSP),%R9

0x486b91 MOV	0x8(%R10),%RSI

0x486b95 MOV	0xb8(%RSP),%RDI

0x486b9d MOV	0xc0(%RSP),%R10

0x486ba5 IMUL	%R10,%RDI

0x486ba9 TEST	%R8D,%R8D

0x486bac JLE	4871a0

0x486bb2 MOV	0xd0(%RSP),%RDX

0x486bba MOV	0xc8(%RSP),%RBX

0x486bc2 LEA	(,%RDX,8),%RAX

0x486bca MOV	%RAX,0xb8(%RSP)

0x486bd2 MOVSXD	0xe8(%RSP),%RAX

0x486bda LEA	-0x1(%R8),%R8D

0x486bde IMUL	%RDX,%RAX

0x486be2 MOVSXD	0xd8(%RSP),%RDX

0x486bea MOV	%R8,0xe8(%RSP)

0x486bf2 IMUL	%RBX,%RDX

0x486bf6 ADD	%R10,%RAX

0x486bf9 ADD	%RDX,%RAX

0x486bfc ADD	%RDI,%RAX

0x486bff LEA	(%RSI,%RAX,8),%RAX

0x486c03 LEA	(,%R10,8),%RDI

0x486c0b LEA	(,%RBX,8),%RSI

0x486c13 MOV	%RDI,0xd8(%RSP)

0x486c1b MOV	%RSI,0xd0(%RSP)

0x486c23 MOV	0xe0(%RSP),%RBX

0x486c2b XOR	%R10D,%R10D

(1023) 0x486c2e MOV	0xd8(%RSP),%RDX

(1023) 0x486c36 MOV	%R10,0xc8(%RSP)

(1023) 0x486c3e MOV	%RAX,0xc0(%RSP)

(1023) 0x486c46 LEA	(%RDX,%RAX,1),%RDI

(1023) 0x486c4a VMOVSD	0x180(%RSP,%R10,1),%XMM31

(1023) 0x486c52 VMOVSD	0x140(%RSP,%R10,1),%XMM22

(1023) 0x486c5a VMOVSD	0x100(%RSP,%R10,1),%XMM2

(1023) 0x486c64 LEA	(%RDI,%RDX,1),%R8

(1023) 0x486c68 MOV	%RAX,%RSI

(1023) 0x486c6b XOR	%EDX,%EDX

  (1022) 0x486c6d VMOVSD	0x120(%RSP,%RDX,1),%XMM4

  (1022) 0x486c76 VMOVSD	0x160(%RSP,%RDX,1),%XMM1

  (1022) 0x486c7f VMULSD	%XMM4,%XMM31,%XMM26

  (1022) 0x486c85 VMULSD	%XMM22,%XMM4,%XMM8

  (1022) 0x486c8b VMULSD	%XMM2,%XMM4,%XMM3

  (1022) 0x486c8f VMULSD	%XMM1,%XMM22,%XMM20

  (1022) 0x486c95 VMULSD	%XMM1,%XMM2,%XMM4

  (1022) 0x486c99 VMULSD	0x1a0(%RSP,%RDX,1),%XMM2,%XMM27

  (1022) 0x486ca1 MOV	0xd8(%RSP),%RAX

  (1022) 0x486ca9 MOV	%RDX,0xe0(%RSP)

  (1022) 0x486cb1 MOV	%RSI,%R10

  (1022) 0x486cb4 SUB	%RAX,%R10

  (1022) 0x486cb7 XOR	%EAX,%EAX

  (1022) 0x486cb9 NOPL	(%RAX)

    (1021) 0x486cc0 VMOVSD	(%RSI,%RAX,8),%XMM25

    (1021) 0x486cc7 VMOVSD	(%R8,%RAX,8),%XMM24

    (1021) 0x486cce VMULSD	%XMM10,%XMM25,%XMM0

    (1021) 0x486cd4 VMULSD	%XMM12,%XMM24,%XMM1

    (1021) 0x486cda VMOVSD	(%R10,%RAX,8),%XMM28

    (1021) 0x486ce1 VMOVSD	(%RDI,%RAX,8),%XMM23

    (1021) 0x486ce8 VMULSD	%XMM18,%XMM25,%XMM30

    (1021) 0x486cee VFMADD231SD	%XMM15,%XMM28,%XMM0

    (1021) 0x486cf4 VFMADD231SD	%XMM11,%XMM23,%XMM1

    (1021) 0x486cfa VMULSD	%XMM17,%XMM24,%XMM29

    (1021) 0x486d00 MOV	0xf8(%RSP),%RDX

    (1021) 0x486d08 VFMADD231SD	%XMM14,%XMM28,%XMM30

    (1021) 0x486d0e VADDSD	%XMM1,%XMM0,%XMM0

    (1021) 0x486d12 VMULSD	%XMM19,%XMM25,%XMM1

    (1021) 0x486d18 VFMADD231SD	%XMM13,%XMM23,%XMM29

    (1021) 0x486d1e VFMADD231SD	%XMM16,%XMM28,%XMM1

    (1021) 0x486d24 VMULSD	%XMM9,%XMM24,%XMM28

    (1021) 0x486d2a VMOVAPD	%XMM20,%XMM24

    (1021) 0x486d30 VADDSD	%XMM29,%XMM1,%XMM1

    (1021) 0x486d36 VFMADD132SD	%XMM21,%XMM28,%XMM23

    (1021) 0x486d3c VMOVAPD	%XMM8,%XMM29

    (1021) 0x486d42 VMOVAPD	%XMM4,%XMM28

    (1021) 0x486d48 VADDSD	%XMM23,%XMM30,%XMM25

    (1021) 0x486d4e VMOVAPD	%XMM26,%XMM23

    (1021) 0x486d54 VFMADD213SD	(%R9,%RAX,8),%XMM0,%XMM23

    (1021) 0x486d5b VMOVAPD	%XMM27,%XMM30

    (1021) 0x486d61 VMOVSD	%XMM23,(%R9,%RAX,8)

    (1021) 0x486d68 VFMADD213SD	(%R13,%RAX,8),%XMM0,%XMM24

    (1021) 0x486d70 VMOVAPD	%XMM4,%XMM23

    (1021) 0x486d76 VMOVSD	%XMM24,(%R13,%RAX,8)

    (1021) 0x486d7e VFMADD213SD	(%R12,%RAX,8),%XMM1,%XMM29

    (1021) 0x486d85 VMOVSD	%XMM29,(%R12,%RAX,8)

    (1021) 0x486d8c VFMADD213SD	(%R14,%RAX,8),%XMM0,%XMM30

    (1021) 0x486d93 VMOVSD	%XMM30,(%R14,%RAX,8)

    (1021) 0x486d9a VFMADD213SD	(%RBX,%RAX,8),%XMM1,%XMM28

    (1021) 0x486da1 VMOVSD	%XMM28,(%RBX,%RAX,8)

    (1021) 0x486da8 VFMADD213SD	(%RDX,%RAX,8),%XMM3,%XMM25

    (1021) 0x486daf VMOVSD	%XMM25,(%RDX,%RAX,8)

    (1021) 0x486db6 VMOVAPD	%XMM8,%XMM25

    (1021) 0x486dbc VFMADD213SD	(%R11,%RAX,8),%XMM0,%XMM25

    (1021) 0x486dc3 MOV	0xf0(%RSP),%RDX

    (1021) 0x486dcb VMOVSD	%XMM25,(%R11,%RAX,8)

    (1021) 0x486dd2 VFMADD213SD	(%R15,%RAX,8),%XMM0,%XMM23

    (1021) 0x486dd9 VFMADD213SD	(%RDX,%RAX,8),%XMM3,%XMM0

    (1021) 0x486ddf VMOVSD	%XMM23,(%R15,%RAX,8)

    (1021) 0x486de6 VFMADD213SD	(%RCX,%RAX,8),%XMM3,%XMM1

    (1021) 0x486dec VMOVSD	%XMM0,(%RDX,%RAX,8)

    (1021) 0x486df1 MOV	%RAX,%RDX

    (1021) 0x486df4 VMOVSD	%XMM1,(%RCX,%RAX,8)

    (1021) 0x486df9 INC	%RAX

    (1021) 0x486dfc CMP	%RDX,0xe8(%RSP)

    (1021) 0x486e04 JNE	486cc0

  (1022) 0x486e0a MOV	0xe0(%RSP),%RDX

  (1022) 0x486e12 MOV	0xd0(%RSP),%R10

  (1022) 0x486e1a ADD	$0x8,%RDX

  (1022) 0x486e1e ADD	%R10,%RSI

  (1022) 0x486e21 ADD	%R10,%RDI

  (1022) 0x486e24 ADD	%R10,%R8

  (1022) 0x486e27 CMP	$0x20,%RDX

  (1022) 0x486e2b JNE	486c6d

(1023) 0x486e31 MOV	0xc8(%RSP),%R10

(1023) 0x486e39 MOV	0xc0(%RSP),%RAX

(1023) 0x486e41 MOV	0xb8(%RSP),%RDI

(1023) 0x486e49 ADD	$0x8,%R10

(1023) 0x486e4d ADD	%RDI,%RAX

(1023) 0x486e50 CMP	$0x20,%R10

(1023) 0x486e54 JNE	486c2e

0x486e5a MOV	%RBX,0xe0(%RSP)

0x486e62 MOV	0xb0(%RSP),%R8

0x486e6a VMULSD	%XMM7,%XMM7,%XMM10

0x486e6e VMULSD	%XMM6,%XMM6,%XMM11

0x486e72 VMULSD	%XMM5,%XMM5,%XMM12

0x486e76 VMULSD	%XMM6,%XMM7,%XMM2

0x486e7a VMULSD	%XMM5,%XMM7,%XMM13

0x486e7e VMULSD	%XMM5,%XMM6,%XMM14

0x486e82 XOR	%R10D,%R10D

0x486e85 TEST	$0x8,%R8B

0x486e89 JE	486f08

0x486e8b VMULSD	(%R9),%XMM10,%XMM3

0x486e90 MOV	0xf8(%RSP),%RSI

0x486e98 VMULSD	(%R11),%XMM7,%XMM9

0x486e9d MOV	0xe0(%RSP),%RBX

0x486ea5 CMPQ	$0x8,0xb0(%RSP)

0x486eae VMOVSD	%XMM3,(%R9)

0x486eb3 VMULSD	(%R14),%XMM11,%XMM4

0x486eb8 VMOVSD	%XMM9,(%R11)

0x486ebd VMULSD	(%R15),%XMM6,%XMM15

0x486ec2 MOV	$0x8,%R10D

0x486ec8 VMOVSD	%XMM4,(%R14)

0x486ecd VMULSD	(%RSI),%XMM12,%XMM0

0x486ed1 VMOVSD	%XMM15,(%R15)

0x486ed6 VMULSD	(%RCX),%XMM5,%XMM8

0x486eda VMOVSD	%XMM0,(%RSI)

0x486ede VMULSD	(%R13),%XMM2,%XMM1

0x486ee4 VMOVSD	%XMM8,(%RCX)

0x486ee8 VMOVSD	%XMM1,(%R13)

0x486eee VMULSD	(%R12),%XMM13,%XMM9

0x486ef4 VMOVSD	%XMM9,(%R12)

0x486efa VMULSD	(%RBX),%XMM14,%XMM15

0x486efe VMOVSD	%XMM15,(%RBX)

0x486f02 JE	487011

0x486f08 MOV	0xe0(%RSP),%RAX

0x486f10 MOV	0xf8(%RSP),%RDX

(1020) 0x486f18 VMULSD	(%R9,%R10,1),%XMM10,%XMM0

(1020) 0x486f1e VMULSD	(%R11,%R10,1),%XMM7,%XMM8

(1020) 0x486f24 VMOVSD	%XMM0,(%R9,%R10,1)

(1020) 0x486f2a VMULSD	(%R14,%R10,1),%XMM11,%XMM1

(1020) 0x486f30 VMOVSD	%XMM8,(%R11,%R10,1)

(1020) 0x486f36 VMULSD	(%R15,%R10,1),%XMM6,%XMM3

(1020) 0x486f3c VMOVSD	%XMM1,(%R14,%R10,1)

(1020) 0x486f42 VMULSD	(%RDX,%R10,1),%XMM12,%XMM9

(1020) 0x486f48 VMOVSD	%XMM3,(%R15,%R10,1)

(1020) 0x486f4e VMULSD	(%RCX,%R10,1),%XMM5,%XMM4

(1020) 0x486f54 VMOVSD	%XMM9,(%RDX,%R10,1)

(1020) 0x486f5a VMULSD	(%R13,%R10,1),%XMM2,%XMM15

(1020) 0x486f61 VMOVSD	%XMM4,(%RCX,%R10,1)

(1020) 0x486f67 VMULSD	0x8(%R11,%R10,1),%XMM7,%XMM4

(1020) 0x486f6e VMOVSD	%XMM15,(%R13,%R10,1)

(1020) 0x486f75 VMULSD	(%R12,%R10,1),%XMM13,%XMM8

(1020) 0x486f7b VMOVSD	%XMM4,0x8(%R11,%R10,1)

(1020) 0x486f82 VMULSD	0x8(%R15,%R10,1),%XMM6,%XMM0

(1020) 0x486f89 VMOVSD	%XMM8,(%R12,%R10,1)

(1020) 0x486f8f VMULSD	(%RAX,%R10,1),%XMM14,%XMM3

(1020) 0x486f95 VMOVSD	%XMM0,0x8(%R15,%R10,1)

(1020) 0x486f9c VMULSD	0x8(%RCX,%R10,1),%XMM5,%XMM1

(1020) 0x486fa3 VMOVSD	%XMM3,(%RAX,%R10,1)

(1020) 0x486fa9 VMULSD	0x8(%R9,%R10,1),%XMM10,%XMM9

(1020) 0x486fb0 VMOVSD	%XMM1,0x8(%RCX,%R10,1)

(1020) 0x486fb7 VMOVSD	%XMM9,0x8(%R9,%R10,1)

(1020) 0x486fbe VMULSD	0x8(%R14,%R10,1),%XMM11,%XMM15

(1020) 0x486fc5 VMOVSD	%XMM15,0x8(%R14,%R10,1)

(1020) 0x486fcc VMULSD	0x8(%RDX,%R10,1),%XMM12,%XMM8

(1020) 0x486fd3 VMOVSD	%XMM8,0x8(%RDX,%R10,1)

(1020) 0x486fda VMULSD	0x8(%R13,%R10,1),%XMM2,%XMM3

(1020) 0x486fe1 VMOVSD	%XMM3,0x8(%R13,%R10,1)

(1020) 0x486fe8 VMULSD	0x8(%R12,%R10,1),%XMM13,%XMM4

(1020) 0x486fef VMOVSD	%XMM4,0x8(%R12,%R10,1)

(1020) 0x486ff6 VMULSD	0x8(%RAX,%R10,1),%XMM14,%XMM0

(1020) 0x486ffd VMOVSD	%XMM0,0x8(%RAX,%R10,1)

(1020) 0x487004 ADD	$0x10,%R10

(1020) 0x487008 CMP	%R10,%R8

(1020) 0x48700b JNE	486f18

0x487011 LEA	-0x28(%RBP),%RSP

0x487015 POP	%RBX

0x487016 POP	%R12

0x487018 POP	%R13

0x48701a POP	%R14

0x48701c POP	%R15

0x48701e POP	%RBP

0x48701f RET

0x487020 VMOVAPD	0x1305d6(%RIP),%YMM25

0x48702a VMOVAPD	0x1305ee(%RIP),%YMM8

0x487032 VMOVAPD	0x130564(%RIP),%YMM26

0x48703c VMOVSD	0x13056c(%RIP),%XMM10

0x487044 JMP	4866bf

0x487049 MOVL	$0,0xe8(%RSP)

0x487054 VMOVAPD	0x130562(%RIP),%YMM25

0x48705e VMOVAPD	0x13057a(%RIP),%YMM8

0x487066 VMOVAPD	0x130510(%RIP),%YMM26

0x487070 VMOVSD	0x130538(%RIP),%XMM10

0x487078 JMP	4866bf

0x48707d VMOVSD	0x130539(%RIP),%XMM21

0x487087 VMOVSD	0x1304f1(%RIP),%XMM11

0x48708f VXORPD	%XMM17,%XMM17,%XMM17

0x487095 MOVQ	$0,0xb8(%RSP)

0x4870a1 VMOVSD	0x13051d(%RIP),%XMM18

0x4870ab VMOVSD	0x13053d(%RIP),%XMM13

0x4870b3 VMOVSD	0x130523(%RIP),%XMM16

0x4870bd VMOVAPD	%XMM21,%XMM14

0x4870c3 VMOVAPD	%XMM17,%XMM19

0x4870c9 VMOVAPD	%XMM17,%XMM12

0x4870cf VMOVAPD	%XMM11,%XMM15

0x4870d4 VMOVAPD	%XMM17,%XMM9

0x4870da JMP	486912

0x4870df MOVL	$0,0xd8(%RSP)

0x4870ea VMOVAPD	0x1304ce(%RIP),%YMM4

0x4870f2 VMOVAPD	0x1304e6(%RIP),%YMM3

0x4870fa VMOVAPD	0x13047c(%RIP),%YMM27

0x487104 JMP	4867f5

0x487109 CLTQ

0x48710b VXORPD	%XMM16,%XMM16,%XMM16

0x487111 VMOVAPD	%XMM10,%XMM11

0x487116 MOV	%RAX,0xb8(%RSP)

0x48711e VMOVSD	0x1304e8(%RIP),%XMM21

0x487128 VMOVSD	0x1304d6(%RIP),%XMM18

0x487132 VMOVSD	0x1304c6(%RIP),%XMM14

0x48713a VMOVSD	0x1304f4(%RIP),%XMM17

0x487144 VMOVSD	0x1304e4(%RIP),%XMM13

0x48714c VMOVSD	0x1304d2(%RIP),%XMM19

0x487156 VMOVSD	0x13045a(%RIP),%XMM12

0x48715e VMOVSD	0x130442(%RIP),%XMM10

0x487166 VMOVSD	0x1304aa(%RIP),%XMM9

0x48716e VMOVAPD	%XMM16,%XMM15

0x487174 JMP	486912

0x487179 VMOVAPD	0x13047f(%RIP),%YMM4

0x487181 VMOVAPD	0x130497(%RIP),%YMM3

0x487189 VMOVAPD	0x13040d(%RIP),%YMM27

0x487193 JMP	4867f5

0x487198 VZEROUPPER

0x48719b JMP	486b91

0x4871a0 TEST	%R8,%R8

0x4871a3 JNE	486e62

0x4871a9 LEA	-0x28(%RBP),%RSP

0x4871ad POP	%RBX

0x4871ae POP	%R12

0x4871b0 POP	%R13

0x4871b2 POP	%R14

0x4871b4 POP	%R15

0x4871b6 POP	%RBP

0x4871b7 RET

0x4871b8 NOPL	(%RAX,%RAX,1)

Coverage (%)	Name	Source Location	Module
►82.84+	miniqmcreference::einspline_sp[...]	einspline_spo_ref.hpp:206	exec
○	miniqmcreference::DiracDetermi[...]	DiracDeterminantRef.cpp:100	exec
○	qmcplusplus::WaveFunction::rat[...]	WaveFunction.cpp:198	exec
○	main._omp_fn.1	refwrap.h:350	exec
○	gomp_thread_start	team.c:130	libgomp.so.1.0.0
►7.59+	miniqmcreference::einspline_sp[...]	einspline_spo_ref.hpp:206	exec
○	miniqmcreference::DiracDetermi[...]	OhmmsVector.h:144	exec
○	qmcplusplus::WaveFunction::eva[...]	WaveFunction.cpp:171	exec
○	main._omp_fn.0	miniqmc.cpp:397	exec
○	gomp_thread_start	team.c:130	libgomp.so.1.0.0
►7.13+	miniqmcreference::einspline_sp[...]	einspline_spo_ref.hpp:206	exec
○	miniqmcreference::DiracDetermi[...]	OhmmsVector.h:144	exec
○	qmcplusplus::WaveFunction::eva[...]	WaveFunction.cpp:171	exec
○	main._omp_fn.0	miniqmc.cpp:397	exec
○	gomp_thread_start	team.c:130	libgomp.so.1.0.0
►2.08+	miniqmcreference::einspline_sp[...]	einspline_spo_ref.hpp:206	exec
○	miniqmcreference::DiracDetermi[...]	DiracDeterminantRef.cpp:100	exec
○	qmcplusplus::WaveFunction::rat[...]	WaveFunction.cpp:198	exec
○	main._omp_fn.1	refwrap.h:350	exec
○	GOMP_parallel	libgomp.h:982	libgomp.so.1.0.0

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.01% of application time for run gcc_3

Source file and lines	MultiBsplineRef.hpp:174-288
Module	exec

The function is defined in:

/cluster/comp/gcc/14.2.0/include/c++/14.2.0/bits/stl_algobase.h:951-952
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/MultiBsplineEvalHelper.hpp:53-66
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/MultiBsplineData.hpp:68-77
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/MultiBsplineRef.hpp:174,187-192,198-213,226-262,269-288

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 73.33 to 47.50 cycles (1.54x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is not vectorized. Only 16% of vector register length is used (average across all SSE/AVX instructions).

Details

19% of SSE/AVX instructions are used in vector version (process two or more data elements in vector registers):

17% of SSE/AVX loads are used in vector version.
10% of SSE/AVX stores are used in vector version.
0% of SSE/AVX addition or subtraction instructions are used in vector version.
0% of SSE/AVX multiply instructions are used in vector version.
0% of SSE/AVX fused multiply-add instructions are used in vector version.
56% of SSE/AVX instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Workaround

Read the "512-bits vectorization" report at "Potential" confidence level.

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

512-bits vectorization

On some x86 processors supporting 512-bits vectorization, compilers are often too conservative and limit vectorization to 256 bits. Performance can then be improved by enforcing 512-bits vectorization, especially with many vectorized and high trip count loops. 512-bits vectorization performance overhead (compared to 256-bits) is generally lower on newer processors.

Workaround

Recompile with -mprefer-vector-width=512

FMA

Detected 36 FMA (fused multiply-add) operations. Presence of both ADD/SUB and MUL operations.

Workaround

Try to change order in which elements are evaluated (using parentheses) in arithmetic expressions containing both ADD/SUB and MUL operations to enable your compiler to generate FMA instructions wherever possible. For instance a + b*c is a valid FMA (MUL then ADD). However (a+b)* c cannot be translated into an FMA (ADD then MUL).

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

memset@plt: 10 occurrences►
- /cluster/comp/gcc/14.2.0/include/c++/14.2.0/bits/stl_algobase.h:952
- /cluster/comp/gcc/14.2.0/include/c++/14.2.0/bits/stl_algobase.h:952
- /cluster/comp/gcc/14.2.0/include/c++/14.2.0/bits/stl_algobase.h:952
- /cluster/comp/gcc/14.2.0/include/c++/14.2.0/bits/stl_algobase.h:952
- /cluster/comp/gcc/14.2.0/include/c++/14.2.0/bits/stl_algobase.h:952
- /cluster/comp/gcc/14.2.0/include/c++/14.2.0/bits/stl_algobase.h:952
- /cluster/comp/gcc/14.2.0/include/c++/14.2.0/bits/stl_algobase.h:952
- /cluster/comp/gcc/14.2.0/include/c++/14.2.0/bits/stl_algobase.h:952
- /cluster/comp/gcc/14.2.0/include/c++/14.2.0/bits/stl_algobase.h:952
- /cluster/comp/gcc/14.2.0/include/c++/14.2.0/bits/stl_algobase.h:952

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

VCVTTSD2SI: 3 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/MultiBsplineEvalHelper.hpp:60
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/MultiBsplineEvalHelper.hpp:60
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/MultiBsplineEvalHelper.hpp:60
VRNDSCALESD: 3 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/MultiBsplineEvalHelper.hpp:61
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/MultiBsplineEvalHelper.hpp:61
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/MultiBsplineEvalHelper.hpp:61
VZEROUPPER: 2 occurrences►
- /cluster/comp/gcc/14.2.0/include/c++/14.2.0/bits/stl_algobase.h:952
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/MultiBsplineEvalHelper.hpp:66

Conversion instructions

Detected expensive conversion instructions.

Details

CLTQ: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/MultiBsplineRef.hpp:229
VCVTTSD2SI (FP64 to INT32/64, scalar): 3 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/MultiBsplineEvalHelper.hpp:60
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/MultiBsplineEvalHelper.hpp:60
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/MultiBsplineEvalHelper.hpp:60

Workaround

Avoid mixing data with different types. In particular, check if the type of constants is the same as array elements.

Type of elements and instruction set

96 SSE or AVX instructions are processing arithmetic or math operations on double precision FP elements in scalar mode (one at a time).

Matching between your function (in the source code) and the binary function

The binary function is composed of 126 FP arithmetical operations:

54: addition or subtraction (36 inside FMA instructions)
72: multiply (36 inside FMA instructions)

The binary function is loading 1240 bytes (155 double precision FP elements). The binary function is storing 592 bytes (74 double precision FP elements).

Arithmetic intensity

Arithmetic intensity is 0.07 FP operations per loaded or stored byte.

General properties

nb instructions	422
nb uops	440
loop length	2395
used x86 registers	16
used mmx registers	0
used xmm registers	28
used ymm registers	11
used zmm registers	0
nb stack references	38
ADD-SUB / MUL ratio	0.50

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	73.33 cycles
front end	73.33 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11
uops	48.50	48.50	44.33	44.33	37.50	33.00	17.00	37.50	37.50	37.50	17.00	44.33
cycles	48.50	48.50	44.33	44.33	37.50	33.00	17.00	37.50	37.50	37.50	17.00	44.33

Execution ports to units layout:

P0 (256 bits): VPU, BRU, ALU, DIV/SQRT
P1 (256 bits): ALU, VPU
P2 (512 bits): load
P3 (512 bits): load
P4 (512 bits): store data
P5 (512 bits): ALU, VPU
P6: ALU, BRU
P7: store address
P8: store address
P9 (512 bits): store data
P10: ALU
P11 (512 bits): load

Cycles executing div or sqrt instructions

Cycles summary

Front-end	73.33
Dispatch	48.50
Overall L1	73.33

Vectorization ratios

INT

all	5%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
other	25%

all	21%
load	17%
store	20%
mul	0%
add-sub	0%
fma	0%
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	61%

INT+FP

all	19%
load	17%
store	10%
mul	0%
add-sub	0%
fma	0%
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	56%

Vector efficiency ratios

INT

all	11%
load	12%
store	10%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
other	12%

all	17%
load	18%
store	20%
mul	12%
add-sub	12%
fma	12%
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	20%

INT+FP

all	16%
load	18%
store	15%
mul	12%
add-sub	12%
fma	12%
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	19%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 73.33 cycles. At this rate:

8% of peak load performance is reached (16.91 out of 192.00 bytes loaded per cycle (GB/s @ 1GHz))
6% of peak store performance is reached (8.07 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Performance is limited by instruction throughput (loading/decoding program instructions to execution core) (front-end is a bottleneck). By removing all these bottlenecks, you can lower the cost of an iteration from 73.33 to 48.50 cycles (1.51x speedup).

ASM code

In the binary file, the address of the function is: 486540

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
VMOVAPD %XMM0,%XMM3	1	0	0	0	0	0	0	0	0	0	0	0	0	0-1	0.17	vect (25.0%)
VXORPD %XMM4,%XMM4,%XMM4	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
PUSH %R15	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
MOV %RDI,%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RDX,%R11	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
PUSH %R14	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
MOV %RCX,%R9	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
PUSH %R13	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R12	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %RBX	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
AND $-0x20,%RSP	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
SUB $0x1c0,%RSP	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
VSUBSD 0x50(%RDI),%XMM1,%XMM0	1	0	0.50	0.33	0.33	0	0.50	0	0	0	0	0	0.33	3	0.50	scal (12.5%)
VSUBSD 0x28(%RDI),%XMM3,%XMM1	1	0	0.50	0.33	0.33	0	0.50	0	0	0	0	0	0.33	3	0.50	scal (12.5%)
VMOVSD 0x48(%RDI),%XMM7	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV %RSI,0xf0(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
VMULSD %XMM7,%XMM1,%XMM6	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VSUBSD 0x78(%RDI),%XMM2,%XMM2	1	0	0.50	0.33	0.33	0	0.50	0	0	0	0	0	0.33	3	0.50	scal (12.5%)
VCOMISD %XMM6,%XMM4	1	1	0	0	0	0	0	0	0	0	0	0	0	3	1	scal (12.5%)
JA 487049 <_ZN16miniqmcreference19MultiBsplineEvalRef12evaluate_vghIdEEvPKN11qmcplusplus14bspline_traitsIT_Lj3EE10SplineTypeES4_S4_S4_PS4_S9_S9_m+0xb09>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
VCVTTSD2SI %XMM6,%EAX	2	1.50	0.50	0	0	0	0	0	0	0	0	0	0	7	1	scal (12.5%)
MOV 0x38(%RDI),%EDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
DEC %EDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %EDI,0xe8(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
CMP %EAX,%EDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
JL 487020 <_ZN16miniqmcreference19MultiBsplineEvalRef12evaluate_vghIdEEvPKN11qmcplusplus14bspline_traitsIT_Lj3EE10SplineTypeES4_S4_S4_PS4_S9_S9_m+0xae0>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
VRNDSCALESD $0xb,%XMM6,%XMM6,%XMM22	2	1	1	0	0	0	0	0	0	0	0	0	0	8	1	scal (12.5%)
VSUBSD %XMM22,%XMM6,%XMM15	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	3	0.50	scal (12.5%)
VMOVSD 0x130fc0(%RIP),%XMM9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMOVSD 0x131028(%RIP),%XMM11	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMULSD %XMM9,%XMM15,%XMM14	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMOVAPD %XMM15,%XMM8	1	0	0	0	0	0	0	0	0	0	0	0	0	0-1	0.17	vect (25.0%)
VFNMADD132SD %XMM11,%XMM11,%XMM8	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMOVAPD %XMM15,%XMM5	1	0	0	0	0	0	0	0	0	0	0	0	0	0-1	0.17	vect (25.0%)
VFMADD213SD 0x13114c(%RIP),%XMM11,%XMM5	1	0.50	0.50	0.33	0.33	0	0	0	0	0	0	0	0.33	4	0.50	scal (12.5%)
VSUBSD %XMM14,%XMM11,%XMM21	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	3	0.50	scal (12.5%)
VMULSD %XMM15,%XMM15,%XMM12	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VFMADD132SD %XMM15,%XMM11,%XMM8	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VFMADD213SD 0x130fe2(%RIP),%XMM15,%XMM21	1	0.50	0.50	0.33	0.33	0	0	0	0	0	0	0	0.33	4	0.50	scal (12.5%)
VMULSD %XMM5,%XMM15,%XMM3	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMOVSD 0x130fa6(%RIP),%XMM10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMULSD %XMM12,%XMM14,%XMM1	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VFMADD132SD %XMM15,%XMM9,%XMM8	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMOVAPD %XMM15,%XMM13	1	0	0	0	0	0	0	0	0	0	0	0	0	0-1	0.17	vect (25.0%)
VFMADD132SD %XMM3,%XMM10,%XMM13	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VFMADD132SD %XMM15,%XMM9,%XMM21	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMOVSD 0x13110c(%RIP),%XMM9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VUNPCKLPD %XMM1,%XMM8,%XMM4	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
VMOVSD 0x130f90(%RIP),%XMM1	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMOVAPD %XMM15,%XMM14	1	0	0	0	0	0	0	0	0	0	0	0	0	0-1	0.17	vect (25.0%)
VFMADD132SD %XMM9,%XMM1,%XMM14	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VUNPCKLPD %XMM13,%XMM21,%XMM16	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
VMOVSD 0x130f70(%RIP),%XMM13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VINSERTF64X2 $0x1,%XMM4,%YMM16,%YMM26	1	0	0	0	0	0	1	0	0	0	0	0	0	3	1	vect (25.0%)
VFNMADD132SD %XMM15,%XMM13,%XMM9	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMULSD %XMM14,%XMM15,%XMM4	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMOVSD 0x131027(%RIP),%XMM14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VSUBSD %XMM6,%XMM22,%XMM17	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	3	0.50	scal (12.5%)
VFMADD231SD %XMM14,%XMM15,%XMM1	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VFMADD132SD %XMM15,%XMM11,%XMM9	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VADDSD %XMM11,%XMM3,%XMM5	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	3	0.50	scal (12.5%)
VFNMADD132SD %XMM15,%XMM13,%XMM14	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMULSD %XMM11,%XMM12,%XMM11	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VADDSD %XMM13,%XMM17,%XMM18	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	3	0.50	scal (12.5%)
VXORPD 0x12f80a(%RIP),%XMM5,%XMM3	1	0.33	0.33	0.33	0.33	0	0.33	0	0	0	0	0	0.33	0-1	0.33	vect (25.0%)
MOV %EAX,0xe8(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
VUNPCKLPD %XMM4,%XMM3,%XMM8	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
VUNPCKLPD %XMM11,%XMM9,%XMM12	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
VUNPCKLPD %XMM15,%XMM14,%XMM6	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
VUNPCKLPD %XMM1,%XMM18,%XMM19	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
VINSERTF64X2 $0x1,%XMM12,%YMM8,%YMM8	1	0	0	0	0	0	1	0	0	0	0	0	0	3	1	vect (25.0%)
VINSERTF64X2 $0x1,%XMM6,%YMM19,%YMM25	1	0	0	0	0	0	1	0	0	0	0	0	0	3	1	vect (25.0%)
VMOVSD 0x70(%R10),%XMM6	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VXORPD %XMM15,%XMM15,%XMM15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
VMULSD %XMM0,%XMM6,%XMM0	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VCOMISD %XMM0,%XMM15	1	1	0	0	0	0	0	0	0	0	0	0	0	3	1	scal (12.5%)
JA 4870df <_ZN16miniqmcreference19MultiBsplineEvalRef12evaluate_vghIdEEvPKN11qmcplusplus14bspline_traitsIT_Lj3EE10SplineTypeES4_S4_S4_PS4_S9_S9_m+0xb9f>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
VCVTTSD2SI %XMM0,%EDX	2	1.50	0.50	0	0	0	0	0	0	0	0	0	0	7	1	scal (12.5%)
MOV 0x60(%R10),%EDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
DEC %EDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %EDI,0xd8(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
CMP %EDX,%EDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
JL 487179 <_ZN16miniqmcreference19MultiBsplineEvalRef12evaluate_vghIdEEvPKN11qmcplusplus14bspline_traitsIT_Lj3EE10SplineTypeES4_S4_S4_PS4_S9_S9_m+0xc39>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
VRNDSCALESD $0xb,%XMM0,%XMM0,%XMM4	2	1	1	0	0	0	0	0	0	0	0	0	0	8	1	scal (12.5%)
VSUBSD %XMM4,%XMM0,%XMM1	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	3	0.50	scal (12.5%)
VMOVSD 0x130e7c(%RIP),%XMM12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMOVSD 0x130ee4(%RIP),%XMM9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMULSD %XMM12,%XMM1,%XMM11	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMOVAPD %XMM1,%XMM13	1	0	0	0	0	0	0	0	0	0	0	0	0	0-1	0.17	vect (25.0%)
VMOVAPD %XMM1,%XMM5	1	0	0	0	0	0	0	0	0	0	0	0	0	0-1	0.17	vect (25.0%)
VFMADD213SD 0x13100e(%RIP),%XMM9,%XMM13	1	0.50	0.50	0.33	0.33	0	0	0	0	0	0	0	0.33	4	0.50	scal (12.5%)
VFNMADD132SD %XMM9,%XMM9,%XMM5	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VSUBSD %XMM11,%XMM9,%XMM23	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	3	0.50	scal (12.5%)
VMULSD %XMM1,%XMM1,%XMM15	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMOVAPD %XMM1,%XMM14	1	0	0	0	0	0	0	0	0	0	0	0	0	0-1	0.17	vect (25.0%)
VMULSD %XMM13,%XMM1,%XMM3	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VFMADD132SD %XMM1,%XMM9,%XMM5	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VFMADD213SD 0x130e97(%RIP),%XMM1,%XMM23	1	0.50	0.50	0.33	0.33	0	0	0	0	0	0	0	0.33	4	0.50	scal (12.5%)
VMOVAPD %XMM1,%XMM13	1	0	0	0	0	0	0	0	0	0	0	0	0	0-1	0.17	vect (25.0%)
VSUBSD %XMM0,%XMM4,%XMM0	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	3	0.50	scal (12.5%)
VFMADD132SD %XMM3,%XMM10,%XMM14	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VFMADD132SD %XMM1,%XMM12,%XMM5	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VFMADD132SD %XMM1,%XMM12,%XMM23	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMULSD %XMM15,%XMM11,%XMM12	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VADDSD %XMM9,%XMM3,%XMM3	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	3	0.50	scal (12.5%)
MOV %EDX,0xd8(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
VUNPCKLPD %XMM14,%XMM23,%XMM20	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
VUNPCKLPD %XMM12,%XMM5,%XMM11	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
VINSERTF64X2 $0x1,%XMM11,%YMM20,%YMM27	1	0	0	0	0	0	1	0	0	0	0	0	0	3	1	vect (25.0%)
VMOVSD 0x130fac(%RIP),%XMM5	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMOVSD 0x130e34(%RIP),%XMM11	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VXORPD 0x12f704(%RIP),%XMM3,%XMM3	1	0.33	0.33	0.33	0.33	0	0.33	0	0	0	0	0	0.33	0-1	0.33	vect (25.0%)
VFMADD132SD %XMM5,%XMM11,%XMM13	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMULSD %XMM13,%XMM1,%XMM14	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMOVSD 0x130e12(%RIP),%XMM13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VFNMADD132SD %XMM1,%XMM13,%XMM5	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VADDSD %XMM13,%XMM0,%XMM4	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	3	0.50	scal (12.5%)
VUNPCKLPD %XMM14,%XMM3,%XMM12	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
VFMADD132SD %XMM1,%XMM9,%XMM5	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMULSD %XMM9,%XMM15,%XMM9	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VUNPCKLPD %XMM9,%XMM5,%XMM15	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
VMOVSD 0x130ebc(%RIP),%XMM5	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VINSERTF64X2 $0x1,%XMM15,%YMM12,%YMM3	1	0	0	0	0	0	1	0	0	0	0	0	0	3	1	vect (25.0%)
VFMADD231SD %XMM5,%XMM1,%XMM11	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VFNMADD132SD %XMM1,%XMM13,%XMM5	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VUNPCKLPD %XMM11,%XMM4,%XMM11	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
VUNPCKLPD %XMM1,%XMM5,%XMM1	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
VINSERTF64X2 $0x1,%XMM1,%YMM11,%YMM4	1	0	0	0	0	0	1	0	0	0	0	0	0	3	1	vect (25.0%)
VMOVSD 0x98(%R10),%XMM5	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMULSD %XMM2,%XMM5,%XMM0	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VXORPD %XMM2,%XMM2,%XMM2	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
VCOMISD %XMM0,%XMM2	1	1	0	0	0	0	0	0	0	0	0	0	0	3	1	scal (12.5%)
JA 48707d <_ZN16miniqmcreference19MultiBsplineEvalRef12evaluate_vghIdEEvPKN11qmcplusplus14bspline_traitsIT_Lj3EE10SplineTypeES4_S4_S4_PS4_S9_S9_m+0xb3d>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
VCVTTSD2SI %XMM0,%ECX	2	1.50	0.50	0	0	0	0	0	0	0	0	0	0	7	1	scal (12.5%)
MOV 0x88(%R10),%EAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
DEC %EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
CMP %ECX,%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
JL 487109 <_ZN16miniqmcreference19MultiBsplineEvalRef12evaluate_vghIdEEvPKN11qmcplusplus14bspline_traitsIT_Lj3EE10SplineTypeES4_S4_S4_PS4_S9_S9_m+0xbc9>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
VRNDSCALESD $0xb,%XMM0,%XMM0,%XMM14	2	1	1	0	0	0	0	0	0	0	0	0	0	8	1	scal (12.5%)
VSUBSD %XMM14,%XMM0,%XMM9	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	3	0.50	scal (12.5%)
VMOVSD 0x130db7(%RIP),%XMM1	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMOVSD 0x130d9d(%RIP),%XMM24	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMOVAPD %XMM9,%XMM11	1	0	0	0	0	0	0	0	0	0	0	0	0	0-1	0.17	vect (25.0%)
VFMADD213SD 0x130edf(%RIP),%XMM1,%XMM11	1	0.50	0.50	0.33	0.33	0	0	0	0	0	0	0	0.33	4	0.50	scal (12.5%)
VMULSD 0x130ecf(%RIP),%XMM9,%XMM12	1	0.50	0.50	0.33	0.33	0	0	0	0	0	0	0	0.33	4	0.50	scal (12.5%)
VMOVSD 0x130d1f(%RIP),%XMM13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMOVSD 0x130d55(%RIP),%XMM30	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMOVSD 0x130d53(%RIP),%XMM18	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMULSD %XMM11,%XMM9,%XMM2	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMOVAPD %XMM9,%XMM11	1	0	0	0	0	0	0	0	0	0	0	0	0	0-1	0.17	vect (25.0%)
VFNMADD132SD %XMM1,%XMM1,%XMM11	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VADDSD %XMM1,%XMM12,%XMM15	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	3	0.50	scal (12.5%)
VMOVAPD %XMM9,%XMM29	1	0	0	0	0	0	0	0	0	0	0	0	0	0-1	0.17	vect (25.0%)
VMULSD %XMM9,%XMM9,%XMM28	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VFMADD132SD %XMM9,%XMM24,%XMM15	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VFMADD132SD %XMM9,%XMM1,%XMM11	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMOVSD 0x130de7(%RIP),%XMM21	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VXORPD 0x12f5ef(%RIP),%XMM12,%XMM12	1	0.33	0.33	0.33	0.33	0	0.33	0	0	0	0	0	0.33	0-1	0.33	vect (25.0%)
VSUBSD %XMM0,%XMM14,%XMM0	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	3	0.50	scal (12.5%)
VFMADD132SD %XMM9,%XMM13,%XMM15	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VFMADD132SD %XMM9,%XMM13,%XMM11	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMOVSD 0x130e71(%RIP),%XMM13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VFMADD231SD %XMM2,%XMM9,%XMM10	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VFMADD132SD %XMM13,%XMM18,%XMM29	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VFNMADD132SD %XMM9,%XMM30,%XMM13	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VFMADD231SD %XMM21,%XMM9,%XMM18	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMULSD %XMM28,%XMM12,%XMM12	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMULSD %XMM1,%XMM28,%XMM17	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMULSD %XMM29,%XMM9,%XMM19	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VFMADD132SD %XMM9,%XMM1,%XMM13	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VFNMADD132SD %XMM9,%XMM30,%XMM21	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOVSXD %ECX,%RBX	1	0	0.33	0	0	0	0.33	0	0	0	0	0.33	0	1	0.33	N/A
MOV %RBX,0xb8(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
VSUBSD %XMM2,%XMM24,%XMM16	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	3	0.50	scal (12.5%)
VADDSD %XMM30,%XMM0,%XMM14	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	3	0.50	scal (12.5%)
MOVSXD 0xe8(%R10),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x20(%R10),%R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
SAL $0x3,%RDX	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
MOV 0x18(%R10),%R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %R13,0xc0(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
LEA (%R9,%RDX,1),%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R12,0xc8(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
LEA (%R13,%RDX,1),%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA (%R12,%RDX,1),%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA (%R11,%RDX,1),%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA (%R14,%RDX,1),%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV 0x10(%R10),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %R8,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LEA (%R15,%RDX,1),%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
ADD %RDI,%RDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
SAL $0x3,%RBX	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
MOV %RSI,0xd0(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RDI,0xe0(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RDX,0xf8(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RBX,0xb0(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
VMOVAPD %YMM26,0x100(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (50.0%)
VMOVAPD %YMM8,0x140(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (50.0%)
VMOVAPD %YMM25,0x180(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (50.0%)
VMOVAPD %YMM27,0x120(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (50.0%)
VMOVAPD %YMM3,0x160(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (50.0%)
VMOVAPD %YMM4,0x1a0(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (50.0%)
JE 487198 <_ZN16miniqmcreference19MultiBsplineEvalRef12evaluate_vghIdEEvPKN11qmcplusplus14bspline_traitsIT_Lj3EE10SplineTypeES4_S4_S4_PS4_S9_S9_m+0xc58>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %R10,0x18(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RCX,0xa8(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R9,0x10(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R8,0x8(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R11,0xa0(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0xf0(%RSP),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VMOVSD %XMM21,0x20(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
VMOVSD %XMM18,0x28(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
VMOVSD %XMM14,0x30(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
VMOVSD %XMM17,0x38(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
VMOVSD %XMM13,0x40(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
VMOVSD %XMM19,0x48(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
VMOVSD %XMM16,0x50(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
VMOVSD %XMM12,0x58(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
VMOVSD %XMM11,0x60(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
VMOVSD %XMM10,0x68(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
VMOVSD %XMM15,0x70(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
VMOVSD %XMM9,0x78(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
VMOVSD %XMM5,0x80(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
VMOVSD %XMM6,0x88(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
VMOVSD %XMM7,0x90(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
XOR %ESI,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RBX,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
VZEROUPPER	2	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 404140 <memset@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV 0xa0(%RSP),%R11	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RBX,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R11,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
XOR %ESI,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R11,0x98(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
CALL 404140 <memset@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV %RBX,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
XOR %ESI,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R15,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 404140 <memset@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV 0xa8(%RSP),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RBX,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R8,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
XOR %ESI,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R8,0xa0(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
CALL 404140 <memset@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV 0x10(%RSP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RBX,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R9,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
XOR %ESI,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R9,0xa8(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
CALL 404140 <memset@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV %RBX,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
XOR %ESI,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R13,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 404140 <memset@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV %RBX,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
XOR %ESI,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R12,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 404140 <memset@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV %RBX,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
XOR %ESI,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R14,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 404140 <memset@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV 0xe0(%RSP),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RBX,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
XOR %ESI,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CALL 404140 <memset@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV 0xf8(%RSP),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RBX,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
XOR %ESI,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CALL 404140 <memset@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV 0x8(%RSP),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x18(%RSP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VMOVSD 0x20(%RSP),%XMM21	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMOVSD 0x28(%RSP),%XMM18	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMOVSD 0x30(%RSP),%XMM14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMOVSD 0x38(%RSP),%XMM17	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMOVSD 0x40(%RSP),%XMM13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMOVSD 0x48(%RSP),%XMM19	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMOVSD 0x50(%RSP),%XMM16	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMOVSD 0x58(%RSP),%XMM12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMOVSD 0x60(%RSP),%XMM11	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMOVSD 0x68(%RSP),%XMM10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMOVSD 0x70(%RSP),%XMM15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMOVSD 0x78(%RSP),%XMM9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMOVSD 0x80(%RSP),%XMM5	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMOVSD 0x88(%RSP),%XMM6	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMOVSD 0x90(%RSP),%XMM7	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x98(%RSP),%R11	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0xa0(%RSP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0xa8(%RSP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x8(%R10),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0xb8(%RSP),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0xc0(%RSP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
IMUL %R10,%RDI	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
TEST %R8D,%R8D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (6.3%)
JLE 4871a0 <_ZN16miniqmcreference19MultiBsplineEvalRef12evaluate_vghIdEEvPKN11qmcplusplus14bspline_traitsIT_Lj3EE10SplineTypeES4_S4_S4_PS4_S9_S9_m+0xc60>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV 0xd0(%RSP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0xc8(%RSP),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (,%RDX,8),%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RAX,0xb8(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOVSXD 0xe8(%RSP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA -0x1(%R8),%R8D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
IMUL %RDX,%RAX	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
MOVSXD 0xd8(%RSP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %R8,0xe8(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
IMUL %RBX,%RDX	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
ADD %R10,%RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
ADD %RDX,%RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
ADD %RDI,%RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
LEA (%RSI,%RAX,8),%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA (,%R10,8),%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA (,%RBX,8),%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RDI,0xd8(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RSI,0xd0(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0xe0(%RSP),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
XOR %R10D,%R10D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RBX,0xe0(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0xb0(%RSP),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VMULSD %XMM7,%XMM7,%XMM10	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMULSD %XMM6,%XMM6,%XMM11	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMULSD %XMM5,%XMM5,%XMM12	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMULSD %XMM6,%XMM7,%XMM2	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMULSD %XMM5,%XMM7,%XMM13	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMULSD %XMM5,%XMM6,%XMM14	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
XOR %R10D,%R10D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
TEST $0x8,%R8B	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	N/A
JE 486f08 <_ZN16miniqmcreference19MultiBsplineEvalRef12evaluate_vghIdEEvPKN11qmcplusplus14bspline_traitsIT_Lj3EE10SplineTypeES4_S4_S4_PS4_S9_S9_m+0x9c8>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
VMULSD (%R9),%XMM10,%XMM3	1	0.50	0.50	0.33	0.33	0	0	0	0	0	0	0	0.33	4	0.50	scal (12.5%)
MOV 0xf8(%RSP),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VMULSD (%R11),%XMM7,%XMM9	1	0.50	0.50	0.33	0.33	0	0	0	0	0	0	0	0.33	4	0.50	scal (12.5%)
MOV 0xe0(%RSP),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMPQ $0x8,0xb0(%RSP)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
VMOVSD %XMM3,(%R9)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
VMULSD (%R14),%XMM11,%XMM4	1	0.50	0.50	0.33	0.33	0	0	0	0	0	0	0	0.33	4	0.50	scal (12.5%)
VMOVSD %XMM9,(%R11)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
VMULSD (%R15),%XMM6,%XMM15	1	0.50	0.50	0.33	0.33	0	0	0	0	0	0	0	0.33	4	0.50	scal (12.5%)
MOV $0x8,%R10D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
VMOVSD %XMM4,(%R14)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
VMULSD (%RSI),%XMM12,%XMM0	1	0.50	0.50	0.33	0.33	0	0	0	0	0	0	0	0.33	4	0.50	scal (12.5%)
VMOVSD %XMM15,(%R15)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
VMULSD (%RCX),%XMM5,%XMM8	1	0.50	0.50	0.33	0.33	0	0	0	0	0	0	0	0.33	4	0.50	scal (12.5%)
VMOVSD %XMM0,(%RSI)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
VMULSD (%R13),%XMM2,%XMM1	1	0.50	0.50	0.33	0.33	0	0	0	0	0	0	0	0.33	4	0.50	scal (12.5%)
VMOVSD %XMM8,(%RCX)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
VMOVSD %XMM1,(%R13)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
VMULSD (%R12),%XMM13,%XMM9	1	0.50	0.50	0.33	0.33	0	0	0	0	0	0	0	0.33	4	0.50	scal (12.5%)
VMOVSD %XMM9,(%R12)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
VMULSD (%RBX),%XMM14,%XMM15	1	0.50	0.50	0.33	0.33	0	0	0	0	0	0	0	0.33	4	0.50	scal (12.5%)
VMOVSD %XMM15,(%RBX)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JE 487011 <_ZN16miniqmcreference19MultiBsplineEvalRef12evaluate_vghIdEEvPKN11qmcplusplus14bspline_traitsIT_Lj3EE10SplineTypeES4_S4_S4_PS4_S9_S9_m+0xad1>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV 0xe0(%RSP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0xf8(%RSP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA -0x28(%RBP),%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
POP %RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %RBP	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
RET	1	0.50	0	0.33	0.33	0	0	0.50	0	0	0	0	0.33	0	2.13	N/A
VMOVAPD 0x1305d6(%RIP),%YMM25	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	0-1	0.33	vect (50.0%)
VMOVAPD 0x1305ee(%RIP),%YMM8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	0-1	0.33	vect (50.0%)
VMOVAPD 0x130564(%RIP),%YMM26	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	0-1	0.33	vect (50.0%)
VMOVSD 0x13056c(%RIP),%XMM10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
JMP 4866bf <_ZN16miniqmcreference19MultiBsplineEvalRef12evaluate_vghIdEEvPKN11qmcplusplus14bspline_traitsIT_Lj3EE10SplineTypeES4_S4_S4_PS4_S9_S9_m+0x17f>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
MOVL $0,0xe8(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
VMOVAPD 0x130562(%RIP),%YMM25	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	0-1	0.33	vect (50.0%)
VMOVAPD 0x13057a(%RIP),%YMM8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	0-1	0.33	vect (50.0%)
VMOVAPD 0x130510(%RIP),%YMM26	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	0-1	0.33	vect (50.0%)
VMOVSD 0x130538(%RIP),%XMM10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
JMP 4866bf <_ZN16miniqmcreference19MultiBsplineEvalRef12evaluate_vghIdEEvPKN11qmcplusplus14bspline_traitsIT_Lj3EE10SplineTypeES4_S4_S4_PS4_S9_S9_m+0x17f>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
VMOVSD 0x130539(%RIP),%XMM21	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMOVSD 0x1304f1(%RIP),%XMM11	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VXORPD %XMM17,%XMM17,%XMM17	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
MOVQ $0,0xb8(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
VMOVSD 0x13051d(%RIP),%XMM18	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMOVSD 0x13053d(%RIP),%XMM13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMOVSD 0x130523(%RIP),%XMM16	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMOVAPD %XMM21,%XMM14	1	0	0	0	0	0	0	0	0	0	0	0	0	0-1	0.17	vect (25.0%)
VMOVAPD %XMM17,%XMM19	1	0	0	0	0	0	0	0	0	0	0	0	0	0-1	0.17	vect (25.0%)
VMOVAPD %XMM17,%XMM12	1	0	0	0	0	0	0	0	0	0	0	0	0	0-1	0.17	vect (25.0%)
VMOVAPD %XMM11,%XMM15	1	0	0	0	0	0	0	0	0	0	0	0	0	0-1	0.17	vect (25.0%)
VMOVAPD %XMM17,%XMM9	1	0	0	0	0	0	0	0	0	0	0	0	0	0-1	0.17	vect (25.0%)
JMP 486912 <_ZN16miniqmcreference19MultiBsplineEvalRef12evaluate_vghIdEEvPKN11qmcplusplus14bspline_traitsIT_Lj3EE10SplineTypeES4_S4_S4_PS4_S9_S9_m+0x3d2>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
MOVL $0,0xd8(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
VMOVAPD 0x1304ce(%RIP),%YMM4	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	0-1	0.33	vect (50.0%)
VMOVAPD 0x1304e6(%RIP),%YMM3	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	0-1	0.33	vect (50.0%)
VMOVAPD 0x13047c(%RIP),%YMM27	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	0-1	0.33	vect (50.0%)
JMP 4867f5 <_ZN16miniqmcreference19MultiBsplineEvalRef12evaluate_vghIdEEvPKN11qmcplusplus14bspline_traitsIT_Lj3EE10SplineTypeES4_S4_S4_PS4_S9_S9_m+0x2b5>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
CLTQ	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.33	scal (12.5%)
VXORPD %XMM16,%XMM16,%XMM16	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
VMOVAPD %XMM10,%XMM11	1	0	0	0	0	0	0	0	0	0	0	0	0	0-1	0.17	vect (25.0%)
MOV %RAX,0xb8(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
VMOVSD 0x1304e8(%RIP),%XMM21	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMOVSD 0x1304d6(%RIP),%XMM18	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMOVSD 0x1304c6(%RIP),%XMM14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMOVSD 0x1304f4(%RIP),%XMM17	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMOVSD 0x1304e4(%RIP),%XMM13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMOVSD 0x1304d2(%RIP),%XMM19	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMOVSD 0x13045a(%RIP),%XMM12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMOVSD 0x130442(%RIP),%XMM10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMOVSD 0x1304aa(%RIP),%XMM9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMOVAPD %XMM16,%XMM15	1	0	0	0	0	0	0	0	0	0	0	0	0	0-1	0.17	vect (25.0%)
JMP 486912 <_ZN16miniqmcreference19MultiBsplineEvalRef12evaluate_vghIdEEvPKN11qmcplusplus14bspline_traitsIT_Lj3EE10SplineTypeES4_S4_S4_PS4_S9_S9_m+0x3d2>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
VMOVAPD 0x13047f(%RIP),%YMM4	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	0-1	0.33	vect (50.0%)
VMOVAPD 0x130497(%RIP),%YMM3	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	0-1	0.33	vect (50.0%)
VMOVAPD 0x13040d(%RIP),%YMM27	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	0-1	0.33	vect (50.0%)
JMP 4867f5 <_ZN16miniqmcreference19MultiBsplineEvalRef12evaluate_vghIdEEvPKN11qmcplusplus14bspline_traitsIT_Lj3EE10SplineTypeES4_S4_S4_PS4_S9_S9_m+0x2b5>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
VZEROUPPER	2	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
JMP 486b91 <_ZN16miniqmcreference19MultiBsplineEvalRef12evaluate_vghIdEEvPKN11qmcplusplus14bspline_traitsIT_Lj3EE10SplineTypeES4_S4_S4_PS4_S9_S9_m+0x651>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
TEST %R8,%R8	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	N/A
JNE 486e62 <_ZN16miniqmcreference19MultiBsplineEvalRef12evaluate_vghIdEEvPKN11qmcplusplus14bspline_traitsIT_Lj3EE10SplineTypeES4_S4_S4_PS4_S9_S9_m+0x922>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
LEA -0x28(%RBP),%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
POP %RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %RBP	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
RET	1	0.50	0	0.33	0.33	0	0	0.50	0	0	0	0	0.33	0	2.13	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A

The code analyzed by CQA in that panel excludes loops and represents 0.01% of application time for run gcc_3

Source file and lines	MultiBsplineRef.hpp:174-288
Module	exec

The function is defined in:

/cluster/comp/gcc/14.2.0/include/c++/14.2.0/bits/stl_algobase.h:951-952
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/MultiBsplineEvalHelper.hpp:53-66
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/MultiBsplineData.hpp:68-77
/home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/MultiBsplineRef.hpp:174,187-192,198-213,226-262,269-288

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is not vectorized. Only 16% of vector register length is used (average across all SSE/AVX instructions).

Details

19% of SSE/AVX instructions are used in vector version (process two or more data elements in vector registers):

17% of SSE/AVX loads are used in vector version.
10% of SSE/AVX stores are used in vector version.
0% of SSE/AVX addition or subtraction instructions are used in vector version.
0% of SSE/AVX multiply instructions are used in vector version.
0% of SSE/AVX fused multiply-add instructions are used in vector version.
56% of SSE/AVX instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Workaround

Read the "512-bits vectorization" report at "Potential" confidence level.

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

512-bits vectorization

Workaround

Recompile with -mprefer-vector-width=512

FMA

Detected 36 FMA (fused multiply-add) operations. Presence of both ADD/SUB and MUL operations.

Workaround

CALL instructions

Detected function call instructions.

Details

memset@plt: 10 occurrences►
- /cluster/comp/gcc/14.2.0/include/c++/14.2.0/bits/stl_algobase.h:952
- /cluster/comp/gcc/14.2.0/include/c++/14.2.0/bits/stl_algobase.h:952
- /cluster/comp/gcc/14.2.0/include/c++/14.2.0/bits/stl_algobase.h:952
- /cluster/comp/gcc/14.2.0/include/c++/14.2.0/bits/stl_algobase.h:952
- /cluster/comp/gcc/14.2.0/include/c++/14.2.0/bits/stl_algobase.h:952
- /cluster/comp/gcc/14.2.0/include/c++/14.2.0/bits/stl_algobase.h:952
- /cluster/comp/gcc/14.2.0/include/c++/14.2.0/bits/stl_algobase.h:952
- /cluster/comp/gcc/14.2.0/include/c++/14.2.0/bits/stl_algobase.h:952
- /cluster/comp/gcc/14.2.0/include/c++/14.2.0/bits/stl_algobase.h:952
- /cluster/comp/gcc/14.2.0/include/c++/14.2.0/bits/stl_algobase.h:952

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

VCVTTSD2SI: 3 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/MultiBsplineEvalHelper.hpp:60
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/MultiBsplineEvalHelper.hpp:60
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/MultiBsplineEvalHelper.hpp:60
VRNDSCALESD: 3 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/MultiBsplineEvalHelper.hpp:61
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/MultiBsplineEvalHelper.hpp:61
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/MultiBsplineEvalHelper.hpp:61
VZEROUPPER: 2 occurrences►
- /cluster/comp/gcc/14.2.0/include/c++/14.2.0/bits/stl_algobase.h:952
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/MultiBsplineEvalHelper.hpp:66

Conversion instructions

Detected expensive conversion instructions.

Details

CLTQ: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/MultiBsplineRef.hpp:229
VCVTTSD2SI (FP64 to INT32/64, scalar): 3 occurrences►
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/MultiBsplineEvalHelper.hpp:60
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/MultiBsplineEvalHelper.hpp:60
- /home/eoseret/qaas_runs_GNR/173-773-5521/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/MultiBsplineEvalHelper.hpp:60

Workaround

Avoid mixing data with different types. In particular, check if the type of constants is the same as array elements.

Type of elements and instruction set

96 SSE or AVX instructions are processing arithmetic or math operations on double precision FP elements in scalar mode (one at a time).

Matching between your function (in the source code) and the binary function

The binary function is composed of 126 FP arithmetical operations:

54: addition or subtraction (36 inside FMA instructions)
72: multiply (36 inside FMA instructions)

The binary function is loading 1240 bytes (155 double precision FP elements). The binary function is storing 592 bytes (74 double precision FP elements).

Arithmetic intensity

Arithmetic intensity is 0.07 FP operations per loaded or stored byte.

General properties

nb instructions	422
nb uops	440
loop length	2395
used x86 registers	16
used mmx registers	0
used xmm registers	28
used ymm registers	11
used zmm registers	0
nb stack references	38
ADD-SUB / MUL ratio	0.50

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	73.33 cycles
front end	73.33 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11
uops	48.50	48.50	44.33	44.33	37.50	33.00	17.00	37.50	37.50	37.50	17.00	44.33
cycles	48.50	48.50	44.33	44.33	37.50	33.00	17.00	37.50	37.50	37.50	17.00	44.33

Execution ports to units layout:

P0 (256 bits): VPU, BRU, ALU, DIV/SQRT
P1 (256 bits): ALU, VPU
P2 (512 bits): load
P3 (512 bits): load
P4 (512 bits): store data
P5 (512 bits): ALU, VPU
P6: ALU, BRU
P7: store address
P8: store address
P9 (512 bits): store data
P10: ALU
P11 (512 bits): load

Cycles executing div or sqrt instructions

Cycles summary

Front-end	73.33
Dispatch	48.50
Overall L1	73.33

Vectorization ratios

INT

all	5%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
other	25%

all	21%
load	17%
store	20%
mul	0%
add-sub	0%
fma	0%
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	61%

INT+FP

all	19%
load	17%
store	10%
mul	0%
add-sub	0%
fma	0%
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	56%

Vector efficiency ratios

INT

all	11%
load	12%
store	10%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
other	12%

all	17%
load	18%
store	20%
mul	12%
add-sub	12%
fma	12%
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	20%

INT+FP

all	16%
load	18%
store	15%
mul	12%
add-sub	12%
fma	12%
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	19%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 73.33 cycles. At this rate:

8% of peak load performance is reached (16.91 out of 192.00 bytes loaded per cycle (GB/s @ 1GHz))
6% of peak store performance is reached (8.07 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

ASM code

In the binary file, the address of the function is: 486540

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
VMOVAPD %XMM0,%XMM3	1	0	0	0	0	0	0	0	0	0	0	0	0	0-1	0.17	vect (25.0%)
VXORPD %XMM4,%XMM4,%XMM4	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
PUSH %R15	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
MOV %RDI,%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RDX,%R11	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
PUSH %R14	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
MOV %RCX,%R9	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
PUSH %R13	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R12	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %RBX	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
AND $-0x20,%RSP	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
SUB $0x1c0,%RSP	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
VSUBSD 0x50(%RDI),%XMM1,%XMM0	1	0	0.50	0.33	0.33	0	0.50	0	0	0	0	0	0.33	3	0.50	scal (12.5%)
VSUBSD 0x28(%RDI),%XMM3,%XMM1	1	0	0.50	0.33	0.33	0	0.50	0	0	0	0	0	0.33	3	0.50	scal (12.5%)
VMOVSD 0x48(%RDI),%XMM7	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV %RSI,0xf0(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
VMULSD %XMM7,%XMM1,%XMM6	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VSUBSD 0x78(%RDI),%XMM2,%XMM2	1	0	0.50	0.33	0.33	0	0.50	0	0	0	0	0	0.33	3	0.50	scal (12.5%)
VCOMISD %XMM6,%XMM4	1	1	0	0	0	0	0	0	0	0	0	0	0	3	1	scal (12.5%)
JA 487049 <_ZN16miniqmcreference19MultiBsplineEvalRef12evaluate_vghIdEEvPKN11qmcplusplus14bspline_traitsIT_Lj3EE10SplineTypeES4_S4_S4_PS4_S9_S9_m+0xb09>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
VCVTTSD2SI %XMM6,%EAX	2	1.50	0.50	0	0	0	0	0	0	0	0	0	0	7	1	scal (12.5%)
MOV 0x38(%RDI),%EDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
DEC %EDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %EDI,0xe8(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
CMP %EAX,%EDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
JL 487020 <_ZN16miniqmcreference19MultiBsplineEvalRef12evaluate_vghIdEEvPKN11qmcplusplus14bspline_traitsIT_Lj3EE10SplineTypeES4_S4_S4_PS4_S9_S9_m+0xae0>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
VRNDSCALESD $0xb,%XMM6,%XMM6,%XMM22	2	1	1	0	0	0	0	0	0	0	0	0	0	8	1	scal (12.5%)
VSUBSD %XMM22,%XMM6,%XMM15	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	3	0.50	scal (12.5%)
VMOVSD 0x130fc0(%RIP),%XMM9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMOVSD 0x131028(%RIP),%XMM11	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMULSD %XMM9,%XMM15,%XMM14	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMOVAPD %XMM15,%XMM8	1	0	0	0	0	0	0	0	0	0	0	0	0	0-1	0.17	vect (25.0%)
VFNMADD132SD %XMM11,%XMM11,%XMM8	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMOVAPD %XMM15,%XMM5	1	0	0	0	0	0	0	0	0	0	0	0	0	0-1	0.17	vect (25.0%)
VFMADD213SD 0x13114c(%RIP),%XMM11,%XMM5	1	0.50	0.50	0.33	0.33	0	0	0	0	0	0	0	0.33	4	0.50	scal (12.5%)
VSUBSD %XMM14,%XMM11,%XMM21	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	3	0.50	scal (12.5%)
VMULSD %XMM15,%XMM15,%XMM12	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VFMADD132SD %XMM15,%XMM11,%XMM8	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VFMADD213SD 0x130fe2(%RIP),%XMM15,%XMM21	1	0.50	0.50	0.33	0.33	0	0	0	0	0	0	0	0.33	4	0.50	scal (12.5%)
VMULSD %XMM5,%XMM15,%XMM3	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMOVSD 0x130fa6(%RIP),%XMM10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMULSD %XMM12,%XMM14,%XMM1	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VFMADD132SD %XMM15,%XMM9,%XMM8	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMOVAPD %XMM15,%XMM13	1	0	0	0	0	0	0	0	0	0	0	0	0	0-1	0.17	vect (25.0%)
VFMADD132SD %XMM3,%XMM10,%XMM13	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VFMADD132SD %XMM15,%XMM9,%XMM21	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMOVSD 0x13110c(%RIP),%XMM9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VUNPCKLPD %XMM1,%XMM8,%XMM4	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
VMOVSD 0x130f90(%RIP),%XMM1	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMOVAPD %XMM15,%XMM14	1	0	0	0	0	0	0	0	0	0	0	0	0	0-1	0.17	vect (25.0%)
VFMADD132SD %XMM9,%XMM1,%XMM14	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VUNPCKLPD %XMM13,%XMM21,%XMM16	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
VMOVSD 0x130f70(%RIP),%XMM13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VINSERTF64X2 $0x1,%XMM4,%YMM16,%YMM26	1	0	0	0	0	0	1	0	0	0	0	0	0	3	1	vect (25.0%)
VFNMADD132SD %XMM15,%XMM13,%XMM9	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMULSD %XMM14,%XMM15,%XMM4	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMOVSD 0x131027(%RIP),%XMM14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VSUBSD %XMM6,%XMM22,%XMM17	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	3	0.50	scal (12.5%)
VFMADD231SD %XMM14,%XMM15,%XMM1	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VFMADD132SD %XMM15,%XMM11,%XMM9	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VADDSD %XMM11,%XMM3,%XMM5	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	3	0.50	scal (12.5%)
VFNMADD132SD %XMM15,%XMM13,%XMM14	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMULSD %XMM11,%XMM12,%XMM11	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VADDSD %XMM13,%XMM17,%XMM18	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	3	0.50	scal (12.5%)
VXORPD 0x12f80a(%RIP),%XMM5,%XMM3	1	0.33	0.33	0.33	0.33	0	0.33	0	0	0	0	0	0.33	0-1	0.33	vect (25.0%)
MOV %EAX,0xe8(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
VUNPCKLPD %XMM4,%XMM3,%XMM8	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
VUNPCKLPD %XMM11,%XMM9,%XMM12	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
VUNPCKLPD %XMM15,%XMM14,%XMM6	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
VUNPCKLPD %XMM1,%XMM18,%XMM19	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
VINSERTF64X2 $0x1,%XMM12,%YMM8,%YMM8	1	0	0	0	0	0	1	0	0	0	0	0	0	3	1	vect (25.0%)
VINSERTF64X2 $0x1,%XMM6,%YMM19,%YMM25	1	0	0	0	0	0	1	0	0	0	0	0	0	3	1	vect (25.0%)
VMOVSD 0x70(%R10),%XMM6	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VXORPD %XMM15,%XMM15,%XMM15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
VMULSD %XMM0,%XMM6,%XMM0	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VCOMISD %XMM0,%XMM15	1	1	0	0	0	0	0	0	0	0	0	0	0	3	1	scal (12.5%)
JA 4870df <_ZN16miniqmcreference19MultiBsplineEvalRef12evaluate_vghIdEEvPKN11qmcplusplus14bspline_traitsIT_Lj3EE10SplineTypeES4_S4_S4_PS4_S9_S9_m+0xb9f>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
VCVTTSD2SI %XMM0,%EDX	2	1.50	0.50	0	0	0	0	0	0	0	0	0	0	7	1	scal (12.5%)
MOV 0x60(%R10),%EDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
DEC %EDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %EDI,0xd8(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
CMP %EDX,%EDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
JL 487179 <_ZN16miniqmcreference19MultiBsplineEvalRef12evaluate_vghIdEEvPKN11qmcplusplus14bspline_traitsIT_Lj3EE10SplineTypeES4_S4_S4_PS4_S9_S9_m+0xc39>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
VRNDSCALESD $0xb,%XMM0,%XMM0,%XMM4	2	1	1	0	0	0	0	0	0	0	0	0	0	8	1	scal (12.5%)
VSUBSD %XMM4,%XMM0,%XMM1	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	3	0.50	scal (12.5%)
VMOVSD 0x130e7c(%RIP),%XMM12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMOVSD 0x130ee4(%RIP),%XMM9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMULSD %XMM12,%XMM1,%XMM11	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMOVAPD %XMM1,%XMM13	1	0	0	0	0	0	0	0	0	0	0	0	0	0-1	0.17	vect (25.0%)
VMOVAPD %XMM1,%XMM5	1	0	0	0	0	0	0	0	0	0	0	0	0	0-1	0.17	vect (25.0%)
VFMADD213SD 0x13100e(%RIP),%XMM9,%XMM13	1	0.50	0.50	0.33	0.33	0	0	0	0	0	0	0	0.33	4	0.50	scal (12.5%)
VFNMADD132SD %XMM9,%XMM9,%XMM5	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VSUBSD %XMM11,%XMM9,%XMM23	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	3	0.50	scal (12.5%)
VMULSD %XMM1,%XMM1,%XMM15	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMOVAPD %XMM1,%XMM14	1	0	0	0	0	0	0	0	0	0	0	0	0	0-1	0.17	vect (25.0%)
VMULSD %XMM13,%XMM1,%XMM3	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VFMADD132SD %XMM1,%XMM9,%XMM5	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VFMADD213SD 0x130e97(%RIP),%XMM1,%XMM23	1	0.50	0.50	0.33	0.33	0	0	0	0	0	0	0	0.33	4	0.50	scal (12.5%)
VMOVAPD %XMM1,%XMM13	1	0	0	0	0	0	0	0	0	0	0	0	0	0-1	0.17	vect (25.0%)
VSUBSD %XMM0,%XMM4,%XMM0	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	3	0.50	scal (12.5%)
VFMADD132SD %XMM3,%XMM10,%XMM14	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VFMADD132SD %XMM1,%XMM12,%XMM5	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VFMADD132SD %XMM1,%XMM12,%XMM23	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMULSD %XMM15,%XMM11,%XMM12	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VADDSD %XMM9,%XMM3,%XMM3	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	3	0.50	scal (12.5%)
MOV %EDX,0xd8(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
VUNPCKLPD %XMM14,%XMM23,%XMM20	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
VUNPCKLPD %XMM12,%XMM5,%XMM11	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
VINSERTF64X2 $0x1,%XMM11,%YMM20,%YMM27	1	0	0	0	0	0	1	0	0	0	0	0	0	3	1	vect (25.0%)
VMOVSD 0x130fac(%RIP),%XMM5	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMOVSD 0x130e34(%RIP),%XMM11	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VXORPD 0x12f704(%RIP),%XMM3,%XMM3	1	0.33	0.33	0.33	0.33	0	0.33	0	0	0	0	0	0.33	0-1	0.33	vect (25.0%)
VFMADD132SD %XMM5,%XMM11,%XMM13	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMULSD %XMM13,%XMM1,%XMM14	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMOVSD 0x130e12(%RIP),%XMM13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VFNMADD132SD %XMM1,%XMM13,%XMM5	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VADDSD %XMM13,%XMM0,%XMM4	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	3	0.50	scal (12.5%)
VUNPCKLPD %XMM14,%XMM3,%XMM12	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
VFMADD132SD %XMM1,%XMM9,%XMM5	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMULSD %XMM9,%XMM15,%XMM9	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VUNPCKLPD %XMM9,%XMM5,%XMM15	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
VMOVSD 0x130ebc(%RIP),%XMM5	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VINSERTF64X2 $0x1,%XMM15,%YMM12,%YMM3	1	0	0	0	0	0	1	0	0	0	0	0	0	3	1	vect (25.0%)
VFMADD231SD %XMM5,%XMM1,%XMM11	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VFNMADD132SD %XMM1,%XMM13,%XMM5	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VUNPCKLPD %XMM11,%XMM4,%XMM11	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
VUNPCKLPD %XMM1,%XMM5,%XMM1	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
VINSERTF64X2 $0x1,%XMM1,%YMM11,%YMM4	1	0	0	0	0	0	1	0	0	0	0	0	0	3	1	vect (25.0%)
VMOVSD 0x98(%R10),%XMM5	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMULSD %XMM2,%XMM5,%XMM0	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VXORPD %XMM2,%XMM2,%XMM2	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
VCOMISD %XMM0,%XMM2	1	1	0	0	0	0	0	0	0	0	0	0	0	3	1	scal (12.5%)
JA 48707d <_ZN16miniqmcreference19MultiBsplineEvalRef12evaluate_vghIdEEvPKN11qmcplusplus14bspline_traitsIT_Lj3EE10SplineTypeES4_S4_S4_PS4_S9_S9_m+0xb3d>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
VCVTTSD2SI %XMM0,%ECX	2	1.50	0.50	0	0	0	0	0	0	0	0	0	0	7	1	scal (12.5%)
MOV 0x88(%R10),%EAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
DEC %EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
CMP %ECX,%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
JL 487109 <_ZN16miniqmcreference19MultiBsplineEvalRef12evaluate_vghIdEEvPKN11qmcplusplus14bspline_traitsIT_Lj3EE10SplineTypeES4_S4_S4_PS4_S9_S9_m+0xbc9>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
VRNDSCALESD $0xb,%XMM0,%XMM0,%XMM14	2	1	1	0	0	0	0	0	0	0	0	0	0	8	1	scal (12.5%)
VSUBSD %XMM14,%XMM0,%XMM9	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	3	0.50	scal (12.5%)
VMOVSD 0x130db7(%RIP),%XMM1	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMOVSD 0x130d9d(%RIP),%XMM24	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMOVAPD %XMM9,%XMM11	1	0	0	0	0	0	0	0	0	0	0	0	0	0-1	0.17	vect (25.0%)
VFMADD213SD 0x130edf(%RIP),%XMM1,%XMM11	1	0.50	0.50	0.33	0.33	0	0	0	0	0	0	0	0.33	4	0.50	scal (12.5%)
VMULSD 0x130ecf(%RIP),%XMM9,%XMM12	1	0.50	0.50	0.33	0.33	0	0	0	0	0	0	0	0.33	4	0.50	scal (12.5%)
VMOVSD 0x130d1f(%RIP),%XMM13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMOVSD 0x130d55(%RIP),%XMM30	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMOVSD 0x130d53(%RIP),%XMM18	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMULSD %XMM11,%XMM9,%XMM2	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMOVAPD %XMM9,%XMM11	1	0	0	0	0	0	0	0	0	0	0	0	0	0-1	0.17	vect (25.0%)
VFNMADD132SD %XMM1,%XMM1,%XMM11	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VADDSD %XMM1,%XMM12,%XMM15	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	3	0.50	scal (12.5%)
VMOVAPD %XMM9,%XMM29	1	0	0	0	0	0	0	0	0	0	0	0	0	0-1	0.17	vect (25.0%)
VMULSD %XMM9,%XMM9,%XMM28	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VFMADD132SD %XMM9,%XMM24,%XMM15	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VFMADD132SD %XMM9,%XMM1,%XMM11	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMOVSD 0x130de7(%RIP),%XMM21	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VXORPD 0x12f5ef(%RIP),%XMM12,%XMM12	1	0.33	0.33	0.33	0.33	0	0.33	0	0	0	0	0	0.33	0-1	0.33	vect (25.0%)
VSUBSD %XMM0,%XMM14,%XMM0	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	3	0.50	scal (12.5%)
VFMADD132SD %XMM9,%XMM13,%XMM15	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VFMADD132SD %XMM9,%XMM13,%XMM11	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMOVSD 0x130e71(%RIP),%XMM13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VFMADD231SD %XMM2,%XMM9,%XMM10	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VFMADD132SD %XMM13,%XMM18,%XMM29	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VFNMADD132SD %XMM9,%XMM30,%XMM13	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VFMADD231SD %XMM21,%XMM9,%XMM18	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMULSD %XMM28,%XMM12,%XMM12	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMULSD %XMM1,%XMM28,%XMM17	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMULSD %XMM29,%XMM9,%XMM19	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VFMADD132SD %XMM9,%XMM1,%XMM13	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VFNMADD132SD %XMM9,%XMM30,%XMM21	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOVSXD %ECX,%RBX	1	0	0.33	0	0	0	0.33	0	0	0	0	0.33	0	1	0.33	N/A
MOV %RBX,0xb8(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
VSUBSD %XMM2,%XMM24,%XMM16	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	3	0.50	scal (12.5%)
VADDSD %XMM30,%XMM0,%XMM14	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	3	0.50	scal (12.5%)
MOVSXD 0xe8(%R10),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x20(%R10),%R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
SAL $0x3,%RDX	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
MOV 0x18(%R10),%R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %R13,0xc0(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
LEA (%R9,%RDX,1),%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R12,0xc8(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
LEA (%R13,%RDX,1),%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA (%R12,%RDX,1),%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA (%R11,%RDX,1),%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA (%R14,%RDX,1),%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV 0x10(%R10),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %R8,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LEA (%R15,%RDX,1),%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
ADD %RDI,%RDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
SAL $0x3,%RBX	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
MOV %RSI,0xd0(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RDI,0xe0(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RDX,0xf8(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RBX,0xb0(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
VMOVAPD %YMM26,0x100(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (50.0%)
VMOVAPD %YMM8,0x140(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (50.0%)
VMOVAPD %YMM25,0x180(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (50.0%)
VMOVAPD %YMM27,0x120(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (50.0%)
VMOVAPD %YMM3,0x160(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (50.0%)
VMOVAPD %YMM4,0x1a0(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (50.0%)
JE 487198 <_ZN16miniqmcreference19MultiBsplineEvalRef12evaluate_vghIdEEvPKN11qmcplusplus14bspline_traitsIT_Lj3EE10SplineTypeES4_S4_S4_PS4_S9_S9_m+0xc58>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %R10,0x18(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RCX,0xa8(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R9,0x10(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R8,0x8(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R11,0xa0(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0xf0(%RSP),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VMOVSD %XMM21,0x20(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
VMOVSD %XMM18,0x28(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
VMOVSD %XMM14,0x30(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
VMOVSD %XMM17,0x38(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
VMOVSD %XMM13,0x40(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
VMOVSD %XMM19,0x48(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
VMOVSD %XMM16,0x50(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
VMOVSD %XMM12,0x58(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
VMOVSD %XMM11,0x60(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
VMOVSD %XMM10,0x68(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
VMOVSD %XMM15,0x70(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
VMOVSD %XMM9,0x78(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
VMOVSD %XMM5,0x80(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
VMOVSD %XMM6,0x88(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
VMOVSD %XMM7,0x90(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
XOR %ESI,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RBX,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
VZEROUPPER	2	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 404140 <memset@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV 0xa0(%RSP),%R11	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RBX,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R11,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
XOR %ESI,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R11,0x98(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
CALL 404140 <memset@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV %RBX,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
XOR %ESI,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R15,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 404140 <memset@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV 0xa8(%RSP),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RBX,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R8,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
XOR %ESI,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R8,0xa0(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
CALL 404140 <memset@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV 0x10(%RSP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RBX,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R9,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
XOR %ESI,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R9,0xa8(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
CALL 404140 <memset@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV %RBX,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
XOR %ESI,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R13,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 404140 <memset@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV %RBX,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
XOR %ESI,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R12,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 404140 <memset@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV %RBX,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
XOR %ESI,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R14,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 404140 <memset@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV 0xe0(%RSP),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RBX,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
XOR %ESI,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CALL 404140 <memset@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV 0xf8(%RSP),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RBX,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
XOR %ESI,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CALL 404140 <memset@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV 0x8(%RSP),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x18(%RSP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VMOVSD 0x20(%RSP),%XMM21	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMOVSD 0x28(%RSP),%XMM18	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMOVSD 0x30(%RSP),%XMM14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMOVSD 0x38(%RSP),%XMM17	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMOVSD 0x40(%RSP),%XMM13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMOVSD 0x48(%RSP),%XMM19	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMOVSD 0x50(%RSP),%XMM16	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMOVSD 0x58(%RSP),%XMM12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMOVSD 0x60(%RSP),%XMM11	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMOVSD 0x68(%RSP),%XMM10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMOVSD 0x70(%RSP),%XMM15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMOVSD 0x78(%RSP),%XMM9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMOVSD 0x80(%RSP),%XMM5	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMOVSD 0x88(%RSP),%XMM6	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMOVSD 0x90(%RSP),%XMM7	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x98(%RSP),%R11	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0xa0(%RSP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0xa8(%RSP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x8(%R10),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0xb8(%RSP),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0xc0(%RSP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
IMUL %R10,%RDI	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
TEST %R8D,%R8D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (6.3%)
JLE 4871a0 <_ZN16miniqmcreference19MultiBsplineEvalRef12evaluate_vghIdEEvPKN11qmcplusplus14bspline_traitsIT_Lj3EE10SplineTypeES4_S4_S4_PS4_S9_S9_m+0xc60>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV 0xd0(%RSP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0xc8(%RSP),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (,%RDX,8),%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RAX,0xb8(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOVSXD 0xe8(%RSP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA -0x1(%R8),%R8D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
IMUL %RDX,%RAX	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
MOVSXD 0xd8(%RSP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %R8,0xe8(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
IMUL %RBX,%RDX	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
ADD %R10,%RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
ADD %RDX,%RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
ADD %RDI,%RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
LEA (%RSI,%RAX,8),%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA (,%R10,8),%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA (,%RBX,8),%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RDI,0xd8(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RSI,0xd0(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0xe0(%RSP),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
XOR %R10D,%R10D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RBX,0xe0(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0xb0(%RSP),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VMULSD %XMM7,%XMM7,%XMM10	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMULSD %XMM6,%XMM6,%XMM11	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMULSD %XMM5,%XMM5,%XMM12	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMULSD %XMM6,%XMM7,%XMM2	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMULSD %XMM5,%XMM7,%XMM13	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMULSD %XMM5,%XMM6,%XMM14	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	4	0.50	scal (12.5%)
XOR %R10D,%R10D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
TEST $0x8,%R8B	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	N/A
JE 486f08 <_ZN16miniqmcreference19MultiBsplineEvalRef12evaluate_vghIdEEvPKN11qmcplusplus14bspline_traitsIT_Lj3EE10SplineTypeES4_S4_S4_PS4_S9_S9_m+0x9c8>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
VMULSD (%R9),%XMM10,%XMM3	1	0.50	0.50	0.33	0.33	0	0	0	0	0	0	0	0.33	4	0.50	scal (12.5%)
MOV 0xf8(%RSP),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VMULSD (%R11),%XMM7,%XMM9	1	0.50	0.50	0.33	0.33	0	0	0	0	0	0	0	0.33	4	0.50	scal (12.5%)
MOV 0xe0(%RSP),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMPQ $0x8,0xb0(%RSP)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
VMOVSD %XMM3,(%R9)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
VMULSD (%R14),%XMM11,%XMM4	1	0.50	0.50	0.33	0.33	0	0	0	0	0	0	0	0.33	4	0.50	scal (12.5%)
VMOVSD %XMM9,(%R11)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
VMULSD (%R15),%XMM6,%XMM15	1	0.50	0.50	0.33	0.33	0	0	0	0	0	0	0	0.33	4	0.50	scal (12.5%)
MOV $0x8,%R10D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
VMOVSD %XMM4,(%R14)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
VMULSD (%RSI),%XMM12,%XMM0	1	0.50	0.50	0.33	0.33	0	0	0	0	0	0	0	0.33	4	0.50	scal (12.5%)
VMOVSD %XMM15,(%R15)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
VMULSD (%RCX),%XMM5,%XMM8	1	0.50	0.50	0.33	0.33	0	0	0	0	0	0	0	0.33	4	0.50	scal (12.5%)
VMOVSD %XMM0,(%RSI)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
VMULSD (%R13),%XMM2,%XMM1	1	0.50	0.50	0.33	0.33	0	0	0	0	0	0	0	0.33	4	0.50	scal (12.5%)
VMOVSD %XMM8,(%RCX)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
VMOVSD %XMM1,(%R13)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
VMULSD (%R12),%XMM13,%XMM9	1	0.50	0.50	0.33	0.33	0	0	0	0	0	0	0	0.33	4	0.50	scal (12.5%)
VMOVSD %XMM9,(%R12)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
VMULSD (%RBX),%XMM14,%XMM15	1	0.50	0.50	0.33	0.33	0	0	0	0	0	0	0	0.33	4	0.50	scal (12.5%)
VMOVSD %XMM15,(%RBX)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JE 487011 <_ZN16miniqmcreference19MultiBsplineEvalRef12evaluate_vghIdEEvPKN11qmcplusplus14bspline_traitsIT_Lj3EE10SplineTypeES4_S4_S4_PS4_S9_S9_m+0xad1>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV 0xe0(%RSP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0xf8(%RSP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA -0x28(%RBP),%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
POP %RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %RBP	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
RET	1	0.50	0	0.33	0.33	0	0	0.50	0	0	0	0	0.33	0	2.13	N/A
VMOVAPD 0x1305d6(%RIP),%YMM25	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	0-1	0.33	vect (50.0%)
VMOVAPD 0x1305ee(%RIP),%YMM8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	0-1	0.33	vect (50.0%)
VMOVAPD 0x130564(%RIP),%YMM26	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	0-1	0.33	vect (50.0%)
VMOVSD 0x13056c(%RIP),%XMM10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
JMP 4866bf <_ZN16miniqmcreference19MultiBsplineEvalRef12evaluate_vghIdEEvPKN11qmcplusplus14bspline_traitsIT_Lj3EE10SplineTypeES4_S4_S4_PS4_S9_S9_m+0x17f>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
MOVL $0,0xe8(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
VMOVAPD 0x130562(%RIP),%YMM25	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	0-1	0.33	vect (50.0%)
VMOVAPD 0x13057a(%RIP),%YMM8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	0-1	0.33	vect (50.0%)
VMOVAPD 0x130510(%RIP),%YMM26	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	0-1	0.33	vect (50.0%)
VMOVSD 0x130538(%RIP),%XMM10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
JMP 4866bf <_ZN16miniqmcreference19MultiBsplineEvalRef12evaluate_vghIdEEvPKN11qmcplusplus14bspline_traitsIT_Lj3EE10SplineTypeES4_S4_S4_PS4_S9_S9_m+0x17f>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
VMOVSD 0x130539(%RIP),%XMM21	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMOVSD 0x1304f1(%RIP),%XMM11	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VXORPD %XMM17,%XMM17,%XMM17	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
MOVQ $0,0xb8(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
VMOVSD 0x13051d(%RIP),%XMM18	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMOVSD 0x13053d(%RIP),%XMM13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMOVSD 0x130523(%RIP),%XMM16	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMOVAPD %XMM21,%XMM14	1	0	0	0	0	0	0	0	0	0	0	0	0	0-1	0.17	vect (25.0%)
VMOVAPD %XMM17,%XMM19	1	0	0	0	0	0	0	0	0	0	0	0	0	0-1	0.17	vect (25.0%)
VMOVAPD %XMM17,%XMM12	1	0	0	0	0	0	0	0	0	0	0	0	0	0-1	0.17	vect (25.0%)
VMOVAPD %XMM11,%XMM15	1	0	0	0	0	0	0	0	0	0	0	0	0	0-1	0.17	vect (25.0%)
VMOVAPD %XMM17,%XMM9	1	0	0	0	0	0	0	0	0	0	0	0	0	0-1	0.17	vect (25.0%)
JMP 486912 <_ZN16miniqmcreference19MultiBsplineEvalRef12evaluate_vghIdEEvPKN11qmcplusplus14bspline_traitsIT_Lj3EE10SplineTypeES4_S4_S4_PS4_S9_S9_m+0x3d2>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
MOVL $0,0xd8(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
VMOVAPD 0x1304ce(%RIP),%YMM4	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	0-1	0.33	vect (50.0%)
VMOVAPD 0x1304e6(%RIP),%YMM3	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	0-1	0.33	vect (50.0%)
VMOVAPD 0x13047c(%RIP),%YMM27	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	0-1	0.33	vect (50.0%)
JMP 4867f5 <_ZN16miniqmcreference19MultiBsplineEvalRef12evaluate_vghIdEEvPKN11qmcplusplus14bspline_traitsIT_Lj3EE10SplineTypeES4_S4_S4_PS4_S9_S9_m+0x2b5>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
CLTQ	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.33	scal (12.5%)
VXORPD %XMM16,%XMM16,%XMM16	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
VMOVAPD %XMM10,%XMM11	1	0	0	0	0	0	0	0	0	0	0	0	0	0-1	0.17	vect (25.0%)
MOV %RAX,0xb8(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
VMOVSD 0x1304e8(%RIP),%XMM21	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMOVSD 0x1304d6(%RIP),%XMM18	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMOVSD 0x1304c6(%RIP),%XMM14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMOVSD 0x1304f4(%RIP),%XMM17	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMOVSD 0x1304e4(%RIP),%XMM13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMOVSD 0x1304d2(%RIP),%XMM19	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMOVSD 0x13045a(%RIP),%XMM12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMOVSD 0x130442(%RIP),%XMM10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMOVSD 0x1304aa(%RIP),%XMM9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
VMOVAPD %XMM16,%XMM15	1	0	0	0	0	0	0	0	0	0	0	0	0	0-1	0.17	vect (25.0%)
JMP 486912 <_ZN16miniqmcreference19MultiBsplineEvalRef12evaluate_vghIdEEvPKN11qmcplusplus14bspline_traitsIT_Lj3EE10SplineTypeES4_S4_S4_PS4_S9_S9_m+0x3d2>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
VMOVAPD 0x13047f(%RIP),%YMM4	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	0-1	0.33	vect (50.0%)
VMOVAPD 0x130497(%RIP),%YMM3	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	0-1	0.33	vect (50.0%)
VMOVAPD 0x13040d(%RIP),%YMM27	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	0-1	0.33	vect (50.0%)
JMP 4867f5 <_ZN16miniqmcreference19MultiBsplineEvalRef12evaluate_vghIdEEvPKN11qmcplusplus14bspline_traitsIT_Lj3EE10SplineTypeES4_S4_S4_PS4_S9_S9_m+0x2b5>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
VZEROUPPER	2	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
JMP 486b91 <_ZN16miniqmcreference19MultiBsplineEvalRef12evaluate_vghIdEEvPKN11qmcplusplus14bspline_traitsIT_Lj3EE10SplineTypeES4_S4_S4_PS4_S9_S9_m+0x651>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
TEST %R8,%R8	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	N/A
JNE 486e62 <_ZN16miniqmcreference19MultiBsplineEvalRef12evaluate_vghIdEEvPKN11qmcplusplus14bspline_traitsIT_Lj3EE10SplineTypeES4_S4_S4_PS4_S9_S9_m+0x922>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
LEA -0x28(%RBP),%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
POP %RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %RBP	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
RET	1	0.50	0	0.33	0.33	0	0	0.50	0	0	0	0	0.33	0	2.13	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A

Name	Coverage (%)	Time (s)
▼void miniqmcreference::MultiBsplineEvalRef::evaluate_vgh(qmcplusplus::bspline_traits::SplineType const, double, double, double, double, double, double, unsigned long)–	13.67	11.66
○Loop 1020 - MultiBsplineRef.hpp:276-286 - exec	0.50	0.42
▼Loop 1023 - MultiBsplineRef.hpp:226-262 - exec–	0.00	0.01
▼Loop 1022 - MultiBsplineRef.hpp:227-262 - exec–	0.01	0.01
○Loop 1021 - MultiBsplineRef.hpp:242-262 - exec	13.15	11.01

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512-bits vectorization

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FMA

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CALL instructions

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Type of elements and instruction set

Matching between your function (in the source code) and the binary function

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Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

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