OV - exec - Loop 2208

	Loop Id: 2208	Module: exec	Source: For.hpp:137-137 [...]	Coverage: 0.33%

0x4bca60 VMOVQ	%XMM10,%RCX

0x4bca65 VMOVQ	%XMM3,%R8

0x4bca6a MOV	-0x38(%RBP),%RSI

0x4bca6e MOV	-0x50(%RBP),%RAX

0x4bca72 IMUL	(%RCX),%R8

0x4bca76 MOV	-0x40(%RBP),%R13

0x4bca7a VMOVQ	%XMM9,%RDX

0x4bca7f XOR	%ECX,%ECX

0x4bca81 ADD	%RSI,%RAX

0x4bca84 VMOVQ	%XMM6,%RSI

0x4bca89 LEA	(%RDX,%R13,8),%RDX

0x4bca8d ADD	%RSI,%R8

0x4bca90 MOV	%RCX,%RSI

0x4bca93 ADD	%RAX,%R8

0x4bca96 NOPW	%CS:(%RAX,%RAX,1)

  (2207) 0x4bcaa0 MOV	(%RDI,%RSI,8),%RAX

  (2207) 0x4bcaa4 MOVSXD	(%R14,%RSI,4),%RCX

  (2207) 0x4bcaa8 ADD	%RAX,%RCX

  (2207) 0x4bcaab CMP	%RCX,%RAX

  (2207) 0x4bcaae JGE	4bcd10

  (2207) 0x4bcab4 SAL	$0x3,%RCX

  (2207) 0x4bcab8 VXORPD	%XMM5,%XMM5,%XMM5

  (2207) 0x4bcabc SAL	$0x3,%RAX

  (2207) 0x4bcac0 MOV	%RCX,%R13

  (2207) 0x4bcac3 SUB	%RAX,%R13

  (2207) 0x4bcac6 SUB	$0x8,%R13

  (2207) 0x4bcaca SHR	$0x3,%R13

  (2207) 0x4bcace INC	%R13

  (2207) 0x4bcad1 AND	$0x7,%R13D

  (2207) 0x4bcad5 JE	4bcbcd

  (2207) 0x4bcadb CMP	$0x1,%R13

  (2207) 0x4bcadf JE	4bcba9

  (2207) 0x4bcae5 CMP	$0x2,%R13

  (2207) 0x4bcae9 JE	4bcb8e

  (2207) 0x4bcaef CMP	$0x3,%R13

  (2207) 0x4bcaf3 JE	4bcb73

  (2207) 0x4bcaf5 CMP	$0x4,%R13

  (2207) 0x4bcaf9 JE	4bcb58

  (2207) 0x4bcafb CMP	$0x5,%R13

  (2207) 0x4bcaff JE	4bcb3d

  (2207) 0x4bcb01 CMP	$0x6,%R13

  (2207) 0x4bcb05 JE	4bcb22

  (2207) 0x4bcb07 MOV	(%R12,%RAX,1),%R13

  (2207) 0x4bcb0b VMOVSD	(%R15,%RAX,1),%XMM11

  (2207) 0x4bcb11 ADD	$0x8,%RAX

  (2207) 0x4bcb15 IMUL	%R11,%R13

  (2207) 0x4bcb19 ADD	%R8,%R13

  (2207) 0x4bcb1c VFMADD231SD	(%R10,%R13,8),%XMM11,%XMM5

  (2207) 0x4bcb22 MOV	(%R12,%RAX,1),%R13

  (2207) 0x4bcb26 VMOVSD	(%R15,%RAX,1),%XMM12

  (2207) 0x4bcb2c ADD	$0x8,%RAX

  (2207) 0x4bcb30 IMUL	%R11,%R13

  (2207) 0x4bcb34 ADD	%R8,%R13

  (2207) 0x4bcb37 VFMADD231SD	(%R10,%R13,8),%XMM12,%XMM5

  (2207) 0x4bcb3d MOV	(%R12,%RAX,1),%R13

  (2207) 0x4bcb41 VMOVSD	(%R15,%RAX,1),%XMM2

  (2207) 0x4bcb47 ADD	$0x8,%RAX

  (2207) 0x4bcb4b IMUL	%R11,%R13

  (2207) 0x4bcb4f ADD	%R8,%R13

  (2207) 0x4bcb52 VFMADD231SD	(%R10,%R13,8),%XMM2,%XMM5

  (2207) 0x4bcb58 MOV	(%R12,%RAX,1),%R13

  (2207) 0x4bcb5c VMOVSD	(%R15,%RAX,1),%XMM0

  (2207) 0x4bcb62 ADD	$0x8,%RAX

  (2207) 0x4bcb66 IMUL	%R11,%R13

  (2207) 0x4bcb6a ADD	%R8,%R13

  (2207) 0x4bcb6d VFMADD231SD	(%R10,%R13,8),%XMM0,%XMM5

  (2207) 0x4bcb73 MOV	(%R12,%RAX,1),%R13

  (2207) 0x4bcb77 VMOVSD	(%R15,%RAX,1),%XMM7

  (2207) 0x4bcb7d ADD	$0x8,%RAX

  (2207) 0x4bcb81 IMUL	%R11,%R13

  (2207) 0x4bcb85 ADD	%R8,%R13

  (2207) 0x4bcb88 VFMADD231SD	(%R10,%R13,8),%XMM7,%XMM5

  (2207) 0x4bcb8e MOV	(%R12,%RAX,1),%R13

  (2207) 0x4bcb92 VMOVSD	(%R15,%RAX,1),%XMM11

  (2207) 0x4bcb98 ADD	$0x8,%RAX

  (2207) 0x4bcb9c IMUL	%R11,%R13

  (2207) 0x4bcba0 ADD	%R8,%R13

  (2207) 0x4bcba3 VFMADD231SD	(%R10,%R13,8),%XMM11,%XMM5

  (2207) 0x4bcba9 MOV	(%R12,%RAX,1),%R13

  (2207) 0x4bcbad VMOVSD	(%R15,%RAX,1),%XMM12

  (2207) 0x4bcbb3 ADD	$0x8,%RAX

  (2207) 0x4bcbb7 IMUL	%R11,%R13

  (2207) 0x4bcbbb ADD	%R8,%R13

  (2207) 0x4bcbbe VFMADD231SD	(%R10,%R13,8),%XMM12,%XMM5

  (2207) 0x4bcbc4 CMP	%RCX,%RAX

  (2207) 0x4bcbc7 JE	4bcca0

    (2210) 0x4bcbcd MOV	(%R12,%RAX,1),%R13

    (2210) 0x4bcbd1 VMOVSD	(%R15,%RAX,1),%XMM2

    (2210) 0x4bcbd7 VMOVSD	0x8(%R15,%RAX,1),%XMM0

    (2210) 0x4bcbde VMOVSD	0x10(%R15,%RAX,1),%XMM7

    (2210) 0x4bcbe5 VMOVSD	0x18(%R15,%RAX,1),%XMM11

    (2210) 0x4bcbec VMOVSD	0x20(%R15,%RAX,1),%XMM12

    (2210) 0x4bcbf3 IMUL	%R11,%R13

    (2210) 0x4bcbf7 ADD	%R8,%R13

    (2210) 0x4bcbfa VFMADD231SD	(%R10,%R13,8),%XMM2,%XMM5

    (2210) 0x4bcc00 MOV	0x8(%R12,%RAX,1),%R13

    (2210) 0x4bcc05 VMOVSD	0x28(%R15,%RAX,1),%XMM2

    (2210) 0x4bcc0c IMUL	%R11,%R13

    (2210) 0x4bcc10 ADD	%R8,%R13

    (2210) 0x4bcc13 VFMADD231SD	(%R10,%R13,8),%XMM0,%XMM5

    (2210) 0x4bcc19 MOV	0x10(%R12,%RAX,1),%R13

    (2210) 0x4bcc1e VMOVSD	0x30(%R15,%RAX,1),%XMM0

    (2210) 0x4bcc25 IMUL	%R11,%R13

    (2210) 0x4bcc29 ADD	%R8,%R13

    (2210) 0x4bcc2c VFMADD231SD	(%R10,%R13,8),%XMM7,%XMM5

    (2210) 0x4bcc32 MOV	0x18(%R12,%RAX,1),%R13

    (2210) 0x4bcc37 VMOVSD	0x38(%R15,%RAX,1),%XMM7

    (2210) 0x4bcc3e IMUL	%R11,%R13

    (2210) 0x4bcc42 ADD	%R8,%R13

    (2210) 0x4bcc45 VFMADD231SD	(%R10,%R13,8),%XMM11,%XMM5

    (2210) 0x4bcc4b MOV	0x20(%R12,%RAX,1),%R13

    (2210) 0x4bcc50 IMUL	%R11,%R13

    (2210) 0x4bcc54 ADD	%R8,%R13

    (2210) 0x4bcc57 VFMADD231SD	(%R10,%R13,8),%XMM12,%XMM5

    (2210) 0x4bcc5d MOV	0x28(%R12,%RAX,1),%R13

    (2210) 0x4bcc62 IMUL	%R11,%R13

    (2210) 0x4bcc66 ADD	%R8,%R13

    (2210) 0x4bcc69 VFMADD231SD	(%R10,%R13,8),%XMM2,%XMM5

    (2210) 0x4bcc6f MOV	0x30(%R12,%RAX,1),%R13

    (2210) 0x4bcc74 IMUL	%R11,%R13

    (2210) 0x4bcc78 ADD	%R8,%R13

    (2210) 0x4bcc7b VFMADD231SD	(%R10,%R13,8),%XMM0,%XMM5

    (2210) 0x4bcc81 MOV	0x38(%R12,%RAX,1),%R13

    (2210) 0x4bcc86 ADD	$0x40,%RAX

    (2210) 0x4bcc8a IMUL	%R11,%R13

    (2210) 0x4bcc8e ADD	%R8,%R13

    (2210) 0x4bcc91 VFMADD231SD	(%R10,%R13,8),%XMM7,%XMM5

    (2210) 0x4bcc97 CMP	%RCX,%RAX

    (2210) 0x4bcc9a JNE	4bcbcd

  (2207) 0x4bcca0 VMOVSD	(%RBX,%RSI,8),%XMM11

  (2207) 0x4bcca5 VFMADD132SD	(%RDX,%RSI,8),%XMM11,%XMM5

  (2207) 0x4bccab VMOVSD	%XMM5,(%RBX,%RSI,8)

  (2207) 0x4bccb0 INC	%RSI

  (2207) 0x4bccb3 CMP	%R9,%RSI

  (2207) 0x4bccb6 JL	4bcaa0

0x4bccbc INCQ	-0x38(%RBP)

0x4bccc0 MOV	-0x38(%RBP),%R8

0x4bccc4 VMOVQ	%XMM8,%RDX

0x4bccc9 VMOVQ	%XMM4,%RSI

0x4bccce ADD	%RSI,-0x40(%RBP)

0x4bccd2 CMP	%RDX,%R8

0x4bccd5 JL	4bca60

  (2207) 0x4bcd10 VXORPD	%XMM5,%XMM5,%XMM5

  (2207) 0x4bcd14 JMP	4bcca0

/home/eoseret/qaas_runs_ZEN5/173-940-2141/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/index/IndexValue.hpp: 109 - 109

--------------------------------------------------------------------------------

109:     return TYPE(value + a);

/home/eoseret/qaas_runs_ZEN5/173-940-2141/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/pattern/kernel/For.hpp: 137 - 137

--------------------------------------------------------------------------------

137:     for (decltype(distance_it) i = 0; i < distance_it; ++i) {

/home/eoseret/qaas_runs_ZEN5/173-940-2141/intel/Kripke/build/Kripke/src/Kripke/Kernel/Scattering.cpp: 85 - 97

--------------------------------------------------------------------------------

85:             GlobalGroup global_gp{*gp+glower_src};

86:

87:             MixElem mix_start = zone_to_mixelem(z);

88:             MixElem mix_stop = mix_start + zone_to_num_mixelem(z);

89:

90:             double sigs_z = 0.0;

91:             for(MixElem mix = mix_start;mix < mix_stop;++ mix){

92:               Material mat = mixelem_to_material(mix);

93:               double fraction = mixelem_to_fraction(mix);

94:

95:               sigs_z += sigs(mat, n, global_g, global_gp) * fraction;

96:             }

97:             phi_out(nm, g, z) += sigs_z * phi(nm, gp, z);

/home/eoseret/qaas_runs_ZEN5/173-940-2141/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/util/Layout.hpp: 187 - 187

--------------------------------------------------------------------------------

187:     return sum<IdxLin>(

/home/eoseret/qaas_runs_ZEN5/173-940-2141/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/util/TypedViewBase.hpp: 189 - 189

--------------------------------------------------------------------------------

189:         return data[stripIndexType(layout(args...))];

Coverage (%)	Name	Source Location	Module
►96.50+	gomp_thread_start	team.c:130	libgomp.so.1.0.0
○	start_thread		libc.so.6
○	__GI___clone3		libc.so.6
►3.01+	GOMP_parallel	libgomp.h:982	libgomp.so.1.0.0
○	void Kripke::DispatchHelper<Kr[...]	Collapse.hpp:74	exec
○	Kripke::Kernel::scattering(Kri[...]	ArchLayout.h:155	exec
○	Kripke::SteadyStateSolver(Krip[...]	SteadyStateSolver.cpp:73	exec
○	main	new_allocator.h:88	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	kripke.cpp:129	exec

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Metric	Value
CQA speedup if no scalar integer	1.00
CQA speedup if FP arith vectorized	1.00
CQA speedup if fully vectorized	8.00
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.20
Bottlenecks	P14, P15,
Function	void RAJA::internal::StatementExecutor, RAJA::statement::For<2l, RAJA::policy::sequential::seq_exec, RAJA::statement::For<3l, RAJA::policy::sequential::seq_exec, RAJA::statement::Lambda<0l> > > >, RAJA::internal::LoopTypes, camp::list > >::exec, long>, RAJA::Span, long>, RAJA::Span, long>, RAJA::Span, long> >, camp::tuple<>, camp::resources::v1::Host, ScatteringSdom::operator() >(Kripke::ArchLayoutT, Kripke::SdomId, Kripke::SdomId, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&) const::{lambda(Kripke::Moment, Kripke::Group, Kripke::Group, Kripke::Zone)#1}>&>(RAJA::internal::LoopData, long>, RAJA::Span, long>, RAJA::Span, long>, RAJA::Span, long> >, camp::tuple<>, camp::resources::v1::Host, ScatteringSdom::operator() >(Kripke::ArchLayoutT, Kripke::SdomId, Kripke::SdomId, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&) const::{lambda(Kripke::Moment, Kripke::Group, Kripke::Group, Kripke::Zone)#1}>&) [clone ._omp_fn.0]
Source	For.hpp:137-137,Scattering.cpp:85-85,Layout.hpp:187-187,TypedViewBase.hpp:189-189
Source loop unroll info	NA
Source loop unroll confidence level	NA
Unroll/vectorization loop type	NA
Unroll factor	NA
CQA cycles	3.00
CQA cycles if no scalar integer	3.00
CQA cycles if FP arith vectorized	3.00
CQA cycles if fully vectorized	0.38
Front-end cycles	2.50
P0 cycles	1.33
P1 cycles	1.33
P2 cycles	1.33
P3 cycles	1.33
P4 cycles	1.33
P5 cycles	1.33
P6 cycles	1.75
P7 cycles	1.75
P8 cycles	1.75
P9 cycles	1.75
P10 cycles	0.00
P11 cycles	0.00
P12 cycles	0.00
P13 cycles	0.00
P14 cycles	3.00
P15 cycles	3.00
DIV/SQRT cycles	0.00
Inter-iter dependencies cycles	NA
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	22.00
Nb uops	20.00
Nb loads	7.00
Nb stores	2.00
Nb stack references	3.00
FLOP/cycle	0.00
Nb FLOP add-sub	0.00
Nb FLOP mul	0.00
Nb FLOP fma	0.00
Nb FLOP div	0.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	0.00
Nb FLOP rsqrt	0.00
Bytes/cycle	24.00
Bytes prefetched	0.00
Bytes loaded	56.00
Bytes stored	16.00
Stride 0	NA
Stride 1	NA
Stride n	NA
Stride unknown	NA
Stride indirect	NA
Vectorization ratio all	0.00
Vectorization ratio load	0.00
Vectorization ratio store	0.00
Vectorization ratio mul	NA
Vectorization ratio add_sub	NA
Vectorization ratio fma	NA
Vectorization ratio div_sqrt	NA
Vectorization ratio other	0.00
Vector-efficiency ratio all	12.50
Vector-efficiency ratio load	12.50
Vector-efficiency ratio store	12.50
Vector-efficiency ratio mul	NA
Vector-efficiency ratio add_sub	NA
Vector-efficiency ratio fma	NA
Vector-efficiency ratio div_sqrt	NA
Vector-efficiency ratio other	12.50

Metric	Value
CQA speedup if no scalar integer	1.00
CQA speedup if FP arith vectorized	1.00
CQA speedup if fully vectorized	8.00
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.20
Bottlenecks	P14, P15,
Function	void RAJA::internal::StatementExecutor, RAJA::statement::For<2l, RAJA::policy::sequential::seq_exec, RAJA::statement::For<3l, RAJA::policy::sequential::seq_exec, RAJA::statement::Lambda<0l> > > >, RAJA::internal::LoopTypes, camp::list > >::exec, long>, RAJA::Span, long>, RAJA::Span, long>, RAJA::Span, long> >, camp::tuple<>, camp::resources::v1::Host, ScatteringSdom::operator() >(Kripke::ArchLayoutT, Kripke::SdomId, Kripke::SdomId, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&) const::{lambda(Kripke::Moment, Kripke::Group, Kripke::Group, Kripke::Zone)#1}>&>(RAJA::internal::LoopData, long>, RAJA::Span, long>, RAJA::Span, long>, RAJA::Span, long> >, camp::tuple<>, camp::resources::v1::Host, ScatteringSdom::operator() >(Kripke::ArchLayoutT, Kripke::SdomId, Kripke::SdomId, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&) const::{lambda(Kripke::Moment, Kripke::Group, Kripke::Group, Kripke::Zone)#1}>&) [clone ._omp_fn.0]
Source	For.hpp:137-137,Scattering.cpp:85-85,Layout.hpp:187-187,TypedViewBase.hpp:189-189
Source loop unroll info	NA
Source loop unroll confidence level	NA
Unroll/vectorization loop type	NA
Unroll factor	NA
CQA cycles	3.00
CQA cycles if no scalar integer	3.00
CQA cycles if FP arith vectorized	3.00
CQA cycles if fully vectorized	0.38
Front-end cycles	2.50
P0 cycles	1.33
P1 cycles	1.33
P2 cycles	1.33
P3 cycles	1.33
P4 cycles	1.33
P5 cycles	1.33
P6 cycles	1.75
P7 cycles	1.75
P8 cycles	1.75
P9 cycles	1.75
P10 cycles	0.00
P11 cycles	0.00
P12 cycles	0.00
P13 cycles	0.00
P14 cycles	3.00
P15 cycles	3.00
DIV/SQRT cycles	0.00
Inter-iter dependencies cycles	NA
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	22.00
Nb uops	20.00
Nb loads	7.00
Nb stores	2.00
Nb stack references	3.00
FLOP/cycle	0.00
Nb FLOP add-sub	0.00
Nb FLOP mul	0.00
Nb FLOP fma	0.00
Nb FLOP div	0.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	0.00
Nb FLOP rsqrt	0.00
Bytes/cycle	24.00
Bytes prefetched	0.00
Bytes loaded	56.00
Bytes stored	16.00
Stride 0	NA
Stride 1	NA
Stride n	NA
Stride unknown	NA
Stride indirect	NA
Vectorization ratio all	0.00
Vectorization ratio load	0.00
Vectorization ratio store	0.00
Vectorization ratio mul	NA
Vectorization ratio add_sub	NA
Vectorization ratio fma	NA
Vectorization ratio div_sqrt	NA
Vectorization ratio other	0.00
Vector-efficiency ratio all	12.50
Vector-efficiency ratio load	12.50
Vector-efficiency ratio store	12.50
Vector-efficiency ratio mul	NA
Vector-efficiency ratio add_sub	NA
Vector-efficiency ratio fma	NA
Vector-efficiency ratio div_sqrt	NA
Vector-efficiency ratio other	12.50

Path /

Average path: Display a virtual path defined by average values of all real paths

Function	void RAJA::internal::StatementExecutor, RAJA::statement::For<2l, RAJA::policy::sequential::seq_exec, RAJA::statement::For<3l, RAJA::policy::sequential::seq_exec, RAJA::statement::Lambda<0l> > > >, RAJA::internal::LoopTypes, camp::list > >::exec, long>, RAJA::Span, long>, RAJA::Span, long>, RAJA::Span, long> >, camp::tuple<>, camp::resources::v1::Host, ScatteringSdom::operator() >(Kripke::ArchLayoutT, Kripke::SdomId, Kripke::SdomId, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&) const::{lambda(Kripke::Moment, Kripke::Group, Kripke::Group, Kripke::Zone)#1}>&>(RAJA::internal::LoopData, long>, RAJA::Span, long>, RAJA::Span, long>, RAJA::Span, long> >, camp::tuple<>, camp::resources::v1::Host, ScatteringSdom::operator() >(Kripke::ArchLayoutT, Kripke::SdomId, Kripke::SdomId, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&) const::{lambda(Kripke::Moment, Kripke::Group, Kripke::Group, Kripke::Zone)#1}>&) [clone ._omp_fn.0]
Source file and lines	For.hpp:137-137
Module	exec

The loop is defined in:

/home/eoseret/qaas_runs_ZEN5/173-940-2141/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/index/IndexValue.hpp:109
/home/eoseret/qaas_runs_ZEN5/173-940-2141/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/pattern/kernel/For.hpp:137
/home/eoseret/qaas_runs_ZEN5/173-940-2141/intel/Kripke/build/Kripke/src/Kripke/Kernel/Scattering.cpp:85-97
/home/eoseret/qaas_runs_ZEN5/173-940-2141/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/util/Layout.hpp:187
/home/eoseret/qaas_runs_ZEN5/173-940-2141/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/util/TypedViewBase.hpp:189

Warnings:

Non-innermost loop: analyzing only self part (ignoring child loops).
Ignoring paths for analysis
Too many paths. Rerun with max-paths=16
RecMII not computed since number of paths is unknown or > max_paths
Streams not analyzed since number of paths is unknown or > max_paths

Try to simplify control and/or increase the maximum number of paths per function/loop through the 'max-paths-nb' option.

This loop has 16 execution paths.

The presence of multiple execution paths is typically the main/first bottleneck.
Try to simplify control inside loop: ideally, try to remove all conditional expressions, for example by (if applicable):

hoisting them (moving them outside the loop)
turning them into conditional moves, MIN or MAX

Ex: if (x<0) x=0 => x = (x<0 ? 0 : x) (or MAX(0,x) after defining the corresponding macro)

gain
potential
hint
expert

Vectorization

Your loop is not vectorized. 8 data elements could be processed at once in vector registers. By vectorizing your loop, you can lower the cost of an iteration from 3.00 to 0.37 cycles (8.00x speedup).

Details

All SSE/AVX instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized loop can use their full power.

Workaround

Try another compiler or update/tune your current one:
- recompile with ftree-vectorize (included in O3) to enable loop vectorization (including FP reductions).
Remove inter-iterations dependences from your loop and make it unit-stride:
- If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly: C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)
- If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This loop is probably writing/copying data or processing integer elements.

Matching between your loop (in the source code) and the binary loop

The binary loop does not contain any FP arithmetical operations. The binary loop is loading 56 bytes. The binary loop is storing 16 bytes.

General properties

nb instructions	22
nb uops	20
loop length	95
used x86 registers	7
used mmx registers	0
used xmm registers	6
used ymm registers	0
used zmm registers	0
nb stack references	3

Front-end

ASSUMED MACRO FUSION FIT IN UOP CACHE

micro-operation queue	2.50 cycles
front end	2.50 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	1.33	1.33	1.33	1.33	1.33	1.33	1.75	1.75	1.75	1.75	0.00	0.00	0.00	0.00	3.00	3.00
cycles	1.33	1.33	1.33	1.33	1.33	1.33	1.75	1.75	1.75	1.75	0.00	0.00	0.00	0.00	3.00	3.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	2.50
Dispatch	3.00
Overall L1	3.00

Vectorization ratios

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Vector efficiency ratios

all	12%
load	12%
store	12%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	12%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 3.00 cycles. At this rate:

7% of peak load performance is reached (18.67 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
4% of peak store performance is reached (5.33 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Found no such bottlenecks.

ASM code

In the binary file, the address of the loop is: 4bca60

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P14	P15	Latency	Recip. throughput	Vectorization
VMOVQ %XMM10,%RCX	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVQ %XMM3,%R8	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
MOV -0x38(%RBP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	scal (12.5%)
MOV -0x50(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
IMUL (%RCX),%R8	1	0.33	0.33	0.33	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.33	N/A
MOV -0x40(%RBP),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
VMOVQ %XMM9,%RDX	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
XOR %ECX,%ECX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
ADD %RSI,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
VMOVQ %XMM6,%RSI	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
LEA (%RDX,%R13,8),%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.25	N/A
ADD %RSI,%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
MOV %RCX,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
ADD %RAX,%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
INCQ -0x38(%RBP)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
MOV -0x38(%RBP),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
VMOVQ %XMM8,%RDX	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVQ %XMM4,%RSI	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
ADD %RSI,-0x40(%RBP)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
CMP %RDX,%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
JL 4bca60 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl1EEEEJNS2_3ForILl2ENS_6policy10sequential8seq_execEJNS8_ILl3ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEENS0_9LoopTypesINS5_4listIJvvvvEEESJ_EEE4execIRNS0_8LoopDataINS5_5tupleIJNS_4SpanINS_9Iterators16numeric_iteratorIN6Kripke6MomentElPST_EElEENSP_INSR_INSS_5GroupElPSX_EElEES10_NSP_INSR_INSS_4ZoneElPS11_EElEEEEENSO_IJEEENS5_9resources2v14HostEJZNK14ScatteringSdomclINSS_11ArchLayoutTINSS_12ArchT_OpenMPENSS_11LayoutT_DGZEEEEEvT_NSS_6SdomIdES1H_RKNSS_4Core3SetES1L_S1L_RNS1I_5FieldIdJST_SX_S11_EEES1O_RNS1M_IdJNSS_8MaterialENSS_8LegendreENSS_11GlobalGroupES1R_EEERNS1M_INSS_7MixElemEJS11_EEERNS1M_IiJS11_EEERNS1M_IS1P_JS1U_EEERNS1M_IdJS1U_EEERNS1M_IS1Q_JST_EEEEUlST_SX_SX_S11_E_EEEEEvOS1G_._omp_fn.0+0x4d0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A

Function	void RAJA::internal::StatementExecutor, RAJA::statement::For<2l, RAJA::policy::sequential::seq_exec, RAJA::statement::For<3l, RAJA::policy::sequential::seq_exec, RAJA::statement::Lambda<0l> > > >, RAJA::internal::LoopTypes, camp::list > >::exec, long>, RAJA::Span, long>, RAJA::Span, long>, RAJA::Span, long> >, camp::tuple<>, camp::resources::v1::Host, ScatteringSdom::operator() >(Kripke::ArchLayoutT, Kripke::SdomId, Kripke::SdomId, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&) const::{lambda(Kripke::Moment, Kripke::Group, Kripke::Group, Kripke::Zone)#1}>&>(RAJA::internal::LoopData, long>, RAJA::Span, long>, RAJA::Span, long>, RAJA::Span, long> >, camp::tuple<>, camp::resources::v1::Host, ScatteringSdom::operator() >(Kripke::ArchLayoutT, Kripke::SdomId, Kripke::SdomId, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&) const::{lambda(Kripke::Moment, Kripke::Group, Kripke::Group, Kripke::Zone)#1}>&) [clone ._omp_fn.0]
Source file and lines	For.hpp:137-137
Module	exec

The loop is defined in:

/home/eoseret/qaas_runs_ZEN5/173-940-2141/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/index/IndexValue.hpp:109
/home/eoseret/qaas_runs_ZEN5/173-940-2141/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/pattern/kernel/For.hpp:137
/home/eoseret/qaas_runs_ZEN5/173-940-2141/intel/Kripke/build/Kripke/src/Kripke/Kernel/Scattering.cpp:85-97
/home/eoseret/qaas_runs_ZEN5/173-940-2141/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/util/Layout.hpp:187
/home/eoseret/qaas_runs_ZEN5/173-940-2141/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/util/TypedViewBase.hpp:189

Warnings:

Non-innermost loop: analyzing only self part (ignoring child loops).
Ignoring paths for analysis
Too many paths. Rerun with max-paths=16
RecMII not computed since number of paths is unknown or > max_paths
Streams not analyzed since number of paths is unknown or > max_paths

hoisting them (moving them outside the loop)
turning them into conditional moves, MIN or MAX

Ex: if (x<0) x=0 => x = (x<0 ? 0 : x) (or MAX(0,x) after defining the corresponding macro)

gain
potential
hint
expert

Vectorization

Your loop is not vectorized. 8 data elements could be processed at once in vector registers. By vectorizing your loop, you can lower the cost of an iteration from 3.00 to 0.37 cycles (8.00x speedup).

Details

All SSE/AVX instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized loop can use their full power.

Workaround

Try another compiler or update/tune your current one:
- recompile with ftree-vectorize (included in O3) to enable loop vectorization (including FP reductions).
Remove inter-iterations dependences from your loop and make it unit-stride:
- If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly: C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)
- If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This loop is probably writing/copying data or processing integer elements.

Matching between your loop (in the source code) and the binary loop

The binary loop does not contain any FP arithmetical operations. The binary loop is loading 56 bytes. The binary loop is storing 16 bytes.

General properties

nb instructions	22
nb uops	20
loop length	95
used x86 registers	7
used mmx registers	0
used xmm registers	6
used ymm registers	0
used zmm registers	0
nb stack references	3

Front-end

ASSUMED MACRO FUSION FIT IN UOP CACHE

micro-operation queue	2.50 cycles
front end	2.50 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	1.33	1.33	1.33	1.33	1.33	1.33	1.75	1.75	1.75	1.75	0.00	0.00	0.00	0.00	3.00	3.00
cycles	1.33	1.33	1.33	1.33	1.33	1.33	1.75	1.75	1.75	1.75	0.00	0.00	0.00	0.00	3.00	3.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	2.50
Dispatch	3.00
Overall L1	3.00

Vectorization ratios

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Vector efficiency ratios

all	12%
load	12%
store	12%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	12%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 3.00 cycles. At this rate:

7% of peak load performance is reached (18.67 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
4% of peak store performance is reached (5.33 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Found no such bottlenecks.

ASM code

In the binary file, the address of the loop is: 4bca60

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P14	P15	Latency	Recip. throughput	Vectorization
VMOVQ %XMM10,%RCX	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVQ %XMM3,%R8	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
MOV -0x38(%RBP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	scal (12.5%)
MOV -0x50(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
IMUL (%RCX),%R8	1	0.33	0.33	0.33	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.33	N/A
MOV -0x40(%RBP),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
VMOVQ %XMM9,%RDX	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
XOR %ECX,%ECX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
ADD %RSI,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
VMOVQ %XMM6,%RSI	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
LEA (%RDX,%R13,8),%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.25	N/A
ADD %RSI,%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
MOV %RCX,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
ADD %RAX,%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
INCQ -0x38(%RBP)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
MOV -0x38(%RBP),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
VMOVQ %XMM8,%RDX	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVQ %XMM4,%RSI	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
ADD %RSI,-0x40(%RBP)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (12.5%)
CMP %RDX,%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
JL 4bca60 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl1EEEEJNS2_3ForILl2ENS_6policy10sequential8seq_execEJNS8_ILl3ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEENS0_9LoopTypesINS5_4listIJvvvvEEESJ_EEE4execIRNS0_8LoopDataINS5_5tupleIJNS_4SpanINS_9Iterators16numeric_iteratorIN6Kripke6MomentElPST_EElEENSP_INSR_INSS_5GroupElPSX_EElEES10_NSP_INSR_INSS_4ZoneElPS11_EElEEEEENSO_IJEEENS5_9resources2v14HostEJZNK14ScatteringSdomclINSS_11ArchLayoutTINSS_12ArchT_OpenMPENSS_11LayoutT_DGZEEEEEvT_NSS_6SdomIdES1H_RKNSS_4Core3SetES1L_S1L_RNS1I_5FieldIdJST_SX_S11_EEES1O_RNS1M_IdJNSS_8MaterialENSS_8LegendreENSS_11GlobalGroupES1R_EEERNS1M_INSS_7MixElemEJS11_EEERNS1M_IiJS11_EEERNS1M_IS1P_JS1U_EEERNS1M_IdJS1U_EEERNS1M_IS1Q_JST_EEEEUlST_SX_SX_S11_E_EEEEEvOS1G_._omp_fn.0+0x4d0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50-1	N/A

Report Configuration

Vectorization

Details

Workaround

Execution units bottlenecks

Type of elements and instruction set

Matching between your loop (in the source code) and the binary loop

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code

Vectorization

Details

Workaround

Execution units bottlenecks

Type of elements and instruction set

Matching between your loop (in the source code) and the binary loop

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code