OV - exec - Function void RAJA::internal::StatementExecutor<RAJA::statement::Collapse<RAJA::omp_parallel_collapse_exec, camp::int_seq<long, 0l, 2l>, RAJA::statement::For<1l, RAJA::policy::sequential::seq_exec, RAJA::statement::For<3l, RAJA::policy::sequential::seq_exec, RAJA::statement::Lambda<0l> > > >, RAJA::internal::LoopTypes<camp::list<void, void, void, void>, camp::list<void, void, void, void> > >::exec<RAJA::internal::LoopData<camp::tuple<RAJA::Span<RAJA::Iterators::numeric_iterator<Kripke::Direction, long, Kripke::Direction*>, long>, RAJA::Span<RAJA::Iterators::numeric_iterator<Kripke::Moment, long, Kripke::Moment*>, long>, RAJA::Span<RAJA::Iterators::numeric_iterator<Kripke::Group, long, Kripke::Group*>, long>, RAJA::Span<RAJA::Iterators::numeric_iterator<Kripke::Zone, long, Kripke::Zone*>, long> >, camp::tuple<>, camp::resources::v1::Host, LPlusTimesSdom::operator()<Kripke::ArchLayoutT<Kripke::ArchT_OpenMP, Kripke::LayoutT_DGZ> >(Kripke::ArchLayoutT<Kripke::ArchT_OpenMP, Kripke::LayoutT_DGZ>, Kripke::SdomId, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Field<double, Kripke::Moment, Kripke::Group, Kripke::Zone>&, Kripke::Core::Field<double, Kripke::Direction, Kripke::Group, Kripke::Zone>&, Kripke::Core::Field<double, Kripke::Direction, Kripke::Moment>&) const::{lambda(Kripke::Direction, Kripke::Moment, Kripke::Group, Kripke::Zone)#1}>&>(RAJA::internal::LoopData<camp::tuple<RAJA::Span<RAJA::Iterators::numeric_iterator<Kripke::Direction, long, Kripke::Direction*>, long>, RAJA::Span<RAJA::Iterators::numeric_iterator<Kripke::Moment, long, Kripke::Moment*>, long>, RAJA::Span<RAJA::Iterators::numeric_iterator<Kripke::Group, long, Kripke::Group*>, long>, RAJA::Span<RAJA::Iterators::numeric_iterator<Kripke::Zone, long, Kripke::Zone*>, long> >, camp::tuple<>, camp::resources::v1::Host, LPlusTimesSdom::operator()<Kripke::ArchLayoutT<Kripke::ArchT_OpenMP, Kripke::LayoutT_DGZ> >(Kripke::ArchLayoutT<Kripke::ArchT_OpenMP, Kripke::LayoutT_DGZ>, Kripke::SdomId, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Field<double, Kripke::Moment, Kripke::Group, Kripke::Zone>&, Kripke::Core::Field<double, Kripke::Direction, Kripke::Group, Kripke::Zone>&, Kripke::Core::Field<double, Kripke::Direction, Kripke::Moment>&) const::{lambda(Kripke::Direction, Kripke::Moment, Kripke::Group, Kripke::Zone)#1}>&) [clone ._omp

	Function: void RAJA::internal::StatementExecutor<RAJA::statement::Collapse<RAJA::omp_parallel_collap ...	Module: exec	Source: :0-0	Coverage (incl. loops): 6.41% \| (excl. loops): 0.00%

  ***  This Panel is Intentionally Left Blank.  ***

It is due to a lack of debug symbols in the given object
(loop or function).

0x46c7c0 PUSH	%R15

0x46c7c2 PUSH	%R14

0x46c7c4 PUSH	%R13

0x46c7c6 PUSH	%R12

0x46c7c8 PUSH	%RBP

0x46c7c9 PUSH	%RBX

0x46c7ca SUB	$0xb8,%RSP

0x46c7d1 MOV	0x8(%RDI),%R15

0x46c7d5 MOV	(%RDI),%RBP

0x46c7d8 MOV	%R15,0x38(%RSP)

0x46c7dd TEST	%RBP,%RBP

0x46c7e0 JLE	46cad6

0x46c7e6 TEST	%R15,%R15

0x46c7e9 JLE	46cad6

0x46c7ef MOV	%RDI,%R12

0x46c7f2 CALL	403500 <omp_get_num_threads@plt>

0x46c7f7 MOVSXD	%EAX,%RBX

0x46c7fa CALL	403440 <omp_get_thread_num@plt>

0x46c7ff XOR	%EDX,%EDX

0x46c801 MOVSXD	%EAX,%RSI

0x46c804 MOV	%R15,%RAX

0x46c807 IMUL	%RBP,%RAX

0x46c80b DIV	%RBX

0x46c80e MOV	%RAX,%RCX

0x46c811 CMP	%RDX,%RSI

0x46c814 JB	46cb6a

0x46c81a IMUL	%RCX,%RSI

0x46c81e LEA	(%RSI,%RDX,1),%RAX

0x46c822 LEA	(%RCX,%RAX,1),%RDX

0x46c826 CMP	%RDX,%RAX

0x46c829 JAE	46cad6

0x46c82f XOR	%EDX,%EDX

0x46c831 MOV	0x10(%R12),%RSI

0x46c836 DIVQ	0x38(%RSP)

0x46c83b MOV	0x10(%RSI),%RDI

0x46c83f MOV	0x30(%RSI),%R14

0x46c843 MOV	0x38(%RSI),%R11

0x46c847 MOV	%R14,0x48(%RSP)

0x46c84c MOV	%RDI,0x58(%RSP)

0x46c851 SUB	%R14,%R11

0x46c854 MOV	%RAX,0xa0(%RSP)

0x46c85c MOV	0x18(%RSI),%RAX

0x46c860 MOV	%RDX,%RBX

0x46c863 MOV	%R14,%RDX

0x46c866 XOR	%R14D,%R14D

0x46c869 SUB	%RDI,%RAX

0x46c86c TEST	%RAX,%RAX

0x46c86f CMOVNS	%RAX,%R14

0x46c873 JLE	46cad6

0x46c879 TEST	%R11,%R11

0x46c87c JLE	46cad6

0x46c882 MOV	0x20(%RSI),%R15

0x46c886 MOV	(%RSI),%R9

0x46c889 MOVQ	$0,0x28(%RSP)

0x46c892 MOV	0xa0(%RSP),%RAX

0x46c89a MOV	0x118(%RSI),%R13

0x46c8a1 MOV	%R15,0x50(%RSP)

0x46c8a6 MOV	0x68(%RSI),%R15

0x46c8aa ADD	%R9,%RAX

0x46c8ad IMUL	%R13,%RDI

0x46c8b1 MOV	0x48(%RSI),%R10

0x46c8b5 MOV	%R9,0xa8(%RSP)

0x46c8bd MOV	%R15,0x88(%RSP)

0x46c8c5 MOV	0x70(%RSI),%R15

0x46c8c9 MOV	%RAX,0x40(%RSP)

0x46c8ce MOV	%R11,%RAX

0x46c8d1 MOV	%R15,0x60(%RSP)

0x46c8d6 MOV	0xb0(%RSI),%R15

0x46c8dd AND	$0x1,%EAX

0x46c8e0 MOV	%RAX,0x8(%RSP)

0x46c8e5 MOV	%R11,%RAX

0x46c8e8 MOV	%R15,0x68(%RSP)

0x46c8ed MOV	0xc8(%RSI),%R15

0x46c8f4 AND	$-0x2,%RAX

0x46c8f8 MOV	%RDI,0x78(%RSP)

0x46c8fd ADD	%RDX,%RAX

0x46c900 LEA	(,%R11,8),%RDI

0x46c908 MOV	%R15,0x70(%RSP)

0x46c90d MOV	0xf8(%RSI),%R15

0x46c914 MOV	0x120(%RSI),%RSI

0x46c91b MOV	%RDI,0x90(%RSP)

0x46c923 MOV	%RAX,0x18(%RSP)

0x46c928 MOV	%RSI,0x80(%RSP)

0x46c930 LEA	-0x1(%RCX),%RSI

0x46c934 MOV	%R11,%RCX

0x46c937 MOV	%RSI,0x98(%RSP)

0x46c93f SHR	$0x1,%RCX

0x46c942 MOV	%R15,0x10(%RSP)

0x46c947 SAL	$0x4,%RCX

0x46c94b LEA	(,%R13,8),%R15

0x46c953 NOPW	%CS:(%RAX,%RAX,1)

0x46c95e XCHG	%AX,%AX

(1709) 0x46c960 MOV	0x50(%RSP),%RAX

(1709) 0x46c965 MOV	0x40(%RSP),%RSI

(1709) 0x46c96a MOV	%RBX,0x30(%RSP)

(1709) 0x46c96f MOV	0x60(%RSP),%R9

(1709) 0x46c974 MOV	0x48(%RSP),%R8

(1709) 0x46c979 LEA	(%RAX,%RBX,1),%RDI

(1709) 0x46c97d MOV	0x88(%RSP),%RAX

(1709) 0x46c985 MOV	0x18(%RSP),%R12

(1709) 0x46c98a MOV	%R10,%RBX

(1709) 0x46c98d IMUL	%RDI,%R9

(1709) 0x46c991 MOV	0x90(%RSP),%RBP

(1709) 0x46c999 MOV	0x10(%RSP),%RDX

(1709) 0x46c99e IMUL	%RSI,%RAX

(1709) 0x46c9a2 ADD	%RAX,%R9

(1709) 0x46c9a5 MOV	0x70(%RSP),%RAX

(1709) 0x46c9aa IMUL	%RSI,%RAX

(1709) 0x46c9ae MOV	0x58(%RSP),%RSI

(1709) 0x46c9b3 ADD	%RSI,%RAX

(1709) 0x46c9b6 MOV	0x68(%RSP),%RSI

(1709) 0x46c9bb LEA	(%RSI,%RAX,8),%RSI

(1709) 0x46c9bf MOV	0x80(%RSP),%RAX

(1709) 0x46c9c7 IMUL	%RAX,%RDI

(1709) 0x46c9cb MOV	0x78(%RSP),%RAX

(1709) 0x46c9d0 ADD	%RAX,%RDI

(1709) 0x46c9d3 LEA	(%RDI,%R8,1),%RAX

(1709) 0x46c9d7 ADD	%R9,%R8

(1709) 0x46c9da ADD	%R12,%R9

(1709) 0x46c9dd SAL	$0x3,%R8

(1709) 0x46c9e1 LEA	(%RDX,%RAX,8),%RDX

(1709) 0x46c9e5 LEA	(%R10,%R9,8),%R12

(1709) 0x46c9e9 LEA	(%R10,%R8,1),%RAX

(1709) 0x46c9ed ADD	%RBP,%R8

(1709) 0x46c9f0 LEA	(%R10,%R8,1),%RBP

(1709) 0x46c9f4 XOR	%R8D,%R8D

  (1708) 0x46c9f7 LEA	0x8(%RSI),%R9

  (1708) 0x46c9fb CMP	$0x2,%R11

  (1708) 0x46c9ff JLE	46caed

  (1708) 0x46ca05 MOV	%R11,0x20(%RSP)

    (1711) 0x46ca0a LEA	0x8(%RSI),%R9

    (1711) 0x46ca0e CMP	%R9,%RAX

    (1711) 0x46ca11 SETAE	%R11B

    (1711) 0x46ca15 CMP	%RBP,%RSI

    (1711) 0x46ca18 SETAE	%R10B

    (1711) 0x46ca1c OR	%R11B,%R10B

    (1711) 0x46ca1f JE	46cae8

    (1711) 0x46ca25 LEA	0x8(%RDX),%R10

    (1711) 0x46ca29 CMP	%R10,%RAX

    (1711) 0x46ca2c JE	46cae8

    (1711) 0x46ca32 MOVSD	(%RSI),%XMM1

    (1711) 0x46ca36 XOR	%R10D,%R10D

    (1711) 0x46ca39 UNPCKLPD	%XMM1,%XMM1

    (1711) 0x46ca3d NOPL	(%RAX)

      (1710) 0x46ca40 MOVUPD	(%RDX,%R10,1),%XMM0

      (1710) 0x46ca46 MOVUPD	(%RAX,%R10,1),%XMM2

      (1710) 0x46ca4c MULPD	%XMM1,%XMM0

      (1710) 0x46ca50 ADDPD	%XMM2,%XMM0

      (1710) 0x46ca54 MOVUPS	%XMM0,(%RAX,%R10,1)

      (1710) 0x46ca59 ADD	$0x10,%R10

      (1710) 0x46ca5d CMP	%R10,%RCX

      (1710) 0x46ca60 JNE	46ca40

    (1711) 0x46ca62 CMPQ	$0,0x8(%RSP)

    (1711) 0x46ca68 JE	46ca8e

    (1711) 0x46ca6a MOV	0x18(%RSP),%R11

    (1711) 0x46ca6f LEA	(%RDI,%R11,1),%R10

    (1711) 0x46ca73 MOV	0x10(%RSP),%R11

    (1711) 0x46ca78 MOVSD	(%R11,%R10,8),%XMM0

    (1711) 0x46ca7e MULSD	(%RSI),%XMM0

    (1711) 0x46ca82 ADDSD	(%R12),%XMM0

    (1711) 0x46ca88 MOVSD	%XMM0,(%R12)

    (1711) 0x46ca8e ADD	$0x1,%R8

    (1711) 0x46ca92 MOV	%R9,%RSI

    (1711) 0x46ca95 ADD	%R13,%RDI

    (1711) 0x46ca98 ADD	%R15,%RDX

    (1711) 0x46ca9b CMP	%R8,%R14

    (1711) 0x46ca9e JG	46ca0a

(1709) 0x46caa4 MOV	%RBX,%R10

(1709) 0x46caa7 MOV	0x20(%RSP),%R11

(1709) 0x46caac MOV	0x30(%RSP),%RBX

(1709) 0x46cab1 MOV	0x98(%RSP),%RDI

(1709) 0x46cab9 CMP	%RDI,0x28(%RSP)

(1709) 0x46cabe JE	46cad6

(1709) 0x46cac0 ADD	$0x1,%RBX

(1709) 0x46cac4 CMP	%RBX,0x38(%RSP)

(1709) 0x46cac9 JLE	46cb42

(1709) 0x46cacb ADDQ	$0x1,0x28(%RSP)

(1709) 0x46cad1 JMP	46c960

0x46cad6 ADD	$0xb8,%RSP

0x46cadd POP	%RBX

0x46cade POP	%RBP

0x46cadf POP	%R12

0x46cae1 POP	%R13

0x46cae3 POP	%R14

0x46cae5 POP	%R15

0x46cae7 RET

  (1708) 0x46cae8 MOV	0x20(%RSP),%R11

  (1708) 0x46caed XOR	%R10D,%R10D

  (1708) 0x46caf0 NOPW	%CS:(%RAX,%RAX,1)

  (1708) 0x46cafb NOPL	(%RAX,%RAX,1)

    (1707) 0x46cb00 MOVSD	(%RDX,%R10,8),%XMM0

    (1707) 0x46cb06 MULSD	(%RSI),%XMM0

    (1707) 0x46cb0a ADDSD	(%RAX,%R10,8),%XMM0

    (1707) 0x46cb10 MOVSD	%XMM0,(%RAX,%R10,8)

    (1707) 0x46cb16 ADD	$0x1,%R10

    (1707) 0x46cb1a CMP	%R10,%R11

    (1707) 0x46cb1d JG	46cb00

  (1708) 0x46cb1f ADD	$0x1,%R8

  (1708) 0x46cb23 MOV	%R9,%RSI

  (1708) 0x46cb26 ADD	%R13,%RDI

  (1708) 0x46cb29 ADD	%R15,%RDX

  (1708) 0x46cb2c CMP	%R14,%R8

  (1708) 0x46cb2f JL	46c9f7

(1709) 0x46cb35 MOV	%RBX,%R10

(1709) 0x46cb38 MOV	0x30(%RSP),%RBX

(1709) 0x46cb3d JMP	46cab1

(1709) 0x46cb42 ADDQ	$0x1,0xa0(%RSP)

(1709) 0x46cb4b MOV	0xa8(%RSP),%RDI

(1709) 0x46cb53 XOR	%EBX,%EBX

(1709) 0x46cb55 MOV	0xa0(%RSP),%RAX

(1709) 0x46cb5d ADD	%RDI,%RAX

(1709) 0x46cb60 MOV	%RAX,0x40(%RSP)

(1709) 0x46cb65 JMP	46cacb

0x46cb6a ADD	$0x1,%RCX

0x46cb6e XOR	%EDX,%EDX

0x46cb70 JMP	46c81a

0x46cb75 NOPW	%CS:(%RAX,%RAX,1)

Coverage (%)	Name	Source Location	Module
►96.61+	gomp_thread_start	team.c:130	libgomp.so.1.0.0
○	start_thread		libc.so.6
○	__GI___clone3		libc.so.6
►2.61+	GOMP_parallel	libgomp.h:982	libgomp.so.1.0.0
○	void LPlusTimesSdom::operator([...]		exec
○	Kripke::Kernel::LPlusTimes(Kri[...]		exec
○	Kripke::SteadyStateSolver(Krip[...]		exec
○	main		exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start		exec

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run gcc_0

Source file and lines
Module	exec

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Vectorization

Your function is not vectorized. Only 12% of vector register length is used (average across all SSE/AVX instructions). By vectorizing your function, you can lower the cost of an iteration from 24.00 to 3.00 cycles (8.00x speedup).

Details

All SSE/AVX instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA)

Execution units bottlenecks

Performance is limited by execution of divide and square root operations (the divide/square root unit is a bottleneck). By removing all these bottlenecks, you can lower the cost of an iteration from 24.00 to 13.13 cycles (1.83x speedup).

Workaround

Reduce the number of division or square root instructions:

If denominator is constant over iterations, use reciprocal (replace x/y with x*(1/y)). Check precision impact.

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 24.00 to 12.88 cycles (1.86x speedup).

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

omp_get_num_threads@plt: 1 occurrences►
omp_get_thread_num@plt: 1 occurrences►

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

DIV: 2 occurrences►

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 152 bytes. The binary function is storing 152 bytes.

General properties

nb instructions	104
nb uops	105
loop length	456
used x86 registers	15
used mmx registers	0
used xmm registers	0
used ymm registers	0
used zmm registers	0
nb stack references	19

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	13.13 cycles
front end	13.13 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	7.00	7.00	7.00	7.00	7.00	7.00	10.00	10.00	10.00	10.00	0.00	0.00	0.00	0.00	0.00	0.00
cycles	7.00	7.00	7.00	7.00	7.00	7.00	10.00	10.00	10.00	10.00	0.00	0.00	0.00	0.00	0.00	0.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

14.00-24.00

Cycles summary

Front-end	13.13
Dispatch	10.00
DIV/SQRT	14.00-24.00
Overall L1	14.00-24.00

Vectorization ratios

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	0%
other	0%

Vector efficiency ratios

all	12%
load	12%
store	12%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	12%
other	11%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 24.00 cycles. At this rate:

2% of peak load performance is reached (6.33 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
4% of peak store performance is reached (6.33 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Found no such bottlenecks.

ASM code

In the binary file, the address of the function is: 46c7c0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	Latency	Recip. throughput	Vectorization
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB $0xb8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV 0x8(%RDI),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (12.5%)
MOV (%RDI),%RBP	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (12.5%)
MOV %R15,0x38(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
TEST %RBP,%RBP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JLE 46cad6 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl2EEEEJNS2_3ForILl1ENS_6policy10sequential8seq_execEJNS8_ILl3ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEENS0_9LoopTypesINS5_4listIJvvvvEEESJ_EEE4execIRNS0_8LoopDataINS5_5tupleIJNS_4SpanINS_9Iterators16numeric_iteratorIN6Kripke9DirectionElPST_EElEENSP_INSR_INSS_6MomentElPSX_EElEENSP_INSR_INSS_5GroupElPS11_EElEENSP_INSR_INSS_4ZoneElPS15_EElEEEEENSO_IJEEENS5_9resources2v14HostEJZNK14LPlusTimesSdomclINSS_11ArchLayoutTINSS_12ArchT_OpenMPENSS_11LayoutT_DGZEEEEEvT_NSS_6SdomIdERKNSS_4Core3SetES1P_S1P_S1P_RNS1M_5FieldIdJSX_S11_S15_EEERNS1Q_IdJST_S11_S15_EEERNS1Q_IdJST_SX_EEEEUlST_SX_S11_S15_E_EEEEEvOS1K_._omp_fn.0+0x316>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
TEST %R15,%R15	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JLE 46cad6 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl2EEEEJNS2_3ForILl1ENS_6policy10sequential8seq_execEJNS8_ILl3ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEENS0_9LoopTypesINS5_4listIJvvvvEEESJ_EEE4execIRNS0_8LoopDataINS5_5tupleIJNS_4SpanINS_9Iterators16numeric_iteratorIN6Kripke9DirectionElPST_EElEENSP_INSR_INSS_6MomentElPSX_EElEENSP_INSR_INSS_5GroupElPS11_EElEENSP_INSR_INSS_4ZoneElPS15_EElEEEEENSO_IJEEENS5_9resources2v14HostEJZNK14LPlusTimesSdomclINSS_11ArchLayoutTINSS_12ArchT_OpenMPENSS_11LayoutT_DGZEEEEEvT_NSS_6SdomIdERKNSS_4Core3SetES1P_S1P_S1P_RNS1M_5FieldIdJSX_S11_S15_EEERNS1Q_IdJST_S11_S15_EEERNS1Q_IdJST_SX_EEEEUlST_SX_S11_S15_E_EEEEEvOS1K_._omp_fn.0+0x316>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV %RDI,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CALL 403500 <omp_get_num_threads@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0.50	N/A
MOVSXD %EAX,%RBX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
CALL 403440 <omp_get_thread_num@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0.50	N/A
XOR %EDX,%EDX	1	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
MOVSXD %EAX,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV %R15,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
IMUL %RBP,%RAX	1	0.33	0.33	0.33	0	0	0	0	0	0	0	3	0.33	N/A
DIV %RBX	2	0	0	0	2	0	0	0	0	0	0	10-22	7-12	scal (12.5%)
MOV %RAX,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP %RDX,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JB 46cb6a <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl2EEEEJNS2_3ForILl1ENS_6policy10sequential8seq_execEJNS8_ILl3ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEENS0_9LoopTypesINS5_4listIJvvvvEEESJ_EEE4execIRNS0_8LoopDataINS5_5tupleIJNS_4SpanINS_9Iterators16numeric_iteratorIN6Kripke9DirectionElPST_EElEENSP_INSR_INSS_6MomentElPSX_EElEENSP_INSR_INSS_5GroupElPS11_EElEENSP_INSR_INSS_4ZoneElPS15_EElEEEEENSO_IJEEENS5_9resources2v14HostEJZNK14LPlusTimesSdomclINSS_11ArchLayoutTINSS_12ArchT_OpenMPENSS_11LayoutT_DGZEEEEEvT_NSS_6SdomIdERKNSS_4Core3SetES1P_S1P_S1P_RNS1M_5FieldIdJSX_S11_S15_EEERNS1Q_IdJST_S11_S15_EEERNS1Q_IdJST_SX_EEEEUlST_SX_S11_S15_E_EEEEEvOS1K_._omp_fn.0+0x3aa>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
IMUL %RCX,%RSI	1	0.33	0.33	0.33	0	0	0	0	0	0	0	3	0.33	N/A
LEA (%RSI,%RDX,1),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA (%RCX,%RAX,1),%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
CMP %RDX,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JAE 46cad6 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl2EEEEJNS2_3ForILl1ENS_6policy10sequential8seq_execEJNS8_ILl3ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEENS0_9LoopTypesINS5_4listIJvvvvEEESJ_EEE4execIRNS0_8LoopDataINS5_5tupleIJNS_4SpanINS_9Iterators16numeric_iteratorIN6Kripke9DirectionElPST_EElEENSP_INSR_INSS_6MomentElPSX_EElEENSP_INSR_INSS_5GroupElPS11_EElEENSP_INSR_INSS_4ZoneElPS15_EElEEEEENSO_IJEEENS5_9resources2v14HostEJZNK14LPlusTimesSdomclINSS_11ArchLayoutTINSS_12ArchT_OpenMPENSS_11LayoutT_DGZEEEEEvT_NSS_6SdomIdERKNSS_4Core3SetES1P_S1P_S1P_RNS1M_5FieldIdJSX_S11_S15_EEERNS1Q_IdJST_S11_S15_EEERNS1Q_IdJST_SX_EEEEUlST_SX_S11_S15_E_EEEEEvOS1K_._omp_fn.0+0x316>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
XOR %EDX,%EDX	1	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV 0x10(%R12),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
DIVQ 0x38(%RSP)	2	0	0	0	2	0	0	0.25	0.25	0.25	0.25	10-22	7-12	scal (12.5%)
MOV 0x10(%RSI),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0x30(%RSI),%R14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (12.5%)
MOV 0x38(%RSI),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %R14,0x48(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %RDI,0x58(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
SUB %R14,%R11	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV %RAX,0xa0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x18(%RSI),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RDX,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
MOV %R14,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XOR %R14D,%R14D	1	0	0	0	0	0	0	0	0	0	0	0	0.25	scal (6.3%)
SUB %RDI,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
TEST %RAX,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
CMOVNS %RAX,%R14	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JLE 46cad6 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl2EEEEJNS2_3ForILl1ENS_6policy10sequential8seq_execEJNS8_ILl3ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEENS0_9LoopTypesINS5_4listIJvvvvEEESJ_EEE4execIRNS0_8LoopDataINS5_5tupleIJNS_4SpanINS_9Iterators16numeric_iteratorIN6Kripke9DirectionElPST_EElEENSP_INSR_INSS_6MomentElPSX_EElEENSP_INSR_INSS_5GroupElPS11_EElEENSP_INSR_INSS_4ZoneElPS15_EElEEEEENSO_IJEEENS5_9resources2v14HostEJZNK14LPlusTimesSdomclINSS_11ArchLayoutTINSS_12ArchT_OpenMPENSS_11LayoutT_DGZEEEEEvT_NSS_6SdomIdERKNSS_4Core3SetES1P_S1P_S1P_RNS1M_5FieldIdJSX_S11_S15_EEERNS1Q_IdJST_S11_S15_EEERNS1Q_IdJST_SX_EEEEUlST_SX_S11_S15_E_EEEEEvOS1K_._omp_fn.0+0x316>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
TEST %R11,%R11	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JLE 46cad6 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl2EEEEJNS2_3ForILl1ENS_6policy10sequential8seq_execEJNS8_ILl3ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEENS0_9LoopTypesINS5_4listIJvvvvEEESJ_EEE4execIRNS0_8LoopDataINS5_5tupleIJNS_4SpanINS_9Iterators16numeric_iteratorIN6Kripke9DirectionElPST_EElEENSP_INSR_INSS_6MomentElPSX_EElEENSP_INSR_INSS_5GroupElPS11_EElEENSP_INSR_INSS_4ZoneElPS15_EElEEEEENSO_IJEEENS5_9resources2v14HostEJZNK14LPlusTimesSdomclINSS_11ArchLayoutTINSS_12ArchT_OpenMPENSS_11LayoutT_DGZEEEEEvT_NSS_6SdomIdERKNSS_4Core3SetES1P_S1P_S1P_RNS1M_5FieldIdJSX_S11_S15_EEERNS1Q_IdJST_S11_S15_EEERNS1Q_IdJST_SX_EEEEUlST_SX_S11_S15_E_EEEEEvOS1K_._omp_fn.0+0x316>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV 0x20(%RSI),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (12.5%)
MOV (%RSI),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (12.5%)
MOVQ $0,0x28(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
MOV 0xa0(%RSP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0x118(%RSI),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %R15,0x50(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x68(%RSI),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (12.5%)
ADD %R9,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
IMUL %R13,%RDI	1	0.33	0.33	0.33	0	0	0	0	0	0	0	3	0.33	N/A
MOV 0x48(%RSI),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (12.5%)
MOV %R9,0xa8(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %R15,0x88(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x70(%RSI),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (12.5%)
MOV %RAX,0x40(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %R11,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R15,0x60(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0xb0(%RSI),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (12.5%)
AND $0x1,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV %RAX,0x8(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %R11,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R15,0x68(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0xc8(%RSI),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (12.5%)
AND $-0x2,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV %RDI,0x78(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
ADD %RDX,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
LEA (,%R11,8),%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
MOV %R15,0x70(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0xf8(%RSI),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (12.5%)
MOV 0x120(%RSI),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RDI,0x90(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %RAX,0x18(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %RSI,0x80(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
LEA -0x1(%RCX),%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
MOV %R11,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RSI,0x98(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
SHR $0x1,%RCX	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.33	N/A
MOV %R15,0x10(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
SAL $0x4,%RCX	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.33	N/A
LEA (,%R13,8),%R15	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
XCHG %AX,%AX	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
ADD $0xb8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
RET	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50	N/A
ADD $0x1,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
XOR %EDX,%EDX	1	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
JMP 46c81a <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl2EEEEJNS2_3ForILl1ENS_6policy10sequential8seq_execEJNS8_ILl3ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEENS0_9LoopTypesINS5_4listIJvvvvEEESJ_EEE4execIRNS0_8LoopDataINS5_5tupleIJNS_4SpanINS_9Iterators16numeric_iteratorIN6Kripke9DirectionElPST_EElEENSP_INSR_INSS_6MomentElPSX_EElEENSP_INSR_INSS_5GroupElPS11_EElEENSP_INSR_INSS_4ZoneElPS15_EElEEEEENSO_IJEEENS5_9resources2v14HostEJZNK14LPlusTimesSdomclINSS_11ArchLayoutTINSS_12ArchT_OpenMPENSS_11LayoutT_DGZEEEEEvT_NSS_6SdomIdERKNSS_4Core3SetES1P_S1P_S1P_RNS1M_5FieldIdJSX_S11_S15_EEERNS1Q_IdJST_S11_S15_EEERNS1Q_IdJST_SX_EEEEUlST_SX_S11_S15_E_EEEEEvOS1K_._omp_fn.0+0x5a>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	1	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run gcc_0

Source file and lines
Module	exec

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Vectorization

Details

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA)

Execution units bottlenecks

Workaround

Reduce the number of division or square root instructions:

If denominator is constant over iterations, use reciprocal (replace x/y with x*(1/y)). Check precision impact.

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 24.00 to 12.88 cycles (1.86x speedup).

CALL instructions

Detected function call instructions.

Details

omp_get_num_threads@plt: 1 occurrences►
omp_get_thread_num@plt: 1 occurrences►

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

DIV: 2 occurrences►

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 152 bytes. The binary function is storing 152 bytes.

General properties

nb instructions	104
nb uops	105
loop length	456
used x86 registers	15
used mmx registers	0
used xmm registers	0
used ymm registers	0
used zmm registers	0
nb stack references	19

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	13.13 cycles
front end	13.13 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	7.00	7.00	7.00	7.00	7.00	7.00	10.00	10.00	10.00	10.00	0.00	0.00	0.00	0.00	0.00	0.00
cycles	7.00	7.00	7.00	7.00	7.00	7.00	10.00	10.00	10.00	10.00	0.00	0.00	0.00	0.00	0.00	0.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

14.00-24.00

Cycles summary

Front-end	13.13
Dispatch	10.00
DIV/SQRT	14.00-24.00
Overall L1	14.00-24.00

Vectorization ratios

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	0%
other	0%

Vector efficiency ratios

all	12%
load	12%
store	12%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	12%
other	11%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 24.00 cycles. At this rate:

2% of peak load performance is reached (6.33 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
4% of peak store performance is reached (6.33 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Found no such bottlenecks.

ASM code

In the binary file, the address of the function is: 46c7c0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	Latency	Recip. throughput	Vectorization
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB $0xb8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV 0x8(%RDI),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (12.5%)
MOV (%RDI),%RBP	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (12.5%)
MOV %R15,0x38(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
TEST %RBP,%RBP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JLE 46cad6 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl2EEEEJNS2_3ForILl1ENS_6policy10sequential8seq_execEJNS8_ILl3ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEENS0_9LoopTypesINS5_4listIJvvvvEEESJ_EEE4execIRNS0_8LoopDataINS5_5tupleIJNS_4SpanINS_9Iterators16numeric_iteratorIN6Kripke9DirectionElPST_EElEENSP_INSR_INSS_6MomentElPSX_EElEENSP_INSR_INSS_5GroupElPS11_EElEENSP_INSR_INSS_4ZoneElPS15_EElEEEEENSO_IJEEENS5_9resources2v14HostEJZNK14LPlusTimesSdomclINSS_11ArchLayoutTINSS_12ArchT_OpenMPENSS_11LayoutT_DGZEEEEEvT_NSS_6SdomIdERKNSS_4Core3SetES1P_S1P_S1P_RNS1M_5FieldIdJSX_S11_S15_EEERNS1Q_IdJST_S11_S15_EEERNS1Q_IdJST_SX_EEEEUlST_SX_S11_S15_E_EEEEEvOS1K_._omp_fn.0+0x316>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
TEST %R15,%R15	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JLE 46cad6 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl2EEEEJNS2_3ForILl1ENS_6policy10sequential8seq_execEJNS8_ILl3ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEENS0_9LoopTypesINS5_4listIJvvvvEEESJ_EEE4execIRNS0_8LoopDataINS5_5tupleIJNS_4SpanINS_9Iterators16numeric_iteratorIN6Kripke9DirectionElPST_EElEENSP_INSR_INSS_6MomentElPSX_EElEENSP_INSR_INSS_5GroupElPS11_EElEENSP_INSR_INSS_4ZoneElPS15_EElEEEEENSO_IJEEENS5_9resources2v14HostEJZNK14LPlusTimesSdomclINSS_11ArchLayoutTINSS_12ArchT_OpenMPENSS_11LayoutT_DGZEEEEEvT_NSS_6SdomIdERKNSS_4Core3SetES1P_S1P_S1P_RNS1M_5FieldIdJSX_S11_S15_EEERNS1Q_IdJST_S11_S15_EEERNS1Q_IdJST_SX_EEEEUlST_SX_S11_S15_E_EEEEEvOS1K_._omp_fn.0+0x316>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV %RDI,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CALL 403500 <omp_get_num_threads@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0.50	N/A
MOVSXD %EAX,%RBX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
CALL 403440 <omp_get_thread_num@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0.50	N/A
XOR %EDX,%EDX	1	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
MOVSXD %EAX,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV %R15,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
IMUL %RBP,%RAX	1	0.33	0.33	0.33	0	0	0	0	0	0	0	3	0.33	N/A
DIV %RBX	2	0	0	0	2	0	0	0	0	0	0	10-22	7-12	scal (12.5%)
MOV %RAX,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP %RDX,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JB 46cb6a <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl2EEEEJNS2_3ForILl1ENS_6policy10sequential8seq_execEJNS8_ILl3ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEENS0_9LoopTypesINS5_4listIJvvvvEEESJ_EEE4execIRNS0_8LoopDataINS5_5tupleIJNS_4SpanINS_9Iterators16numeric_iteratorIN6Kripke9DirectionElPST_EElEENSP_INSR_INSS_6MomentElPSX_EElEENSP_INSR_INSS_5GroupElPS11_EElEENSP_INSR_INSS_4ZoneElPS15_EElEEEEENSO_IJEEENS5_9resources2v14HostEJZNK14LPlusTimesSdomclINSS_11ArchLayoutTINSS_12ArchT_OpenMPENSS_11LayoutT_DGZEEEEEvT_NSS_6SdomIdERKNSS_4Core3SetES1P_S1P_S1P_RNS1M_5FieldIdJSX_S11_S15_EEERNS1Q_IdJST_S11_S15_EEERNS1Q_IdJST_SX_EEEEUlST_SX_S11_S15_E_EEEEEvOS1K_._omp_fn.0+0x3aa>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
IMUL %RCX,%RSI	1	0.33	0.33	0.33	0	0	0	0	0	0	0	3	0.33	N/A
LEA (%RSI,%RDX,1),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA (%RCX,%RAX,1),%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
CMP %RDX,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JAE 46cad6 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl2EEEEJNS2_3ForILl1ENS_6policy10sequential8seq_execEJNS8_ILl3ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEENS0_9LoopTypesINS5_4listIJvvvvEEESJ_EEE4execIRNS0_8LoopDataINS5_5tupleIJNS_4SpanINS_9Iterators16numeric_iteratorIN6Kripke9DirectionElPST_EElEENSP_INSR_INSS_6MomentElPSX_EElEENSP_INSR_INSS_5GroupElPS11_EElEENSP_INSR_INSS_4ZoneElPS15_EElEEEEENSO_IJEEENS5_9resources2v14HostEJZNK14LPlusTimesSdomclINSS_11ArchLayoutTINSS_12ArchT_OpenMPENSS_11LayoutT_DGZEEEEEvT_NSS_6SdomIdERKNSS_4Core3SetES1P_S1P_S1P_RNS1M_5FieldIdJSX_S11_S15_EEERNS1Q_IdJST_S11_S15_EEERNS1Q_IdJST_SX_EEEEUlST_SX_S11_S15_E_EEEEEvOS1K_._omp_fn.0+0x316>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
XOR %EDX,%EDX	1	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV 0x10(%R12),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
DIVQ 0x38(%RSP)	2	0	0	0	2	0	0	0.25	0.25	0.25	0.25	10-22	7-12	scal (12.5%)
MOV 0x10(%RSI),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0x30(%RSI),%R14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (12.5%)
MOV 0x38(%RSI),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %R14,0x48(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %RDI,0x58(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
SUB %R14,%R11	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV %RAX,0xa0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x18(%RSI),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RDX,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
MOV %R14,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XOR %R14D,%R14D	1	0	0	0	0	0	0	0	0	0	0	0	0.25	scal (6.3%)
SUB %RDI,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
TEST %RAX,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
CMOVNS %RAX,%R14	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JLE 46cad6 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl2EEEEJNS2_3ForILl1ENS_6policy10sequential8seq_execEJNS8_ILl3ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEENS0_9LoopTypesINS5_4listIJvvvvEEESJ_EEE4execIRNS0_8LoopDataINS5_5tupleIJNS_4SpanINS_9Iterators16numeric_iteratorIN6Kripke9DirectionElPST_EElEENSP_INSR_INSS_6MomentElPSX_EElEENSP_INSR_INSS_5GroupElPS11_EElEENSP_INSR_INSS_4ZoneElPS15_EElEEEEENSO_IJEEENS5_9resources2v14HostEJZNK14LPlusTimesSdomclINSS_11ArchLayoutTINSS_12ArchT_OpenMPENSS_11LayoutT_DGZEEEEEvT_NSS_6SdomIdERKNSS_4Core3SetES1P_S1P_S1P_RNS1M_5FieldIdJSX_S11_S15_EEERNS1Q_IdJST_S11_S15_EEERNS1Q_IdJST_SX_EEEEUlST_SX_S11_S15_E_EEEEEvOS1K_._omp_fn.0+0x316>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
TEST %R11,%R11	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JLE 46cad6 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl2EEEEJNS2_3ForILl1ENS_6policy10sequential8seq_execEJNS8_ILl3ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEENS0_9LoopTypesINS5_4listIJvvvvEEESJ_EEE4execIRNS0_8LoopDataINS5_5tupleIJNS_4SpanINS_9Iterators16numeric_iteratorIN6Kripke9DirectionElPST_EElEENSP_INSR_INSS_6MomentElPSX_EElEENSP_INSR_INSS_5GroupElPS11_EElEENSP_INSR_INSS_4ZoneElPS15_EElEEEEENSO_IJEEENS5_9resources2v14HostEJZNK14LPlusTimesSdomclINSS_11ArchLayoutTINSS_12ArchT_OpenMPENSS_11LayoutT_DGZEEEEEvT_NSS_6SdomIdERKNSS_4Core3SetES1P_S1P_S1P_RNS1M_5FieldIdJSX_S11_S15_EEERNS1Q_IdJST_S11_S15_EEERNS1Q_IdJST_SX_EEEEUlST_SX_S11_S15_E_EEEEEvOS1K_._omp_fn.0+0x316>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV 0x20(%RSI),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (12.5%)
MOV (%RSI),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (12.5%)
MOVQ $0,0x28(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
MOV 0xa0(%RSP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0x118(%RSI),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %R15,0x50(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x68(%RSI),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (12.5%)
ADD %R9,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
IMUL %R13,%RDI	1	0.33	0.33	0.33	0	0	0	0	0	0	0	3	0.33	N/A
MOV 0x48(%RSI),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (12.5%)
MOV %R9,0xa8(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %R15,0x88(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x70(%RSI),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (12.5%)
MOV %RAX,0x40(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %R11,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R15,0x60(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0xb0(%RSI),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (12.5%)
AND $0x1,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV %RAX,0x8(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %R11,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R15,0x68(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0xc8(%RSI),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (12.5%)
AND $-0x2,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV %RDI,0x78(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
ADD %RDX,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
LEA (,%R11,8),%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
MOV %R15,0x70(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0xf8(%RSI),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (12.5%)
MOV 0x120(%RSI),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RDI,0x90(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %RAX,0x18(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %RSI,0x80(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
LEA -0x1(%RCX),%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
MOV %R11,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RSI,0x98(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
SHR $0x1,%RCX	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.33	N/A
MOV %R15,0x10(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
SAL $0x4,%RCX	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.33	N/A
LEA (,%R13,8),%R15	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
XCHG %AX,%AX	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
ADD $0xb8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
RET	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50	N/A
ADD $0x1,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
XOR %EDX,%EDX	1	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
JMP 46c81a <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl2EEEEJNS2_3ForILl1ENS_6policy10sequential8seq_execEJNS8_ILl3ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEENS0_9LoopTypesINS5_4listIJvvvvEEESJ_EEE4execIRNS0_8LoopDataINS5_5tupleIJNS_4SpanINS_9Iterators16numeric_iteratorIN6Kripke9DirectionElPST_EElEENSP_INSR_INSS_6MomentElPSX_EElEENSP_INSR_INSS_5GroupElPS11_EElEENSP_INSR_INSS_4ZoneElPS15_EElEEEEENSO_IJEEENS5_9resources2v14HostEJZNK14LPlusTimesSdomclINSS_11ArchLayoutTINSS_12ArchT_OpenMPENSS_11LayoutT_DGZEEEEEvT_NSS_6SdomIdERKNSS_4Core3SetES1P_S1P_S1P_RNS1M_5FieldIdJSX_S11_S15_EEERNS1Q_IdJST_S11_S15_EEERNS1Q_IdJST_SX_EEEEUlST_SX_S11_S15_E_EEEEEvOS1K_._omp_fn.0+0x5a>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	1	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A

Name	Coverage (%)	Time (s)
▼void RAJA::internal::StatementExecutor, RAJA::statement::For<1l, RAJA::policy::sequential::seq_exec, RAJA::statement::For<3l, RAJA::policy::sequential::seq_exec, RAJA::...–	6.41	0.71
▼Loop 1709 - - exec–	0.01	0.01
▼Loop 1708 - - exec–	0.00	0.00
▼Loop 1711 - - exec–	0.07	0.01
○Loop 1710 - - exec	6.33	0.65
○Loop 1707 - - exec	0.00	0.00

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Expensive FP math instructions/calls

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Matching between your function (in the source code) and the binary function

General properties

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Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code