OV - exec - Function void LPlusTimesSdom::operator()<Kripke::ArchLayoutT<Kripke::ArchT_OpenMP, Kripke::LayoutT_DGZ> >(Kripke::ArchLayoutT<Kripke::ArchT_OpenMP, Kripke::LayoutT_DGZ>, Kripke::SdomId, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Field<double, Kripke::Moment, Kripke::Group, Kripke::Zone>&, Kripke::Core::Field<double, Kripke::Direction, Kripke::Group, Kripke::Zone>&, Kripke::Core::Field<double, Kripke::Direction, Kripke::Moment>&) const [clone .extracted]

	Function: void LPlusTimesSdom::operator()<Kripke::ArchLayoutT<Kripke::ArchT_OpenMP, Kripke::LayoutT_ ...	Module: exec	Source: :0-0	Coverage (incl. loops): 2.93% \| (excl. loops): 0.00%

  ***  This Panel is Intentionally Left Blank.  ***

It is due to a lack of debug symbols in the given object
(loop or function).

0x44d6e0 PUSH	%RBP

0x44d6e1 PUSH	%R15

0x44d6e3 PUSH	%R14

0x44d6e5 PUSH	%R13

0x44d6e7 PUSH	%R12

0x44d6e9 PUSH	%RBX

0x44d6ea SUB	$0xe8,%RSP

0x44d6f1 MOVL	$0,0x1c(%RSP)

0x44d6f9 TEST	%R9,%R9

0x44d6fc JS	44db83

0x44d702 MOV	%RDX,0xc8(%RSP)

0x44d70a MOV	(%R8),%RAX

0x44d70d MOV	%RAX,0xc0(%RSP)

0x44d715 MOV	0x10(%R8),%RAX

0x44d719 MOV	%RAX,0x8(%RSP)

0x44d71e MOV	0x18(%R8),%RBX

0x44d722 MOV	0x20(%R8),%RAX

0x44d726 MOV	%RAX,0xb8(%RSP)

0x44d72e MOV	0x30(%R8),%RAX

0x44d732 MOV	%RAX,(%RSP)

0x44d736 MOV	0x38(%R8),%R14

0x44d73a MOV	0x48(%R8),%RAX

0x44d73e MOV	%RAX,0x40(%RSP)

0x44d743 MOV	0x68(%R8),%RAX

0x44d747 MOV	%RAX,0xb0(%RSP)

0x44d74f MOV	0x70(%R8),%RAX

0x44d753 MOV	%RAX,0xa8(%RSP)

0x44d75b MOV	0xb0(%R8),%R15

0x44d762 MOV	0xc8(%R8),%RAX

0x44d769 MOV	%RAX,0xa0(%RSP)

0x44d771 MOV	0xf8(%R8),%RAX

0x44d778 MOV	%RAX,0x10(%RSP)

0x44d77d MOV	(%RDI),%ESI

0x44d77f MOV	%R9,0x50(%RSP)

0x44d784 MOV	0x118(%R8),%RAX

0x44d78b MOV	%RAX,0x48(%RSP)

0x44d790 MOV	0x120(%R8),%RAX

0x44d797 MOV	%RAX,0x38(%RSP)

0x44d79c MOVQ	$0,0x58(%RSP)

0x44d7a5 MOVQ	$0x1,0xe0(%RSP)

0x44d7b1 SUB	$0x8,%RSP

0x44d7b5 LEA	0xe8(%RSP),%RAX

0x44d7bd LEA	0xb6b2c(%RIP),%RDI

0x44d7c4 LEA	0x24(%RSP),%RCX

0x44d7c9 LEA	0x60(%RSP),%R8

0x44d7ce LEA	0x58(%RSP),%R9

0x44d7d3 MOV	%ESI,0x20(%RSP)

0x44d7d7 MOV	$0x22,%EDX

0x44d7dc PUSH	$0x1

0x44d7de PUSH	$0x1

0x44d7e0 PUSH	%RAX

0x44d7e1 CALL	403130 <__kmpc_for_static_init_8@plt>

0x44d7e6 ADD	$0x20,%RSP

0x44d7ea MOV	0x58(%RSP),%RAX

0x44d7ef MOV	0x50(%RSP),%RCX

0x44d7f4 MOV	%RAX,0x98(%RSP)

0x44d7fc SUB	%RAX,%RCX

0x44d7ff MOV	%RCX,0x90(%RSP)

0x44d807 JB	44db62

0x44d80d SUB	0x8(%RSP),%RBX

0x44d812 SUB	(%RSP),%R14

0x44d816 XOR	%EAX,%EAX

0x44d818 TEST	%R14,%R14

0x44d81b MOV	$0,%R13D

0x44d821 CMOVG	%R14,%R13

0x44d825 TEST	%RBX,%RBX

0x44d828 CMOVLE	%RAX,%RBX

0x44d82c MOV	%RBX,0x30(%RSP)

0x44d831 JLE	44db62

0x44d837 MOV	(%RSP),%RSI

0x44d83b LEA	(%RSI,%R13,1),%RAX

0x44d83f MOV	0x8(%RSP),%R8

0x44d844 MOV	0x48(%RSP),%RDI

0x44d849 IMUL	%RDI,%R8

0x44d84d XOR	%R9D,%R9D

0x44d850 TEST	%RDI,%RDI

0x44d853 MOV	$0,%EDX

0x44d858 CMOVG	%RDI,%RDX

0x44d85c MOV	$0,%R10D

0x44d862 CMOVS	%RDI,%R10

0x44d866 MOV	0x30(%RSP),%RCX

0x44d86b MOV	%RCX,%R11

0x44d86e MOV	%RDX,0x80(%RSP)

0x44d876 IMUL	%RDX,%R11

0x44d87a MOV	%R11,0x70(%RSP)

0x44d87f MOV	%RCX,%RDX

0x44d882 MOV	%R10,0x78(%RSP)

0x44d887 IMUL	%R10,%RDX

0x44d88b MOV	%RDX,0x68(%RSP)

0x44d890 LEA	-0x1(%RCX),%R10

0x44d894 MOV	$0x7ffffffffffffffe,%RCX

0x44d89e AND	%R13,%RCX

0x44d8a1 LEA	(,%RSI,8),%RDX

0x44d8a9 LEA	(%RDX,%R8,8),%RDX

0x44d8ad ADD	0x10(%RSP),%RDX

0x44d8b2 MOV	%RDX,0x28(%RSP)

0x44d8b7 MOV	0x38(%RSP),%RDX

0x44d8bc LEA	(,%RDX,8),%RDX

0x44d8c4 MOV	%RDX,0x20(%RSP)

0x44d8c9 LEA	(%RSI,%R8,1),%RDX

0x44d8cd MOV	%RDX,0x60(%RSP)

0x44d8d2 ADD	%RAX,%R8

0x44d8d5 MOV	%R8,0x88(%RSP)

0x44d8dd LEA	(,%RDI,8),%R11

0x44d8e5 JMP	44d90a

0x44d8e7 NOPW	(%RAX,%RAX,1)

(967) 0x44d8f0 MOV	0xd0(%RSP),%RDX

(967) 0x44d8f8 LEA	0x1(%RDX),%R9

(967) 0x44d8fc CMP	0x90(%RSP),%RDX

(967) 0x44d904 JE	44db62

(967) 0x44d90a MOV	0x98(%RSP),%RAX

(967) 0x44d912 ADD	%R9,%RAX

(967) 0x44d915 MOV	%RAX,%RDX

(967) 0x44d918 MOV	0xc8(%RSP),%RSI

(967) 0x44d920 OR	%RSI,%RDX

(967) 0x44d923 SHR	$0x20,%RDX

(967) 0x44d927 MOV	%R9,0xd0(%RSP)

(967) 0x44d92f JE	44d940

(967) 0x44d931 CQTO

(967) 0x44d933 IDIV	%RSI

(967) 0x44d936 JMP	44d944

0x44d938 NOPL	(%RAX,%RAX,1)

(967) 0x44d940 XOR	%EDX,%EDX

(967) 0x44d942 DIV	%ESI

(967) 0x44d944 ADD	0xc0(%RSP),%RAX

(967) 0x44d94c ADD	0xb8(%RSP),%RDX

(967) 0x44d954 MOV	0x38(%RSP),%R8

(967) 0x44d959 IMUL	%RDX,%R8

(967) 0x44d95d MOV	0x88(%RSP),%RSI

(967) 0x44d965 ADD	%R8,%RSI

(967) 0x44d968 SUB	0x80(%RSP),%RSI

(967) 0x44d970 ADD	0x70(%RSP),%RSI

(967) 0x44d975 MOV	0x10(%RSP),%R12

(967) 0x44d97a LEA	(%R12,%RSI,8),%RDI

(967) 0x44d97e ADD	$-0x8,%RDI

(967) 0x44d982 MOV	0xa8(%RSP),%RSI

(967) 0x44d98a IMUL	%RDX,%RSI

(967) 0x44d98e ADD	(%RSP),%RSI

(967) 0x44d992 MOV	0xb0(%RSP),%RBP

(967) 0x44d99a IMUL	%RAX,%RBP

(967) 0x44d99e ADD	%RSI,%RBP

(967) 0x44d9a1 MOV	0x40(%RSP),%R9

(967) 0x44d9a6 LEA	(%R9,%RBP,8),%RSI

(967) 0x44d9aa CMP	%RSI,%RDI

(967) 0x44d9ad SETAE	%BL

(967) 0x44d9b0 MOV	%RBP,0xd8(%RSP)

(967) 0x44d9b8 MOV	%RBP,%RDI

(967) 0x44d9bb ADD	%R13,%RDI

(967) 0x44d9be LEA	(%R9,%RDI,8),%R9

(967) 0x44d9c2 ADD	$-0x8,%R9

(967) 0x44d9c6 ADD	0x60(%RSP),%R8

(967) 0x44d9cb MOV	%R8,%RDI

(967) 0x44d9ce SUB	0x78(%RSP),%RDI

(967) 0x44d9d3 ADD	0x68(%RSP),%RDI

(967) 0x44d9d8 LEA	(%R12,%RDI,8),%RDI

(967) 0x44d9dc CMP	%RDI,%R9

(967) 0x44d9df SETAE	%BPL

(967) 0x44d9e3 IMUL	0xa0(%RSP),%RAX

(967) 0x44d9ec ADD	0x8(%RSP),%RAX

(967) 0x44d9f1 MOV	0x30(%RSP),%RDI

(967) 0x44d9f6 ADD	%RAX,%RDI

(967) 0x44d9f9 LEA	(%R15,%RDI,8),%RDI

(967) 0x44d9fd ADD	$-0x8,%RDI

(967) 0x44da01 CMP	%RSI,%RDI

(967) 0x44da04 SETB	%DIL

(967) 0x44da08 LEA	(%R15,%RAX,8),%R12

(967) 0x44da0c CMP	%R12,%R9

(967) 0x44da0f SETB	%R9B

(967) 0x44da13 TEST	%BPL,%BL

(967) 0x44da16 JNE	44db10

(967) 0x44da1c OR	%R9B,%DIL

(967) 0x44da1f JE	44db10

(967) 0x44da25 IMUL	0x20(%RSP),%RDX

(967) 0x44da2b ADD	0x28(%RSP),%RDX

(967) 0x44da30 XOR	%R9D,%R9D

(967) 0x44da33 JMP	44da58

0x44da35 NOPW	%CS:(%RAX,%RAX,1)

  (970) 0x44da40 LEA	0x1(%R9),%RDI

  (970) 0x44da44 ADD	%R11,%RDX

  (970) 0x44da47 ADD	0x48(%RSP),%R8

  (970) 0x44da4c CMP	%R10,%R9

  (970) 0x44da4f MOV	%RDI,%R9

  (970) 0x44da52 JE	44d8f0

  (970) 0x44da58 TEST	%R14,%R14

  (970) 0x44da5b JLE	44da40

  (970) 0x44da5d LEA	(%RAX,%R9,1),%RDI

  (970) 0x44da61 MOVSD	(%R15,%RDI,8),%XMM0

  (970) 0x44da67 TEST	%RCX,%RCX

  (970) 0x44da6a JE	44dab0

  (970) 0x44da6c MOVAPD	%XMM0,%XMM1

  (970) 0x44da70 UNPCKLPD	%XMM0,%XMM1

  (970) 0x44da74 XOR	%EDI,%EDI

  (970) 0x44da76 NOPW	%CS:(%RAX,%RAX,1)

    (972) 0x44da80 MOVUPD	(%RDX,%RDI,8),%XMM2

    (972) 0x44da85 MULPD	%XMM1,%XMM2

    (972) 0x44da89 MOVUPD	(%RSI,%RDI,8),%XMM3

    (972) 0x44da8e ADDPD	%XMM2,%XMM3

    (972) 0x44da92 MOVUPD	%XMM3,(%RSI,%RDI,8)

    (972) 0x44da97 ADD	$0x2,%RDI

    (972) 0x44da9b CMP	%RCX,%RDI

    (972) 0x44da9e JB	44da80

  (970) 0x44daa0 MOV	%RCX,%RBX

  (970) 0x44daa3 CMP	%RCX,%R13

  (970) 0x44daa6 JE	44da40

  (970) 0x44daa8 JMP	44dab2

0x44daaa NOPW	(%RAX,%RAX,1)

  (970) 0x44dab0 XOR	%EBX,%EBX

  (970) 0x44dab2 MOV	%R13,%RDI

  (970) 0x44dab5 SUB	%RBX,%RDI

  (970) 0x44dab8 MOV	0xd8(%RSP),%R12

  (970) 0x44dac0 ADD	%RBX,%R12

  (970) 0x44dac3 MOV	0x40(%RSP),%RBP

  (970) 0x44dac8 LEA	(%RBP,%R12,8),%RBP

  (970) 0x44dacd ADD	%R8,%RBX

  (970) 0x44dad0 MOV	0x10(%RSP),%R12

  (970) 0x44dad5 LEA	(%R12,%RBX,8),%R12

  (970) 0x44dad9 XOR	%EBX,%EBX

  (970) 0x44dadb NOPL	(%RAX,%RAX,1)

    (971) 0x44dae0 MOVSD	(%R12,%RBX,8),%XMM1

    (971) 0x44dae6 MULSD	%XMM0,%XMM1

    (971) 0x44daea ADDSD	(%RBP,%RBX,8),%XMM1

    (971) 0x44daf0 MOVSD	%XMM1,(%RBP,%RBX,8)

    (971) 0x44daf6 INC	%RBX

    (971) 0x44daf9 CMP	%RBX,%RDI

    (971) 0x44dafc JNE	44dae0

  (970) 0x44dafe JMP	44da40

0x44db03 NOPW	%CS:(%RAX,%RAX,1)

(967) 0x44db10 IMUL	0x20(%RSP),%RDX

(967) 0x44db16 ADD	0x28(%RSP),%RDX

(967) 0x44db1b XOR	%R8D,%R8D

(967) 0x44db1e JMP	44db33

  (968) 0x44db20 LEA	0x1(%R8),%RDI

  (968) 0x44db24 ADD	%R11,%RDX

  (968) 0x44db27 CMP	%R10,%R8

  (968) 0x44db2a MOV	%RDI,%R8

  (968) 0x44db2d JE	44d8f0

  (968) 0x44db33 TEST	%R14,%R14

  (968) 0x44db36 JLE	44db20

  (968) 0x44db38 LEA	(%RAX,%R8,1),%RDI

  (968) 0x44db3c XOR	%R9D,%R9D

  (968) 0x44db3f NOP

    (969) 0x44db40 MOVSD	(%RDX,%R9,8),%XMM0

    (969) 0x44db46 MULSD	(%R15,%RDI,8),%XMM0

    (969) 0x44db4c ADDSD	(%RSI,%R9,8),%XMM0

    (969) 0x44db52 MOVSD	%XMM0,(%RSI,%R9,8)

    (969) 0x44db58 INC	%R9

    (969) 0x44db5b CMP	%R9,%R13

    (969) 0x44db5e JNE	44db40

  (968) 0x44db60 JMP	44db20

0x44db62 LEA	0xb67a7(%RIP),%RDI

0x44db69 MOV	0x18(%RSP),%ESI

0x44db6d ADD	$0xe8,%RSP

0x44db74 POP	%RBX

0x44db75 POP	%R12

0x44db77 POP	%R13

0x44db79 POP	%R14

0x44db7b POP	%R15

0x44db7d POP	%RBP

0x44db7e JMP	403050

0x44db83 ADD	$0xe8,%RSP

0x44db8a POP	%RBX

0x44db8b POP	%R12

0x44db8d POP	%R13

0x44db8f POP	%R14

0x44db91 POP	%R15

0x44db93 POP	%RBP

0x44db94 RET

0x44db95 NOPW	%CS:(%RAX,%RAX,1)

Coverage (%)	Name	Module
►87.44+	__kmp_invoke_microtask	libiomp5.so
○	__kmp_invoke_task_func	libiomp5.so
○	__kmp_launch_thread	libiomp5.so
○	_INTERNALea951ae6::__kmp_launc[...]	libiomp5.so
○	start_thread	libc.so.6
○	__GI___clone3	libc.so.6
►7.78+	__kmp_invoke_microtask	libiomp5.so
○	__kmp_invoke_task_func	libiomp5.so
○	__kmp_launch_thread	libiomp5.so
○	_INTERNALea951ae6::__kmp_launc[...]	libiomp5.so
►2.83+	__kmp_invoke_microtask	libiomp5.so
○	__kmp_invoke_task_func	libiomp5.so
○	__kmp_fork_call	libiomp5.so
○	__kmpc_fork_call	libiomp5.so
○	Kripke::Kernel::LPlusTimes(Kri[...]	exec
○	Kripke::SteadyStateSolver(Krip[...]	exec
○	main	exec
○	__libc_start_call_main	libc.so.6
○	__libc_start_main	libc.so.6
○	_start	exec
►1.07+	__kmp_invoke_microtask	libiomp5.so
○	__kmp_invoke_task_func	libiomp5.so
○	__kmp_launch_thread	libiomp5.so
○	_INTERNALea951ae6::__kmp_launc[...]	libiomp5.so
○	start_thread	libc.so.6

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run icx_0

Source file and lines
Module	exec

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Vectorization

Your function is not vectorized. Only 11% of vector register length is used (average across all SSE/AVX instructions). By vectorizing your function, you can lower the cost of an iteration from 15.88 to 1.31 cycles (12.10x speedup).

Details

All SSE/AVX instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

__kmpc_for_static_init_8@plt: 1 occurrences►

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

CMOVG: 2 occurrences►
CMOVLE: 1 occurrences►

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 200 bytes. The binary function is storing 216 bytes.

General properties

nb instructions	129
nb uops	127
loop length	628
used x86 registers	16
used mmx registers	0
used xmm registers	0
used ymm registers	0
used zmm registers	0
nb stack references	30

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	15.88 cycles
front end	15.88 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	8.33	8.33	8.33	8.33	8.33	8.33	13.75	13.75	13.75	13.75	0.00	0.00	0.00	0.00	0.00	0.00
cycles	8.33	8.33	8.33	8.33	8.33	8.33	13.75	13.75	13.75	13.75	0.00	0.00	0.00	0.00	0.00	0.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	15.88
Dispatch	13.75
Overall L1	15.88

Vectorization ratios

all	0%
load	0%
store	0%
mul	0%
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Vector efficiency ratios

all	11%
load	12%
store	11%
mul	12%
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	11%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 15.88 cycles. At this rate:

4% of peak load performance is reached (12.60 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
10% of peak store performance is reached (13.61 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Performance is limited by instruction throughput (loading/decoding program instructions to execution core) (front-end is a bottleneck). By removing all these bottlenecks, you can lower the cost of an iteration from 15.88 to 13.75 cycles (1.15x speedup).

ASM code

In the binary file, the address of the function is: 44d6e0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB $0xe8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOVL $0,0x1c(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
TEST %R9,%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JS 44db83 <_ZNK14LPlusTimesSdomclIN6Kripke11ArchLayoutTINS1_12ArchT_OpenMPENS1_11LayoutT_DGZEEEEEvT_NS1_6SdomIdERKNS1_4Core3SetESB_SB_SB_RNS8_5FieldIdJNS1_6MomentENS1_5GroupENS1_4ZoneEEEERNSC_IdJNS1_9DirectionESE_SF_EEERNSC_IdJSI_SD_EEE.extracted+0x4a3>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV %RDX,0xc8(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV (%R8),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RAX,0xc0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x10(%R8),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RAX,0x8(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x18(%R8),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (12.5%)
MOV 0x20(%R8),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RAX,0xb8(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x30(%R8),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RAX,(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x38(%R8),%R14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (12.5%)
MOV 0x48(%R8),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RAX,0x40(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x68(%R8),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RAX,0xb0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x70(%R8),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RAX,0xa8(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0xb0(%R8),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (12.5%)
MOV 0xc8(%R8),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RAX,0xa0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0xf8(%R8),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RAX,0x10(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV (%RDI),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %R9,0x50(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x118(%R8),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RAX,0x48(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x120(%R8),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RAX,0x38(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOVQ $0,0x58(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
MOVQ $0x1,0xe0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
SUB $0x8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
LEA 0xe8(%RSP),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA 0xb6b2c(%RIP),%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA 0x24(%RSP),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA 0x60(%RSP),%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA 0x58(%RSP),%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
MOV %ESI,0x20(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
MOV $0x22,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RAX	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CALL 403130 <__kmpc_for_static_init_8@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0.50	N/A
ADD $0x20,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV 0x58(%RSP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0x50(%RSP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RAX,0x98(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
SUB %RAX,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV %RCX,0x90(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
JB 44db62 <_ZNK14LPlusTimesSdomclIN6Kripke11ArchLayoutTINS1_12ArchT_OpenMPENS1_11LayoutT_DGZEEEEEvT_NS1_6SdomIdERKNS1_4Core3SetESB_SB_SB_RNS8_5FieldIdJNS1_6MomentENS1_5GroupENS1_4ZoneEEEERNSC_IdJNS1_9DirectionESE_SF_EEERNSC_IdJSI_SD_EEE.extracted+0x482>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
SUB 0x8(%RSP),%RBX	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	1	0.25	scal (12.5%)
SUB (%RSP),%R14	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	1	0.25	scal (12.5%)
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
TEST %R14,%R14	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
MOV $0,%R13D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
CMOVG %R14,%R13	2	0.33	0.33	0.33	0.33	0.33	0.33	0	0	0	0	1	0.33	N/A
TEST %RBX,%RBX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
CMOVLE %RAX,%RBX	2	0.33	0.33	0.33	0.33	0.33	0.33	0	0	0	0	1	0.33	scal (12.5%)
MOV %RBX,0x30(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
JLE 44db62 <_ZNK14LPlusTimesSdomclIN6Kripke11ArchLayoutTINS1_12ArchT_OpenMPENS1_11LayoutT_DGZEEEEEvT_NS1_6SdomIdERKNS1_4Core3SetESB_SB_SB_RNS8_5FieldIdJNS1_6MomentENS1_5GroupENS1_4ZoneEEEERNSC_IdJNS1_9DirectionESE_SF_EEERNSC_IdJSI_SD_EEE.extracted+0x482>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV (%RSP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
LEA (%RSI,%R13,1),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
MOV 0x8(%RSP),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0x48(%RSP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
IMUL %RDI,%R8	1	0.33	0.33	0.33	0	0	0	0	0	0	0	3	0.33	N/A
XOR %R9D,%R9D	1	0	0	0	0	0	0	0	0	0	0	0	0.25	scal (6.3%)
TEST %RDI,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
MOV $0,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
CMOVG %RDI,%RDX	2	0.33	0.33	0.33	0.33	0.33	0.33	0	0	0	0	1	0.33	N/A
MOV $0,%R10D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
CMOVS %RDI,%R10	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
MOV 0x30(%RSP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RCX,%R11	1	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
MOV %RDX,0x80(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
IMUL %RDX,%R11	1	0.33	0.33	0.33	0	0	0	0	0	0	0	3	0.33	scal (12.5%)
MOV %R11,0x70(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %RCX,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R10,0x78(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
IMUL %R10,%RDX	1	0.33	0.33	0.33	0	0	0	0	0	0	0	3	0.33	N/A
MOV %RDX,0x68(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
LEA -0x1(%RCX),%R10	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
MOV $0x7ffffffffffffffe,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
AND %R13,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
LEA (,%RSI,8),%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA (%RDX,%R8,8),%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
ADD 0x10(%RSP),%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	1	0.25	N/A
MOV %RDX,0x28(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x38(%RSP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
LEA (,%RDX,8),%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
MOV %RDX,0x20(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
LEA (%RSI,%R8,1),%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
MOV %RDX,0x60(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
ADD %RAX,%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV %R8,0x88(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
LEA (,%RDI,8),%R11	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
JMP 44d90a <_ZNK14LPlusTimesSdomclIN6Kripke11ArchLayoutTINS1_12ArchT_OpenMPENS1_11LayoutT_DGZEEEEEvT_NS1_6SdomIdERKNS1_4Core3SetESB_SB_SB_RNS8_5FieldIdJNS1_6MomentENS1_5GroupENS1_4ZoneEEEERNSC_IdJNS1_9DirectionESE_SF_EEERNSC_IdJSI_SD_EEE.extracted+0x22a>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	1	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
LEA 0xb67a7(%RIP),%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
MOV 0x18(%RSP),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
ADD $0xe8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
JMP 403050 <__kmpc_for_static_fini@plt>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	1	N/A
ADD $0xe8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
RET	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run icx_0

Source file and lines
Module	exec

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Vectorization

Details

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

__kmpc_for_static_init_8@plt: 1 occurrences►

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

CMOVG: 2 occurrences►
CMOVLE: 1 occurrences►

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 200 bytes. The binary function is storing 216 bytes.

General properties

nb instructions	129
nb uops	127
loop length	628
used x86 registers	16
used mmx registers	0
used xmm registers	0
used ymm registers	0
used zmm registers	0
nb stack references	30

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	15.88 cycles
front end	15.88 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	8.33	8.33	8.33	8.33	8.33	8.33	13.75	13.75	13.75	13.75	0.00	0.00	0.00	0.00	0.00	0.00
cycles	8.33	8.33	8.33	8.33	8.33	8.33	13.75	13.75	13.75	13.75	0.00	0.00	0.00	0.00	0.00	0.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	15.88
Dispatch	13.75
Overall L1	15.88

Vectorization ratios

all	0%
load	0%
store	0%
mul	0%
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Vector efficiency ratios

all	11%
load	12%
store	11%
mul	12%
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	11%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 15.88 cycles. At this rate:

4% of peak load performance is reached (12.60 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
10% of peak store performance is reached (13.61 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

ASM code

In the binary file, the address of the function is: 44d6e0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB $0xe8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOVL $0,0x1c(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
TEST %R9,%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JS 44db83 <_ZNK14LPlusTimesSdomclIN6Kripke11ArchLayoutTINS1_12ArchT_OpenMPENS1_11LayoutT_DGZEEEEEvT_NS1_6SdomIdERKNS1_4Core3SetESB_SB_SB_RNS8_5FieldIdJNS1_6MomentENS1_5GroupENS1_4ZoneEEEERNSC_IdJNS1_9DirectionESE_SF_EEERNSC_IdJSI_SD_EEE.extracted+0x4a3>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV %RDX,0xc8(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV (%R8),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RAX,0xc0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x10(%R8),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RAX,0x8(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x18(%R8),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (12.5%)
MOV 0x20(%R8),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RAX,0xb8(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x30(%R8),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RAX,(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x38(%R8),%R14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (12.5%)
MOV 0x48(%R8),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RAX,0x40(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x68(%R8),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RAX,0xb0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x70(%R8),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RAX,0xa8(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0xb0(%R8),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (12.5%)
MOV 0xc8(%R8),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RAX,0xa0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0xf8(%R8),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RAX,0x10(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV (%RDI),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %R9,0x50(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x118(%R8),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RAX,0x48(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x120(%R8),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RAX,0x38(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOVQ $0,0x58(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
MOVQ $0x1,0xe0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
SUB $0x8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
LEA 0xe8(%RSP),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA 0xb6b2c(%RIP),%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA 0x24(%RSP),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA 0x60(%RSP),%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA 0x58(%RSP),%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
MOV %ESI,0x20(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
MOV $0x22,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RAX	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CALL 403130 <__kmpc_for_static_init_8@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0.50	N/A
ADD $0x20,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV 0x58(%RSP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0x50(%RSP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RAX,0x98(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
SUB %RAX,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV %RCX,0x90(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
JB 44db62 <_ZNK14LPlusTimesSdomclIN6Kripke11ArchLayoutTINS1_12ArchT_OpenMPENS1_11LayoutT_DGZEEEEEvT_NS1_6SdomIdERKNS1_4Core3SetESB_SB_SB_RNS8_5FieldIdJNS1_6MomentENS1_5GroupENS1_4ZoneEEEERNSC_IdJNS1_9DirectionESE_SF_EEERNSC_IdJSI_SD_EEE.extracted+0x482>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
SUB 0x8(%RSP),%RBX	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	1	0.25	scal (12.5%)
SUB (%RSP),%R14	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	1	0.25	scal (12.5%)
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
TEST %R14,%R14	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
MOV $0,%R13D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
CMOVG %R14,%R13	2	0.33	0.33	0.33	0.33	0.33	0.33	0	0	0	0	1	0.33	N/A
TEST %RBX,%RBX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
CMOVLE %RAX,%RBX	2	0.33	0.33	0.33	0.33	0.33	0.33	0	0	0	0	1	0.33	scal (12.5%)
MOV %RBX,0x30(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
JLE 44db62 <_ZNK14LPlusTimesSdomclIN6Kripke11ArchLayoutTINS1_12ArchT_OpenMPENS1_11LayoutT_DGZEEEEEvT_NS1_6SdomIdERKNS1_4Core3SetESB_SB_SB_RNS8_5FieldIdJNS1_6MomentENS1_5GroupENS1_4ZoneEEEERNSC_IdJNS1_9DirectionESE_SF_EEERNSC_IdJSI_SD_EEE.extracted+0x482>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV (%RSP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
LEA (%RSI,%R13,1),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
MOV 0x8(%RSP),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0x48(%RSP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
IMUL %RDI,%R8	1	0.33	0.33	0.33	0	0	0	0	0	0	0	3	0.33	N/A
XOR %R9D,%R9D	1	0	0	0	0	0	0	0	0	0	0	0	0.25	scal (6.3%)
TEST %RDI,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
MOV $0,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
CMOVG %RDI,%RDX	2	0.33	0.33	0.33	0.33	0.33	0.33	0	0	0	0	1	0.33	N/A
MOV $0,%R10D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
CMOVS %RDI,%R10	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
MOV 0x30(%RSP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RCX,%R11	1	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
MOV %RDX,0x80(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
IMUL %RDX,%R11	1	0.33	0.33	0.33	0	0	0	0	0	0	0	3	0.33	scal (12.5%)
MOV %R11,0x70(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %RCX,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R10,0x78(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
IMUL %R10,%RDX	1	0.33	0.33	0.33	0	0	0	0	0	0	0	3	0.33	N/A
MOV %RDX,0x68(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
LEA -0x1(%RCX),%R10	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
MOV $0x7ffffffffffffffe,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
AND %R13,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
LEA (,%RSI,8),%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA (%RDX,%R8,8),%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
ADD 0x10(%RSP),%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	1	0.25	N/A
MOV %RDX,0x28(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x38(%RSP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
LEA (,%RDX,8),%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
MOV %RDX,0x20(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
LEA (%RSI,%R8,1),%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
MOV %RDX,0x60(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
ADD %RAX,%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV %R8,0x88(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
LEA (,%RDI,8),%R11	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
JMP 44d90a <_ZNK14LPlusTimesSdomclIN6Kripke11ArchLayoutTINS1_12ArchT_OpenMPENS1_11LayoutT_DGZEEEEEvT_NS1_6SdomIdERKNS1_4Core3SetESB_SB_SB_RNS8_5FieldIdJNS1_6MomentENS1_5GroupENS1_4ZoneEEEERNSC_IdJNS1_9DirectionESE_SF_EEERNSC_IdJSI_SD_EEE.extracted+0x22a>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	1	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
LEA 0xb67a7(%RIP),%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
MOV 0x18(%RSP),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
ADD $0xe8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
JMP 403050 <__kmpc_for_static_fini@plt>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	1	N/A
ADD $0xe8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
RET	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A

Name	Coverage (%)	Time (s)
▼void LPlusTimesSdom::operator() >(Kripke::ArchLayoutT, Kripke::SdomId, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Set const&, K...–	2.93	0.66
▼Loop 967 - - exec–	0.00	0.01
▼Loop 970 - - exec–	0.04	0.01
○Loop 972 - - exec	2.88	0.65
○Loop 971 - - exec	0.00	0.00
▼Loop 968 - - exec–	0.00	0.00
○Loop 969 - - exec	0.00	0.00

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Matching between your function (in the source code) and the binary function

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