OV - exec - Loop 658

	Loop Id: 658	Module: exec	Source: For.hpp:137-137 [...]	Coverage: 0.03%

0x251210 INC	%RDI

0x251213 ADD	-0x98(%RBP),%RDX

0x25121a ADD	-0x60(%RBP),%R10

0x25121e CMP	%R11,%RDI

0x251221 JE	2510e0

0x251227 MOV	-0x58(%RBP),%RSI

0x25122b LEA	(%RDI,%RSI,1),%RBX

0x25122f MOV	%RBX,%R8

0x251232 IMUL	-0x90(%RBP),%R8

0x25123a ADD	-0x168(%RBP),%R8

0x251241 CMPB	$0,-0x29(%RBP)

0x251245 JE	251330

0x25124b MOV	-0x98(%RBP),%R9

0x251252 IMUL	%RDI,%R9

0x251256 MOV	-0x130(%RBP),%RSI

0x25125d LEA	(%RSI,%R9,1),%R12

0x251261 MOV	-0x40(%RBP),%RSI

0x251265 ADD	%RSI,%R12

0x251268 ADD	-0x138(%RBP),%R9

0x25126f ADD	%RSI,%R9

0x251272 MOV	-0x140(%RBP),%RSI

0x251279 LEA	(%RSI,%RDI,8),%R13

0x25127d ADD	%R14,%R13

0x251280 MOV	-0x158(%RBP),%RSI

0x251287 LEA	(%RSI,%RDI,8),%RSI

0x25128b ADD	%R14,%RSI

0x25128e MOV	-0x150(%RBP),%R15

0x251295 CMP	%R13,%R15

0x251298 SETB	%R11B

0x25129c MOV	-0x148(%RBP),%R13

0x2512a3 CMP	%R13,%RSI

0x2512a6 SETB	%SIL

0x2512aa CMP	%R12,%R15

0x2512ad SETB	%R12B

0x2512b1 CMP	%R13,%R9

0x2512b4 SETB	%R13B

0x2512b8 TEST	%SIL,%R11B

0x2512bb JNE	251402

0x2512c1 MOV	$0,%R9D

0x2512c7 AND	%R13B,%R12B

0x2512ca MOV	-0x88(%RBP),%R11

0x2512d1 JNE	251333

0x2512d3 MOVSD	(%R14,%R8,8),%XMM0

0x2512d9 UNPCKLPD	%XMM0,%XMM0

0x2512dd XOR	%R9D,%R9D

  (660) 0x2512e0 MOVUPD	-0x10(%RDX,%R9,8),%XMM1

  (660) 0x2512e7 MOVUPD	(%RDX,%R9,8),%XMM2

  (660) 0x2512ed MOVUPD	-0x10(%RAX,%R9,8),%XMM3

  (660) 0x2512f4 MOVUPD	(%RAX,%R9,8),%XMM4

  (660) 0x2512fa MULPD	%XMM0,%XMM1

  (660) 0x2512fe ADDPD	%XMM3,%XMM1

  (660) 0x251302 MULPD	%XMM0,%XMM2

  (660) 0x251306 ADDPD	%XMM4,%XMM2

  (660) 0x25130a MOVUPD	%XMM1,-0x10(%RAX,%R9,8)

  (660) 0x251311 MOVUPD	%XMM2,(%RAX,%R9,8)

  (660) 0x251317 ADD	$0x4,%R9

  (660) 0x25131b CMP	%R9,%RCX

  (660) 0x25131e JNE	2512e0

0x251320 MOV	%RCX,%R9

0x251323 CMP	%RCX,-0x48(%RBP)

0x251327 JE	251210

0x25132d JMP	251333

0x251330 XOR	%R9D,%R9D

0x251333 MOV	-0x48(%RBP),%RSI

0x251337 SUB	%R9D,%ESI

0x25133a MOV	%R9,%R12

0x25133d TEST	$0x1,%SIL

0x251341 JE	251382

0x251343 IMUL	-0x60(%RBP),%RBX

0x251348 ADD	-0x128(%RBP),%RBX

0x25134f MOV	-0x38(%RBP),%RSI

0x251353 ADD	%R9,%RSI

0x251356 MOVSD	(%R14,%R8,8),%XMM0

0x25135c ADD	%RSI,%RBX

0x25135f ADD	-0x120(%RBP),%RSI

0x251366 MOV	-0x40(%RBP),%R15

0x25136a MULSD	(%R15,%RBX,8),%XMM0

0x251370 MOV	-0x50(%RBP),%RBX

0x251374 ADDSD	(%RBX,%RSI,8),%XMM0

0x251379 MOVSD	%XMM0,(%RBX,%RSI,8)

0x25137e LEA	0x1(%R9),%R12

0x251382 MOV	-0x160(%RBP),%RSI

0x251389 SUB	%R9,%RSI

0x25138c JE	251210

0x251392 MOV	-0x48(%RBP),%R9

0x251396 SUB	%R12,%R9

0x251399 MOV	-0x118(%RBP),%RSI

0x2513a0 ADD	%R12,%RSI

0x2513a3 MOV	-0x110(%RBP),%RBX

0x2513aa LEA	(%RBX,%RSI,8),%RBX

0x2513ae ADD	%R10,%R12

0x2513b1 MOV	-0x40(%RBP),%RSI

0x2513b5 LEA	(%RSI,%R12,8),%R13

0x2513b9 XOR	%R12D,%R12D

0x2513bc NOPL	(%RAX)

  (659) 0x2513c0 MOVSD	(%R14,%R8,8),%XMM0

  (659) 0x2513c6 MULSD	(%R13,%R12,8),%XMM0

  (659) 0x2513cd ADDSD	-0x8(%RBX,%R12,8),%XMM0

  (659) 0x2513d4 MOVSD	%XMM0,-0x8(%RBX,%R12,8)

  (659) 0x2513db MOVSD	(%R14,%R8,8),%XMM0

  (659) 0x2513e1 MULSD	0x8(%R13,%R12,8),%XMM0

  (659) 0x2513e8 ADDSD	(%RBX,%R12,8),%XMM0

  (659) 0x2513ee MOVSD	%XMM0,(%RBX,%R12,8)

  (659) 0x2513f4 ADD	$0x2,%R12

  (659) 0x2513f8 CMP	%R12,%R9

  (659) 0x2513fb JNE	2513c0

0x2513fd JMP	251210

0x251402 XOR	%R9D,%R9D

0x251405 MOV	-0x88(%RBP),%R11

0x25140c JMP	251333

/home/eoseret/qaas_runs_ZEN5/173-940-2141/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/pattern/kernel/For.hpp: 137 - 137

--------------------------------------------------------------------------------

137:     for (decltype(distance_it) i = 0; i < distance_it; ++i) {

/home/eoseret/qaas_runs_ZEN5/173-940-2141/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/internal/Iterators.hpp: 269 - 269

--------------------------------------------------------------------------------

269:     return value_type(val + rhs);

/home/eoseret/qaas_runs_ZEN5/173-940-2141/intel/Kripke/build/Kripke/src/Kripke/Kernel/LTimes.cpp: 62 - 62

--------------------------------------------------------------------------------

62:            phi(nm,g,z) += ell(nm, d) * psi(d, g, z);

/home/eoseret/qaas_runs_ZEN5/173-940-2141/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/util/Operators.hpp: 334 - 334

--------------------------------------------------------------------------------

334:     return Ret{lhs} + rhs;

Coverage (%)	Name	Source Location	Module

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Metric	Value
CQA speedup if no scalar integer	4.47
CQA speedup if FP arith vectorized	3.06
CQA speedup if fully vectorized	26.15
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.20
Bottlenecks	micro-operation queue,
Function	void RAJA::internal::StatementExecutor, RAJA::statement::For<1l, RAJA::policy::sequential::seq_exec, RAJA::statement::For<3l, RAJA::policy::sequential::seq_exec, RAJA::statement::Lambda<0l> > > >, RAJA::internal::LoopTypes, camp::list > >::exec, long>, RAJA::Span, long>, RAJA::Span, long>, RAJA::Span, long> >, camp::tuple<>, camp::resources::v1::Host, LTimesSdom::operator() >(Kripke::ArchLayoutT, Kripke::SdomId, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&) const::{lambda(Kripke::Moment, Kripke::Direction, Kripke::Group, Kripke::Zone)#1}>&>(RAJA::internal::LoopData, long>, RAJA::Span, long>, RAJA::Span, long>, RAJA::Span, long> >, camp::tuple<>, camp::resources::v1::Host, LTimesSdom::operator() >(Kripke::ArchLayoutT, Kripke::SdomId, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&) const::{lambda(Kripke::Moment, Kripke::Direction, Kripke::Group, Kripke::Zone)#1}>&) [clone .omp_outlined]
Source	For.hpp:137-137,Iterators.hpp:269-269,LTimes.cpp:62-62,Operators.hpp:334-334
Source loop unroll info	NA
Source loop unroll confidence level	NA
Unroll/vectorization loop type	NA
Unroll factor	NA
CQA cycles	10.63
CQA cycles if no scalar integer	2.38
CQA cycles if FP arith vectorized	3.47
CQA cycles if fully vectorized	0.41
Front-end cycles	10.63
P0 cycles	8.83
P1 cycles	8.83
P2 cycles	8.83
P3 cycles	8.83
P4 cycles	8.83
P5 cycles	8.83
P6 cycles	8.50
P7 cycles	8.50
P8 cycles	8.50
P9 cycles	8.50
P10 cycles	0.75
P11 cycles	0.75
P12 cycles	0.75
P13 cycles	0.75
P14 cycles	0.50
P15 cycles	0.50
DIV/SQRT cycles	0.00
Inter-iter dependencies cycles	NA
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	86.00
Nb uops	85.00
Nb loads	33.00
Nb stores	1.00
Nb stack references	22.00
FLOP/cycle	0.19
Nb FLOP add-sub	1.00
Nb FLOP mul	1.00
Nb FLOP fma	0.00
Nb FLOP div	0.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	0.00
Nb FLOP rsqrt	0.00
Bytes/cycle	24.94
Bytes prefetched	0.00
Bytes loaded	257.00
Bytes stored	8.00
Stride 0	NA
Stride 1	NA
Stride n	NA
Stride unknown	NA
Stride indirect	NA
Vectorization ratio all	0.00
Vectorization ratio load	0.00
Vectorization ratio store	0.00
Vectorization ratio mul	0.00
Vectorization ratio add_sub	0.00
Vectorization ratio fma	NA
Vectorization ratio div_sqrt	NA
Vectorization ratio other	0.00
Vector-efficiency ratio all	11.89
Vector-efficiency ratio load	11.41
Vector-efficiency ratio store	12.50
Vector-efficiency ratio mul	12.50
Vector-efficiency ratio add_sub	12.50
Vector-efficiency ratio fma	NA
Vector-efficiency ratio div_sqrt	NA
Vector-efficiency ratio other	11.13

Metric	Value
CQA speedup if no scalar integer	4.47
CQA speedup if FP arith vectorized	3.06
CQA speedup if fully vectorized	26.15
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.20
Bottlenecks	micro-operation queue,
Function	void RAJA::internal::StatementExecutor, RAJA::statement::For<1l, RAJA::policy::sequential::seq_exec, RAJA::statement::For<3l, RAJA::policy::sequential::seq_exec, RAJA::statement::Lambda<0l> > > >, RAJA::internal::LoopTypes, camp::list > >::exec, long>, RAJA::Span, long>, RAJA::Span, long>, RAJA::Span, long> >, camp::tuple<>, camp::resources::v1::Host, LTimesSdom::operator() >(Kripke::ArchLayoutT, Kripke::SdomId, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&) const::{lambda(Kripke::Moment, Kripke::Direction, Kripke::Group, Kripke::Zone)#1}>&>(RAJA::internal::LoopData, long>, RAJA::Span, long>, RAJA::Span, long>, RAJA::Span, long> >, camp::tuple<>, camp::resources::v1::Host, LTimesSdom::operator() >(Kripke::ArchLayoutT, Kripke::SdomId, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&) const::{lambda(Kripke::Moment, Kripke::Direction, Kripke::Group, Kripke::Zone)#1}>&) [clone .omp_outlined]
Source	For.hpp:137-137,Iterators.hpp:269-269,LTimes.cpp:62-62,Operators.hpp:334-334
Source loop unroll info	NA
Source loop unroll confidence level	NA
Unroll/vectorization loop type	NA
Unroll factor	NA
CQA cycles	10.63
CQA cycles if no scalar integer	2.38
CQA cycles if FP arith vectorized	3.47
CQA cycles if fully vectorized	0.41
Front-end cycles	10.63
P0 cycles	8.83
P1 cycles	8.83
P2 cycles	8.83
P3 cycles	8.83
P4 cycles	8.83
P5 cycles	8.83
P6 cycles	8.50
P7 cycles	8.50
P8 cycles	8.50
P9 cycles	8.50
P10 cycles	0.75
P11 cycles	0.75
P12 cycles	0.75
P13 cycles	0.75
P14 cycles	0.50
P15 cycles	0.50
DIV/SQRT cycles	0.00
Inter-iter dependencies cycles	NA
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	86.00
Nb uops	85.00
Nb loads	33.00
Nb stores	1.00
Nb stack references	22.00
FLOP/cycle	0.19
Nb FLOP add-sub	1.00
Nb FLOP mul	1.00
Nb FLOP fma	0.00
Nb FLOP div	0.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	0.00
Nb FLOP rsqrt	0.00
Bytes/cycle	24.94
Bytes prefetched	0.00
Bytes loaded	257.00
Bytes stored	8.00
Stride 0	NA
Stride 1	NA
Stride n	NA
Stride unknown	NA
Stride indirect	NA
Vectorization ratio all	0.00
Vectorization ratio load	0.00
Vectorization ratio store	0.00
Vectorization ratio mul	0.00
Vectorization ratio add_sub	0.00
Vectorization ratio fma	NA
Vectorization ratio div_sqrt	NA
Vectorization ratio other	0.00
Vector-efficiency ratio all	11.89
Vector-efficiency ratio load	11.41
Vector-efficiency ratio store	12.50
Vector-efficiency ratio mul	12.50
Vector-efficiency ratio add_sub	12.50
Vector-efficiency ratio fma	NA
Vector-efficiency ratio div_sqrt	NA
Vector-efficiency ratio other	11.13

Path /

Average path: Display a virtual path defined by average values of all real paths

Function	void RAJA::internal::StatementExecutor, RAJA::statement::For<1l, RAJA::policy::sequential::seq_exec, RAJA::statement::For<3l, RAJA::policy::sequential::seq_exec, RAJA::statement::Lambda<0l> > > >, RAJA::internal::LoopTypes, camp::list > >::exec, long>, RAJA::Span, long>, RAJA::Span, long>, RAJA::Span, long> >, camp::tuple<>, camp::resources::v1::Host, LTimesSdom::operator() >(Kripke::ArchLayoutT, Kripke::SdomId, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&) const::{lambda(Kripke::Moment, Kripke::Direction, Kripke::Group, Kripke::Zone)#1}>&>(RAJA::internal::LoopData, long>, RAJA::Span, long>, RAJA::Span, long>, RAJA::Span, long> >, camp::tuple<>, camp::resources::v1::Host, LTimesSdom::operator() >(Kripke::ArchLayoutT, Kripke::SdomId, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&) const::{lambda(Kripke::Moment, Kripke::Direction, Kripke::Group, Kripke::Zone)#1}>&) [clone .omp_outlined]
Source file and lines	For.hpp:137-137
Module	exec

The loop is defined in:

/home/eoseret/qaas_runs_ZEN5/173-940-2141/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/pattern/kernel/For.hpp:137
/home/eoseret/qaas_runs_ZEN5/173-940-2141/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/internal/Iterators.hpp:269
/home/eoseret/qaas_runs_ZEN5/173-940-2141/intel/Kripke/build/Kripke/src/Kripke/Kernel/LTimes.cpp:62
/home/eoseret/qaas_runs_ZEN5/173-940-2141/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/util/Operators.hpp:334

Warnings:

Non-innermost loop: analyzing only self part (ignoring child loops).
Ignoring paths for analysis
Too many paths. Rerun with max-paths=17
RecMII not computed since number of paths is unknown or > max_paths
Streams not analyzed since number of paths is unknown or > max_paths

Try to simplify control and/or increase the maximum number of paths per function/loop through the 'max-paths-nb' option.

This loop has 17 execution paths.

The presence of multiple execution paths is typically the main/first bottleneck.
Try to simplify control inside loop: ideally, try to remove all conditional expressions, for example by (if applicable):

hoisting them (moving them outside the loop)
turning them into conditional moves, MIN or MAX

Ex: if (x<0) x=0 => x = (x<0 ? 0 : x) (or MAX(0,x) after defining the corresponding macro)

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 10.63 to 2.38 cycles (4.47x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your loop is not vectorized. Only 11% of vector register length is used (average across all SSE/AVX instructions). By vectorizing your loop, you can lower the cost of an iteration from 10.63 to 0.41 cycles (26.15x speedup).

Details

All SSE/AVX instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized loop can use their full power.

Workaround

Try another compiler or update/tune your current one:
- recompile with ffast-math (included in Ofast) to extend loop vectorization to FP reductions.
Remove inter-iterations dependences from your loop and make it unit-stride:
- If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly: C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)
- If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

FMA

Presence of both ADD/SUB and MUL operations.

Workaround

Pass to your compiler a micro-architecture specialization option:
- use march=native
Try to change order in which elements are evaluated (using parentheses) in arithmetic expressions containing both ADD/SUB and MUL operations to enable your compiler to generate FMA instructions wherever possible. For instance a + b*c is a valid FMA (MUL then ADD). However (a+b)* c cannot be translated into an FMA (ADD then MUL).

Type of elements and instruction set

2 SSE or AVX instructions are processing arithmetic or math operations on double precision FP elements in scalar mode (one at a time).

Matching between your loop (in the source code) and the binary loop

The binary loop is composed of 2 FP arithmetical operations:

1: addition or subtraction
1: multiply

The binary loop is loading 257 bytes (32 double precision FP elements). The binary loop is storing 8 bytes (1 double precision FP elements).

Arithmetic intensity

Arithmetic intensity is 0.01 FP operations per loaded or stored byte.

General properties

nb instructions	86
nb uops	85
loop length	387
used x86 registers	15
used mmx registers	0
used xmm registers	1
used ymm registers	0
used zmm registers	0
nb stack references	22
ADD-SUB / MUL ratio	1.00

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	10.63 cycles
front end	10.63 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	8.83	8.83	8.83	8.83	8.83	8.83	8.50	8.50	8.50	8.50	0.75	0.75	0.75	0.75	0.50	0.50
cycles	8.83	8.83	8.83	8.83	8.83	8.83	8.50	8.50	8.50	8.50	0.75	0.75	0.75	0.75	0.50	0.50

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	10.63
Dispatch	8.83
Overall L1	10.63

Vectorization ratios

INT

all	0%
load	0%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
other	0%

all	0%
load	0%
store	0%
mul	0%
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

INT+FP

all	0%
load	0%
store	0%
mul	0%
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Vector efficiency ratios

INT

all	11%
load	10%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
other	10%

all	12%
load	12%
store	12%
mul	12%
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	12%

INT+FP

all	11%
load	11%
store	12%
mul	12%
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	11%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 10.63 cycles. At this rate:

9% of peak load performance is reached (24.19 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
0% of peak store performance is reached (0.75 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Performance is limited by instruction throughput (loading/decoding program instructions to execution core) (front-end is a bottleneck). By removing all these bottlenecks, you can lower the cost of an iteration from 10.63 to 8.83 cycles (1.20x speedup).

ASM code

In the binary file, the address of the loop is: 251227

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	Latency	Recip. throughput	Vectorization
INC %RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD -0x98(%RBP),%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	scal (12.5%)
ADD -0x60(%RBP),%R10	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	N/A
CMP %R11,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JE 2510e0 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl2EEEEJNS2_3ForILl1ENS_6policy10sequential8seq_execEJNS8_ILl3ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEENS0_9LoopTypesINS5_4listIJvvvvEEESJ_EEE4execIRNS0_8LoopDataINS5_5tupleIJNS_4SpanINS_9Iterators16numeric_iteratorIN6Kripke6MomentElPST_EElEENSP_INSR_INSS_9DirectionElPSX_EElEENSP_INSR_INSS_5GroupElPS11_EElEENSP_INSR_INSS_4ZoneElPS15_EElEEEEENSO_IJEEENS5_9resources2v14HostEJZNK10LTimesSdomclINSS_11ArchLayoutTINSS_12ArchT_OpenMPENSS_11LayoutT_DGZEEEEEvT_NSS_6SdomIdERKNSS_4Core3SetES1P_S1P_S1P_RNS1M_5FieldIdJSX_S11_S15_EEERNS1Q_IdJST_S11_S15_EEERNS1Q_IdJST_SX_EEEEUlST_SX_S11_S15_E_EEEEEvOS1K_.omp_outlined+0x250>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV -0x58(%RBP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
LEA (%RDI,%RSI,1),%RBX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %RBX,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
IMUL -0x90(%RBP),%R8	1	0.33	0.33	0.33	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.33	N/A
ADD -0x168(%RBP),%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	N/A
CMPB $0,-0x29(%RBP)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	scal (1.6%)
JE 251330 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl2EEEEJNS2_3ForILl1ENS_6policy10sequential8seq_execEJNS8_ILl3ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEENS0_9LoopTypesINS5_4listIJvvvvEEESJ_EEE4execIRNS0_8LoopDataINS5_5tupleIJNS_4SpanINS_9Iterators16numeric_iteratorIN6Kripke6MomentElPST_EElEENSP_INSR_INSS_9DirectionElPSX_EElEENSP_INSR_INSS_5GroupElPS11_EElEENSP_INSR_INSS_4ZoneElPS15_EElEEEEENSO_IJEEENS5_9resources2v14HostEJZNK10LTimesSdomclINSS_11ArchLayoutTINSS_12ArchT_OpenMPENSS_11LayoutT_DGZEEEEEvT_NSS_6SdomIdERKNSS_4Core3SetES1P_S1P_S1P_RNS1M_5FieldIdJSX_S11_S15_EEERNS1Q_IdJST_S11_S15_EEERNS1Q_IdJST_SX_EEEEUlST_SX_S11_S15_E_EEEEEvOS1K_.omp_outlined+0x4a0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV -0x98(%RBP),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
IMUL %RDI,%R9	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	N/A
MOV -0x130(%RBP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
LEA (%RSI,%R9,1),%R12	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV -0x40(%RBP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
ADD %RSI,%R12	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD -0x138(%RBP),%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	N/A
ADD %RSI,%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV -0x140(%RBP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
LEA (%RSI,%RDI,8),%R13	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ADD %R14,%R13	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV -0x158(%RBP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
LEA (%RSI,%RDI,8),%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ADD %R14,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV -0x150(%RBP),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
CMP %R13,%R15	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
SETB %R11B	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV -0x148(%RBP),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
CMP %R13,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
SETB %SIL	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP %R12,%R15	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
SETB %R12B	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP %R13,%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
SETB %R13B	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
TEST %SIL,%R11B	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JNE 251402 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl2EEEEJNS2_3ForILl1ENS_6policy10sequential8seq_execEJNS8_ILl3ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEENS0_9LoopTypesINS5_4listIJvvvvEEESJ_EEE4execIRNS0_8LoopDataINS5_5tupleIJNS_4SpanINS_9Iterators16numeric_iteratorIN6Kripke6MomentElPST_EElEENSP_INSR_INSS_9DirectionElPSX_EElEENSP_INSR_INSS_5GroupElPS11_EElEENSP_INSR_INSS_4ZoneElPS15_EElEEEEENSO_IJEEENS5_9resources2v14HostEJZNK10LTimesSdomclINSS_11ArchLayoutTINSS_12ArchT_OpenMPENSS_11LayoutT_DGZEEEEEvT_NSS_6SdomIdERKNSS_4Core3SetES1P_S1P_S1P_RNS1M_5FieldIdJSX_S11_S15_EEERNS1Q_IdJST_S11_S15_EEERNS1Q_IdJST_SX_EEEEUlST_SX_S11_S15_E_EEEEEvOS1K_.omp_outlined+0x572>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV $0,%R9D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
AND %R13B,%R12B	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV -0x88(%RBP),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
JNE 251333 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl2EEEEJNS2_3ForILl1ENS_6policy10sequential8seq_execEJNS8_ILl3ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEENS0_9LoopTypesINS5_4listIJvvvvEEESJ_EEE4execIRNS0_8LoopDataINS5_5tupleIJNS_4SpanINS_9Iterators16numeric_iteratorIN6Kripke6MomentElPST_EElEENSP_INSR_INSS_9DirectionElPSX_EElEENSP_INSR_INSS_5GroupElPS11_EElEENSP_INSR_INSS_4ZoneElPS15_EElEEEEENSO_IJEEENS5_9resources2v14HostEJZNK10LTimesSdomclINSS_11ArchLayoutTINSS_12ArchT_OpenMPENSS_11LayoutT_DGZEEEEEvT_NSS_6SdomIdERKNSS_4Core3SetES1P_S1P_S1P_RNS1M_5FieldIdJSX_S11_S15_EEERNS1Q_IdJST_S11_S15_EEERNS1Q_IdJST_SX_EEEEUlST_SX_S11_S15_E_EEEEEvOS1K_.omp_outlined+0x4a3>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOVSD (%R14,%R8,8),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
UNPCKLPD %XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
XOR %R9D,%R9D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV %RCX,%R9	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP %RCX,-0x48(%RBP)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	scal (12.5%)
JE 251210 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl2EEEEJNS2_3ForILl1ENS_6policy10sequential8seq_execEJNS8_ILl3ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEENS0_9LoopTypesINS5_4listIJvvvvEEESJ_EEE4execIRNS0_8LoopDataINS5_5tupleIJNS_4SpanINS_9Iterators16numeric_iteratorIN6Kripke6MomentElPST_EElEENSP_INSR_INSS_9DirectionElPSX_EElEENSP_INSR_INSS_5GroupElPS11_EElEENSP_INSR_INSS_4ZoneElPS15_EElEEEEENSO_IJEEENS5_9resources2v14HostEJZNK10LTimesSdomclINSS_11ArchLayoutTINSS_12ArchT_OpenMPENSS_11LayoutT_DGZEEEEEvT_NSS_6SdomIdERKNSS_4Core3SetES1P_S1P_S1P_RNS1M_5FieldIdJSX_S11_S15_EEERNS1Q_IdJST_S11_S15_EEERNS1Q_IdJST_SX_EEEEUlST_SX_S11_S15_E_EEEEEvOS1K_.omp_outlined+0x380>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
JMP 251333 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl2EEEEJNS2_3ForILl1ENS_6policy10sequential8seq_execEJNS8_ILl3ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEENS0_9LoopTypesINS5_4listIJvvvvEEESJ_EEE4execIRNS0_8LoopDataINS5_5tupleIJNS_4SpanINS_9Iterators16numeric_iteratorIN6Kripke6MomentElPST_EElEENSP_INSR_INSS_9DirectionElPSX_EElEENSP_INSR_INSS_5GroupElPS11_EElEENSP_INSR_INSS_4ZoneElPS15_EElEEEEENSO_IJEEENS5_9resources2v14HostEJZNK10LTimesSdomclINSS_11ArchLayoutTINSS_12ArchT_OpenMPENSS_11LayoutT_DGZEEEEEvT_NSS_6SdomIdERKNSS_4Core3SetES1P_S1P_S1P_RNS1M_5FieldIdJSX_S11_S15_EEERNS1Q_IdJST_S11_S15_EEERNS1Q_IdJST_SX_EEEEUlST_SX_S11_S15_E_EEEEEvOS1K_.omp_outlined+0x4a3>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
XOR %R9D,%R9D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV -0x48(%RBP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
SUB %R9D,%ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R9,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
TEST $0x1,%SIL	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JE 251382 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl2EEEEJNS2_3ForILl1ENS_6policy10sequential8seq_execEJNS8_ILl3ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEENS0_9LoopTypesINS5_4listIJvvvvEEESJ_EEE4execIRNS0_8LoopDataINS5_5tupleIJNS_4SpanINS_9Iterators16numeric_iteratorIN6Kripke6MomentElPST_EElEENSP_INSR_INSS_9DirectionElPSX_EElEENSP_INSR_INSS_5GroupElPS11_EElEENSP_INSR_INSS_4ZoneElPS15_EElEEEEENSO_IJEEENS5_9resources2v14HostEJZNK10LTimesSdomclINSS_11ArchLayoutTINSS_12ArchT_OpenMPENSS_11LayoutT_DGZEEEEEvT_NSS_6SdomIdERKNSS_4Core3SetES1P_S1P_S1P_RNS1M_5FieldIdJSX_S11_S15_EEERNS1Q_IdJST_S11_S15_EEERNS1Q_IdJST_SX_EEEEUlST_SX_S11_S15_E_EEEEEvOS1K_.omp_outlined+0x4f2>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
IMUL -0x60(%RBP),%RBX	1	0.33	0.33	0.33	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.33	N/A
ADD -0x128(%RBP),%RBX	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	N/A
MOV -0x38(%RBP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
ADD %R9,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVSD (%R14,%R8,8),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
ADD %RSI,%RBX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD -0x120(%RBP),%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	N/A
MOV -0x40(%RBP),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MULSD (%R15,%RBX,8),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	0	3	0.50	scal (12.5%)
MOV -0x50(%RBP),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
ADDSD (%RBX,%RSI,8),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0.50	0.50	0	0	2	0.50	scal (12.5%)
MOVSD %XMM0,(%RBX,%RSI,8)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
LEA 0x1(%R9),%R12	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV -0x160(%RBP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
SUB %R9,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JE 251210 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl2EEEEJNS2_3ForILl1ENS_6policy10sequential8seq_execEJNS8_ILl3ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEENS0_9LoopTypesINS5_4listIJvvvvEEESJ_EEE4execIRNS0_8LoopDataINS5_5tupleIJNS_4SpanINS_9Iterators16numeric_iteratorIN6Kripke6MomentElPST_EElEENSP_INSR_INSS_9DirectionElPSX_EElEENSP_INSR_INSS_5GroupElPS11_EElEENSP_INSR_INSS_4ZoneElPS15_EElEEEEENSO_IJEEENS5_9resources2v14HostEJZNK10LTimesSdomclINSS_11ArchLayoutTINSS_12ArchT_OpenMPENSS_11LayoutT_DGZEEEEEvT_NSS_6SdomIdERKNSS_4Core3SetES1P_S1P_S1P_RNS1M_5FieldIdJSX_S11_S15_EEERNS1Q_IdJST_S11_S15_EEERNS1Q_IdJST_SX_EEEEUlST_SX_S11_S15_E_EEEEEvOS1K_.omp_outlined+0x380>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV -0x48(%RBP),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
SUB %R12,%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV -0x118(%RBP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
ADD %R12,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV -0x110(%RBP),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
LEA (%RBX,%RSI,8),%RBX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ADD %R10,%R12	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV -0x40(%RBP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
LEA (%RSI,%R12,8),%R13	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
XOR %R12D,%R12D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
JMP 251210 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl2EEEEJNS2_3ForILl1ENS_6policy10sequential8seq_execEJNS8_ILl3ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEENS0_9LoopTypesINS5_4listIJvvvvEEESJ_EEE4execIRNS0_8LoopDataINS5_5tupleIJNS_4SpanINS_9Iterators16numeric_iteratorIN6Kripke6MomentElPST_EElEENSP_INSR_INSS_9DirectionElPSX_EElEENSP_INSR_INSS_5GroupElPS11_EElEENSP_INSR_INSS_4ZoneElPS15_EElEEEEENSO_IJEEENS5_9resources2v14HostEJZNK10LTimesSdomclINSS_11ArchLayoutTINSS_12ArchT_OpenMPENSS_11LayoutT_DGZEEEEEvT_NSS_6SdomIdERKNSS_4Core3SetES1P_S1P_S1P_RNS1M_5FieldIdJSX_S11_S15_EEERNS1Q_IdJST_S11_S15_EEERNS1Q_IdJST_SX_EEEEUlST_SX_S11_S15_E_EEEEEvOS1K_.omp_outlined+0x380>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
XOR %R9D,%R9D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV -0x88(%RBP),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
JMP 251333 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl2EEEEJNS2_3ForILl1ENS_6policy10sequential8seq_execEJNS8_ILl3ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEENS0_9LoopTypesINS5_4listIJvvvvEEESJ_EEE4execIRNS0_8LoopDataINS5_5tupleIJNS_4SpanINS_9Iterators16numeric_iteratorIN6Kripke6MomentElPST_EElEENSP_INSR_INSS_9DirectionElPSX_EElEENSP_INSR_INSS_5GroupElPS11_EElEENSP_INSR_INSS_4ZoneElPS15_EElEEEEENSO_IJEEENS5_9resources2v14HostEJZNK10LTimesSdomclINSS_11ArchLayoutTINSS_12ArchT_OpenMPENSS_11LayoutT_DGZEEEEEvT_NSS_6SdomIdERKNSS_4Core3SetES1P_S1P_S1P_RNS1M_5FieldIdJSX_S11_S15_EEERNS1Q_IdJST_S11_S15_EEERNS1Q_IdJST_SX_EEEEUlST_SX_S11_S15_E_EEEEEvOS1K_.omp_outlined+0x4a3>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A

Function	void RAJA::internal::StatementExecutor, RAJA::statement::For<1l, RAJA::policy::sequential::seq_exec, RAJA::statement::For<3l, RAJA::policy::sequential::seq_exec, RAJA::statement::Lambda<0l> > > >, RAJA::internal::LoopTypes, camp::list > >::exec, long>, RAJA::Span, long>, RAJA::Span, long>, RAJA::Span, long> >, camp::tuple<>, camp::resources::v1::Host, LTimesSdom::operator() >(Kripke::ArchLayoutT, Kripke::SdomId, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&) const::{lambda(Kripke::Moment, Kripke::Direction, Kripke::Group, Kripke::Zone)#1}>&>(RAJA::internal::LoopData, long>, RAJA::Span, long>, RAJA::Span, long>, RAJA::Span, long> >, camp::tuple<>, camp::resources::v1::Host, LTimesSdom::operator() >(Kripke::ArchLayoutT, Kripke::SdomId, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&) const::{lambda(Kripke::Moment, Kripke::Direction, Kripke::Group, Kripke::Zone)#1}>&) [clone .omp_outlined]
Source file and lines	For.hpp:137-137
Module	exec

The loop is defined in:

/home/eoseret/qaas_runs_ZEN5/173-940-2141/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/pattern/kernel/For.hpp:137
/home/eoseret/qaas_runs_ZEN5/173-940-2141/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/internal/Iterators.hpp:269
/home/eoseret/qaas_runs_ZEN5/173-940-2141/intel/Kripke/build/Kripke/src/Kripke/Kernel/LTimes.cpp:62
/home/eoseret/qaas_runs_ZEN5/173-940-2141/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/util/Operators.hpp:334

Warnings:

Non-innermost loop: analyzing only self part (ignoring child loops).
Ignoring paths for analysis
Too many paths. Rerun with max-paths=17
RecMII not computed since number of paths is unknown or > max_paths
Streams not analyzed since number of paths is unknown or > max_paths

hoisting them (moving them outside the loop)
turning them into conditional moves, MIN or MAX

Ex: if (x<0) x=0 => x = (x<0 ? 0 : x) (or MAX(0,x) after defining the corresponding macro)

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 10.63 to 2.38 cycles (4.47x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

All SSE/AVX instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized loop can use their full power.

Workaround

Try another compiler or update/tune your current one:
- recompile with ffast-math (included in Ofast) to extend loop vectorization to FP reductions.
Remove inter-iterations dependences from your loop and make it unit-stride:
- If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly: C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)
- If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

FMA

Presence of both ADD/SUB and MUL operations.

Workaround

Pass to your compiler a micro-architecture specialization option:
- use march=native
Try to change order in which elements are evaluated (using parentheses) in arithmetic expressions containing both ADD/SUB and MUL operations to enable your compiler to generate FMA instructions wherever possible. For instance a + b*c is a valid FMA (MUL then ADD). However (a+b)* c cannot be translated into an FMA (ADD then MUL).

Type of elements and instruction set

2 SSE or AVX instructions are processing arithmetic or math operations on double precision FP elements in scalar mode (one at a time).

Matching between your loop (in the source code) and the binary loop

The binary loop is composed of 2 FP arithmetical operations:

1: addition or subtraction
1: multiply

The binary loop is loading 257 bytes (32 double precision FP elements). The binary loop is storing 8 bytes (1 double precision FP elements).

Arithmetic intensity

Arithmetic intensity is 0.01 FP operations per loaded or stored byte.

General properties

nb instructions	86
nb uops	85
loop length	387
used x86 registers	15
used mmx registers	0
used xmm registers	1
used ymm registers	0
used zmm registers	0
nb stack references	22
ADD-SUB / MUL ratio	1.00

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	10.63 cycles
front end	10.63 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	8.83	8.83	8.83	8.83	8.83	8.83	8.50	8.50	8.50	8.50	0.75	0.75	0.75	0.75	0.50	0.50
cycles	8.83	8.83	8.83	8.83	8.83	8.83	8.50	8.50	8.50	8.50	0.75	0.75	0.75	0.75	0.50	0.50

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	10.63
Dispatch	8.83
Overall L1	10.63

Vectorization ratios

INT

all	0%
load	0%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
other	0%

all	0%
load	0%
store	0%
mul	0%
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

INT+FP

all	0%
load	0%
store	0%
mul	0%
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Vector efficiency ratios

INT

all	11%
load	10%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
other	10%

all	12%
load	12%
store	12%
mul	12%
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	12%

INT+FP

all	11%
load	11%
store	12%
mul	12%
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	11%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 10.63 cycles. At this rate:

9% of peak load performance is reached (24.19 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
0% of peak store performance is reached (0.75 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

ASM code

In the binary file, the address of the loop is: 251227

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	Latency	Recip. throughput	Vectorization
INC %RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD -0x98(%RBP),%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	scal (12.5%)
ADD -0x60(%RBP),%R10	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	N/A
CMP %R11,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JE 2510e0 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl2EEEEJNS2_3ForILl1ENS_6policy10sequential8seq_execEJNS8_ILl3ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEENS0_9LoopTypesINS5_4listIJvvvvEEESJ_EEE4execIRNS0_8LoopDataINS5_5tupleIJNS_4SpanINS_9Iterators16numeric_iteratorIN6Kripke6MomentElPST_EElEENSP_INSR_INSS_9DirectionElPSX_EElEENSP_INSR_INSS_5GroupElPS11_EElEENSP_INSR_INSS_4ZoneElPS15_EElEEEEENSO_IJEEENS5_9resources2v14HostEJZNK10LTimesSdomclINSS_11ArchLayoutTINSS_12ArchT_OpenMPENSS_11LayoutT_DGZEEEEEvT_NSS_6SdomIdERKNSS_4Core3SetES1P_S1P_S1P_RNS1M_5FieldIdJSX_S11_S15_EEERNS1Q_IdJST_S11_S15_EEERNS1Q_IdJST_SX_EEEEUlST_SX_S11_S15_E_EEEEEvOS1K_.omp_outlined+0x250>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV -0x58(%RBP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
LEA (%RDI,%RSI,1),%RBX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %RBX,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
IMUL -0x90(%RBP),%R8	1	0.33	0.33	0.33	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.33	N/A
ADD -0x168(%RBP),%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	N/A
CMPB $0,-0x29(%RBP)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	scal (1.6%)
JE 251330 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl2EEEEJNS2_3ForILl1ENS_6policy10sequential8seq_execEJNS8_ILl3ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEENS0_9LoopTypesINS5_4listIJvvvvEEESJ_EEE4execIRNS0_8LoopDataINS5_5tupleIJNS_4SpanINS_9Iterators16numeric_iteratorIN6Kripke6MomentElPST_EElEENSP_INSR_INSS_9DirectionElPSX_EElEENSP_INSR_INSS_5GroupElPS11_EElEENSP_INSR_INSS_4ZoneElPS15_EElEEEEENSO_IJEEENS5_9resources2v14HostEJZNK10LTimesSdomclINSS_11ArchLayoutTINSS_12ArchT_OpenMPENSS_11LayoutT_DGZEEEEEvT_NSS_6SdomIdERKNSS_4Core3SetES1P_S1P_S1P_RNS1M_5FieldIdJSX_S11_S15_EEERNS1Q_IdJST_S11_S15_EEERNS1Q_IdJST_SX_EEEEUlST_SX_S11_S15_E_EEEEEvOS1K_.omp_outlined+0x4a0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV -0x98(%RBP),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
IMUL %RDI,%R9	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	N/A
MOV -0x130(%RBP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
LEA (%RSI,%R9,1),%R12	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV -0x40(%RBP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
ADD %RSI,%R12	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD -0x138(%RBP),%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	N/A
ADD %RSI,%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV -0x140(%RBP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
LEA (%RSI,%RDI,8),%R13	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ADD %R14,%R13	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV -0x158(%RBP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
LEA (%RSI,%RDI,8),%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ADD %R14,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV -0x150(%RBP),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
CMP %R13,%R15	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
SETB %R11B	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV -0x148(%RBP),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
CMP %R13,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
SETB %SIL	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP %R12,%R15	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
SETB %R12B	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP %R13,%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
SETB %R13B	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
TEST %SIL,%R11B	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JNE 251402 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl2EEEEJNS2_3ForILl1ENS_6policy10sequential8seq_execEJNS8_ILl3ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEENS0_9LoopTypesINS5_4listIJvvvvEEESJ_EEE4execIRNS0_8LoopDataINS5_5tupleIJNS_4SpanINS_9Iterators16numeric_iteratorIN6Kripke6MomentElPST_EElEENSP_INSR_INSS_9DirectionElPSX_EElEENSP_INSR_INSS_5GroupElPS11_EElEENSP_INSR_INSS_4ZoneElPS15_EElEEEEENSO_IJEEENS5_9resources2v14HostEJZNK10LTimesSdomclINSS_11ArchLayoutTINSS_12ArchT_OpenMPENSS_11LayoutT_DGZEEEEEvT_NSS_6SdomIdERKNSS_4Core3SetES1P_S1P_S1P_RNS1M_5FieldIdJSX_S11_S15_EEERNS1Q_IdJST_S11_S15_EEERNS1Q_IdJST_SX_EEEEUlST_SX_S11_S15_E_EEEEEvOS1K_.omp_outlined+0x572>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV $0,%R9D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
AND %R13B,%R12B	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV -0x88(%RBP),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
JNE 251333 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl2EEEEJNS2_3ForILl1ENS_6policy10sequential8seq_execEJNS8_ILl3ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEENS0_9LoopTypesINS5_4listIJvvvvEEESJ_EEE4execIRNS0_8LoopDataINS5_5tupleIJNS_4SpanINS_9Iterators16numeric_iteratorIN6Kripke6MomentElPST_EElEENSP_INSR_INSS_9DirectionElPSX_EElEENSP_INSR_INSS_5GroupElPS11_EElEENSP_INSR_INSS_4ZoneElPS15_EElEEEEENSO_IJEEENS5_9resources2v14HostEJZNK10LTimesSdomclINSS_11ArchLayoutTINSS_12ArchT_OpenMPENSS_11LayoutT_DGZEEEEEvT_NSS_6SdomIdERKNSS_4Core3SetES1P_S1P_S1P_RNS1M_5FieldIdJSX_S11_S15_EEERNS1Q_IdJST_S11_S15_EEERNS1Q_IdJST_SX_EEEEUlST_SX_S11_S15_E_EEEEEvOS1K_.omp_outlined+0x4a3>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOVSD (%R14,%R8,8),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
UNPCKLPD %XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
XOR %R9D,%R9D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV %RCX,%R9	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP %RCX,-0x48(%RBP)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	scal (12.5%)
JE 251210 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl2EEEEJNS2_3ForILl1ENS_6policy10sequential8seq_execEJNS8_ILl3ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEENS0_9LoopTypesINS5_4listIJvvvvEEESJ_EEE4execIRNS0_8LoopDataINS5_5tupleIJNS_4SpanINS_9Iterators16numeric_iteratorIN6Kripke6MomentElPST_EElEENSP_INSR_INSS_9DirectionElPSX_EElEENSP_INSR_INSS_5GroupElPS11_EElEENSP_INSR_INSS_4ZoneElPS15_EElEEEEENSO_IJEEENS5_9resources2v14HostEJZNK10LTimesSdomclINSS_11ArchLayoutTINSS_12ArchT_OpenMPENSS_11LayoutT_DGZEEEEEvT_NSS_6SdomIdERKNSS_4Core3SetES1P_S1P_S1P_RNS1M_5FieldIdJSX_S11_S15_EEERNS1Q_IdJST_S11_S15_EEERNS1Q_IdJST_SX_EEEEUlST_SX_S11_S15_E_EEEEEvOS1K_.omp_outlined+0x380>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
JMP 251333 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl2EEEEJNS2_3ForILl1ENS_6policy10sequential8seq_execEJNS8_ILl3ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEENS0_9LoopTypesINS5_4listIJvvvvEEESJ_EEE4execIRNS0_8LoopDataINS5_5tupleIJNS_4SpanINS_9Iterators16numeric_iteratorIN6Kripke6MomentElPST_EElEENSP_INSR_INSS_9DirectionElPSX_EElEENSP_INSR_INSS_5GroupElPS11_EElEENSP_INSR_INSS_4ZoneElPS15_EElEEEEENSO_IJEEENS5_9resources2v14HostEJZNK10LTimesSdomclINSS_11ArchLayoutTINSS_12ArchT_OpenMPENSS_11LayoutT_DGZEEEEEvT_NSS_6SdomIdERKNSS_4Core3SetES1P_S1P_S1P_RNS1M_5FieldIdJSX_S11_S15_EEERNS1Q_IdJST_S11_S15_EEERNS1Q_IdJST_SX_EEEEUlST_SX_S11_S15_E_EEEEEvOS1K_.omp_outlined+0x4a3>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
XOR %R9D,%R9D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV -0x48(%RBP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
SUB %R9D,%ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R9,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
TEST $0x1,%SIL	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JE 251382 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl2EEEEJNS2_3ForILl1ENS_6policy10sequential8seq_execEJNS8_ILl3ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEENS0_9LoopTypesINS5_4listIJvvvvEEESJ_EEE4execIRNS0_8LoopDataINS5_5tupleIJNS_4SpanINS_9Iterators16numeric_iteratorIN6Kripke6MomentElPST_EElEENSP_INSR_INSS_9DirectionElPSX_EElEENSP_INSR_INSS_5GroupElPS11_EElEENSP_INSR_INSS_4ZoneElPS15_EElEEEEENSO_IJEEENS5_9resources2v14HostEJZNK10LTimesSdomclINSS_11ArchLayoutTINSS_12ArchT_OpenMPENSS_11LayoutT_DGZEEEEEvT_NSS_6SdomIdERKNSS_4Core3SetES1P_S1P_S1P_RNS1M_5FieldIdJSX_S11_S15_EEERNS1Q_IdJST_S11_S15_EEERNS1Q_IdJST_SX_EEEEUlST_SX_S11_S15_E_EEEEEvOS1K_.omp_outlined+0x4f2>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
IMUL -0x60(%RBP),%RBX	1	0.33	0.33	0.33	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.33	N/A
ADD -0x128(%RBP),%RBX	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	N/A
MOV -0x38(%RBP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
ADD %R9,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVSD (%R14,%R8,8),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
ADD %RSI,%RBX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD -0x120(%RBP),%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	N/A
MOV -0x40(%RBP),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MULSD (%R15,%RBX,8),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	0	3	0.50	scal (12.5%)
MOV -0x50(%RBP),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
ADDSD (%RBX,%RSI,8),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0.50	0.50	0	0	2	0.50	scal (12.5%)
MOVSD %XMM0,(%RBX,%RSI,8)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
LEA 0x1(%R9),%R12	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV -0x160(%RBP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
SUB %R9,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JE 251210 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl2EEEEJNS2_3ForILl1ENS_6policy10sequential8seq_execEJNS8_ILl3ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEENS0_9LoopTypesINS5_4listIJvvvvEEESJ_EEE4execIRNS0_8LoopDataINS5_5tupleIJNS_4SpanINS_9Iterators16numeric_iteratorIN6Kripke6MomentElPST_EElEENSP_INSR_INSS_9DirectionElPSX_EElEENSP_INSR_INSS_5GroupElPS11_EElEENSP_INSR_INSS_4ZoneElPS15_EElEEEEENSO_IJEEENS5_9resources2v14HostEJZNK10LTimesSdomclINSS_11ArchLayoutTINSS_12ArchT_OpenMPENSS_11LayoutT_DGZEEEEEvT_NSS_6SdomIdERKNSS_4Core3SetES1P_S1P_S1P_RNS1M_5FieldIdJSX_S11_S15_EEERNS1Q_IdJST_S11_S15_EEERNS1Q_IdJST_SX_EEEEUlST_SX_S11_S15_E_EEEEEvOS1K_.omp_outlined+0x380>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV -0x48(%RBP),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
SUB %R12,%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV -0x118(%RBP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
ADD %R12,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV -0x110(%RBP),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
LEA (%RBX,%RSI,8),%RBX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ADD %R10,%R12	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV -0x40(%RBP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
LEA (%RSI,%R12,8),%R13	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
XOR %R12D,%R12D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
JMP 251210 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl2EEEEJNS2_3ForILl1ENS_6policy10sequential8seq_execEJNS8_ILl3ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEENS0_9LoopTypesINS5_4listIJvvvvEEESJ_EEE4execIRNS0_8LoopDataINS5_5tupleIJNS_4SpanINS_9Iterators16numeric_iteratorIN6Kripke6MomentElPST_EElEENSP_INSR_INSS_9DirectionElPSX_EElEENSP_INSR_INSS_5GroupElPS11_EElEENSP_INSR_INSS_4ZoneElPS15_EElEEEEENSO_IJEEENS5_9resources2v14HostEJZNK10LTimesSdomclINSS_11ArchLayoutTINSS_12ArchT_OpenMPENSS_11LayoutT_DGZEEEEEvT_NSS_6SdomIdERKNSS_4Core3SetES1P_S1P_S1P_RNS1M_5FieldIdJSX_S11_S15_EEERNS1Q_IdJST_S11_S15_EEERNS1Q_IdJST_SX_EEEEUlST_SX_S11_S15_E_EEEEEvOS1K_.omp_outlined+0x380>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
XOR %R9D,%R9D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV -0x88(%RBP),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
JMP 251333 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl2EEEEJNS2_3ForILl1ENS_6policy10sequential8seq_execEJNS8_ILl3ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEENS0_9LoopTypesINS5_4listIJvvvvEEESJ_EEE4execIRNS0_8LoopDataINS5_5tupleIJNS_4SpanINS_9Iterators16numeric_iteratorIN6Kripke6MomentElPST_EElEENSP_INSR_INSS_9DirectionElPSX_EElEENSP_INSR_INSS_5GroupElPS11_EElEENSP_INSR_INSS_4ZoneElPS15_EElEEEEENSO_IJEEENS5_9resources2v14HostEJZNK10LTimesSdomclINSS_11ArchLayoutTINSS_12ArchT_OpenMPENSS_11LayoutT_DGZEEEEEvT_NSS_6SdomIdERKNSS_4Core3SetES1P_S1P_S1P_RNS1M_5FieldIdJSX_S11_S15_EEERNS1Q_IdJST_S11_S15_EEERNS1Q_IdJST_SX_EEEEUlST_SX_S11_S15_E_EEEEEvOS1K_.omp_outlined+0x4a3>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A

Report Configuration

Code clean check

Workaround

Vectorization

Details

Workaround

Execution units bottlenecks

FMA

Workaround

Type of elements and instruction set

Matching between your loop (in the source code) and the binary loop

Arithmetic intensity

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code

Code clean check

Workaround

Vectorization

Details

Workaround

Execution units bottlenecks

FMA

Workaround

Type of elements and instruction set

Matching between your loop (in the source code) and the binary loop

Arithmetic intensity

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code