OV - exec - Loop 24

	Loop Id: 24	Module: exec	Source: forall.hpp:59-59 [...]	Coverage: 0.01%

0x263f40 MOV	-0x100(%RBP),%RCX

0x263f47 MOV	-0xc8(%RBP),%R13

0x263f4e LEA	0x1(%RCX),%RDI

0x263f52 CMP	%RCX,-0xf8(%RBP)

0x263f59 JLE	264270

0x263f5f MOV	%RDI,%RAX

0x263f62 CQTO

0x263f64 MOV	%RDI,-0x100(%RBP)

0x263f6b XOR	%R14D,%R14D

0x263f6e IDIV	%R13

0x263f71 MOV	-0x50(%RBP),%RCX

0x263f75 MOV	-0x38(%RBP),%R8

0x263f79 ADD	-0xe8(%RBP),%RDX

0x263f80 MOV	%RDX,%RDI

0x263f83 IMUL	-0xd8(%RBP),%RDI

0x263f8b MOV	%RDX,%R10

0x263f8e IMUL	-0x70(%RBP),%R10

0x263f93 IMUL	-0xa0(%RBP),%RDX

0x263f9b ADD	-0xa8(%RBP),%RDX

0x263fa2 ADD	-0xf0(%RBP),%RAX

0x263fa9 ADD	%RDI,%RCX

0x263fac ADD	-0x48(%RBP),%RDI

0x263fb0 MOV	%RAX,%R9

0x263fb3 IMUL	-0xe0(%RBP),%RAX

0x263fbb IMUL	-0xd0(%RBP),%R9

0x263fc3 ADD	%RAX,%RDI

0x263fc6 ADD	%RAX,%RCX

0x263fc9 MOV	%R9,-0x138(%RBP)

0x263fd0 LEA	(%R8,%RDI,8),%RAX

0x263fd4 MOV	-0x30(%RBP),%RDI

0x263fd8 LEA	(%R8,%RCX,8),%R11

0x263fdc MOV	-0xc0(%RBP),%R8

0x263fe3 MOV	%RCX,-0x80(%RBP)

0x263fe7 MOV	%RAX,-0x120(%RBP)

0x263fee MOV	%R11,-0x128(%RBP)

0x263ff5 LEA	(%RDI,%R9,1),%RAX

0x263ff9 LEA	(%R8,%R10,1),%R11

0x263ffd ADD	-0xb8(%RBP),%R10

0x264004 LEA	0x8(,%RAX,8),%RDI

0x26400c SAL	$0x3,%RAX

0x264010 MOV	%RAX,-0x118(%RBP)

0x264017 LEA	(,%R11,8),%RAX

0x26401f MOV	%RDI,-0x110(%RBP)

0x264026 MOV	-0xb0(%RBP),%RDI

0x26402d MOV	%RAX,-0x108(%RBP)

0x264034 SAL	$0x3,%R10

0x264038 MOV	%R10,-0x130(%RBP)

0x26403f LEA	(%RDI,%RCX,8),%RAX

0x264043 JMP	26406b

  (25) 0x264050 ADD	-0x90(%RBP),%RDX

  (25) 0x264057 ADD	-0x88(%RBP),%R11

  (25) 0x26405e INC	%R14

  (25) 0x264061 CMP	%R14,-0x58(%RBP)

  (25) 0x264065 JE	263f40

  (25) 0x26406b MOV	-0x30(%RBP),%RDI

  (25) 0x26406f LEA	(%R14,%RDI,1),%R13

  (25) 0x264073 ADD	-0x138(%RBP),%R13

  (25) 0x26407a CMP	$0x4,%R15

  (25) 0x26407e JAE	2640e0

  (25) 0x264080 XOR	%R10D,%R10D

  (25) 0x264083 MOV	-0x38(%RBP),%R9

  (25) 0x264087 LEA	(%RCX,%R10,1),%RDI

  (25) 0x26408b MOV	%R15,%R8

  (25) 0x26408e SUB	%R10,%R8

  (25) 0x264091 ADD	%R11,%R10

  (25) 0x264094 LEA	(%R9,%RDI,8),%R9

  (25) 0x264098 MOV	-0x40(%RBP),%RDI

  (25) 0x26409c LEA	(%RDI,%R10,8),%R10

  (25) 0x2640a0 XOR	%EDI,%EDI

  (25) 0x2640a2 NOPW	%CS:(%RAX,%RAX,1)

    (23) 0x2640b0 VMOVSD	(%R12,%R13,8),%XMM0

    (23) 0x2640b6 VMOVSD	(%R10,%RDI,8),%XMM1

    (23) 0x2640bc VFMADD213SD	(%R9,%RDI,8),%XMM0,%XMM1

    (23) 0x2640c2 VMOVSD	%XMM1,(%R9,%RDI,8)

    (23) 0x2640c8 INC	%RDI

    (23) 0x2640cb CMP	%RDI,%R8

    (23) 0x2640ce JNE	2640b0

  (25) 0x2640d0 JMP	264050

  (25) 0x2640e0 MOV	-0x90(%RBP),%R8

  (25) 0x2640e7 MOV	-0x130(%RBP),%RDI

  (25) 0x2640ee MOV	-0x40(%RBP),%RCX

  (25) 0x2640f2 MOV	-0x110(%RBP),%R9

  (25) 0x2640f9 MOV	-0x118(%RBP),%R10

  (25) 0x264100 MOV	-0x120(%RBP),%RBX

  (25) 0x264107 IMUL	%R14,%R8

  (25) 0x26410b LEA	(%R9,%R14,8),%R9

  (25) 0x26410f LEA	(%R10,%R14,8),%R10

  (25) 0x264113 ADD	%R12,%R9

  (25) 0x264116 ADD	%R12,%R10

  (25) 0x264119 ADD	%R8,%RDI

  (25) 0x26411c ADD	-0x108(%RBP),%R8

  (25) 0x264123 ADD	%RCX,%RDI

  (25) 0x264126 ADD	%RCX,%R8

  (25) 0x264129 MOV	-0x128(%RBP),%RCX

  (25) 0x264130 CMP	%R9,%RCX

  (25) 0x264133 SETB	%R9B

  (25) 0x264137 CMP	%RBX,%R10

  (25) 0x26413a SETB	%R10B

  (25) 0x26413e CMP	%RDI,%RCX

  (25) 0x264141 SETB	%DIL

  (25) 0x264145 CMP	%RBX,%R8

  (25) 0x264148 SETB	%R8B

  (25) 0x26414c TEST	%R10B,%R9B

  (25) 0x26414f JNE	264171

  (25) 0x264151 MOV	-0x80(%RBP),%RCX

  (25) 0x264155 AND	%R8B,%DIL

  (25) 0x264158 MOV	$0,%R10D

  (25) 0x26415e JNE	264083

  (25) 0x264164 CMP	$0x20,%R15

  (25) 0x264168 JAE	26417a

  (25) 0x26416a XOR	%EDI,%EDI

  (25) 0x26416c JMP	26420f

  (25) 0x264171 MOV	-0x80(%RBP),%RCX

  (25) 0x264175 JMP	264080

  (25) 0x26417a VBROADCASTSD	(%R12,%R13,8),%ZMM0

  (25) 0x264181 XOR	%R8D,%R8D

  (25) 0x264184 NOPW	%CS:(%RAX,%RAX,1)

    (26) 0x264190 VMOVUPD	-0xc0(%RDX,%R8,8),%ZMM1

    (26) 0x264198 VMOVUPD	-0x80(%RDX,%R8,8),%ZMM2

    (26) 0x2641a0 VMOVUPD	-0x40(%RDX,%R8,8),%ZMM3

    (26) 0x2641a8 VMOVUPD	(%RDX,%R8,8),%ZMM4

    (26) 0x2641af VFMADD213PD	-0xc0(%RAX,%R8,8),%ZMM0,%ZMM1

    (26) 0x2641b7 VFMADD213PD	-0x80(%RAX,%R8,8),%ZMM0,%ZMM2

    (26) 0x2641bf VFMADD213PD	-0x40(%RAX,%R8,8),%ZMM0,%ZMM3

    (26) 0x2641c7 VFMADD213PD	(%RAX,%R8,8),%ZMM0,%ZMM4

    (26) 0x2641ce VMOVUPD	%ZMM1,-0xc0(%RAX,%R8,8)

    (26) 0x2641d6 VMOVUPD	%ZMM2,-0x80(%RAX,%R8,8)

    (26) 0x2641de VMOVUPD	%ZMM3,-0x40(%RAX,%R8,8)

    (26) 0x2641e6 VMOVUPD	%ZMM4,(%RAX,%R8,8)

    (26) 0x2641ed ADD	$0x20,%R8

    (26) 0x2641f1 CMP	%R8,%RSI

    (26) 0x2641f4 JNE	264190

  (25) 0x2641f6 CMP	%RSI,%R15

  (25) 0x2641f9 JE	264050

  (25) 0x2641ff MOV	%RSI,%RDI

  (25) 0x264202 MOV	%RSI,%R10

  (25) 0x264205 TEST	$0x1c,%R15B

  (25) 0x264209 JE	264083

  (25) 0x26420f MOV	-0x38(%RBP),%R9

  (25) 0x264213 MOV	-0x40(%RBP),%R10

  (25) 0x264217 VBROADCASTSD	(%R12,%R13,8),%YMM0

  (25) 0x26421d LEA	(%RCX,%RDI,1),%R8

  (25) 0x264221 LEA	(%R9,%R8,8),%R8

  (25) 0x264225 LEA	(%RDI,%R11,1),%R9

  (25) 0x264229 LEA	(%R10,%R9,8),%R9

  (25) 0x26422d MOV	-0x78(%RBP),%R10

  (25) 0x264231 SUB	%RDI,%R10

  (25) 0x264234 XOR	%EDI,%EDI

  (25) 0x264236 NOPW	%CS:(%RAX,%RAX,1)

    (27) 0x264240 VMOVUPD	(%R9,%RDI,8),%YMM1

    (27) 0x264246 VFMADD213PD	(%R8,%RDI,8),%YMM0,%YMM1

    (27) 0x26424c VMOVUPD	%YMM1,(%R8,%RDI,8)

    (27) 0x264252 ADD	$0x4,%RDI

    (27) 0x264256 CMP	%RDI,%R10

    (27) 0x264259 JNE	264240

  (25) 0x26425b MOV	-0x78(%RBP),%RDI

  (25) 0x26425f MOV	%RDI,%R10

  (25) 0x264262 CMP	%RDI,%R15

  (25) 0x264265 JE	264050

  (25) 0x26426b JMP	264083

/beegfs/hackathon/users/eoseret/qaas_runs/170-850-6313/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/policy/openmp/kernel/Collapse.hpp: 83 - 83

--------------------------------------------------------------------------------

83:     for (i0 = 0; i0 < l0; ++i0) {

/beegfs/hackathon/users/eoseret/qaas_runs/170-850-6313/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/policy/loop/forall.hpp: 59 - 59

--------------------------------------------------------------------------------

59:   for (decltype(distance_it) i = 0; i < distance_it; ++i) {

/beegfs/hackathon/users/eoseret/qaas_runs/170-850-6313/intel/Kripke/build/Kripke/src/Kripke/Kernel/LPlusTimes.cpp: 57 - 57

--------------------------------------------------------------------------------

57:             rhs(d,g,z) += ell_plus(d, nm) * phi_out(nm, g, z);

Path /

Metric	Value
CQA speedup if no scalar integer	1.00
CQA speedup if FP arith vectorized	1.00
CQA speedup if fully vectorized	4.80 - 4.00
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.10 - 1.33
Bottlenecks	P8, P9,
Function	.omp_outlined.#0x263d30
Source	Collapse.hpp:83-83,forall.hpp:59-59
Source loop unroll info	NA
Source loop unroll confidence level	NA
Unroll/vectorization loop type	NA
Unroll factor	NA
CQA cycles	9.00 - 12.00
CQA cycles if no scalar integer	9.00 - 12.00
CQA cycles if FP arith vectorized	9.00 - 12.00
CQA cycles if fully vectorized	1.88 - 3.00
Front-end cycles	8.17
DIV/SQRT cycles	6.50
P0 cycles	6.50
P1 cycles	6.50
P2 cycles	6.50
P3 cycles	2.00
P4 cycles	9.00
P5 cycles	9.00
P6 cycles	9.00
P7 cycles	0.00
P8 cycles	0.00
P9 cycles	0.00
P10 cycles	0.00
P11 cycles	0.00
P12 cycles	0.00
P13 cycles	7.00 - 12.00
Inter-iter dependencies cycles	NA
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	49.00
Nb uops	49.00
Nb loads	18.00
Nb stores	9.00
Nb stack references	26.00
FLOP/cycle	0.00 - 0.00
Nb FLOP add-sub	0.00
Nb FLOP mul	0.00
Nb FLOP fma	0.00
Nb FLOP div	0.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	0.00
Nb FLOP rsqrt	0.00
Bytes/cycle	18.00 - 24.00
Bytes prefetched	0.00
Bytes loaded	144.00
Bytes stored	72.00
Stride 0	NA
Stride 1	NA
Stride n	NA
Stride unknown	NA
Stride indirect	NA
Vectorization ratio all	0.00
Vectorization ratio load	0.00
Vectorization ratio store	0.00
Vectorization ratio mul	0.00
Vectorization ratio add_sub	0.00
Vectorization ratio fma	NA
Vectorization ratio div_sqrt	0.00
Vectorization ratio other	0.00
Vector-efficiency ratio all	12.13
Vector-efficiency ratio load	12.50
Vector-efficiency ratio store	12.50
Vector-efficiency ratio mul	12.50
Vector-efficiency ratio add_sub	12.50
Vector-efficiency ratio fma	NA
Vector-efficiency ratio div_sqrt	12.50
Vector-efficiency ratio other	10.42

Metric	Value
CQA speedup if no scalar integer	1.00
CQA speedup if FP arith vectorized	1.00
CQA speedup if fully vectorized	4.80 - 4.00
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.10 - 1.33
Bottlenecks	P8, P9,
Function	.omp_outlined.#0x263d30
Source	Collapse.hpp:83-83,forall.hpp:59-59
Source loop unroll info	NA
Source loop unroll confidence level	NA
Unroll/vectorization loop type	NA
Unroll factor	NA
CQA cycles	9.00 - 12.00
CQA cycles if no scalar integer	9.00 - 12.00
CQA cycles if FP arith vectorized	9.00 - 12.00
CQA cycles if fully vectorized	1.88 - 3.00
Front-end cycles	8.17
DIV/SQRT cycles	6.50
P0 cycles	6.50
P1 cycles	6.50
P2 cycles	6.50
P3 cycles	2.00
P4 cycles	9.00
P5 cycles	9.00
P6 cycles	9.00
P7 cycles	0.00
P8 cycles	0.00
P9 cycles	0.00
P10 cycles	0.00
P11 cycles	0.00
P12 cycles	0.00
P13 cycles	7.00 - 12.00
Inter-iter dependencies cycles	NA
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	49.00
Nb uops	49.00
Nb loads	18.00
Nb stores	9.00
Nb stack references	26.00
FLOP/cycle	0.00 - 0.00
Nb FLOP add-sub	0.00
Nb FLOP mul	0.00
Nb FLOP fma	0.00
Nb FLOP div	0.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	0.00
Nb FLOP rsqrt	0.00
Bytes/cycle	18.00 - 24.00
Bytes prefetched	0.00
Bytes loaded	144.00
Bytes stored	72.00
Stride 0	NA
Stride 1	NA
Stride n	NA
Stride unknown	NA
Stride indirect	NA
Vectorization ratio all	0.00
Vectorization ratio load	0.00
Vectorization ratio store	0.00
Vectorization ratio mul	0.00
Vectorization ratio add_sub	0.00
Vectorization ratio fma	NA
Vectorization ratio div_sqrt	0.00
Vectorization ratio other	0.00
Vector-efficiency ratio all	12.13
Vector-efficiency ratio load	12.50
Vector-efficiency ratio store	12.50
Vector-efficiency ratio mul	12.50
Vector-efficiency ratio add_sub	12.50
Vector-efficiency ratio fma	NA
Vector-efficiency ratio div_sqrt	12.50
Vector-efficiency ratio other	10.42

Path /

Average path: Display a virtual path defined by average values of all real paths

Function	.omp_outlined.#0x263d30
Source file and lines	forall.hpp:59-59
Module	exec

The loop is defined in:

/beegfs/hackathon/users/eoseret/qaas_runs/170-850-6313/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/policy/openmp/kernel/Collapse.hpp:83
/beegfs/hackathon/users/eoseret/qaas_runs/170-850-6313/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/policy/loop/forall.hpp:59
/beegfs/hackathon/users/eoseret/qaas_runs/170-850-6313/intel/Kripke/build/Kripke/src/Kripke/Kernel/LPlusTimes.cpp:57

Warnings:

Non-innermost loop: analyzing only self part (ignoring child loops).
Ignoring paths for analysis
Too many paths. Rerun with max-paths=9
RecMII not computed since number of paths is unknown or > max_paths
Streams not analyzed since number of paths is unknown or > max_paths

Try to simplify control and/or increase the maximum number of paths per function/loop through the 'max-paths-nb' option.

This loop has 9 execution paths.

The presence of multiple execution paths is typically the main/first bottleneck.
Try to simplify control inside loop: ideally, try to remove all conditional expressions, for example by (if applicable):

hoisting them (moving them outside the loop)
turning them into conditional moves, MIN or MAX

Ex: if (x<0) x=0 => x = (x<0 ? 0 : x) (or MAX(0,x) after defining the corresponding macro)

gain
potential
hint
expert

Vectorization

Your loop is not vectorized. Only 12% of vector register length is used (average across all SSE/AVX instructions). By vectorizing your loop, you can lower the cost of an iteration from 12.00 to 3.00 cycles (4.00x speedup).

Details

All SSE/AVX instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized loop can use their full power.

Workaround

Try another compiler or update/tune your current one:
- recompile with ffast-math (included in Ofast) to extend loop vectorization to FP reductions.
Remove inter-iterations dependences from your loop and make it unit-stride:
- If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly: C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)
- If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Performance is limited by execution of divide and square root operations (the divide/square root unit is a bottleneck). By removing all these bottlenecks, you can lower the cost of an iteration from 12.00 to 9.00 cycles (1.33x speedup).

Workaround

Reduce the number of division or square root instructions:

If denominator is constant over iterations, use reciprocal (replace x/y with x*(1/y)). Check precision impact. This will be done by your compiler with ffast-math or Ofast

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 12.00 to 9.00 cycles (1.33x speedup).

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

IDIV: 1 occurrences

Conversion instructions

Detected expensive conversion instructions.

Details

CQTO: 1 occurrences

Workaround

Avoid mixing data with different types. In particular, check if the type of constants is the same as array elements.

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This loop is probably writing/copying data or processing integer elements.

Matching between your loop (in the source code) and the binary loop

The binary loop does not contain any FP arithmetical operations. The binary loop is loading 144 bytes. The binary loop is storing 72 bytes.

General properties

nb instructions	49
nb uops	49
loop length	261
used x86 registers	11
used mmx registers	0
used xmm registers	0
used ymm registers	0
used zmm registers	0
nb stack references	26

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	8.17 cycles
front end	8.17 cycles

Back-end

	ALU0/BRU0	ALU1	ALU2	ALU3	BRU1	AGU0	AGU1	AGU2	FP0	FP1	FP2	FP3	FP4	FP5
uops	6.50	6.50	6.50	6.50	2.00	9.00	9.00	9.00	0.00	0.00	0.00	0.00	0.00	0.00
cycles	6.50	6.50	6.50	6.50	2.00	9.00	9.00	9.00	0.00	0.00	0.00	0.00	0.00	0.00

Execution ports to units layout:

ALU0/BRU0: ALU
ALU1: ALU
ALU2: ALU
ALU3: ALU
BRU1:
AGU0 (256 bits): store address, load
AGU1 (256 bits): store address, load
AGU2 (256 bits): store address, load
FP0 (256 bits): VPU, DIV/SQRT
FP1 (256 bits): VPU, DIV/SQRT
FP2 (256 bits): VPU
FP3 (256 bits): VPU
FP4 (256 bits): FP store data
FP5 (256 bits): FP store data

Cycles executing div or sqrt instructions

7.00-12.00

Cycles summary

Front-end	8.17
Dispatch	9.00
DIV/SQRT	7.00-12.00
Overall L1	9.00-12.00

Vectorization ratios

all	0%
load	0%
store	0%
mul	0%
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	0%
other	0%

Vector efficiency ratios

all	12%
load	12%
store	12%
mul	12%
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	12%
other	10%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 12.00 cycles. At this rate:

12% of peak load performance is reached (12.00 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
9% of peak store performance is reached (6.00 out of 64.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Found no such bottlenecks.

ASM code

In the binary file, the address of the loop is: 263f5f

Instruction	Nb FU	ALU0/BRU0	ALU1	ALU2	ALU3	BRU1	AGU0	AGU1	AGU2	FP0	FP1	FP2	FP3	FP4	FP5	Latency	Recip. throughput
MOV -0x100(%RBP),%RCX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV -0xc8(%RBP),%R13	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
LEA 0x1(%RCX),%RDI	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
CMP %RCX,-0xf8(%RBP)	1	0.25	0.25	0.25	0.25	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.33
JLE 264270 <.omp_outlined.+0x540>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
MOV %RDI,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
CQTO
MOV %RDI,-0x100(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
XOR %R14D,%R14D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25
IDIV %R13	2	2	0	0	0	0	0	0	0	0	0	0	0	0	0	9-19	7-12
MOV -0x50(%RBP),%RCX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV -0x38(%RBP),%R8	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
ADD -0xe8(%RBP),%RDX	1	0.25	0.25	0.25	0.25	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.33
MOV %RDX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
IMUL -0xd8(%RBP),%RDI	1	0	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	1
MOV %RDX,%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
IMUL -0x70(%RBP),%R10	1	0	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	1
IMUL -0xa0(%RBP),%RDX	1	0	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	1
ADD -0xa8(%RBP),%RDX	1	0.25	0.25	0.25	0.25	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.33
ADD -0xf0(%RBP),%RAX	1	0.25	0.25	0.25	0.25	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.33
ADD %RDI,%RCX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
ADD -0x48(%RBP),%RDI	1	0.25	0.25	0.25	0.25	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.33
MOV %RAX,%R9	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
IMUL -0xe0(%RBP),%RAX	1	0	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	1
IMUL -0xd0(%RBP),%R9	1	0	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	1
ADD %RAX,%RDI	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
ADD %RAX,%RCX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV %R9,-0x138(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
LEA (%R8,%RDI,8),%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV -0x30(%RBP),%RDI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
LEA (%R8,%RCX,8),%R11	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV -0xc0(%RBP),%R8	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV %RCX,-0x80(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV %RAX,-0x120(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV %R11,-0x128(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
LEA (%RDI,%R9,1),%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
LEA (%R8,%R10,1),%R11	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
ADD -0xb8(%RBP),%R10	1	0.25	0.25	0.25	0.25	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.33
LEA 0x8(,%RAX,8),%RDI	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
SAL $0x3,%RAX	1	0	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
MOV %RAX,-0x118(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
LEA (,%R11,8),%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV %RDI,-0x110(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV -0xb0(%RBP),%RDI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV %RAX,-0x108(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
SAL $0x3,%R10	1	0	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
MOV %R10,-0x130(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
LEA (%RDI,%RCX,8),%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JMP 26406b <.omp_outlined.+0x33b>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	0	1

Function	.omp_outlined.#0x263d30
Source file and lines	forall.hpp:59-59
Module	exec

The loop is defined in:

/beegfs/hackathon/users/eoseret/qaas_runs/170-850-6313/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/policy/openmp/kernel/Collapse.hpp:83
/beegfs/hackathon/users/eoseret/qaas_runs/170-850-6313/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/policy/loop/forall.hpp:59
/beegfs/hackathon/users/eoseret/qaas_runs/170-850-6313/intel/Kripke/build/Kripke/src/Kripke/Kernel/LPlusTimes.cpp:57

Warnings:

Non-innermost loop: analyzing only self part (ignoring child loops).
Ignoring paths for analysis
Too many paths. Rerun with max-paths=9
RecMII not computed since number of paths is unknown or > max_paths
Streams not analyzed since number of paths is unknown or > max_paths

hoisting them (moving them outside the loop)
turning them into conditional moves, MIN or MAX

Ex: if (x<0) x=0 => x = (x<0 ? 0 : x) (or MAX(0,x) after defining the corresponding macro)

gain
potential
hint
expert

Vectorization

Details

All SSE/AVX instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized loop can use their full power.

Workaround

Try another compiler or update/tune your current one:
- recompile with ffast-math (included in Ofast) to extend loop vectorization to FP reductions.
Remove inter-iterations dependences from your loop and make it unit-stride:
- If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly: C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)
- If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Workaround

Reduce the number of division or square root instructions:

If denominator is constant over iterations, use reciprocal (replace x/y with x*(1/y)). Check precision impact. This will be done by your compiler with ffast-math or Ofast

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 12.00 to 9.00 cycles (1.33x speedup).

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

IDIV: 1 occurrences

Conversion instructions

Detected expensive conversion instructions.

Details

CQTO: 1 occurrences

Workaround

Avoid mixing data with different types. In particular, check if the type of constants is the same as array elements.

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This loop is probably writing/copying data or processing integer elements.

Matching between your loop (in the source code) and the binary loop

The binary loop does not contain any FP arithmetical operations. The binary loop is loading 144 bytes. The binary loop is storing 72 bytes.

General properties

nb instructions	49
nb uops	49
loop length	261
used x86 registers	11
used mmx registers	0
used xmm registers	0
used ymm registers	0
used zmm registers	0
nb stack references	26

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	8.17 cycles
front end	8.17 cycles

Back-end

	ALU0/BRU0	ALU1	ALU2	ALU3	BRU1	AGU0	AGU1	AGU2	FP0	FP1	FP2	FP3	FP4	FP5
uops	6.50	6.50	6.50	6.50	2.00	9.00	9.00	9.00	0.00	0.00	0.00	0.00	0.00	0.00
cycles	6.50	6.50	6.50	6.50	2.00	9.00	9.00	9.00	0.00	0.00	0.00	0.00	0.00	0.00

Execution ports to units layout:

ALU0/BRU0: ALU
ALU1: ALU
ALU2: ALU
ALU3: ALU
BRU1:
AGU0 (256 bits): store address, load
AGU1 (256 bits): store address, load
AGU2 (256 bits): store address, load
FP0 (256 bits): VPU, DIV/SQRT
FP1 (256 bits): VPU, DIV/SQRT
FP2 (256 bits): VPU
FP3 (256 bits): VPU
FP4 (256 bits): FP store data
FP5 (256 bits): FP store data

Cycles executing div or sqrt instructions

7.00-12.00

Cycles summary

Front-end	8.17
Dispatch	9.00
DIV/SQRT	7.00-12.00
Overall L1	9.00-12.00

Vectorization ratios

all	0%
load	0%
store	0%
mul	0%
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	0%
other	0%

Vector efficiency ratios

all	12%
load	12%
store	12%
mul	12%
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	12%
other	10%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 12.00 cycles. At this rate:

12% of peak load performance is reached (12.00 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
9% of peak store performance is reached (6.00 out of 64.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Found no such bottlenecks.

ASM code

In the binary file, the address of the loop is: 263f5f

Instruction	Nb FU	ALU0/BRU0	ALU1	ALU2	ALU3	BRU1	AGU0	AGU1	AGU2	FP0	FP1	FP2	FP3	FP4	FP5	Latency	Recip. throughput
MOV -0x100(%RBP),%RCX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV -0xc8(%RBP),%R13	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
LEA 0x1(%RCX),%RDI	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
CMP %RCX,-0xf8(%RBP)	1	0.25	0.25	0.25	0.25	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.33
JLE 264270 <.omp_outlined.+0x540>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
MOV %RDI,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
CQTO
MOV %RDI,-0x100(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
XOR %R14D,%R14D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25
IDIV %R13	2	2	0	0	0	0	0	0	0	0	0	0	0	0	0	9-19	7-12
MOV -0x50(%RBP),%RCX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV -0x38(%RBP),%R8	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
ADD -0xe8(%RBP),%RDX	1	0.25	0.25	0.25	0.25	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.33
MOV %RDX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
IMUL -0xd8(%RBP),%RDI	1	0	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	1
MOV %RDX,%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
IMUL -0x70(%RBP),%R10	1	0	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	1
IMUL -0xa0(%RBP),%RDX	1	0	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	1
ADD -0xa8(%RBP),%RDX	1	0.25	0.25	0.25	0.25	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.33
ADD -0xf0(%RBP),%RAX	1	0.25	0.25	0.25	0.25	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.33
ADD %RDI,%RCX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
ADD -0x48(%RBP),%RDI	1	0.25	0.25	0.25	0.25	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.33
MOV %RAX,%R9	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
IMUL -0xe0(%RBP),%RAX	1	0	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	1
IMUL -0xd0(%RBP),%R9	1	0	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	1
ADD %RAX,%RDI	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
ADD %RAX,%RCX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV %R9,-0x138(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
LEA (%R8,%RDI,8),%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV -0x30(%RBP),%RDI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
LEA (%R8,%RCX,8),%R11	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV -0xc0(%RBP),%R8	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV %RCX,-0x80(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV %RAX,-0x120(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV %R11,-0x128(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
LEA (%RDI,%R9,1),%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
LEA (%R8,%R10,1),%R11	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
ADD -0xb8(%RBP),%R10	1	0.25	0.25	0.25	0.25	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.33
LEA 0x8(,%RAX,8),%RDI	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
SAL $0x3,%RAX	1	0	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
MOV %RAX,-0x118(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
LEA (,%R11,8),%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV %RDI,-0x110(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV -0xb0(%RBP),%RDI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV %RAX,-0x108(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
SAL $0x3,%R10	1	0	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
MOV %R10,-0x130(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
LEA (%RDI,%RCX,8),%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JMP 26406b <.omp_outlined.+0x33b>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	0	1

Report Configuration

Vectorization

Details

Workaround

Execution units bottlenecks

Workaround

Expensive FP math instructions/calls

Complex instructions

Details

Conversion instructions

Details

Workaround

Type of elements and instruction set

Matching between your loop (in the source code) and the binary loop

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code

Vectorization

Details

Workaround

Execution units bottlenecks

Workaround

Expensive FP math instructions/calls

Complex instructions

Details

Conversion instructions

Details

Workaround

Type of elements and instruction set

Matching between your loop (in the source code) and the binary loop

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code