OV - exec - Loop 1575

	Loop Id: 1575	Module: exec	Source: Scattering.cpp:87-97 [...]	Coverage: 67.2%

0x49ac60 XORPD	%XMM0,%XMM0

0x49ac64 MOV	-0x150(%RBP),%RAX

0x49ac6b ADD	%R8,%RAX

0x49ac6e ADD	-0x148(%RBP),%RAX

0x49ac75 MOV	-0x128(%RBP),%RDX

0x49ac7c MULSD	(%RDX,%RAX,8),%XMM0

0x49ac81 MOV	-0x140(%RBP),%RAX

0x49ac88 ADD	%R8,%RAX

0x49ac8b MOV	-0x130(%RBP),%RDX

0x49ac92 ADDSD	(%RDX,%RAX,8),%XMM0

0x49ac97 MOVSD	%XMM0,(%RDX,%RAX,8)

0x49ac9c LEA	0x1(%R8),%RAX

0x49aca0 CMP	-0x120(%RBP),%R8

0x49aca7 MOV	%RAX,%R8

0x49acaa JE	49ac00

0x49acb0 MOV	-0x60(%RBP),%RAX

0x49acb4 ADD	%R8,%RAX

0x49acb7 MOV	-0x138(%RBP),%RDX

0x49acbe MOVSXD	(%RDX,%RAX,4),%R10

0x49acc2 TEST	%R10,%R10

0x49acc5 JLE	49ac60

0x49acc7 MOV	%R13,-0x68(%RBP)

0x49accb MOV	-0x110(%RBP),%RDX

0x49acd2 MOV	(%RDX,%RAX,8),%R9

0x49acd6 ADD	%R9,%R10

0x49acd9 LEA	0x1(%R9),%RAX

0x49acdd CMP	%RAX,%R10

0x49ace0 MOV	%RAX,-0x118(%RBP)

0x49ace7 CMOVLE	%RAX,%R10

0x49aceb SUB	%R9,%R10

0x49acee XORPD	%XMM0,%XMM0

0x49acf2 CMP	$0x4,%R10

0x49acf6 JB	49ad89

0x49acfc MOV	%R10,%RSI

0x49acff SHR	$0x2,%RSI

0x49ad03 LEA	(,%R9,8),%R11

0x49ad0b NOPL	(%RAX,%RAX,1)

  (1576) 0x49ad10 MOV	(%R14,%R11,1),%RDI

  (1576) 0x49ad14 IMUL	%RBX,%RDI

  (1576) 0x49ad18 ADD	%RCX,%RDI

  (1576) 0x49ad1b MOV	0x8(%R14,%R11,1),%RDX

  (1576) 0x49ad20 IMUL	%RBX,%RDX

  (1576) 0x49ad24 ADD	%RCX,%RDX

  (1576) 0x49ad27 MOV	0x10(%R14,%R11,1),%R13

  (1576) 0x49ad2c IMUL	%RBX,%R13

  (1576) 0x49ad30 ADD	%RCX,%R13

  (1576) 0x49ad33 MOV	0x18(%R14,%R11,1),%RAX

  (1576) 0x49ad38 IMUL	%RBX,%RAX

  (1576) 0x49ad3c ADD	%RCX,%RAX

  (1576) 0x49ad3f MOVUPD	(%R12,%R11,1),%XMM1

  (1576) 0x49ad45 MOVUPD	0x10(%R12,%R11,1),%XMM2

  (1576) 0x49ad4c MOVSD	(%R15,%RDI,8),%XMM3

  (1576) 0x49ad52 MOVHPD	(%R15,%RDX,8),%XMM3

  (1576) 0x49ad58 MULPD	%XMM1,%XMM3

  (1576) 0x49ad5c MOVSD	(%R15,%R13,8),%XMM1

  (1576) 0x49ad62 MOVHPD	(%R15,%RAX,8),%XMM1

  (1576) 0x49ad68 MULPD	%XMM2,%XMM1

  (1576) 0x49ad6c ADDPD	%XMM3,%XMM1

  (1576) 0x49ad70 MOVAPD	%XMM1,%XMM2

  (1576) 0x49ad74 UNPCKHPD	%XMM1,%XMM2

  (1576) 0x49ad78 ADDSD	%XMM1,%XMM2

  (1576) 0x49ad7c ADDSD	%XMM2,%XMM0

  (1576) 0x49ad80 ADD	$0x20,%R11

  (1576) 0x49ad84 DEC	%RSI

  (1576) 0x49ad87 JNE	49ad10

0x49ad89 MOV	%R10,%RSI

0x49ad8c AND	$-0x4,%RSI

0x49ad90 AND	$0x3,%R10D

0x49ad94 CMP	$0x1,%R10

0x49ad98 JE	49ae2e

0x49ad9e CMP	$0x2,%R10D

0x49ada2 JE	49adee

0x49ada4 CMP	$0x3,%R10D

0x49ada8 MOV	-0x68(%RBP),%R13

0x49adac JNE	49ae6a

0x49adb2 LEA	(%R9,%RSI,1),%RAX

0x49adb6 MOV	0x10(%R14,%RAX,8),%RDX

0x49adbb IMUL	%RBX,%RDX

0x49adbf MOV	-0x58(%RBP),%R11

0x49adc3 LEA	(%R11,%R13,1),%RDI

0x49adc7 ADD	-0x38(%RBP),%RDI

0x49adcb MOV	-0x30(%RBP),%R10

0x49adcf ADD	%R10,%RDI

0x49add2 ADD	%RDX,%RDI

0x49add5 MOV	%R11,%RDX

0x49add8 MOVSD	(%R15,%RDI,8),%XMM1

0x49adde MOV	%R10,%RDI

0x49ade1 MULSD	0x10(%R12,%RAX,8),%XMM1

0x49ade8 ADDSD	%XMM1,%XMM0

0x49adec JMP	49adfa

0x49adee MOV	-0x68(%RBP),%R13

0x49adf2 MOV	-0x30(%RBP),%RDI

0x49adf6 MOV	-0x58(%RBP),%RDX

0x49adfa MOV	-0x118(%RBP),%R11

0x49ae01 ADD	%RSI,%R11

0x49ae04 MOV	(%R14,%R11,8),%RAX

0x49ae08 IMUL	%RBX,%RAX

0x49ae0c MOV	%RDX,%R10

0x49ae0f ADD	%R13,%RDX

0x49ae12 ADD	-0x38(%RBP),%RDX

0x49ae16 ADD	%RDI,%RDX

0x49ae19 ADD	%RAX,%RDX

0x49ae1c MOVSD	(%R15,%RDX,8),%XMM1

0x49ae22 MULSD	(%R12,%R11,8),%XMM1

0x49ae28 ADDSD	%XMM1,%XMM0

0x49ae2c JMP	49ae3a

0x49ae2e MOV	-0x68(%RBP),%R13

0x49ae32 MOV	-0x30(%RBP),%RDI

0x49ae36 MOV	-0x58(%RBP),%R10

0x49ae3a ADD	%RSI,%R9

0x49ae3d MOV	(%R14,%R9,8),%RAX

0x49ae41 IMUL	%RBX,%RAX

0x49ae45 MOV	%R13,%RDX

0x49ae48 ADD	%R10,%RDX

0x49ae4b ADD	-0x38(%RBP),%RDX

0x49ae4f ADD	%RDI,%RDX

0x49ae52 ADD	%RAX,%RDX

0x49ae55 MOVSD	(%R15,%RDX,8),%XMM1

0x49ae5b MULSD	(%R12,%R9,8),%XMM1

0x49ae61 ADDSD	%XMM1,%XMM0

0x49ae65 JMP	49ac64

0x49ae6a MOV	-0x30(%RBP),%RDI

0x49ae6e JMP	49ac64

/beegfs/hackathon/users/eoseret/qaas_runs/170-850-6313/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/index/IndexValue.hpp: 105 - 217

--------------------------------------------------------------------------------

105:     return TYPE(value + a);

[...]

217:     return (value < x.value);

/beegfs/hackathon/users/eoseret/qaas_runs/170-850-6313/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/util/Layout.hpp: 55 - 55

--------------------------------------------------------------------------------

55:     return a * b;

/beegfs/hackathon/users/eoseret/qaas_runs/170-850-6313/intel/Kripke/build/Kripke/src/Kripke/Kernel/Scattering.cpp: 87 - 97

--------------------------------------------------------------------------------

87:             MixElem mix_start = zone_to_mixelem(z);

88:             MixElem mix_stop = mix_start + zone_to_num_mixelem(z);

89:

90:             double sigs_z = 0.0;

91:             for(MixElem mix = mix_start;mix < mix_stop;++ mix){

92:               Material mat = mixelem_to_material(mix);

93:               double fraction = mixelem_to_fraction(mix);

94:

95:               sigs_z += sigs(mat, n, global_g, global_gp) * fraction;

96:             }

97:             phi_out(nm, g, z) += sigs_z * phi(nm, gp, z);

/beegfs/hackathon/users/eoseret/qaas_runs/170-850-6313/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/policy/loop/forall.hpp: 59 - 59

--------------------------------------------------------------------------------

59:   for (decltype(distance_it) i = 0; i < distance_it; ++i) {

Path /

Metric	Value
CQA speedup if no scalar integer	1.81
CQA speedup if FP arith vectorized	2.24
CQA speedup if fully vectorized	5.01
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.21
Bottlenecks	micro-operation queue,
Function	_ZNK6Kripke14DispatchHelperINS_12ArchT_OpenMPEEclINS_11LayoutT_DGZE14ScatteringSdomJRNS_6SdomIdES7_RNS_4Core3SetESA_SA_RNS8_5FieldIdJNS_6MomentENS_5GroupENS_4ZoneEEEESG_RNSB_IdJNS_8MaterialENS_8LegendreENS_11GlobalGroupESJ_EEERNSB_INS_7MixElemEJSE_EEERNSB_IiJSE_EEERNSB_ISH_JSM_EEERNSB_IdJSM_EEERNSB_ISI_JSC_EEEEEEvT_RKT0_DpOT1_.extracted
Source	IndexValue.hpp:105-105,Layout.hpp:55-55,Scattering.cpp:87-88,Scattering.cpp:91-92,Scattering.cpp:95-97,forall.hpp:59-59
Source loop unroll info	NA
Source loop unroll confidence level	NA
Unroll/vectorization loop type	NA
Unroll factor	NA
CQA cycles	15.67
CQA cycles if no scalar integer	8.67
CQA cycles if FP arith vectorized	7.00
CQA cycles if fully vectorized	3.13
Front-end cycles	15.67
DIV/SQRT cycles	11.00
P0 cycles	11.00
P1 cycles	11.00
P2 cycles	11.00
P3 cycles	5.00
P4 cycles	13.00
P5 cycles	13.00
P6 cycles	13.00
P7 cycles	2.00
P8 cycles	2.00
P9 cycles	2.00
P10 cycles	2.00
P11 cycles	0.50
P12 cycles	0.50
P13 cycles	0.00
Inter-iter dependencies cycles	NA
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	95.00
Nb uops	94.00
Nb loads	36.00
Nb stores	3.00
Nb stack references	14.00
FLOP/cycle	0.51
Nb FLOP add-sub	4.00
Nb FLOP mul	4.00
Nb FLOP fma	0.00
Nb FLOP div	0.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	0.00
Nb FLOP rsqrt	0.00
Bytes/cycle	19.66
Bytes prefetched	0.00
Bytes loaded	284.00
Bytes stored	24.00
Stride 0	NA
Stride 1	NA
Stride n	NA
Stride unknown	NA
Stride indirect	NA
Vectorization ratio all	6.45
Vectorization ratio load	0.00
Vectorization ratio store	0.00
Vectorization ratio mul	0.00
Vectorization ratio add_sub	0.00
Vectorization ratio fma	NA
Vectorization ratio div_sqrt	NA
Vectorization ratio other	16.67
Vector-efficiency ratio all	12.70
Vector-efficiency ratio load	12.50
Vector-efficiency ratio store	12.50
Vector-efficiency ratio mul	12.50
Vector-efficiency ratio add_sub	12.50
Vector-efficiency ratio fma	NA
Vector-efficiency ratio div_sqrt	NA
Vector-efficiency ratio other	13.02

Metric	Value
CQA speedup if no scalar integer	1.81
CQA speedup if FP arith vectorized	2.24
CQA speedup if fully vectorized	5.01
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.21
Bottlenecks	micro-operation queue,
Function	_ZNK6Kripke14DispatchHelperINS_12ArchT_OpenMPEEclINS_11LayoutT_DGZE14ScatteringSdomJRNS_6SdomIdES7_RNS_4Core3SetESA_SA_RNS8_5FieldIdJNS_6MomentENS_5GroupENS_4ZoneEEEESG_RNSB_IdJNS_8MaterialENS_8LegendreENS_11GlobalGroupESJ_EEERNSB_INS_7MixElemEJSE_EEERNSB_IiJSE_EEERNSB_ISH_JSM_EEERNSB_IdJSM_EEERNSB_ISI_JSC_EEEEEEvT_RKT0_DpOT1_.extracted
Source	IndexValue.hpp:105-105,Layout.hpp:55-55,Scattering.cpp:87-88,Scattering.cpp:91-92,Scattering.cpp:95-97,forall.hpp:59-59
Source loop unroll info	NA
Source loop unroll confidence level	NA
Unroll/vectorization loop type	NA
Unroll factor	NA
CQA cycles	15.67
CQA cycles if no scalar integer	8.67
CQA cycles if FP arith vectorized	7.00
CQA cycles if fully vectorized	3.13
Front-end cycles	15.67
DIV/SQRT cycles	11.00
P0 cycles	11.00
P1 cycles	11.00
P2 cycles	11.00
P3 cycles	5.00
P4 cycles	13.00
P5 cycles	13.00
P6 cycles	13.00
P7 cycles	2.00
P8 cycles	2.00
P9 cycles	2.00
P10 cycles	2.00
P11 cycles	0.50
P12 cycles	0.50
P13 cycles	0.00
Inter-iter dependencies cycles	NA
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	95.00
Nb uops	94.00
Nb loads	36.00
Nb stores	3.00
Nb stack references	14.00
FLOP/cycle	0.51
Nb FLOP add-sub	4.00
Nb FLOP mul	4.00
Nb FLOP fma	0.00
Nb FLOP div	0.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	0.00
Nb FLOP rsqrt	0.00
Bytes/cycle	19.66
Bytes prefetched	0.00
Bytes loaded	284.00
Bytes stored	24.00
Stride 0	NA
Stride 1	NA
Stride n	NA
Stride unknown	NA
Stride indirect	NA
Vectorization ratio all	6.45
Vectorization ratio load	0.00
Vectorization ratio store	0.00
Vectorization ratio mul	0.00
Vectorization ratio add_sub	0.00
Vectorization ratio fma	NA
Vectorization ratio div_sqrt	NA
Vectorization ratio other	16.67
Vector-efficiency ratio all	12.70
Vector-efficiency ratio load	12.50
Vector-efficiency ratio store	12.50
Vector-efficiency ratio mul	12.50
Vector-efficiency ratio add_sub	12.50
Vector-efficiency ratio fma	NA
Vector-efficiency ratio div_sqrt	NA
Vector-efficiency ratio other	13.02

Path /

Average path: Display a virtual path defined by average values of all real paths

Function	_ZNK6Kripke14DispatchHelperINS_12ArchT_OpenMPEEclINS_11LayoutT_DGZE14ScatteringSdomJRNS_6SdomIdES7_RNS_4Core3SetESA_SA_RNS8_5FieldIdJNS_6MomentENS_5GroupENS_4ZoneEEEESG_RNSB_IdJNS_8MaterialENS_8LegendreENS_11GlobalGroupESJ_EEERNSB_INS_7MixElemEJSE_EEERNSB_IiJSE_EEERNSB_ISH_JSM_EEERNSB_IdJSM_EEERNSB_ISI_JSC_EEEEEEvT_RKT0_DpOT1_.extracted
Source file and lines	Scattering.cpp:87-97
Module	exec

The loop is defined in:

/beegfs/hackathon/users/eoseret/qaas_runs/170-850-6313/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/index/IndexValue.hpp:105,217
/beegfs/hackathon/users/eoseret/qaas_runs/170-850-6313/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/util/Layout.hpp:55
/beegfs/hackathon/users/eoseret/qaas_runs/170-850-6313/intel/Kripke/build/Kripke/src/Kripke/Kernel/Scattering.cpp:87-97
/beegfs/hackathon/users/eoseret/qaas_runs/170-850-6313/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/policy/loop/forall.hpp:59

Warnings:

Non-innermost loop: analyzing only self part (ignoring child loops).
Ignoring paths for analysis
Too many paths. Rerun with max-paths=9
RecMII not computed since number of paths is unknown or > max_paths
Streams not analyzed since number of paths is unknown or > max_paths

Try to simplify control and/or increase the maximum number of paths per function/loop through the 'max-paths-nb' option.

This loop has 9 execution paths.

The presence of multiple execution paths is typically the main/first bottleneck.
Try to simplify control inside loop: ideally, try to remove all conditional expressions, for example by (if applicable):

hoisting them (moving them outside the loop)
turning them into conditional moves, MIN or MAX

Ex: if (x<0) x=0 => x = (x<0 ? 0 : x) (or MAX(0,x) after defining the corresponding macro)

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 15.67 to 8.67 cycles (1.81x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your loop is probably not vectorized. Only 12% of vector register length is used (average across all SSE/AVX instructions). By vectorizing your loop, you can lower the cost of an iteration from 15.67 to 3.13 cycles (5.01x speedup).

Details

Store and arithmetical SSE/AVX instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized loop can use their full power.

Workaround

Try another compiler or update/tune your current one:
- recompile with ffast-math (included in Ofast) to extend loop vectorization to FP reductions.
Remove inter-iterations dependences from your loop and make it unit-stride:
- If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly: C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)
- If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

FMA

Presence of both ADD/SUB and MUL operations.

Workaround

Pass to your compiler a micro-architecture specialization option:
- use march=native
Try to change order in which elements are evaluated (using parentheses) in arithmetic expressions containing both ADD/SUB and MUL operations to enable your compiler to generate FMA instructions wherever possible. For instance a + b*c is a valid FMA (MUL then ADD). However (a+b)* c cannot be translated into an FMA (ADD then MUL).

Type of elements and instruction set

8 SSE or AVX instructions are processing arithmetic or math operations on double precision FP elements in scalar mode (one at a time).

Matching between your loop (in the source code) and the binary loop

The binary loop is composed of 8 FP arithmetical operations:

4: addition or subtraction
4: multiply

The binary loop is loading 284 bytes (35 double precision FP elements). The binary loop is storing 24 bytes (3 double precision FP elements).

Arithmetic intensity

Arithmetic intensity is 0.03 FP operations per loaded or stored byte.

General properties

nb instructions	95
nb uops	94
loop length	410
used x86 registers	14
used mmx registers	0
used xmm registers	2
used ymm registers	0
used zmm registers	0
nb stack references	14
ADD-SUB / MUL ratio	1.00

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	15.67 cycles
front end	15.67 cycles

Back-end

	ALU0/BRU0	ALU1	ALU2	ALU3	BRU1	AGU0	AGU1	AGU2	FP0	FP1	FP2	FP3	FP4	FP5
uops	11.00	11.00	11.00	11.00	5.00	13.00	13.00	13.00	2.00	2.00	2.00	2.00	0.50	0.50
cycles	11.00	11.00	11.00	11.00	5.00	13.00	13.00	13.00	2.00	2.00	2.00	2.00	0.50	0.50

Execution ports to units layout:

ALU0/BRU0: ALU
ALU1: ALU
ALU2: ALU
ALU3: ALU
BRU1:
AGU0 (256 bits): store address, load
AGU1 (256 bits): store address, load
AGU2 (256 bits): store address, load
FP0 (256 bits): VPU, DIV/SQRT
FP1 (256 bits): VPU, DIV/SQRT
FP2 (256 bits): VPU
FP3 (256 bits): VPU
FP4 (256 bits): FP store data
FP5 (256 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	15.67
Dispatch	13.00
Overall L1	15.67

Vectorization ratios

INT

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
other	0%

all	14%
load	0%
store	0%
mul	0%
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	100%

INT+FP

all	6%
load	0%
store	0%
mul	0%
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	16%

Vector efficiency ratios

INT

all	11%
load	12%
store	12%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
other	10%

all	14%
load	12%
store	12%
mul	12%
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	25%

INT+FP

all	12%
load	12%
store	12%
mul	12%
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	13%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 15.67 cycles. At this rate:

18% of peak load performance is reached (18.13 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
2% of peak store performance is reached (1.53 out of 64.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Performance is limited by instruction throughput (loading/decoding program instructions to execution core) (front-end is a bottleneck). By removing all these bottlenecks, you can lower the cost of an iteration from 15.67 to 13.00 cycles (1.21x speedup).

ASM code

In the binary file, the address of the loop is: 49acb0

Instruction	Nb FU	ALU0/BRU0	ALU1	ALU2	ALU3	BRU1	AGU0	AGU1	AGU2	FP0	FP1	FP2	FP3	FP4	FP5	Latency	Recip. throughput
XORPD %XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV -0x150(%RBP),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
ADD %R8,%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
ADD -0x148(%RBP),%RAX	1	0.25	0.25	0.25	0.25	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.33
MOV -0x128(%RBP),%RDX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MULSD (%RDX,%RAX,8),%XMM0	1	0	0	0	0	0	0.33	0.33	0.33	0.50	0.50	0	0	0	0	3	0.50
MOV -0x140(%RBP),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
ADD %R8,%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV -0x130(%RBP),%RDX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
ADDSD (%RDX,%RAX,8),%XMM0	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0.50	0.50	0	0	3	0.50
MOVSD %XMM0,(%RDX,%RAX,8)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0.50	0.50	1	1
LEA 0x1(%R8),%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
CMP -0x120(%RBP),%R8	1	0.25	0.25	0.25	0.25	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.33
MOV %RAX,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
JE 49ac00 <_ZNK6Kripke14DispatchHelperINS_12ArchT_OpenMPEEclINS_11LayoutT_DGZE14ScatteringSdomJRNS_6SdomIdES7_RNS_4Core3SetESA_SA_RNS8_5FieldIdJNS_6MomentENS_5GroupENS_4ZoneEEEESG_RNSB_IdJNS_8MaterialENS_8LegendreENS_11GlobalGroupESJ_EEERNSB_INS_7MixElemEJSE_EEERNSB_IiJSE_EEERNSB_ISH_JSM_EEERNSB_IdJSM_EEERNSB_ISI_JSC_EEEEEEvT_RKT0_DpOT1_.extracted+0x2c0>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
MOV -0x60(%RBP),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
ADD %R8,%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV -0x138(%RBP),%RDX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOVSXD (%RDX,%RAX,4),%R10	1	0.25	0.25	0.25	0.25	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.33
TEST %R10,%R10	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JLE 49ac60 <_ZNK6Kripke14DispatchHelperINS_12ArchT_OpenMPEEclINS_11LayoutT_DGZE14ScatteringSdomJRNS_6SdomIdES7_RNS_4Core3SetESA_SA_RNS8_5FieldIdJNS_6MomentENS_5GroupENS_4ZoneEEEESG_RNSB_IdJNS_8MaterialENS_8LegendreENS_11GlobalGroupESJ_EEERNSB_INS_7MixElemEJSE_EEERNSB_IiJSE_EEERNSB_ISH_JSM_EEERNSB_IdJSM_EEERNSB_ISI_JSC_EEEEEEvT_RKT0_DpOT1_.extracted+0x320>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
MOV %R13,-0x68(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV -0x110(%RBP),%RDX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV (%RDX,%RAX,8),%R9	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
ADD %R9,%R10	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
LEA 0x1(%R9),%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
CMP %RAX,%R10	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV %RAX,-0x118(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
CMOVLE %RAX,%R10	1	0.50	0	0	0.50	0	0	0	0	0	0	0	0	0	0	1	0.50
SUB %R9,%R10	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
XORPD %XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
CMP $0x4,%R10	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JB 49ad89 <_ZNK6Kripke14DispatchHelperINS_12ArchT_OpenMPEEclINS_11LayoutT_DGZE14ScatteringSdomJRNS_6SdomIdES7_RNS_4Core3SetESA_SA_RNS8_5FieldIdJNS_6MomentENS_5GroupENS_4ZoneEEEESG_RNSB_IdJNS_8MaterialENS_8LegendreENS_11GlobalGroupESJ_EEERNSB_INS_7MixElemEJSE_EEERNSB_IiJSE_EEERNSB_ISH_JSM_EEERNSB_IdJSM_EEERNSB_ISI_JSC_EEEEEEvT_RKT0_DpOT1_.extracted+0x449>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
MOV %R10,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
SHR $0x2,%RSI	1	0	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LEA (,%R9,8),%R11	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09
MOV %R10,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
AND $-0x4,%RSI	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
AND $0x3,%R10D	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
CMP $0x1,%R10	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JE 49ae2e <_ZNK6Kripke14DispatchHelperINS_12ArchT_OpenMPEEclINS_11LayoutT_DGZE14ScatteringSdomJRNS_6SdomIdES7_RNS_4Core3SetESA_SA_RNS8_5FieldIdJNS_6MomentENS_5GroupENS_4ZoneEEEESG_RNSB_IdJNS_8MaterialENS_8LegendreENS_11GlobalGroupESJ_EEERNSB_INS_7MixElemEJSE_EEERNSB_IiJSE_EEERNSB_ISH_JSM_EEERNSB_IdJSM_EEERNSB_ISI_JSC_EEEEEEvT_RKT0_DpOT1_.extracted+0x4ee>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
CMP $0x2,%R10D	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JE 49adee <_ZNK6Kripke14DispatchHelperINS_12ArchT_OpenMPEEclINS_11LayoutT_DGZE14ScatteringSdomJRNS_6SdomIdES7_RNS_4Core3SetESA_SA_RNS8_5FieldIdJNS_6MomentENS_5GroupENS_4ZoneEEEESG_RNSB_IdJNS_8MaterialENS_8LegendreENS_11GlobalGroupESJ_EEERNSB_INS_7MixElemEJSE_EEERNSB_IiJSE_EEERNSB_ISH_JSM_EEERNSB_IdJSM_EEERNSB_ISI_JSC_EEEEEEvT_RKT0_DpOT1_.extracted+0x4ae>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
CMP $0x3,%R10D	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV -0x68(%RBP),%R13	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
JNE 49ae6a <_ZNK6Kripke14DispatchHelperINS_12ArchT_OpenMPEEclINS_11LayoutT_DGZE14ScatteringSdomJRNS_6SdomIdES7_RNS_4Core3SetESA_SA_RNS8_5FieldIdJNS_6MomentENS_5GroupENS_4ZoneEEEESG_RNSB_IdJNS_8MaterialENS_8LegendreENS_11GlobalGroupESJ_EEERNSB_INS_7MixElemEJSE_EEERNSB_IiJSE_EEERNSB_ISH_JSM_EEERNSB_IdJSM_EEERNSB_ISI_JSC_EEEEEEvT_RKT0_DpOT1_.extracted+0x52a>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
LEA (%R9,%RSI,1),%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV 0x10(%R14,%RAX,8),%RDX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
IMUL %RBX,%RDX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
MOV -0x58(%RBP),%R11	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
LEA (%R11,%R13,1),%RDI	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
ADD -0x38(%RBP),%RDI	1	0.25	0.25	0.25	0.25	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.33
MOV -0x30(%RBP),%R10	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
ADD %R10,%RDI	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
ADD %RDX,%RDI	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV %R11,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOVSD (%R15,%RDI,8),%XMM1	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
MOV %R10,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MULSD 0x10(%R12,%RAX,8),%XMM1	1	0	0	0	0	0	0.33	0.33	0.33	0.50	0.50	0	0	0	0	3	0.50
ADDSD %XMM1,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	3	0.50
JMP 49adfa <_ZNK6Kripke14DispatchHelperINS_12ArchT_OpenMPEEclINS_11LayoutT_DGZE14ScatteringSdomJRNS_6SdomIdES7_RNS_4Core3SetESA_SA_RNS8_5FieldIdJNS_6MomentENS_5GroupENS_4ZoneEEEESG_RNSB_IdJNS_8MaterialENS_8LegendreENS_11GlobalGroupESJ_EEERNSB_INS_7MixElemEJSE_EEERNSB_IiJSE_EEERNSB_ISH_JSM_EEERNSB_IdJSM_EEERNSB_ISI_JSC_EEEEEEvT_RKT0_DpOT1_.extracted+0x4ba>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	0	1
MOV -0x68(%RBP),%R13	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV -0x30(%RBP),%RDI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV -0x58(%RBP),%RDX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV -0x118(%RBP),%R11	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
ADD %RSI,%R11	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV (%R14,%R11,8),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
IMUL %RBX,%RAX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
MOV %RDX,%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
ADD %R13,%RDX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
ADD -0x38(%RBP),%RDX	1	0.25	0.25	0.25	0.25	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.33
ADD %RDI,%RDX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
ADD %RAX,%RDX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOVSD (%R15,%RDX,8),%XMM1	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
MULSD (%R12,%R11,8),%XMM1	1	0	0	0	0	0	0.33	0.33	0.33	0.50	0.50	0	0	0	0	3	0.50
ADDSD %XMM1,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	3	0.50
JMP 49ae3a <_ZNK6Kripke14DispatchHelperINS_12ArchT_OpenMPEEclINS_11LayoutT_DGZE14ScatteringSdomJRNS_6SdomIdES7_RNS_4Core3SetESA_SA_RNS8_5FieldIdJNS_6MomentENS_5GroupENS_4ZoneEEEESG_RNSB_IdJNS_8MaterialENS_8LegendreENS_11GlobalGroupESJ_EEERNSB_INS_7MixElemEJSE_EEERNSB_IiJSE_EEERNSB_ISH_JSM_EEERNSB_IdJSM_EEERNSB_ISI_JSC_EEEEEEvT_RKT0_DpOT1_.extracted+0x4fa>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	0	1
MOV -0x68(%RBP),%R13	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV -0x30(%RBP),%RDI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV -0x58(%RBP),%R10	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
ADD %RSI,%R9	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV (%R14,%R9,8),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
IMUL %RBX,%RAX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
MOV %R13,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
ADD %R10,%RDX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
ADD -0x38(%RBP),%RDX	1	0.25	0.25	0.25	0.25	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.33
ADD %RDI,%RDX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
ADD %RAX,%RDX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOVSD (%R15,%RDX,8),%XMM1	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
MULSD (%R12,%R9,8),%XMM1	1	0	0	0	0	0	0.33	0.33	0.33	0.50	0.50	0	0	0	0	3	0.50
ADDSD %XMM1,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	3	0.50
JMP 49ac64 <_ZNK6Kripke14DispatchHelperINS_12ArchT_OpenMPEEclINS_11LayoutT_DGZE14ScatteringSdomJRNS_6SdomIdES7_RNS_4Core3SetESA_SA_RNS8_5FieldIdJNS_6MomentENS_5GroupENS_4ZoneEEEESG_RNSB_IdJNS_8MaterialENS_8LegendreENS_11GlobalGroupESJ_EEERNSB_INS_7MixElemEJSE_EEERNSB_IiJSE_EEERNSB_ISH_JSM_EEERNSB_IdJSM_EEERNSB_ISI_JSC_EEEEEEvT_RKT0_DpOT1_.extracted+0x324>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	0	1
MOV -0x30(%RBP),%RDI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
JMP 49ac64 <_ZNK6Kripke14DispatchHelperINS_12ArchT_OpenMPEEclINS_11LayoutT_DGZE14ScatteringSdomJRNS_6SdomIdES7_RNS_4Core3SetESA_SA_RNS8_5FieldIdJNS_6MomentENS_5GroupENS_4ZoneEEEESG_RNSB_IdJNS_8MaterialENS_8LegendreENS_11GlobalGroupESJ_EEERNSB_INS_7MixElemEJSE_EEERNSB_IiJSE_EEERNSB_ISH_JSM_EEERNSB_IdJSM_EEERNSB_ISI_JSC_EEEEEEvT_RKT0_DpOT1_.extracted+0x324>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	0	1

Function	_ZNK6Kripke14DispatchHelperINS_12ArchT_OpenMPEEclINS_11LayoutT_DGZE14ScatteringSdomJRNS_6SdomIdES7_RNS_4Core3SetESA_SA_RNS8_5FieldIdJNS_6MomentENS_5GroupENS_4ZoneEEEESG_RNSB_IdJNS_8MaterialENS_8LegendreENS_11GlobalGroupESJ_EEERNSB_INS_7MixElemEJSE_EEERNSB_IiJSE_EEERNSB_ISH_JSM_EEERNSB_IdJSM_EEERNSB_ISI_JSC_EEEEEEvT_RKT0_DpOT1_.extracted
Source file and lines	Scattering.cpp:87-97
Module	exec

The loop is defined in:

/beegfs/hackathon/users/eoseret/qaas_runs/170-850-6313/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/index/IndexValue.hpp:105,217
/beegfs/hackathon/users/eoseret/qaas_runs/170-850-6313/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/util/Layout.hpp:55
/beegfs/hackathon/users/eoseret/qaas_runs/170-850-6313/intel/Kripke/build/Kripke/src/Kripke/Kernel/Scattering.cpp:87-97
/beegfs/hackathon/users/eoseret/qaas_runs/170-850-6313/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/policy/loop/forall.hpp:59

Warnings:

Non-innermost loop: analyzing only self part (ignoring child loops).
Ignoring paths for analysis
Too many paths. Rerun with max-paths=9
RecMII not computed since number of paths is unknown or > max_paths
Streams not analyzed since number of paths is unknown or > max_paths

hoisting them (moving them outside the loop)
turning them into conditional moves, MIN or MAX

Ex: if (x<0) x=0 => x = (x<0 ? 0 : x) (or MAX(0,x) after defining the corresponding macro)

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 15.67 to 8.67 cycles (1.81x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

Workaround

Try another compiler or update/tune your current one:
- recompile with ffast-math (included in Ofast) to extend loop vectorization to FP reductions.
Remove inter-iterations dependences from your loop and make it unit-stride:
- If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly: C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)
- If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

FMA

Presence of both ADD/SUB and MUL operations.

Workaround

Pass to your compiler a micro-architecture specialization option:
- use march=native
Try to change order in which elements are evaluated (using parentheses) in arithmetic expressions containing both ADD/SUB and MUL operations to enable your compiler to generate FMA instructions wherever possible. For instance a + b*c is a valid FMA (MUL then ADD). However (a+b)* c cannot be translated into an FMA (ADD then MUL).

Type of elements and instruction set

8 SSE or AVX instructions are processing arithmetic or math operations on double precision FP elements in scalar mode (one at a time).

Matching between your loop (in the source code) and the binary loop

The binary loop is composed of 8 FP arithmetical operations:

4: addition or subtraction
4: multiply

The binary loop is loading 284 bytes (35 double precision FP elements). The binary loop is storing 24 bytes (3 double precision FP elements).

Arithmetic intensity

Arithmetic intensity is 0.03 FP operations per loaded or stored byte.

General properties

nb instructions	95
nb uops	94
loop length	410
used x86 registers	14
used mmx registers	0
used xmm registers	2
used ymm registers	0
used zmm registers	0
nb stack references	14
ADD-SUB / MUL ratio	1.00

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	15.67 cycles
front end	15.67 cycles

Back-end

	ALU0/BRU0	ALU1	ALU2	ALU3	BRU1	AGU0	AGU1	AGU2	FP0	FP1	FP2	FP3	FP4	FP5
uops	11.00	11.00	11.00	11.00	5.00	13.00	13.00	13.00	2.00	2.00	2.00	2.00	0.50	0.50
cycles	11.00	11.00	11.00	11.00	5.00	13.00	13.00	13.00	2.00	2.00	2.00	2.00	0.50	0.50

Execution ports to units layout:

ALU0/BRU0: ALU
ALU1: ALU
ALU2: ALU
ALU3: ALU
BRU1:
AGU0 (256 bits): store address, load
AGU1 (256 bits): store address, load
AGU2 (256 bits): store address, load
FP0 (256 bits): VPU, DIV/SQRT
FP1 (256 bits): VPU, DIV/SQRT
FP2 (256 bits): VPU
FP3 (256 bits): VPU
FP4 (256 bits): FP store data
FP5 (256 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	15.67
Dispatch	13.00
Overall L1	15.67

Vectorization ratios

INT

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
other	0%

all	14%
load	0%
store	0%
mul	0%
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	100%

INT+FP

all	6%
load	0%
store	0%
mul	0%
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	16%

Vector efficiency ratios

INT

all	11%
load	12%
store	12%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
other	10%

all	14%
load	12%
store	12%
mul	12%
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	25%

INT+FP

all	12%
load	12%
store	12%
mul	12%
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	13%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 15.67 cycles. At this rate:

18% of peak load performance is reached (18.13 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
2% of peak store performance is reached (1.53 out of 64.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

ASM code

In the binary file, the address of the loop is: 49acb0

Instruction	Nb FU	ALU0/BRU0	ALU1	ALU2	ALU3	BRU1	AGU0	AGU1	AGU2	FP0	FP1	FP2	FP3	FP4	FP5	Latency	Recip. throughput
XORPD %XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV -0x150(%RBP),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
ADD %R8,%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
ADD -0x148(%RBP),%RAX	1	0.25	0.25	0.25	0.25	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.33
MOV -0x128(%RBP),%RDX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MULSD (%RDX,%RAX,8),%XMM0	1	0	0	0	0	0	0.33	0.33	0.33	0.50	0.50	0	0	0	0	3	0.50
MOV -0x140(%RBP),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
ADD %R8,%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV -0x130(%RBP),%RDX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
ADDSD (%RDX,%RAX,8),%XMM0	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0.50	0.50	0	0	3	0.50
MOVSD %XMM0,(%RDX,%RAX,8)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0.50	0.50	1	1
LEA 0x1(%R8),%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
CMP -0x120(%RBP),%R8	1	0.25	0.25	0.25	0.25	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.33
MOV %RAX,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
JE 49ac00 <_ZNK6Kripke14DispatchHelperINS_12ArchT_OpenMPEEclINS_11LayoutT_DGZE14ScatteringSdomJRNS_6SdomIdES7_RNS_4Core3SetESA_SA_RNS8_5FieldIdJNS_6MomentENS_5GroupENS_4ZoneEEEESG_RNSB_IdJNS_8MaterialENS_8LegendreENS_11GlobalGroupESJ_EEERNSB_INS_7MixElemEJSE_EEERNSB_IiJSE_EEERNSB_ISH_JSM_EEERNSB_IdJSM_EEERNSB_ISI_JSC_EEEEEEvT_RKT0_DpOT1_.extracted+0x2c0>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
MOV -0x60(%RBP),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
ADD %R8,%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV -0x138(%RBP),%RDX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOVSXD (%RDX,%RAX,4),%R10	1	0.25	0.25	0.25	0.25	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.33
TEST %R10,%R10	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JLE 49ac60 <_ZNK6Kripke14DispatchHelperINS_12ArchT_OpenMPEEclINS_11LayoutT_DGZE14ScatteringSdomJRNS_6SdomIdES7_RNS_4Core3SetESA_SA_RNS8_5FieldIdJNS_6MomentENS_5GroupENS_4ZoneEEEESG_RNSB_IdJNS_8MaterialENS_8LegendreENS_11GlobalGroupESJ_EEERNSB_INS_7MixElemEJSE_EEERNSB_IiJSE_EEERNSB_ISH_JSM_EEERNSB_IdJSM_EEERNSB_ISI_JSC_EEEEEEvT_RKT0_DpOT1_.extracted+0x320>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
MOV %R13,-0x68(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV -0x110(%RBP),%RDX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV (%RDX,%RAX,8),%R9	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
ADD %R9,%R10	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
LEA 0x1(%R9),%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
CMP %RAX,%R10	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV %RAX,-0x118(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
CMOVLE %RAX,%R10	1	0.50	0	0	0.50	0	0	0	0	0	0	0	0	0	0	1	0.50
SUB %R9,%R10	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
XORPD %XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
CMP $0x4,%R10	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JB 49ad89 <_ZNK6Kripke14DispatchHelperINS_12ArchT_OpenMPEEclINS_11LayoutT_DGZE14ScatteringSdomJRNS_6SdomIdES7_RNS_4Core3SetESA_SA_RNS8_5FieldIdJNS_6MomentENS_5GroupENS_4ZoneEEEESG_RNSB_IdJNS_8MaterialENS_8LegendreENS_11GlobalGroupESJ_EEERNSB_INS_7MixElemEJSE_EEERNSB_IiJSE_EEERNSB_ISH_JSM_EEERNSB_IdJSM_EEERNSB_ISI_JSC_EEEEEEvT_RKT0_DpOT1_.extracted+0x449>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
MOV %R10,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
SHR $0x2,%RSI	1	0	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LEA (,%R9,8),%R11	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09
MOV %R10,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
AND $-0x4,%RSI	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
AND $0x3,%R10D	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
CMP $0x1,%R10	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JE 49ae2e <_ZNK6Kripke14DispatchHelperINS_12ArchT_OpenMPEEclINS_11LayoutT_DGZE14ScatteringSdomJRNS_6SdomIdES7_RNS_4Core3SetESA_SA_RNS8_5FieldIdJNS_6MomentENS_5GroupENS_4ZoneEEEESG_RNSB_IdJNS_8MaterialENS_8LegendreENS_11GlobalGroupESJ_EEERNSB_INS_7MixElemEJSE_EEERNSB_IiJSE_EEERNSB_ISH_JSM_EEERNSB_IdJSM_EEERNSB_ISI_JSC_EEEEEEvT_RKT0_DpOT1_.extracted+0x4ee>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
CMP $0x2,%R10D	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JE 49adee <_ZNK6Kripke14DispatchHelperINS_12ArchT_OpenMPEEclINS_11LayoutT_DGZE14ScatteringSdomJRNS_6SdomIdES7_RNS_4Core3SetESA_SA_RNS8_5FieldIdJNS_6MomentENS_5GroupENS_4ZoneEEEESG_RNSB_IdJNS_8MaterialENS_8LegendreENS_11GlobalGroupESJ_EEERNSB_INS_7MixElemEJSE_EEERNSB_IiJSE_EEERNSB_ISH_JSM_EEERNSB_IdJSM_EEERNSB_ISI_JSC_EEEEEEvT_RKT0_DpOT1_.extracted+0x4ae>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
CMP $0x3,%R10D	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV -0x68(%RBP),%R13	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
JNE 49ae6a <_ZNK6Kripke14DispatchHelperINS_12ArchT_OpenMPEEclINS_11LayoutT_DGZE14ScatteringSdomJRNS_6SdomIdES7_RNS_4Core3SetESA_SA_RNS8_5FieldIdJNS_6MomentENS_5GroupENS_4ZoneEEEESG_RNSB_IdJNS_8MaterialENS_8LegendreENS_11GlobalGroupESJ_EEERNSB_INS_7MixElemEJSE_EEERNSB_IiJSE_EEERNSB_ISH_JSM_EEERNSB_IdJSM_EEERNSB_ISI_JSC_EEEEEEvT_RKT0_DpOT1_.extracted+0x52a>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
LEA (%R9,%RSI,1),%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV 0x10(%R14,%RAX,8),%RDX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
IMUL %RBX,%RDX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
MOV -0x58(%RBP),%R11	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
LEA (%R11,%R13,1),%RDI	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
ADD -0x38(%RBP),%RDI	1	0.25	0.25	0.25	0.25	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.33
MOV -0x30(%RBP),%R10	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
ADD %R10,%RDI	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
ADD %RDX,%RDI	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV %R11,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOVSD (%R15,%RDI,8),%XMM1	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
MOV %R10,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MULSD 0x10(%R12,%RAX,8),%XMM1	1	0	0	0	0	0	0.33	0.33	0.33	0.50	0.50	0	0	0	0	3	0.50
ADDSD %XMM1,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	3	0.50
JMP 49adfa <_ZNK6Kripke14DispatchHelperINS_12ArchT_OpenMPEEclINS_11LayoutT_DGZE14ScatteringSdomJRNS_6SdomIdES7_RNS_4Core3SetESA_SA_RNS8_5FieldIdJNS_6MomentENS_5GroupENS_4ZoneEEEESG_RNSB_IdJNS_8MaterialENS_8LegendreENS_11GlobalGroupESJ_EEERNSB_INS_7MixElemEJSE_EEERNSB_IiJSE_EEERNSB_ISH_JSM_EEERNSB_IdJSM_EEERNSB_ISI_JSC_EEEEEEvT_RKT0_DpOT1_.extracted+0x4ba>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	0	1
MOV -0x68(%RBP),%R13	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV -0x30(%RBP),%RDI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV -0x58(%RBP),%RDX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV -0x118(%RBP),%R11	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
ADD %RSI,%R11	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV (%R14,%R11,8),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
IMUL %RBX,%RAX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
MOV %RDX,%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
ADD %R13,%RDX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
ADD -0x38(%RBP),%RDX	1	0.25	0.25	0.25	0.25	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.33
ADD %RDI,%RDX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
ADD %RAX,%RDX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOVSD (%R15,%RDX,8),%XMM1	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
MULSD (%R12,%R11,8),%XMM1	1	0	0	0	0	0	0.33	0.33	0.33	0.50	0.50	0	0	0	0	3	0.50
ADDSD %XMM1,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	3	0.50
JMP 49ae3a <_ZNK6Kripke14DispatchHelperINS_12ArchT_OpenMPEEclINS_11LayoutT_DGZE14ScatteringSdomJRNS_6SdomIdES7_RNS_4Core3SetESA_SA_RNS8_5FieldIdJNS_6MomentENS_5GroupENS_4ZoneEEEESG_RNSB_IdJNS_8MaterialENS_8LegendreENS_11GlobalGroupESJ_EEERNSB_INS_7MixElemEJSE_EEERNSB_IiJSE_EEERNSB_ISH_JSM_EEERNSB_IdJSM_EEERNSB_ISI_JSC_EEEEEEvT_RKT0_DpOT1_.extracted+0x4fa>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	0	1
MOV -0x68(%RBP),%R13	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV -0x30(%RBP),%RDI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV -0x58(%RBP),%R10	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
ADD %RSI,%R9	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV (%R14,%R9,8),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
IMUL %RBX,%RAX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
MOV %R13,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
ADD %R10,%RDX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
ADD -0x38(%RBP),%RDX	1	0.25	0.25	0.25	0.25	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.33
ADD %RDI,%RDX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
ADD %RAX,%RDX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOVSD (%R15,%RDX,8),%XMM1	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
MULSD (%R12,%R9,8),%XMM1	1	0	0	0	0	0	0.33	0.33	0.33	0.50	0.50	0	0	0	0	3	0.50
ADDSD %XMM1,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	3	0.50
JMP 49ac64 <_ZNK6Kripke14DispatchHelperINS_12ArchT_OpenMPEEclINS_11LayoutT_DGZE14ScatteringSdomJRNS_6SdomIdES7_RNS_4Core3SetESA_SA_RNS8_5FieldIdJNS_6MomentENS_5GroupENS_4ZoneEEEESG_RNSB_IdJNS_8MaterialENS_8LegendreENS_11GlobalGroupESJ_EEERNSB_INS_7MixElemEJSE_EEERNSB_IiJSE_EEERNSB_ISH_JSM_EEERNSB_IdJSM_EEERNSB_ISI_JSC_EEEEEEvT_RKT0_DpOT1_.extracted+0x324>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	0	1
MOV -0x30(%RBP),%RDI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
JMP 49ac64 <_ZNK6Kripke14DispatchHelperINS_12ArchT_OpenMPEEclINS_11LayoutT_DGZE14ScatteringSdomJRNS_6SdomIdES7_RNS_4Core3SetESA_SA_RNS8_5FieldIdJNS_6MomentENS_5GroupENS_4ZoneEEEESG_RNSB_IdJNS_8MaterialENS_8LegendreENS_11GlobalGroupESJ_EEERNSB_INS_7MixElemEJSE_EEERNSB_IiJSE_EEERNSB_ISH_JSM_EEERNSB_IdJSM_EEERNSB_ISI_JSC_EEEEEEvT_RKT0_DpOT1_.extracted+0x324>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	0	1

Report Configuration

Code clean check

Workaround

Vectorization

Details

Workaround

Execution units bottlenecks

FMA

Workaround

Type of elements and instruction set

Matching between your loop (in the source code) and the binary loop

Arithmetic intensity

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code

Code clean check

Workaround

Vectorization

Details

Workaround

Execution units bottlenecks

FMA

Workaround

Type of elements and instruction set

Matching between your loop (in the source code) and the binary loop

Arithmetic intensity

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code