	*************************************************
	*                                               *
	*          ONE-View report generation           *
	*                                               *
	*************************************************

[MAQAO] Info: Experiment configuration summary is available adding -dbg=1 in command line

* [MAQAO] Warning: Experiment directory /beegfs/hackathon/users/eoseret/qaas_runs_test/178-668-9279/intel/Kripke/run/oneview_runs/compilers/gcc_9/oneview_results_1786695265 already exists and is reused.
           It can be replaced using --replace in the command line.
[MAQAO] Info: 
[MAQAO] Info: START THE APPLICATION PROFILING
[MAQAO] Info: -> RUNNING THE PROFILER...
[MAQAO] Info:   LPROF has already been run
[MAQAO] Info: STOP THE APPLICATION PROFILING
[MAQAO] Info: 
[MAQAO] Info: START FUNCTIONS AND LOOPS ANALYSIS ...
[MAQAO] Info: STOP FUNCTIONS AND LOOPS ANALYSIS ...
[MAQAO] Info: 
[MAQAO] Info: START THE REPORT GENERATION
[MAQAO] Info: -> ONE-VIEW EXPERIMENT DIRECTORY: /beegfs/hackathon/users/eoseret/qaas_runs_test/178-668-9279/intel/Kripke/run/oneview_runs/compilers/gcc_9/oneview_results_1786695265


+====================================================================================================================+
+                                                    1  -  GLOBAL                                                    +
+====================================================================================================================+


+--------------------------------------------------------------------------------------------------------------------+
+                                             1.1  -  Experiment Summary                                             +
+--------------------------------------------------------------------------------------------------------------------+

  Application:			/beegfs/hackathon/users/eoseret/qaas_runs_test/178-668-9279/intel/Kripke/run/binaries/gcc_9/exec
  Timestamp:			2026-08-14 10:14:25
  Universal Timestamp:		1786695265
  Experiment Type:		MPI; OpenMP; Throughput; 
  Machine:			isix06.benchmarkcenter.megware.com
  Architecture:			x86_64
  Micro Architecture:		GRANITE_RAPIDS
  Model Name:			Intel(R) Xeon(R) 6972P
  Cache Size:			491520 KB
  Number of Cores:		96
  OS Version:			Linux 5.14.0-687.31.1.el9_8.x86_64 #1 SMP PREEMPT_DYNAMIC Sat Aug 1 05:38:01 EDT 2026
  Compilation Options:		
		exec: GNU C++17 15.1.0 -march=graniterapids -mprefer-vector-width=128 -g -O3 -O2 -O3 -std=c++17 -funroll-loops -ffast-math -fno-omit-frame-pointer -fcf-protection=none -fPIC -fopenmp 
  Number of processes observed:	1
  Number of threads observed:	192
  MAQAO version:		2026.1.0
  MAQAO build:			6d1be1d51c1e63266254997eb301734a7264775d::20260810-150026




+--------------------------------------------------------------------------------------------------------------------+
+                                               1.2  -  Global Metrics                                               +
+--------------------------------------------------------------------------------------------------------------------+

  Total Time:				38.89 s
  Max (Thread Active Time):		35.63 s
  Average Active Time:			22.37 s
  Activity Ratio:			58.1 %
  Average number of active threads:	110.434
  Affinity Stability:			97.7 %
  Time spent in analyzed loops:		89.6 %
  Time spent in analyzed innermost loops: 25.6 %
  Time spent in user code:		89.6 %
  Compilation Options Score:		87.5
  Array Access Efficiency:		98.0 %

   Potential Speedups
  ----------------------------------------------------
  Perfect Flow Complexity:		1.00
  Perfect OpenMP/MPI/Pthread/TBB:	1.04
  Perfect OpenMP/MPI/Pthread/TBB + Load Distribution:	1.76
  If No Scalar Integer:
      Potential Speedup:		1.23
      Nb Loops to get 80%:		1
  If FP Vectorized:
      Potential Speedup:		1.45
      Nb Loops to get 80%:		1
  If Fully Vectorized:
      Potential Speedup:		3.43
      Nb Loops to get 80%:		3
  If Only FP Arithmetic:
      Potential Speedup:		2.18
      Nb Loops to get 80%:		2




+--------------------------------------------------------------------------------------------------------------------+
+                                             1.3  -  Potential Speedups                                             +
+--------------------------------------------------------------------------------------------------------------------+

  If No Scalar Integer:
      Number of loops   | 1      | 2      | 5      | 7      | 10     | 
      Cumulated Speedup | 1.2270 | 1.2270 | 1.2270 | 1.2270 | 1.2270 | 
  Top 5 loops:
    exec - 2287:	1.227
    exec - 2186:	1.227
    exec - 2506:	1.227
    exec - 2502:	1.227
    exec - 2288:	1.227

  If FP Vectorized:
      Number of loops   | 1      | 2      | 5      | 7      | 10     | 
      Cumulated Speedup | 1.3842 | 1.4019 | 1.4343 | 1.4442 | 1.4462 | 
  Top 5 loops:
    exec - 2287:	1.3842
    exec - 2073:	1.4019
    exec - 2509:	1.4139
    exec - 2503:	1.4261
    exec - 1962:	1.4343

  If Fully Vectorized:
      Number of loops   | 1      | 2      | 5      | 7      | 10     | 
      Cumulated Speedup | 2.0850 | 2.7529 | 3.3383 | 3.4155 | 3.4299 | 
  Top 5 loops:
    exec - 2287:	2.085
    exec - 2073:	2.7529
    exec - 1962:	3.2087
    exec - 2509:	3.2725
    exec - 2503:	3.3383

  If Only FP Arithmetic:
      Number of loops   | 1      | 2      | 5      | 7      | 10     | 
      Cumulated Speedup | 1.9016 | 2.0823 | 2.1752 | 2.1752 | 2.1752 | 
  Top 5 loops:
    exec - 2287:	1.9016
    exec - 2073:	2.0823
    exec - 1962:	2.1739
    exec - 2288:	2.1747
    exec - 2500:	2.1752



+====================================================================================================================+
+                                                   2  -  SUMMARY                                                    +
+====================================================================================================================+


+--------------------------------------------------------------------------------------------------------------------+
+                                             2.1  -  EXPERIMENT QUALITY                                             +
+--------------------------------------------------------------------------------------------------------------------+

  [4 / 4] Application profile is long enough (35.63 s)
To have good quality measurements, it is advised that the application profiling time is greater than 10 seconds.

  [3 / 3] Most of time spent in analyzed modules comes from functions with source/debug info
-g option gives access to debugging informations, such are source locations.

  [2.9998831030625 / 3] Most of time spent in analyzed modules (100.00%) comes from functions compiled with architecture specialization option
-march=graniterapids


  [3 / 3] Most of time spent in analyzed modules comes from functions with compilation options informations and
-fno-omit-frame-pointer is present
-fno-omit-frame-pointer improves the accuracy of callchains found during the application profiling.

  [3 / 3] Optimization level option is correctly used


  [3 / 3] Host configuration allows retrieval of all necessary metrics.


  [2 / 2] Application is correctly profiled ("Others" category represents 0.00 % of the execution time)
To have a representative profiling, it is advised that the category "Others" represents less than 20% of the execution
time in order to analyze as much as possible of the user code

  [1 / 1] Lstopo present. The Topology lstopo report will be generated.



+--------------------------------------------------------------------------------------------------------------------+
+                                                2.2  -  CODE QUALITY                                                +
+--------------------------------------------------------------------------------------------------------------------+

  [4 / 4] Enough time of the experiment time spent in analyzed loops (89.63%)
If the time spent in analyzed loops is less than 30%, standard loop optimizations will have a limited impact on
application performances.

  [2 / 4] A significant amount of threads are idle (42.48%)
On average, more than 10% of observed threads are idle. Such threads are probably IO/sync waiting. Some hints: use
faster filesystems to read/write data, improve parallel load balancing and/or scheduling.

  [2 / 4] CPU activity is below 90% (58.09%)
CPU cores are idle more than 10% of time. Threads supposed to run on these cores are probably IO/sync waiting. Some
hints: use faster filesystems to read/write data, improve parallel load balancing and/or scheduling.

  [4 / 4] Loop profile is not flat
At least one loop coverage is greater than 4% (63.60%), representing an hotspot for the application

  [4 / 4] Enough time of the experiment time spent in analyzed innermost loops (25.59%)
If the time spent in analyzed innermost loops is less than 15%, standard innermost loop optimizations such as
vectorisation will have a limited impact on application performances.

  [4 / 4] Affinity is good (97.65%)
Threads are not migrating to CPU cores: probably successfully pinned

  [3 / 3] Less than 10% (0.00%) is spend in BLAS1 operations
It could be more efficient to inline by hand BLAS1 operations

  [0 / 3] Too many functions do not use all threads
Functions running on a reduced number of threads (typically sequential code) cover at least 10% of application
walltime (31.01%). Check both "Max Inclusive Time Over Threads" and "Nb Threads" in Functions or Loops tabs and
consider parallelizing sequential regions or improving parallelization of regions running on a reduced number of
threads

  [0 / 3] Cumulative Outermost/In between loops coverage (64.03%) greater than cumulative innermost loop coverage (25.59%)
Having cumulative Outermost/In between loops coverage greater than cumulative innermost loop coverage will make loop
optimization more complex

  [2 / 2] Less than 10% (0.00%) is spend in BLAS2 operations
BLAS2 calls usually could make a poor cache usage and could benefit from inlining.

  [2 / 2] Less than 10% (0.00%) is spend in Libm/SVML (special functions)



+--------------------------------------------------------------------------------------------------------------------+
+                                               2.3  -  LOOPS OVERVIEW                                               +
+--------------------------------------------------------------------------------------------------------------------+

  Top 5 loops:
   + exec - 2287:
     analysis: Execution Time: 63 % - Vectorization Ratio: 68.09 % - Vector Length Use: 21.01 %
     Loop Computation Issues: 2
        [2] [SA] Presence of a large number of scalar integer instructions - Simplify loop structure, perform loop
            splitting or perform unroll and jam. This issue costs 2 points.
     Control Flow Issues: 38
        [36] [SA] Too many paths (32 paths) - Simplify control structure. There are 32 issues ( = paths) costing 1
            point each with a malus of 4 points.
        [2] [SA] Non innermost loop (InBetween) - Collapse loop with innermost ones. This issue costs 2 points.
     Data Access Issues: 29
        [28] [SA] Presence of expensive instructions (GATHER/SCATTER) - Use array restructuring. There are 7 issues (=
            instructions) costing 4 points each.
        [1] [SA] Presence of special instructions executing on a single port (BLEND/MERGE) - Simplify data access and
            try to get stride 1 access. There are 1 issues (= instructions) costing 1 point each.
     Vectorization Roadblocks: 38
        [36] [SA] Too many paths (32 paths) - Simplify control structure. There are 32 issues ( = paths) costing 1
            point each with a malus of 4 points.
        [2] [SA] Non innermost loop (InBetween) - Collapse loop with innermost ones. This issue costs 2 points.
     Inefficient Vectorization: 29
        [28] [SA] Presence of expensive instructions (GATHER/SCATTER) - Use array restructuring. There are 7 issues (=
            instructions) costing 4 points each.
        [1] [SA] Presence of special instructions executing on a single port (BLEND/MERGE) - Simplify data access and
            try to get stride 1 access. There are 1 issues (= instructions) costing 1 point each.

   + exec - 2073:
     analysis: Execution Time: 15 % - Vectorization Ratio: 100.00 % - Vector Length Use: 25.00 %

   + exec - 1962:
     analysis: Execution Time: 6 % - Vectorization Ratio: 100.00 % - Vector Length Use: 25.00 %

   + exec - 2509:
     analysis: Execution Time: 1 % - Vectorization Ratio: 7.41 % - Vector Length Use: 13.43 %
     Loop Computation Issues: 32
        [32] [SA] Presence of expensive FP instructions - Perform hoisting, change algorithm, use SVML or proper
            numerical library or perform value profiling (count the number of distinct input values). There are 8
            issues (= instructions) costing 4 points each.
     Data Access Issues: 4
        [4] [SA] Presence of constant non unit stride data access - Use array restructuring, perform loop interchange
            or use gather instructions to lower a bit the cost. There are 2 issues ( = data accesses) costing 2 point
            each.
     Vectorization Roadblocks: 4
        [4] [SA] Presence of constant non unit stride data access - Use array restructuring, perform loop interchange
            or use gather instructions to lower a bit the cost. There are 2 issues ( = data accesses) costing 2 point
            each.

   + exec - 2503:
     analysis: Execution Time: 1 % - Vectorization Ratio: 7.27 % - Vector Length Use: 13.41 %
     Loop Computation Issues: 32
        [32] [SA] Presence of expensive FP instructions - Perform hoisting, change algorithm, use SVML or proper
            numerical library or perform value profiling (count the number of distinct input values). There are 8
            issues (= instructions) costing 4 points each.
     Data Access Issues: 24
        [24] [SA] Presence of constant non unit stride data access - Use array restructuring, perform loop interchange
            or use gather instructions to lower a bit the cost. There are 12 issues ( = data accesses) costing 2
            point each.
     Vectorization Roadblocks: 24
        [24] [SA] Presence of constant non unit stride data access - Use array restructuring, perform loop interchange
            or use gather instructions to lower a bit the cost. There are 12 issues ( = data accesses) costing 2
            point each.



+====================================================================================================================+
+                                                 3  -  APPLICATION                                                  +
+====================================================================================================================+


+--------------------------------------------------------------------------------------------------------------------+
+                                               3.1  -  Categorization                                               +
+--------------------------------------------------------------------------------------------------------------------+

   Category | IO     | Exe    | System  | Others  | Memory | String | MPI   | TBB   | OMP   | Pthread | Math  |
  ----------+--------+--------+---------+---------+--------+--------+-------+-------+-------+---------+-------+
   Time (%) | 0.00   | 89.63  | 0.55    | 0.00    | 0.00   | 0.28   | 0.00  | 0.00  | 9.54  | 0.00    | 0.00  |




+--------------------------------------------------------------------------------------------------------------------+
+                                          3.2  -  Function Based Profiling                                          +
+--------------------------------------------------------------------------------------------------------------------+

   Buckets                    | Nb Functions              | Coverage                  | Cumulated Coverage        |
  ----------------------------+---------------------------+---------------------------+---------------------------+
   > 8%                       | 2                         | 79.15                     | 79.15                     |
   4% to 8%                   | 2                         | 12.37                     | 91.52                     |
   2% to 4%                   | 2                         | 6.48                      | 98.00                     |
   1% to 2%                   | 0                         | 0.00                      | 98.00                     |
   0.5% to 1%                 | 2                         | 1.59                      | 99.59                     |
   0.25% to 0.5%              | 1                         | 0.28                      | 99.86                     |
   0.125% to 0.25%            | 0                         | 0.00                      | 99.86                     |
   < 0.125%                   | 16                        | 0.14                      | 100.00                    |




+--------------------------------------------------------------------------------------------------------------------+
+                                            3.3  -  Loop Based Profiling                                            +
+--------------------------------------------------------------------------------------------------------------------+

   Buckets                    | Nb Loops                  | Coverage                  | Cumulated Coverage        |
  ----------------------------+---------------------------+---------------------------+---------------------------+
   > 8%                       | 1                         | 15.51                     | 15.51                     |
   4% to 8%                   | 1                         | 6.88                      | 22.39                     |
   2% to 4%                   | 0                         | 0.00                      | 22.39                     |
   1% to 2%                   | 2                         | 2.42                      | 24.81                     |
   0.5% to 1%                 | 1                         | 0.77                      | 25.59                     |
   0.25% to 0.5%              | 0                         | 0.00                      | 25.59                     |
   0.125% to 0.25%            | 0                         | 0.00                      | 25.59                     |
   < 0.125%                   | 3                         | 0.00                      | 25.59                     |


+====================================================================================================================+
+                                                  4  -  FUNCTIONS                                                   +
+====================================================================================================================+


+--------------------------------------------------------------------------------------------------------------------+
+                                              4.1  -  Top 10 Functions                                              +
+--------------------------------------------------------------------------------------------------------------------+

   Function                                               | Module              | Coverage (%)   | Time (s)       |
  --------------------------------------------------------+---------------------+----------------+----------------+
   std::enable_if<camp::concepts::all_of<camp::concept... | exec                | 63.63          | 14.23          |
   std::enable_if<camp::concepts::all_of<camp::concept... | exec                | 15.52          | 3.47           |
   std::enable_if<camp::concepts::all_of<camp::concept... | exec                | 6.88           | 1.54           |
   gomp_team_barrier_wait_end                             | libgomp.so.1.0.0    | 5.49           | 1.23           |
   gomp_barrier_wait_end                                  | libgomp.so.1.0.0    | 3.66           | 0.82           |
   std::enable_if<camp::concepts::all_of<camp::concept... | exec                | 2.82           | 0.63           |
   unknown_kernel_region                                  | kernel              | 0.81           | 0.18           |
   std::enable_if<camp::concepts::all_of<camp::concept... | exec                | 0.78           | 0.17           |
   __GI___strcasecmp_l_sse2                               | libc.so.6           | 0.28           | 11.84          |
   gomp_mutex_lock_slow                                   | libgomp.so.1.0.0    | 0.09           | 0.02           |


+====================================================================================================================+
+                                                    5  -  LOOPS                                                     +
+====================================================================================================================+


+--------------------------------------------------------------------------------------------------------------------+
+                                                5.1  -  Top 10 Loops                                                +
+--------------------------------------------------------------------------------------------------------------------+

   Loop Id        | Module              | Source Location                                        | Coverage (%)   |
  ----------------+---------------------+--------------------------------------------------------+----------------+
   2287           | exec                | TypedViewBase.hpp:216-216,Layout.hpp:187-187,For.hp... | 63.60          |
   2073           | exec                | LTimes.cpp:62-62,For.hpp:142-142                       | 15.51          |
   1962           | exec                | LPlusTimes.cpp:57-57,For.hpp:142-142                   | 6.88           |
   2509           | exec                | SweepSubdomain.cpp:88-106,For.hpp:142-142              | 1.22           |
   2503           | exec                | SweepSubdomain.cpp:88-106,For.hpp:142-142,Operators... | 1.20           |
   2186           | exec                | Population.cpp:58-58,For.hpp:142-142,Operators.hpp:... | 0.77           |
   2506           | exec                | SweepSubdomain.cpp:88-90,SweepSubdomain.cpp:95-95,S... | 0.19           |
   2502           | exec                | SweepSubdomain.cpp:88-90,SweepSubdomain.cpp:95-95,S... | 0.19           |
   2288           | exec                | TypedViewBase.hpp:216-216,For.hpp:142-142,Scatterin... | 0.02           |
   2500           | exec                | Collapse.hpp:129-129,For.hpp:142-142,RangeSegment.h... | 0.01           |





+====================================================================================================================+
+                                                     6  -  CQA                                                      +
+====================================================================================================================+


+--------------------------------------------------------------------------------------------------------------------+
+                                                   6.1  -  Loops                                                    +
+--------------------------------------------------------------------------------------------------------------------+





      6.1.1  -  Loop 2287 from exec
  ==========================================================================================================

The loop is defined in:
 - /beegfs/hackathon/users/eoseret/qaas_runs_test/178-668-9279/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/util/TypedViewBase.hpp:216
 - /beegfs/hackathon/users/eoseret/qaas_runs_test/178-668-9279/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/util/Layout.hpp:187
 - /beegfs/hackathon/users/eoseret/qaas_runs_test/178-668-9279/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/pattern/kernel/For.hpp:142
 - /beegfs/hackathon/users/eoseret/qaas_runs_test/178-668-9279/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/index/IndexValue.hpp:109
 - /beegfs/hackathon/users/eoseret/qaas_runs_test/178-668-9279/intel/Kripke/build/Kripke/src/Kripke/Kernel/Scattering.cpp:87-97


Warnings:
 - Non-innermost loop: analyzing only self part (ignoring child loops).
 - Ignoring paths for analysis
 - Too many paths. Rerun with max-paths=32
 - RecMII not computed since number of paths is unknown or > max_paths
 - Streams not analyzed since number of paths is unknown or > max_paths

Try to simplify control and/or increase the maximum number of paths per function/loop through the 'max-paths-nb' option.

This loop has 32 execution paths.

The presence of multiple execution paths is typically the main/first bottleneck.
Try to simplify control inside loop: ideally, try to remove all conditional expressions, for example by (if applicable):
 - hoisting them (moving them outside the loop)
 - turning them into conditional moves, MIN or MAX


Ex: if (x<0) x=0 => x = (x<0 ? 0 : x) (or MAX(0,x) after defining the corresponding macro)


      6.1.1.1  -  Path 1
  ----------------------------------------------------------------------------------------------------------

3% of peak computational performance is used (1.24 out of 32.00 FLOP per cycle (GFLOPS @ 1GHz))

      6.1.1.1.1  -  Code clean check
  ----------------------------------------------------------------------------------------------------------

Detected a slowdown caused by scalar integer instructions (typically used for address computation).
By removing them, you can lower the cost of an iteration from 27.50 to 19.50 cycles (1.41x speedup).

Workaround
 - Try to reorganize arrays of structures to structures of arrays
 - Consider to permute loops (see vectorization gain report)



      6.1.1.1.2  -  Vectorization
  ----------------------------------------------------------------------------------------------------------

Your loop is partially vectorized.
Only 21% of vector register length is used (average across all SSE/AVX instructions).
By fully vectorizing your loop, you can lower the cost of an iteration from 27.50 to 5.00 cycles (5.50x speedup).

Details
68% of SSE/AVX instructions are used in vector version (process two or more data elements in vector registers):
 - 84% of SSE/AVX loads are used in vector version.
 - 0% of SSE/AVX stores are used in vector version.
 - 77% of SSE/AVX fused multiply-add instructions are used in vector version.
 - 62% of SSE/AVX instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.
Since your execution units are vector units, only a fully vectorized loop can use their full power.


Workaround
 - Try another compiler or update/tune your current one
 - Remove inter-iterations dependences from your loop and make it unit-stride:
  * If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly:
C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)<<image_row_maj>>
  * If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA):
for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)



      6.1.1.1.3  -  Execution units bottlenecks
  ----------------------------------------------------------------------------------------------------------

Found no such bottlenecks but see expert reports for more complex bottlenecks.




      6.1.1.1.4  -  FMA
  ----------------------------------------------------------------------------------------------------------

Detected 16 FMA (fused multiply-add) operations.




      6.1.1.1.5  -  Complex instructions
  ----------------------------------------------------------------------------------------------------------

Detected COMPLEX INSTRUCTIONS.


Details
These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.
 - VGATHERQPD: 7 occurrences<<list_path_1_complex_1>>
 - VPMULLQ: 7 occurrences<<list_path_1_complex_2>>



      6.1.1.1.6  -  Gather/scatter instructions
  ----------------------------------------------------------------------------------------------------------

Detected gather/scatter instructions (typically caused by indirect accesses). By removing them, you can lower the cost of an iteration from 27.50 to 22.83 cycles (1.20x speedup).

Details
 - VGATHERQPD: 7 occurrences<<list_path_1_gather_scatter_1>>


Workaround
Try to simplify your code and/or replace indirect accesses with unit-stride ones.


      6.1.1.1.7  -  Type of elements and instruction set
  ----------------------------------------------------------------------------------------------------------

2 SSE or AVX instructions are processing arithmetic or math operations on double precision FP elements in scalar mode (one at a time).
8 SSE or AVX instructions are processing arithmetic or math operations on double precision FP elements in vector mode (two at a time).



      6.1.1.1.8  -  Matching between your loop (in the source code) and the binary loop
  ----------------------------------------------------------------------------------------------------------

The binary loop is composed of 34 FP arithmetical operations:
 - 18: addition or subtraction (16 inside FMA instructions)
 - 16: multiply (all inside FMA instructions)
The binary loop is loading 436 bytes (54 double precision FP elements).
The binary loop is storing 8 bytes (1 double precision FP elements).


      6.1.1.1.9  -  Arithmetic intensity
  ----------------------------------------------------------------------------------------------------------

Arithmetic intensity is 0.08 FP operations per loaded or stored byte.







      6.1.2  -  Loop 2073 from exec
  ==========================================================================================================

The loop is defined in:
 - /beegfs/hackathon/users/eoseret/qaas_runs_test/178-668-9279/intel/Kripke/build/Kripke/src/Kripke/Kernel/LTimes.cpp:62
 - /beegfs/hackathon/users/eoseret/qaas_runs_test/178-668-9279/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/pattern/kernel/For.hpp:142


It is main loop of related source loop which is unrolled by 2 (including vectorization).

      6.1.2.1  -  Path 1
  ----------------------------------------------------------------------------------------------------------

17% of peak computational performance is used (5.65 out of 32.00 FLOP per cycle (GFLOPS @ 1GHz))

      6.1.2.1.1  -  Vectorization
  ----------------------------------------------------------------------------------------------------------

Your loop is vectorized, but using only 128 out of 512 bits (SSE/AVX-128 instructions on AVX-512 processors).
<<image_2x64_512>>By fully vectorizing your loop, you can lower the cost of an iteration from 5.67 to 1.42 cycles (4.00x speedup).

Details
All SSE/AVX instructions are used in vector version (process two or more data elements in vector registers).
Since your execution units are vector units, only a fully vectorized loop can use their full power.


Workaround
Use vector aligned instructions:
 1) align your arrays on 64 bytes boundaries: replace { void *p = malloc (size); } with { void *p; posix_memalign (&p, 64, size); }.
 2) inform your compiler that your arrays are vector aligned: if array 'foo' is 64 bytes-aligned, define a pointer 'p_foo' as __builtin_assume_aligned (foo, 64) and use it instead of 'foo' in the loop.



      6.1.2.1.2  -  Execution units bottlenecks
  ----------------------------------------------------------------------------------------------------------

Found no such bottlenecks but see expert reports for more complex bottlenecks.




      6.1.2.1.3  -  FMA
  ----------------------------------------------------------------------------------------------------------

Detected 16 FMA (fused multiply-add) operations.




      6.1.2.1.4  -  Type of elements and instruction set
  ----------------------------------------------------------------------------------------------------------

8 SSE or AVX instructions are processing arithmetic or math operations on double precision FP elements in vector mode (two at a time).



      6.1.2.1.5  -  Matching between your loop (in the source code) and the binary loop
  ----------------------------------------------------------------------------------------------------------

The binary loop is composed of 32 FP arithmetical operations:
 - 16: addition or subtraction (all inside FMA instructions)
 - 16: multiply (all inside FMA instructions)
The binary loop is loading 256 bytes (32 double precision FP elements).
The binary loop is storing 128 bytes (16 double precision FP elements).


      6.1.2.1.6  -  Arithmetic intensity
  ----------------------------------------------------------------------------------------------------------

Arithmetic intensity is 0.08 FP operations per loaded or stored byte.







      6.1.3  -  Loop 1962 from exec
  ==========================================================================================================

The loop is defined in:
 - /beegfs/hackathon/users/eoseret/qaas_runs_test/178-668-9279/intel/Kripke/build/Kripke/src/Kripke/Kernel/LPlusTimes.cpp:57
 - /beegfs/hackathon/users/eoseret/qaas_runs_test/178-668-9279/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/pattern/kernel/For.hpp:142


It is main loop of related source loop which is unrolled by 2 (including vectorization).

      6.1.3.1  -  Path 1
  ----------------------------------------------------------------------------------------------------------

17% of peak computational performance is used (5.65 out of 32.00 FLOP per cycle (GFLOPS @ 1GHz))

      6.1.3.1.1  -  Vectorization
  ----------------------------------------------------------------------------------------------------------

Your loop is vectorized, but using only 128 out of 512 bits (SSE/AVX-128 instructions on AVX-512 processors).
<<image_2x64_512>>By fully vectorizing your loop, you can lower the cost of an iteration from 5.67 to 1.42 cycles (4.00x speedup).

Details
All SSE/AVX instructions are used in vector version (process two or more data elements in vector registers).
Since your execution units are vector units, only a fully vectorized loop can use their full power.


Workaround
Use vector aligned instructions:
 1) align your arrays on 64 bytes boundaries: replace { void *p = malloc (size); } with { void *p; posix_memalign (&p, 64, size); }.
 2) inform your compiler that your arrays are vector aligned: if array 'foo' is 64 bytes-aligned, define a pointer 'p_foo' as __builtin_assume_aligned (foo, 64) and use it instead of 'foo' in the loop.



      6.1.3.1.2  -  Execution units bottlenecks
  ----------------------------------------------------------------------------------------------------------

Found no such bottlenecks but see expert reports for more complex bottlenecks.




      6.1.3.1.3  -  FMA
  ----------------------------------------------------------------------------------------------------------

Detected 16 FMA (fused multiply-add) operations.




      6.1.3.1.4  -  Type of elements and instruction set
  ----------------------------------------------------------------------------------------------------------

8 SSE or AVX instructions are processing arithmetic or math operations on double precision FP elements in vector mode (two at a time).



      6.1.3.1.5  -  Matching between your loop (in the source code) and the binary loop
  ----------------------------------------------------------------------------------------------------------

The binary loop is composed of 32 FP arithmetical operations:
 - 16: addition or subtraction (all inside FMA instructions)
 - 16: multiply (all inside FMA instructions)
The binary loop is loading 256 bytes (32 double precision FP elements).
The binary loop is storing 128 bytes (16 double precision FP elements).


      6.1.3.1.6  -  Arithmetic intensity
  ----------------------------------------------------------------------------------------------------------

Arithmetic intensity is 0.08 FP operations per loaded or stored byte.







      6.1.4  -  Loop 2509 from exec
  ==========================================================================================================

The loop is defined in:
 - /beegfs/hackathon/users/eoseret/qaas_runs_test/178-668-9279/intel/Kripke/build/Kripke/src/Kripke/Kernel/SweepSubdomain.cpp:88-106
 - /beegfs/hackathon/users/eoseret/qaas_runs_test/178-668-9279/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/pattern/kernel/For.hpp:142


The related source loop is multi-versionned.

      6.1.4.1  -  Path 1
  ----------------------------------------------------------------------------------------------------------

4% of peak computational performance is used (1.38 out of 32.00 FLOP per cycle (GFLOPS @ 1GHz))

      6.1.4.1.1  -  Vectorization
  ----------------------------------------------------------------------------------------------------------

Your loop is probably not vectorized.
Only 13% of vector register length is used (average across all SSE/AVX instructions).
By vectorizing your loop, you can lower the cost of an iteration from 32.00 to 16.00 cycles (2.00x speedup).

Details
Store and arithmetical SSE/AVX instructions are used in scalar version (process only one data element in vector registers).
Since your execution units are vector units, only a vectorized loop can use their full power.


Workaround
 - Try another compiler or update/tune your current one
 - Remove inter-iterations dependences from your loop and make it unit-stride:
  * If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly:
C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)<<image_row_maj>>
  * If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA):
for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)



      6.1.4.1.2  -  Execution units bottlenecks
  ----------------------------------------------------------------------------------------------------------

Performance is limited by execution of divide and square root operations (the divide/square root unit is a bottleneck).

By removing all these bottlenecks, you can lower the cost of an iteration from 32.00 to 13.00 cycles (2.46x speedup).


Workaround
 - Reduce the number of division or square root instructions:
  * If denominator is constant over iterations, use reciprocal (replace x/y with x*(1/y)). Check precision impact. This will be done by your compiler with ffast-math or Ofast
 - Check whether you really need double precision. If not, switch to single precision to speedup execution





      6.1.4.1.3  -  Expensive FP math instructions/calls
  ----------------------------------------------------------------------------------------------------------

Detected performance impact from expensive FP math instructions/calls.
By removing/reexpressing them, you can lower the cost of an iteration from 32.00 to 17.00 cycles (1.88x speedup).


      6.1.4.1.4  -  FMA
  ----------------------------------------------------------------------------------------------------------

Detected 10 FMA (fused multiply-add) operations.
Presence of both ADD/SUB and MUL operations.

Workaround
Try to change order in which elements are evaluated (using parentheses) in arithmetic expressions containing both ADD/SUB and MUL operations to enable your compiler to generate FMA instructions wherever possible.
For instance a + b*c is a valid FMA (MUL then ADD).
However (a+b)* c cannot be translated into an FMA (ADD then MUL).




      6.1.4.1.5  -  Slow data structures access
  ----------------------------------------------------------------------------------------------------------

Detected data structures (typically arrays) that cannot be efficiently read/written

Details
 - Constant non-unit stride: 2 occurrence(s)
Non-unit stride (uncontiguous) accesses are not efficiently using data caches


Workaround
 - Try to reorganize arrays of structures to structures of arrays
 - Consider to permute loops (see vectorization gain report)



      6.1.4.1.6  -  Type of elements and instruction set
  ----------------------------------------------------------------------------------------------------------

34 SSE or AVX instructions are processing arithmetic or math operations on double precision FP elements in scalar mode (one at a time).



      6.1.4.1.7  -  Matching between your loop (in the source code) and the binary loop
  ----------------------------------------------------------------------------------------------------------

The binary loop is composed of 44 FP arithmetical operations:
 - 24: addition or subtraction (10 inside FMA instructions)
 - 12: multiply (10 inside FMA instructions)
 - 8: divide
The binary loop is loading 224 bytes (28 double precision FP elements).
The binary loop is storing 64 bytes (8 double precision FP elements).


      6.1.4.1.8  -  Arithmetic intensity
  ----------------------------------------------------------------------------------------------------------

Arithmetic intensity is 0.15 FP operations per loaded or stored byte.







      6.1.5  -  Loop 2503 from exec
  ==========================================================================================================

The loop is defined in:
 - /beegfs/hackathon/users/eoseret/qaas_runs_test/178-668-9279/intel/Kripke/build/Kripke/src/Kripke/Kernel/SweepSubdomain.cpp:88-106
 - /beegfs/hackathon/users/eoseret/qaas_runs_test/178-668-9279/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/pattern/kernel/For.hpp:142
 - /beegfs/hackathon/users/eoseret/qaas_runs_test/178-668-9279/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/util/Operators.hpp:366


The related source loop is multi-versionned.

      6.1.5.1  -  Path 1
  ----------------------------------------------------------------------------------------------------------

4% of peak computational performance is used (1.38 out of 32.00 FLOP per cycle (GFLOPS @ 1GHz))

      6.1.5.1.1  -  Vectorization
  ----------------------------------------------------------------------------------------------------------

Your loop is probably not vectorized.
Only 13% of vector register length is used (average across all SSE/AVX instructions).
By vectorizing your loop, you can lower the cost of an iteration from 32.00 to 16.00 cycles (2.00x speedup).

Details
Store and arithmetical SSE/AVX instructions are used in scalar version (process only one data element in vector registers).
Since your execution units are vector units, only a vectorized loop can use their full power.


Workaround
 - Try another compiler or update/tune your current one
 - Remove inter-iterations dependences from your loop and make it unit-stride:
  * If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly:
C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)<<image_row_maj>>
  * If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA):
for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)



      6.1.5.1.2  -  Execution units bottlenecks
  ----------------------------------------------------------------------------------------------------------

Performance is limited by execution of divide and square root operations (the divide/square root unit is a bottleneck).

By removing all these bottlenecks, you can lower the cost of an iteration from 32.00 to 13.00 cycles (2.46x speedup).


Workaround
 - Reduce the number of division or square root instructions:
  * If denominator is constant over iterations, use reciprocal (replace x/y with x*(1/y)). Check precision impact. This will be done by your compiler with ffast-math or Ofast
 - Check whether you really need double precision. If not, switch to single precision to speedup execution





      6.1.5.1.3  -  Expensive FP math instructions/calls
  ----------------------------------------------------------------------------------------------------------

Detected performance impact from expensive FP math instructions/calls.
By removing/reexpressing them, you can lower the cost of an iteration from 32.00 to 17.00 cycles (1.88x speedup).


      6.1.5.1.4  -  FMA
  ----------------------------------------------------------------------------------------------------------

Detected 10 FMA (fused multiply-add) operations.
Presence of both ADD/SUB and MUL operations.

Workaround
Try to change order in which elements are evaluated (using parentheses) in arithmetic expressions containing both ADD/SUB and MUL operations to enable your compiler to generate FMA instructions wherever possible.
For instance a + b*c is a valid FMA (MUL then ADD).
However (a+b)* c cannot be translated into an FMA (ADD then MUL).




      6.1.5.1.5  -  Complex instructions
  ----------------------------------------------------------------------------------------------------------

Detected COMPLEX INSTRUCTIONS.


Details
These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.
 - ADD: 1 occurrences<<list_path_1_complex_1>>



      6.1.5.1.6  -  Slow data structures access
  ----------------------------------------------------------------------------------------------------------

Detected data structures (typically arrays) that cannot be efficiently read/written

Details
 - Constant unknown stride: 12 occurrence(s)
Non-unit stride (uncontiguous) accesses are not efficiently using data caches


Workaround
 - Try to reorganize arrays of structures to structures of arrays
 - Consider to permute loops (see vectorization gain report)



      6.1.5.1.7  -  Type of elements and instruction set
  ----------------------------------------------------------------------------------------------------------

34 SSE or AVX instructions are processing arithmetic or math operations on double precision FP elements in scalar mode (one at a time).



      6.1.5.1.8  -  Matching between your loop (in the source code) and the binary loop
  ----------------------------------------------------------------------------------------------------------

The binary loop is composed of 44 FP arithmetical operations:
 - 24: addition or subtraction (10 inside FMA instructions)
 - 12: multiply (10 inside FMA instructions)
 - 8: divide
The binary loop is loading 256 bytes (32 double precision FP elements).
The binary loop is storing 72 bytes (9 double precision FP elements).


      6.1.5.1.9  -  Arithmetic intensity
  ----------------------------------------------------------------------------------------------------------

Arithmetic intensity is 0.13 FP operations per loaded or stored byte.







      6.1.6  -  Loop 2186 from exec
  ==========================================================================================================

The loop is defined in:
 - /beegfs/hackathon/users/eoseret/qaas_runs_test/178-668-9279/intel/Kripke/build/Kripke/src/Kripke/Kernel/Population.cpp:58
 - /beegfs/hackathon/users/eoseret/qaas_runs_test/178-668-9279/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/pattern/kernel/For.hpp:142
 - /beegfs/hackathon/users/eoseret/qaas_runs_test/178-668-9279/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/util/Operators.hpp:369


The related source loop is multi-versionned.

      6.1.6.1  -  Path 1
  ----------------------------------------------------------------------------------------------------------

6% of peak computational performance is used (2.00 out of 32.00 FLOP per cycle (GFLOPS @ 1GHz))

      6.1.6.1.1  -  Vectorization
  ----------------------------------------------------------------------------------------------------------

Your loop is vectorized, but using only 128 out of 512 bits (SSE/AVX-128 instructions on AVX-512 processors).
<<image_2x64_512>>By fully vectorizing your loop, you can lower the cost of an iteration from 24.00 to 6.00 cycles (4.00x speedup).

Details
All SSE/AVX instructions are used in vector version (process two or more data elements in vector registers).
Since your execution units are vector units, only a fully vectorized loop can use their full power.


Workaround
Use vector aligned instructions:
 1) align your arrays on 64 bytes boundaries: replace { void *p = malloc (size); } with { void *p; posix_memalign (&p, 64, size); }.
 2) inform your compiler that your arrays are vector aligned: if array 'foo' is 64 bytes-aligned, define a pointer 'p_foo' as __builtin_assume_aligned (foo, 64) and use it instead of 'foo' in the loop.



      6.1.6.1.2  -  Execution units bottlenecks
  ----------------------------------------------------------------------------------------------------------

Found no such bottlenecks but see expert reports for more complex bottlenecks.




      6.1.6.1.3  -  FMA
  ----------------------------------------------------------------------------------------------------------

Presence of both ADD/SUB and MUL operations.

Workaround
Try to change order in which elements are evaluated (using parentheses) in arithmetic expressions containing both ADD/SUB and MUL operations to enable your compiler to generate FMA instructions wherever possible.
For instance a + b*c is a valid FMA (MUL then ADD).
However (a+b)* c cannot be translated into an FMA (ADD then MUL).




      6.1.6.1.4  -  Type of elements and instruction set
  ----------------------------------------------------------------------------------------------------------

24 SSE or AVX instructions are processing arithmetic or math operations on double precision FP elements in vector mode (two at a time).



      6.1.6.1.5  -  Matching between your loop (in the source code) and the binary loop
  ----------------------------------------------------------------------------------------------------------

The binary loop is composed of 48 FP arithmetical operations:
 - 16: addition or subtraction
 - 32: multiply
The binary loop is loading 256 bytes (32 double precision FP elements).


      6.1.6.1.6  -  Arithmetic intensity
  ----------------------------------------------------------------------------------------------------------

Arithmetic intensity is 0.19 FP operations per loaded or stored byte.







      6.1.7  -  Loop 2506 from exec
  ==========================================================================================================

The loop is defined in:
 - /beegfs/hackathon/users/eoseret/qaas_runs_test/178-668-9279/intel/Kripke/build/Kripke/src/Kripke/Kernel/SweepSubdomain.cpp:88-106
 - /beegfs/hackathon/users/eoseret/qaas_runs_test/178-668-9279/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/pattern/kernel/For.hpp:142
 - /beegfs/hackathon/users/eoseret/qaas_runs_test/178-668-9279/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/util/Operators.hpp:366


Warnings:
 - Non-innermost loop: analyzing only self part (ignoring child loops).
 - Ignoring paths for analysis
 - Too many paths. Rerun with max-paths=5
 - RecMII not computed since number of paths is unknown or > max_paths
 - Streams not analyzed since number of paths is unknown or > max_paths

Try to simplify control and/or increase the maximum number of paths per function/loop through the 'max-paths-nb' option.

This loop has 5 execution paths.

The presence of multiple execution paths is typically the main/first bottleneck.
Try to simplify control inside loop: ideally, try to remove all conditional expressions, for example by (if applicable):
 - hoisting them (moving them outside the loop)
 - turning them into conditional moves, MIN or MAX


Ex: if (x<0) x=0 => x = (x<0 ? 0 : x) (or MAX(0,x) after defining the corresponding macro)


      6.1.7.1  -  Path 1
  ----------------------------------------------------------------------------------------------------------

4% of peak computational performance is used (1.38 out of 32.00 FLOP per cycle (GFLOPS @ 1GHz))

      6.1.7.1.1  -  Vectorization
  ----------------------------------------------------------------------------------------------------------

Your loop is probably not vectorized.
Only 13% of vector register length is used (average across all SSE/AVX instructions).
By vectorizing your loop, you can lower the cost of an iteration from 32.00 to 16.00 cycles (2.00x speedup).

Details
Store and arithmetical SSE/AVX instructions are used in scalar version (process only one data element in vector registers).
Since your execution units are vector units, only a vectorized loop can use their full power.


Workaround
 - Try another compiler or update/tune your current one
 - Remove inter-iterations dependences from your loop and make it unit-stride:
  * If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly:
C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)<<image_row_maj>>
  * If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA):
for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)



      6.1.7.1.2  -  Execution units bottlenecks
  ----------------------------------------------------------------------------------------------------------

Performance is limited by execution of divide and square root operations (the divide/square root unit is a bottleneck).

By removing all these bottlenecks, you can lower the cost of an iteration from 32.00 to 17.00 cycles (1.88x speedup).


Workaround
 - Reduce the number of division or square root instructions:
  * If denominator is constant over iterations, use reciprocal (replace x/y with x*(1/y)). Check precision impact. This will be done by your compiler with ffast-math or Ofast
 - Check whether you really need double precision. If not, switch to single precision to speedup execution





      6.1.7.1.3  -  Expensive FP math instructions/calls
  ----------------------------------------------------------------------------------------------------------

Detected performance impact from expensive FP math instructions/calls.
By removing/reexpressing them, you can lower the cost of an iteration from 32.00 to 17.00 cycles (1.88x speedup).


      6.1.7.1.4  -  FMA
  ----------------------------------------------------------------------------------------------------------

Detected 10 FMA (fused multiply-add) operations.
Presence of both ADD/SUB and MUL operations.

Workaround
Try to change order in which elements are evaluated (using parentheses) in arithmetic expressions containing both ADD/SUB and MUL operations to enable your compiler to generate FMA instructions wherever possible.
For instance a + b*c is a valid FMA (MUL then ADD).
However (a+b)* c cannot be translated into an FMA (ADD then MUL).




      6.1.7.1.5  -  Complex instructions
  ----------------------------------------------------------------------------------------------------------

Detected COMPLEX INSTRUCTIONS.


Details
These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.
 - ADD: 1 occurrences<<list_path_1_complex_1>>
 - INC: 1 occurrences<<list_path_1_complex_2>>



      6.1.7.1.6  -  Type of elements and instruction set
  ----------------------------------------------------------------------------------------------------------

34 SSE or AVX instructions are processing arithmetic or math operations on double precision FP elements in scalar mode (one at a time).



      6.1.7.1.7  -  Matching between your loop (in the source code) and the binary loop
  ----------------------------------------------------------------------------------------------------------

The binary loop is composed of 44 FP arithmetical operations:
 - 24: addition or subtraction (10 inside FMA instructions)
 - 12: multiply (10 inside FMA instructions)
 - 8: divide
The binary loop is loading 361 bytes (45 double precision FP elements).
The binary loop is storing 120 bytes (15 double precision FP elements).


      6.1.7.1.8  -  Arithmetic intensity
  ----------------------------------------------------------------------------------------------------------

Arithmetic intensity is 0.09 FP operations per loaded or stored byte.







      6.1.8  -  Loop 2502 from exec
  ==========================================================================================================

The loop is defined in:
 - /beegfs/hackathon/users/eoseret/qaas_runs_test/178-668-9279/intel/Kripke/build/Kripke/src/Kripke/Kernel/SweepSubdomain.cpp:88-106
 - /beegfs/hackathon/users/eoseret/qaas_runs_test/178-668-9279/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/pattern/kernel/For.hpp:142
 - /beegfs/hackathon/users/eoseret/qaas_runs_test/178-668-9279/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/util/Operators.hpp:366
 - /beegfs/hackathon/users/eoseret/qaas_runs_test/178-668-9279/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/index/RangeSegment.hpp:137


Warnings:
Non-innermost loop: analyzing only self part (ignoring child loops).
This loop has 4 execution paths.

The presence of multiple execution paths is typically the main/first bottleneck.
Try to simplify control inside loop: ideally, try to remove all conditional expressions, for example by (if applicable):
 - hoisting them (moving them outside the loop)
 - turning them into conditional moves, MIN or MAX


Ex: if (x<0) x=0 => x = (x<0 ? 0 : x) (or MAX(0,x) after defining the corresponding macro)


      6.1.8.1  -  Path 1
  ----------------------------------------------------------------------------------------------------------

4% of peak computational performance is used (1.38 out of 32.00 FLOP per cycle (GFLOPS @ 1GHz))

      6.1.8.1.1  -  Vectorization
  ----------------------------------------------------------------------------------------------------------

Your loop is probably not vectorized.
Only 13% of vector register length is used (average across all SSE/AVX instructions).
By vectorizing your loop, you can lower the cost of an iteration from 16.00 to 8.00 cycles (2.00x speedup).

Details
Store and arithmetical SSE/AVX instructions are used in scalar version (process only one data element in vector registers).
Since your execution units are vector units, only a vectorized loop can use their full power.


Workaround
 - Try another compiler or update/tune your current one
 - Remove inter-iterations dependences from your loop and make it unit-stride:
  * If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly:
C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)<<image_row_maj>>
  * If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA):
for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)



      6.1.8.1.2  -  Execution units bottlenecks
  ----------------------------------------------------------------------------------------------------------

Performance is limited by execution of divide and square root operations (the divide/square root unit is a bottleneck).

By removing all these bottlenecks, you can lower the cost of an iteration from 16.00 to 11.00 cycles (1.45x speedup).


Workaround
 - Reduce the number of division or square root instructions:
  * If denominator is constant over iterations, use reciprocal (replace x/y with x*(1/y)). Check precision impact. This will be done by your compiler with ffast-math or Ofast
 - Check whether you really need double precision. If not, switch to single precision to speedup execution





      6.1.8.1.3  -  Expensive FP math instructions/calls
  ----------------------------------------------------------------------------------------------------------

Detected performance impact from expensive FP math instructions/calls.
By removing/reexpressing them, you can lower the cost of an iteration from 16.00 to 10.83 cycles (1.48x speedup).


      6.1.8.1.4  -  FMA
  ----------------------------------------------------------------------------------------------------------

Detected 5 FMA (fused multiply-add) operations.
Presence of both ADD/SUB and MUL operations.

Workaround
Try to change order in which elements are evaluated (using parentheses) in arithmetic expressions containing both ADD/SUB and MUL operations to enable your compiler to generate FMA instructions wherever possible.
For instance a + b*c is a valid FMA (MUL then ADD).
However (a+b)* c cannot be translated into an FMA (ADD then MUL).




      6.1.8.1.5  -  Complex instructions
  ----------------------------------------------------------------------------------------------------------

Detected COMPLEX INSTRUCTIONS.


Details
These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.
 - ADD: 2 occurrences<<list_path_1_complex_1>>
 - INC: 1 occurrences<<list_path_1_complex_2>>



      6.1.8.1.6  -  Type of elements and instruction set
  ----------------------------------------------------------------------------------------------------------

17 SSE or AVX instructions are processing arithmetic or math operations on double precision FP elements in scalar mode (one at a time).



      6.1.8.1.7  -  Matching between your loop (in the source code) and the binary loop
  ----------------------------------------------------------------------------------------------------------

The binary loop is composed of 22 FP arithmetical operations:
 - 12: addition or subtraction (5 inside FMA instructions)
 - 6: multiply (5 inside FMA instructions)
 - 4: divide
The binary loop is loading 264 bytes (33 double precision FP elements).
The binary loop is storing 64 bytes (8 double precision FP elements).


      6.1.8.1.8  -  Arithmetic intensity
  ----------------------------------------------------------------------------------------------------------

Arithmetic intensity is 0.07 FP operations per loaded or stored byte.




      6.1.8.2  -  Path 2
  ----------------------------------------------------------------------------------------------------------

4% of peak computational performance is used (1.38 out of 32.00 FLOP per cycle (GFLOPS @ 1GHz))

      6.1.8.2.1  -  Vectorization
  ----------------------------------------------------------------------------------------------------------

Your loop is probably not vectorized.
Only 12% of vector register length is used (average across all SSE/AVX instructions).
By vectorizing your loop, you can lower the cost of an iteration from 16.00 to 8.00 cycles (2.00x speedup).

Details
Store and arithmetical SSE/AVX instructions are used in scalar version (process only one data element in vector registers).
Since your execution units are vector units, only a vectorized loop can use their full power.


Workaround
 - Try another compiler or update/tune your current one
 - Remove inter-iterations dependences from your loop and make it unit-stride:
  * If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly:
C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)<<image_row_maj>>
  * If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA):
for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)



      6.1.8.2.2  -  Execution units bottlenecks
  ----------------------------------------------------------------------------------------------------------

Performance is limited by execution of divide and square root operations (the divide/square root unit is a bottleneck).

By removing all these bottlenecks, you can lower the cost of an iteration from 16.00 to 11.67 cycles (1.37x speedup).


Workaround
 - Reduce the number of division or square root instructions:
  * If denominator is constant over iterations, use reciprocal (replace x/y with x*(1/y)). Check precision impact. This will be done by your compiler with ffast-math or Ofast
 - Check whether you really need double precision. If not, switch to single precision to speedup execution





      6.1.8.2.3  -  Expensive FP math instructions/calls
  ----------------------------------------------------------------------------------------------------------

Detected performance impact from expensive FP math instructions/calls.
By removing/reexpressing them, you can lower the cost of an iteration from 16.00 to 11.67 cycles (1.37x speedup).


      6.1.8.2.4  -  FMA
  ----------------------------------------------------------------------------------------------------------

Detected 5 FMA (fused multiply-add) operations.
Presence of both ADD/SUB and MUL operations.

Workaround
Try to change order in which elements are evaluated (using parentheses) in arithmetic expressions containing both ADD/SUB and MUL operations to enable your compiler to generate FMA instructions wherever possible.
For instance a + b*c is a valid FMA (MUL then ADD).
However (a+b)* c cannot be translated into an FMA (ADD then MUL).




      6.1.8.2.5  -  Complex instructions
  ----------------------------------------------------------------------------------------------------------

Detected COMPLEX INSTRUCTIONS.


Details
These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.
 - ADD: 2 occurrences<<list_path_2_complex_1>>
 - INC: 1 occurrences<<list_path_2_complex_2>>



      6.1.8.2.6  -  Slow data structures access
  ----------------------------------------------------------------------------------------------------------

Detected data structures (typically arrays) that cannot be efficiently read/written

Details
 - Constant unknown stride: 14 occurrence(s)
Non-unit stride (uncontiguous) accesses are not efficiently using data caches


Workaround
 - Try to reorganize arrays of structures to structures of arrays
 - Consider to permute loops (see vectorization gain report)



      6.1.8.2.7  -  Type of elements and instruction set
  ----------------------------------------------------------------------------------------------------------

17 SSE or AVX instructions are processing arithmetic or math operations on double precision FP elements in scalar mode (one at a time).



      6.1.8.2.8  -  Matching between your loop (in the source code) and the binary loop
  ----------------------------------------------------------------------------------------------------------

The binary loop is composed of 22 FP arithmetical operations:
 - 12: addition or subtraction (5 inside FMA instructions)
 - 6: multiply (5 inside FMA instructions)
 - 4: divide
The binary loop is loading 265 bytes (33 double precision FP elements).
The binary loop is storing 72 bytes (9 double precision FP elements).


      6.1.8.2.9  -  Arithmetic intensity
  ----------------------------------------------------------------------------------------------------------

Arithmetic intensity is 0.07 FP operations per loaded or stored byte.




      6.1.8.3  -  Path 3
  ----------------------------------------------------------------------------------------------------------

4% of peak computational performance is used (1.38 out of 32.00 FLOP per cycle (GFLOPS @ 1GHz))

      6.1.8.3.1  -  Vectorization
  ----------------------------------------------------------------------------------------------------------

Your loop is probably not vectorized.
Only 13% of vector register length is used (average across all SSE/AVX instructions).
By vectorizing your loop, you can lower the cost of an iteration from 32.00 to 16.00 cycles (2.00x speedup).

Details
Store and arithmetical SSE/AVX instructions are used in scalar version (process only one data element in vector registers).
Since your execution units are vector units, only a vectorized loop can use their full power.


Workaround
 - Try another compiler or update/tune your current one
 - Remove inter-iterations dependences from your loop and make it unit-stride:
  * If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly:
C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)<<image_row_maj>>
  * If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA):
for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)



      6.1.8.3.2  -  Execution units bottlenecks
  ----------------------------------------------------------------------------------------------------------

Performance is limited by execution of divide and square root operations (the divide/square root unit is a bottleneck).

By removing all these bottlenecks, you can lower the cost of an iteration from 32.00 to 17.33 cycles (1.85x speedup).


Workaround
 - Reduce the number of division or square root instructions:
  * If denominator is constant over iterations, use reciprocal (replace x/y with x*(1/y)). Check precision impact. This will be done by your compiler with ffast-math or Ofast
 - Check whether you really need double precision. If not, switch to single precision to speedup execution





      6.1.8.3.3  -  Expensive FP math instructions/calls
  ----------------------------------------------------------------------------------------------------------

Detected performance impact from expensive FP math instructions/calls.
By removing/reexpressing them, you can lower the cost of an iteration from 32.00 to 17.33 cycles (1.85x speedup).


      6.1.8.3.4  -  FMA
  ----------------------------------------------------------------------------------------------------------

Detected 10 FMA (fused multiply-add) operations.
Presence of both ADD/SUB and MUL operations.

Workaround
Try to change order in which elements are evaluated (using parentheses) in arithmetic expressions containing both ADD/SUB and MUL operations to enable your compiler to generate FMA instructions wherever possible.
For instance a + b*c is a valid FMA (MUL then ADD).
However (a+b)* c cannot be translated into an FMA (ADD then MUL).




      6.1.8.3.5  -  Complex instructions
  ----------------------------------------------------------------------------------------------------------

Detected COMPLEX INSTRUCTIONS.


Details
These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.
 - ADD: 2 occurrences<<list_path_3_complex_1>>
 - INC: 1 occurrences<<list_path_3_complex_2>>



      6.1.8.3.6  -  Slow data structures access
  ----------------------------------------------------------------------------------------------------------

Detected data structures (typically arrays) that cannot be efficiently read/written

Details
 - Constant unknown stride: 14 occurrence(s)
Non-unit stride (uncontiguous) accesses are not efficiently using data caches


Workaround
 - Try to reorganize arrays of structures to structures of arrays
 - Consider to permute loops (see vectorization gain report)



      6.1.8.3.7  -  Type of elements and instruction set
  ----------------------------------------------------------------------------------------------------------

34 SSE or AVX instructions are processing arithmetic or math operations on double precision FP elements in scalar mode (one at a time).



      6.1.8.3.8  -  Matching between your loop (in the source code) and the binary loop
  ----------------------------------------------------------------------------------------------------------

The binary loop is composed of 44 FP arithmetical operations:
 - 24: addition or subtraction (10 inside FMA instructions)
 - 12: multiply (10 inside FMA instructions)
 - 8: divide
The binary loop is loading 385 bytes (48 double precision FP elements).
The binary loop is storing 104 bytes (13 double precision FP elements).


      6.1.8.3.9  -  Arithmetic intensity
  ----------------------------------------------------------------------------------------------------------

Arithmetic intensity is 0.09 FP operations per loaded or stored byte.




      6.1.8.4  -  Path 4
  ----------------------------------------------------------------------------------------------------------

4% of peak computational performance is used (1.38 out of 32.00 FLOP per cycle (GFLOPS @ 1GHz))

      6.1.8.4.1  -  Vectorization
  ----------------------------------------------------------------------------------------------------------

Your loop is probably not vectorized.
Only 13% of vector register length is used (average across all SSE/AVX instructions).
By vectorizing your loop, you can lower the cost of an iteration from 32.00 to 16.00 cycles (2.00x speedup).

Details
Store and arithmetical SSE/AVX instructions are used in scalar version (process only one data element in vector registers).
Since your execution units are vector units, only a vectorized loop can use their full power.


Workaround
 - Try another compiler or update/tune your current one
 - Remove inter-iterations dependences from your loop and make it unit-stride:
  * If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly:
C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)<<image_row_maj>>
  * If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA):
for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)



      6.1.8.4.2  -  Execution units bottlenecks
  ----------------------------------------------------------------------------------------------------------

Performance is limited by execution of divide and square root operations (the divide/square root unit is a bottleneck).

By removing all these bottlenecks, you can lower the cost of an iteration from 32.00 to 17.00 cycles (1.88x speedup).


Workaround
 - Reduce the number of division or square root instructions:
  * If denominator is constant over iterations, use reciprocal (replace x/y with x*(1/y)). Check precision impact. This will be done by your compiler with ffast-math or Ofast
 - Check whether you really need double precision. If not, switch to single precision to speedup execution





      6.1.8.4.3  -  Expensive FP math instructions/calls
  ----------------------------------------------------------------------------------------------------------

Detected performance impact from expensive FP math instructions/calls.
By removing/reexpressing them, you can lower the cost of an iteration from 32.00 to 17.00 cycles (1.88x speedup).


      6.1.8.4.4  -  FMA
  ----------------------------------------------------------------------------------------------------------

Detected 10 FMA (fused multiply-add) operations.
Presence of both ADD/SUB and MUL operations.

Workaround
Try to change order in which elements are evaluated (using parentheses) in arithmetic expressions containing both ADD/SUB and MUL operations to enable your compiler to generate FMA instructions wherever possible.
For instance a + b*c is a valid FMA (MUL then ADD).
However (a+b)* c cannot be translated into an FMA (ADD then MUL).




      6.1.8.4.5  -  Complex instructions
  ----------------------------------------------------------------------------------------------------------

Detected COMPLEX INSTRUCTIONS.


Details
These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.
 - ADD: 2 occurrences<<list_path_4_complex_1>>
 - INC: 1 occurrences<<list_path_4_complex_2>>



      6.1.8.4.6  -  Type of elements and instruction set
  ----------------------------------------------------------------------------------------------------------

34 SSE or AVX instructions are processing arithmetic or math operations on double precision FP elements in scalar mode (one at a time).



      6.1.8.4.7  -  Matching between your loop (in the source code) and the binary loop
  ----------------------------------------------------------------------------------------------------------

The binary loop is composed of 44 FP arithmetical operations:
 - 24: addition or subtraction (10 inside FMA instructions)
 - 12: multiply (10 inside FMA instructions)
 - 8: divide
The binary loop is loading 385 bytes (48 double precision FP elements).
The binary loop is storing 96 bytes (12 double precision FP elements).


      6.1.8.4.8  -  Arithmetic intensity
  ----------------------------------------------------------------------------------------------------------

Arithmetic intensity is 0.09 FP operations per loaded or stored byte.







      6.1.9  -  Loop 2288 from exec
  ==========================================================================================================

The loop is defined in:
 - /beegfs/hackathon/users/eoseret/qaas_runs_test/178-668-9279/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/util/TypedViewBase.hpp:216
 - /beegfs/hackathon/users/eoseret/qaas_runs_test/178-668-9279/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/util/Layout.hpp:187
 - /beegfs/hackathon/users/eoseret/qaas_runs_test/178-668-9279/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/pattern/kernel/For.hpp:142
 - /beegfs/hackathon/users/eoseret/qaas_runs_test/178-668-9279/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/index/IndexValue.hpp:109
 - /beegfs/hackathon/users/eoseret/qaas_runs_test/178-668-9279/intel/Kripke/build/Kripke/src/Kripke/Kernel/Scattering.cpp:85-97


Warnings:
 - Non-innermost loop: analyzing only self part (ignoring child loops).
 - Ignoring paths for analysis
 - Too many paths. Rerun with max-paths=32
 - RecMII not computed since number of paths is unknown or > max_paths
 - Streams not analyzed since number of paths is unknown or > max_paths

Try to simplify control and/or increase the maximum number of paths per function/loop through the 'max-paths-nb' option.

This loop has 32 execution paths.

The presence of multiple execution paths is typically the main/first bottleneck.
Try to simplify control inside loop: ideally, try to remove all conditional expressions, for example by (if applicable):
 - hoisting them (moving them outside the loop)
 - turning them into conditional moves, MIN or MAX


Ex: if (x<0) x=0 => x = (x<0 ? 0 : x) (or MAX(0,x) after defining the corresponding macro)


      6.1.9.1  -  Path 1
  ----------------------------------------------------------------------------------------------------------

0% of peak computational performance is used (0.00 out of 64.00 FLOP per cycle (GFLOPS @ 1GHz))

      6.1.9.1.1  -  Vectorization
  ----------------------------------------------------------------------------------------------------------

Your loop is not vectorized.
8 data elements could be processed at once in vector registers.
By vectorizing your loop, you can lower the cost of an iteration from 3.83 to 0.48 cycles (8.00x speedup).

Details
All SSE/AVX instructions are used in scalar version (process only one data element in vector registers).
Since your execution units are vector units, only a vectorized loop can use their full power.


Workaround
 - Try another compiler or update/tune your current one
 - Remove inter-iterations dependences from your loop and make it unit-stride:
  * If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly:
C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)<<image_row_maj>>
  * If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA):
for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)



      6.1.9.1.2  -  Execution units bottlenecks
  ----------------------------------------------------------------------------------------------------------

Found no such bottlenecks but see expert reports for more complex bottlenecks.



No data for this section



      6.1.9.1.3  -  Type of elements and instruction set
  ----------------------------------------------------------------------------------------------------------

No instructions are processing arithmetic or math operations on FP elements. This loop is probably writing/copying data or processing integer elements.


      6.1.9.1.4  -  Matching between your loop (in the source code) and the binary loop
  ----------------------------------------------------------------------------------------------------------

The binary loop does not contain any FP arithmetical operations.
The binary loop is loading 80 bytes.
The binary loop is storing 32 bytes.







      6.1.10  -  Loop 2500 from exec
  ==========================================================================================================

The loop is defined in:
 - /beegfs/hackathon/users/eoseret/qaas_runs_test/178-668-9279/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/internal/Iterators.hpp:378
 - /beegfs/hackathon/users/eoseret/qaas_runs_test/178-668-9279/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/policy/openmp/kernel/Collapse.hpp:129
 - /beegfs/hackathon/users/eoseret/qaas_runs_test/178-668-9279/intel/Kripke/build/Kripke/src/Kripke/Kernel/SweepSubdomain.cpp:88-106
 - /beegfs/hackathon/users/eoseret/qaas_runs_test/178-668-9279/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/pattern/kernel/For.hpp:142
 - /beegfs/hackathon/users/eoseret/qaas_runs_test/178-668-9279/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/util/Operators.hpp:366
 - /beegfs/hackathon/users/eoseret/qaas_runs_test/178-668-9279/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/index/RangeSegment.hpp:137


Warnings:
 - Non-innermost loop: analyzing only self part (ignoring child loops).
 - Ignoring paths for analysis
 - Too many paths. If you really need to analyze all of the 161 paths individually, rerun with max-paths=161
 - RecMII not computed since number of paths is unknown or > max_paths
 - Streams not analyzed since number of paths is unknown or > max_paths

Try to simplify control and/or increase the maximum number of paths per function/loop through the 'max-paths-nb' option.

This loop has 161 execution paths.

The presence of multiple execution paths is typically the main/first bottleneck.
Try to simplify control inside loop: ideally, try to remove all conditional expressions, for example by (if applicable):
 - hoisting them (moving them outside the loop)
 - turning them into conditional moves, MIN or MAX


Ex: if (x<0) x=0 => x = (x<0 ? 0 : x) (or MAX(0,x) after defining the corresponding macro)


      6.1.10.1  -  Path 1
  ----------------------------------------------------------------------------------------------------------

0% of peak computational performance is used (0.00 out of 64.00 FLOP per cycle (GFLOPS @ 1GHz))

      6.1.10.1.1  -  Vectorization
  ----------------------------------------------------------------------------------------------------------

Your loop is not vectorized.
Only 12% of vector register length is used (average across all SSE/AVX instructions).
By vectorizing your loop, you can lower the cost of an iteration from 10.50 to 1.31 cycles (8.00x speedup).

Details
All SSE/AVX instructions are used in scalar version (process only one data element in vector registers).
Since your execution units are vector units, only a vectorized loop can use their full power.


Workaround
 - Try another compiler or update/tune your current one
 - Remove inter-iterations dependences from your loop and make it unit-stride:
  * If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly:
C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)<<image_row_maj>>
  * If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA):
for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)



      6.1.10.1.2  -  Execution units bottlenecks
  ----------------------------------------------------------------------------------------------------------

Performance is limited by writing data to caches/RAM (the store unit is a bottleneck).


Workaround
 - Write less array elements
 - Provide more information to your compiler:
  * hardcode the bounds of the corresponding 'for' loop




No data for this section



      6.1.10.1.3  -  Complex instructions
  ----------------------------------------------------------------------------------------------------------

Detected COMPLEX INSTRUCTIONS.


Details
These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.
 - ADD: 1 occurrences<<list_path_1_complex_1>>
 - AND: 1 occurrences<<list_path_1_complex_2>>



      6.1.10.1.4  -  Type of elements and instruction set
  ----------------------------------------------------------------------------------------------------------

No instructions are processing arithmetic or math operations on FP elements. This loop is probably writing/copying data or processing integer elements.


      6.1.10.1.5  -  Matching between your loop (in the source code) and the binary loop
  ----------------------------------------------------------------------------------------------------------

The binary loop does not contain any FP arithmetical operations.
The binary loop is loading 208 bytes.
The binary loop is storing 168 bytes.





[MAQAO] Info: STOP THE REPORT GENERATION
[MAQAO] Info: 
[MAQAO] Info: If your application produces files, they can be found in directory "/beegfs/hackathon/users/eoseret/qaas_runs_test/178-668-9279/intel/Kripke/run/oneview_runs/compilers/gcc_9/oneview_run_1786695265"
[MAQAO] Info: 
