OV - exec - Loop 2029

0x4a90e8 MOV	-0x58(%RBP),%R10

0x4a90ec MOV	-0x68(%RBP),%RCX

0x4a90f0 MOV	%RAX,-0x40(%RBP)

0x4a90f4 MOV	%RDX,-0x48(%RBP)

0x4a90f8 LEA	(%R10,%RDX,8),%R13

0x4a90fc XOR	%R9D,%R9D

0x4a90ff ADD	%RAX,%RCX

0x4a9102 NOPW	(%RAX,%RAX,1)

  (2028) 0x4a9108 MOV	(%RDI,%R9,8),%R10

  (2028) 0x4a910c MOVSXD	(%RSI,%R9,4),%R8

  (2028) 0x4a9110 ADD	%R10,%R8

  (2028) 0x4a9113 CMP	%R8,%R10

  (2028) 0x4a9116 JGE	4a9398

  (2028) 0x4a911c SAL	$0x3,%R8

  (2028) 0x4a9120 LEA	(,%R10,8),%RAX

  (2028) 0x4a9128 MOV	%R8,%RDX

  (2028) 0x4a912b SUB	%RAX,%RDX

  (2028) 0x4a912e SUB	$0x8,%RDX

  (2028) 0x4a9132 SHR	$0x3,%RDX

  (2028) 0x4a9136 INC	%RDX

  (2028) 0x4a9139 VXORPD	%XMM0,%XMM0,%XMM0

  (2028) 0x4a913d AND	$0x7,%EDX

  (2028) 0x4a9140 JE	4a9238

  (2028) 0x4a9146 CMP	$0x1,%RDX

  (2028) 0x4a914a JE	4a9214

  (2028) 0x4a9150 CMP	$0x2,%RDX

  (2028) 0x4a9154 JE	4a91f9

  (2028) 0x4a915a CMP	$0x3,%RDX

  (2028) 0x4a915e JE	4a91de

  (2028) 0x4a9160 CMP	$0x4,%RDX

  (2028) 0x4a9164 JE	4a91c3

  (2028) 0x4a9166 CMP	$0x5,%RDX

  (2028) 0x4a916a JE	4a91a8

  (2028) 0x4a916c CMP	$0x6,%RDX

  (2028) 0x4a9170 JE	4a918d

  (2028) 0x4a9172 MOV	(%R14,%R10,8),%RDX

  (2028) 0x4a9176 VMOVSD	(%R15,%R10,8),%XMM7

  (2028) 0x4a917c IMUL	%R12,%RDX

  (2028) 0x4a9180 ADD	$0x8,%RAX

  (2028) 0x4a9184 ADD	%RCX,%RDX

  (2028) 0x4a9187 VFMADD231SD	(%RBX,%RDX,8),%XMM7,%XMM0

  (2028) 0x4a918d MOV	(%R14,%RAX,1),%R10

  (2028) 0x4a9191 VMOVSD	(%R15,%RAX,1),%XMM1

  (2028) 0x4a9197 IMUL	%R12,%R10

  (2028) 0x4a919b ADD	$0x8,%RAX

  (2028) 0x4a919f ADD	%RCX,%R10

  (2028) 0x4a91a2 VFMADD231SD	(%RBX,%R10,8),%XMM1,%XMM0

  (2028) 0x4a91a8 MOV	(%R14,%RAX,1),%RDX

  (2028) 0x4a91ac VMOVSD	(%R15,%RAX,1),%XMM2

  (2028) 0x4a91b2 IMUL	%R12,%RDX

  (2028) 0x4a91b6 ADD	$0x8,%RAX

  (2028) 0x4a91ba ADD	%RCX,%RDX

  (2028) 0x4a91bd VFMADD231SD	(%RBX,%RDX,8),%XMM2,%XMM0

  (2028) 0x4a91c3 MOV	(%R14,%RAX,1),%R10

  (2028) 0x4a91c7 VMOVSD	(%R15,%RAX,1),%XMM3

  (2028) 0x4a91cd IMUL	%R12,%R10

  (2028) 0x4a91d1 ADD	$0x8,%RAX

  (2028) 0x4a91d5 ADD	%RCX,%R10

  (2028) 0x4a91d8 VFMADD231SD	(%RBX,%R10,8),%XMM3,%XMM0

  (2028) 0x4a91de MOV	(%R14,%RAX,1),%RDX

  (2028) 0x4a91e2 VMOVSD	(%R15,%RAX,1),%XMM6

  (2028) 0x4a91e8 IMUL	%R12,%RDX

  (2028) 0x4a91ec ADD	$0x8,%RAX

  (2028) 0x4a91f0 ADD	%RCX,%RDX

  (2028) 0x4a91f3 VFMADD231SD	(%RBX,%RDX,8),%XMM6,%XMM0

  (2028) 0x4a91f9 MOV	(%R14,%RAX,1),%R10

  (2028) 0x4a91fd VMOVSD	(%R15,%RAX,1),%XMM5

  (2028) 0x4a9203 IMUL	%R12,%R10

  (2028) 0x4a9207 ADD	$0x8,%RAX

  (2028) 0x4a920b ADD	%RCX,%R10

  (2028) 0x4a920e VFMADD231SD	(%RBX,%R10,8),%XMM5,%XMM0

  (2028) 0x4a9214 MOV	(%R14,%RAX,1),%RDX

  (2028) 0x4a9218 VMOVSD	(%R15,%RAX,1),%XMM4

  (2028) 0x4a921e IMUL	%R12,%RDX

  (2028) 0x4a9222 ADD	$0x8,%RAX

  (2028) 0x4a9226 ADD	%RCX,%RDX

  (2028) 0x4a9229 VFMADD231SD	(%RBX,%RDX,8),%XMM4,%XMM0

  (2028) 0x4a922f CMP	%RAX,%R8

  (2028) 0x4a9232 JE	4a930b

    (2031) 0x4a9238 MOV	(%R14,%RAX,1),%R10

    (2031) 0x4a923c VMOVSD	(%R15,%RAX,1),%XMM8

    (2031) 0x4a9242 IMUL	%R12,%R10

    (2031) 0x4a9246 MOV	0x8(%R14,%RAX,1),%RDX

    (2031) 0x4a924b VMOVSD	0x8(%R15,%RAX,1),%XMM9

    (2031) 0x4a9252 ADD	%RCX,%R10

    (2031) 0x4a9255 VFMADD231SD	(%RBX,%R10,8),%XMM8,%XMM0

    (2031) 0x4a925b IMUL	%R12,%RDX

    (2031) 0x4a925f MOV	0x10(%R14,%RAX,1),%R10

    (2031) 0x4a9264 VMOVSD	0x10(%R15,%RAX,1),%XMM10

    (2031) 0x4a926b ADD	%RCX,%RDX

    (2031) 0x4a926e VFMADD231SD	(%RBX,%RDX,8),%XMM9,%XMM0

    (2031) 0x4a9274 IMUL	%R12,%R10

    (2031) 0x4a9278 MOV	0x18(%R14,%RAX,1),%RDX

    (2031) 0x4a927d VMOVSD	0x18(%R15,%RAX,1),%XMM11

    (2031) 0x4a9284 ADD	%RCX,%R10

    (2031) 0x4a9287 VFMADD231SD	(%RBX,%R10,8),%XMM10,%XMM0

    (2031) 0x4a928d IMUL	%R12,%RDX

    (2031) 0x4a9291 MOV	0x20(%R14,%RAX,1),%R10

    (2031) 0x4a9296 VMOVSD	0x20(%R15,%RAX,1),%XMM12

    (2031) 0x4a929d ADD	%RCX,%RDX

    (2031) 0x4a92a0 VFMADD231SD	(%RBX,%RDX,8),%XMM11,%XMM0

    (2031) 0x4a92a6 IMUL	%R12,%R10

    (2031) 0x4a92aa MOV	0x28(%R14,%RAX,1),%RDX

    (2031) 0x4a92af VMOVSD	0x28(%R15,%RAX,1),%XMM13

    (2031) 0x4a92b6 ADD	%RCX,%R10

    (2031) 0x4a92b9 VFMADD231SD	(%RBX,%R10,8),%XMM12,%XMM0

    (2031) 0x4a92bf IMUL	%R12,%RDX

    (2031) 0x4a92c3 MOV	0x30(%R14,%RAX,1),%R10

    (2031) 0x4a92c8 VMOVSD	0x30(%R15,%RAX,1),%XMM14

    (2031) 0x4a92cf ADD	%RCX,%RDX

    (2031) 0x4a92d2 VFMADD231SD	(%RBX,%RDX,8),%XMM13,%XMM0

    (2031) 0x4a92d8 IMUL	%R12,%R10

    (2031) 0x4a92dc MOV	0x38(%R14,%RAX,1),%RDX

    (2031) 0x4a92e1 VMOVSD	0x38(%R15,%RAX,1),%XMM15

    (2031) 0x4a92e8 ADD	%RCX,%R10

    (2031) 0x4a92eb VFMADD231SD	(%RBX,%R10,8),%XMM14,%XMM0

    (2031) 0x4a92f1 IMUL	%R12,%RDX

    (2031) 0x4a92f5 ADD	$0x40,%RAX

    (2031) 0x4a92f9 ADD	%RCX,%RDX

    (2031) 0x4a92fc VFMADD231SD	(%RBX,%RDX,8),%XMM15,%XMM0

    (2031) 0x4a9302 CMP	%RAX,%R8

    (2031) 0x4a9305 JNE	4a9238

  (2028) 0x4a930b VMOVSD	(%R11,%R9,8),%XMM7

  (2028) 0x4a9311 VFMADD132SD	(%R13,%R9,8),%XMM7,%XMM0

  (2028) 0x4a9318 VMOVSD	%XMM0,(%R11,%R9,8)

  (2028) 0x4a931e INC	%R9

  (2028) 0x4a9321 CMP	%R9,-0x38(%RBP)

  (2028) 0x4a9325 JNE	4a9108

0x4a932b MOV	-0x40(%RBP),%RAX

0x4a932f MOV	-0x48(%RBP),%RDX

0x4a9333 MOV	-0x50(%RBP),%R13

0x4a9337 INC	%RAX

0x4a933a ADD	%R13,%RDX

0x4a933d CMP	%RAX,-0x60(%RBP)

0x4a9341 JNE	4a90e8

  (2028) 0x4a9398 VXORPD	%XMM0,%XMM0,%XMM0

  (2028) 0x4a939c JMP	4a930b

/home/eoseret/qaas_runs_GNR/173-926-6874/intel/Kripke/build/Kripke/src/Kripke/Kernel/Scattering.cpp: 87 - 97

--------------------------------------------------------------------------------

87:             MixElem mix_start = zone_to_mixelem(z);

88:             MixElem mix_stop = mix_start + zone_to_num_mixelem(z);

89:

90:             double sigs_z = 0.0;

91:             for(MixElem mix = mix_start;mix < mix_stop;++ mix){

92:               Material mat = mixelem_to_material(mix);

93:               double fraction = mixelem_to_fraction(mix);

94:

95:               sigs_z += sigs(mat, n, global_g, global_gp) * fraction;

96:             }

97:             phi_out(nm, g, z) += sigs_z * phi(nm, gp, z);

/home/eoseret/qaas_runs_GNR/173-926-6874/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/index/IndexValue.hpp: 105 - 105

--------------------------------------------------------------------------------

105:     return TYPE(value + a);

/home/eoseret/qaas_runs_GNR/173-926-6874/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/policy/loop/forall.hpp: 59 - 59

--------------------------------------------------------------------------------

59:   for (decltype(distance_it) i = 0; i < distance_it; ++i) {

/home/eoseret/qaas_runs_GNR/173-926-6874/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/util/Layout.hpp: 55 - 55

--------------------------------------------------------------------------------

55:     return a * b;

/home/eoseret/qaas_runs_GNR/173-926-6874/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/util/View.hpp: 110 - 110

--------------------------------------------------------------------------------

110:     return data[idx];

Coverage (%)	Name	Source Location	Module
○97.44	gomp_thread_start	team.c:130	libgomp.so.1.0.0
○2.56	GOMP_parallel	libgomp.h:982	libgomp.so.1.0.0

Path /

Metric	Value
CQA speedup if no scalar integer	1.00
CQA speedup if FP arith vectorized	1.00
CQA speedup if fully vectorized	12.00
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.17
Bottlenecks	micro-operation queue,
Function	void RAJA::internal::StatementExecutor, RAJA::statement::For<2l, RAJA::policy::loop::loop_exec, RAJA::statement::For<3l, RAJA::policy::loop::loop_exec, RAJA::statement::Lambda<0l> > > > >::exec, RAJA::statement::For<2l, RAJA::policy::loop::loop_exec, RAJA::statement::For<3l, RAJA::policy::loop::loop_exec, RAJA::statement::Lambda<0l> > > > >, camp::tuple, Kripke::Moment>, RAJA::impl::Span, Kripke::Group>, RAJA::impl::Span, Kripke::Group>, RAJA::impl::Span, Kripke::Zone> >, camp::tuple<>, ScatteringSdom::operator() >(Kripke::ArchLayoutT, Kripke::SdomId, Kripke::SdomId, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&) const::{lambda(Kripke::Moment, Kripke::Group, Kripke::Group, Kripke::Zone)#1}>&>(RAJA::internal::LoopData, RAJA::statement::For<2l, RAJA::policy::loop::loop_exec, RAJA::statement::For<3l, RAJA::policy::loop::loop_exec, RAJA::statement::Lambda<0l> > > > >, camp::tuple, Kripke::Moment>, RAJA::impl::Span, Kripke::Group>, RAJA::impl::Span, Kripke::Group>, RAJA::impl::Span, Kripke::Zone> >, camp::tuple<>, ScatteringSdom::operator() >(Kripke::ArchLayoutT, Kripke::SdomId, Kripke::SdomId, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&) const::{lambda(Kripke::Moment, Kripke::Group, Kripke::Group, Kripke::Zone)#1}>&) [clone ._omp_fn.0]
Source	forall.hpp:59-59,View.hpp:110-110
Source loop unroll info	NA
Source loop unroll confidence level	NA
Unroll/vectorization loop type	NA
Unroll factor	NA
CQA cycles	2.33
CQA cycles if no scalar integer	2.33
CQA cycles if FP arith vectorized	2.33
CQA cycles if fully vectorized	0.19
Front-end cycles	2.33
P0 cycles	0.70
P1 cycles	0.60
P2 cycles	2.00
P3 cycles	2.00
P4 cycles	1.00
P5 cycles	0.60
P6 cycles	0.50
P7 cycles	1.00
P8 cycles	1.00
P9 cycles	1.00
P10 cycles	0.60
P11 cycles	2.00
DIV/SQRT cycles	0.00
Inter-iter dependencies cycles	NA
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	15.00
Nb uops	14.00
Nb loads	6.00
Nb stores	2.00
Nb stack references	6.00
FLOP/cycle	0.00
Nb FLOP add-sub	0.00
Nb FLOP mul	0.00
Nb FLOP fma	0.00
Nb FLOP div	0.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	0.00
Nb FLOP rsqrt	0.00
Bytes/cycle	27.43
Bytes prefetched	0.00
Bytes loaded	48.00
Bytes stored	16.00
Stride 0	NA
Stride 1	NA
Stride n	NA
Stride unknown	NA
Stride indirect	NA
Vectorization ratio all	0.00
Vectorization ratio load	0.00
Vectorization ratio store	0.00
Vectorization ratio mul	NA
Vectorization ratio add_sub	0.00
Vectorization ratio fma	NA
Vectorization ratio div_sqrt	NA
Vectorization ratio other	0.00
Vector-efficiency ratio all	11.46
Vector-efficiency ratio load	12.50
Vector-efficiency ratio store	12.50
Vector-efficiency ratio mul	NA
Vector-efficiency ratio add_sub	12.50
Vector-efficiency ratio fma	NA
Vector-efficiency ratio div_sqrt	NA
Vector-efficiency ratio other	6.25

Metric	Value
CQA speedup if no scalar integer	1.00
CQA speedup if FP arith vectorized	1.00
CQA speedup if fully vectorized	12.00
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.17
Bottlenecks	micro-operation queue,
Function	void RAJA::internal::StatementExecutor, RAJA::statement::For<2l, RAJA::policy::loop::loop_exec, RAJA::statement::For<3l, RAJA::policy::loop::loop_exec, RAJA::statement::Lambda<0l> > > > >::exec, RAJA::statement::For<2l, RAJA::policy::loop::loop_exec, RAJA::statement::For<3l, RAJA::policy::loop::loop_exec, RAJA::statement::Lambda<0l> > > > >, camp::tuple, Kripke::Moment>, RAJA::impl::Span, Kripke::Group>, RAJA::impl::Span, Kripke::Group>, RAJA::impl::Span, Kripke::Zone> >, camp::tuple<>, ScatteringSdom::operator() >(Kripke::ArchLayoutT, Kripke::SdomId, Kripke::SdomId, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&) const::{lambda(Kripke::Moment, Kripke::Group, Kripke::Group, Kripke::Zone)#1}>&>(RAJA::internal::LoopData, RAJA::statement::For<2l, RAJA::policy::loop::loop_exec, RAJA::statement::For<3l, RAJA::policy::loop::loop_exec, RAJA::statement::Lambda<0l> > > > >, camp::tuple, Kripke::Moment>, RAJA::impl::Span, Kripke::Group>, RAJA::impl::Span, Kripke::Group>, RAJA::impl::Span, Kripke::Zone> >, camp::tuple<>, ScatteringSdom::operator() >(Kripke::ArchLayoutT, Kripke::SdomId, Kripke::SdomId, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&) const::{lambda(Kripke::Moment, Kripke::Group, Kripke::Group, Kripke::Zone)#1}>&) [clone ._omp_fn.0]
Source	forall.hpp:59-59,View.hpp:110-110
Source loop unroll info	NA
Source loop unroll confidence level	NA
Unroll/vectorization loop type	NA
Unroll factor	NA
CQA cycles	2.33
CQA cycles if no scalar integer	2.33
CQA cycles if FP arith vectorized	2.33
CQA cycles if fully vectorized	0.19
Front-end cycles	2.33
P0 cycles	0.70
P1 cycles	0.60
P2 cycles	2.00
P3 cycles	2.00
P4 cycles	1.00
P5 cycles	0.60
P6 cycles	0.50
P7 cycles	1.00
P8 cycles	1.00
P9 cycles	1.00
P10 cycles	0.60
P11 cycles	2.00
DIV/SQRT cycles	0.00
Inter-iter dependencies cycles	NA
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	15.00
Nb uops	14.00
Nb loads	6.00
Nb stores	2.00
Nb stack references	6.00
FLOP/cycle	0.00
Nb FLOP add-sub	0.00
Nb FLOP mul	0.00
Nb FLOP fma	0.00
Nb FLOP div	0.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	0.00
Nb FLOP rsqrt	0.00
Bytes/cycle	27.43
Bytes prefetched	0.00
Bytes loaded	48.00
Bytes stored	16.00
Stride 0	NA
Stride 1	NA
Stride n	NA
Stride unknown	NA
Stride indirect	NA
Vectorization ratio all	0.00
Vectorization ratio load	0.00
Vectorization ratio store	0.00
Vectorization ratio mul	NA
Vectorization ratio add_sub	0.00
Vectorization ratio fma	NA
Vectorization ratio div_sqrt	NA
Vectorization ratio other	0.00
Vector-efficiency ratio all	11.46
Vector-efficiency ratio load	12.50
Vector-efficiency ratio store	12.50
Vector-efficiency ratio mul	NA
Vector-efficiency ratio add_sub	12.50
Vector-efficiency ratio fma	NA
Vector-efficiency ratio div_sqrt	NA
Vector-efficiency ratio other	6.25

Path /

Average path: Display a virtual path defined by average values of all real paths

Function	void RAJA::internal::StatementExecutor, RAJA::statement::For<2l, RAJA::policy::loop::loop_exec, RAJA::statement::For<3l, RAJA::policy::loop::loop_exec, RAJA::statement::Lambda<0l> > > > >::exec, RAJA::statement::For<2l, RAJA::policy::loop::loop_exec, RAJA::statement::For<3l, RAJA::policy::loop::loop_exec, RAJA::statement::Lambda<0l> > > > >, camp::tuple, Kripke::Moment>, RAJA::impl::Span, Kripke::Group>, RAJA::impl::Span, Kripke::Group>, RAJA::impl::Span, Kripke::Zone> >, camp::tuple<>, ScatteringSdom::operator() >(Kripke::ArchLayoutT, Kripke::SdomId, Kripke::SdomId, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&) const::{lambda(Kripke::Moment, Kripke::Group, Kripke::Group, Kripke::Zone)#1}>&>(RAJA::internal::LoopData, RAJA::statement::For<2l, RAJA::policy::loop::loop_exec, RAJA::statement::For<3l, RAJA::policy::loop::loop_exec, RAJA::statement::Lambda<0l> > > > >, camp::tuple, Kripke::Moment>, RAJA::impl::Span, Kripke::Group>, RAJA::impl::Span, Kripke::Group>, RAJA::impl::Span, Kripke::Zone> >, camp::tuple<>, ScatteringSdom::operator() >(Kripke::ArchLayoutT, Kripke::SdomId, Kripke::SdomId, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&) const::{lambda(Kripke::Moment, Kripke::Group, Kripke::Group, Kripke::Zone)#1}>&) [clone ._omp_fn.0]
Source file and lines	forall.hpp:59-59
Module	exec

The loop is defined in:

/home/eoseret/qaas_runs_GNR/173-926-6874/intel/Kripke/build/Kripke/src/Kripke/Kernel/Scattering.cpp:87-97
/home/eoseret/qaas_runs_GNR/173-926-6874/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/index/IndexValue.hpp:105
/home/eoseret/qaas_runs_GNR/173-926-6874/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/policy/loop/forall.hpp:59
/home/eoseret/qaas_runs_GNR/173-926-6874/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/util/Layout.hpp:55
/home/eoseret/qaas_runs_GNR/173-926-6874/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/util/View.hpp:110

Warnings:

Non-innermost loop: analyzing only self part (ignoring child loops).
Ignoring paths for analysis
Too many paths. Rerun with max-paths=16
RecMII not computed since number of paths is unknown or > max_paths
Streams not analyzed since number of paths is unknown or > max_paths

Try to simplify control and/or increase the maximum number of paths per function/loop through the 'max-paths-nb' option.

This loop has 16 execution paths.

The presence of multiple execution paths is typically the main/first bottleneck.
Try to simplify control inside loop: ideally, try to remove all conditional expressions, for example by (if applicable):

hoisting them (moving them outside the loop)
turning them into conditional moves, MIN or MAX

Ex: if (x<0) x=0 => x = (x<0 ? 0 : x) (or MAX(0,x) after defining the corresponding macro)

gain
potential
hint
expert

Vectorization

Your loop is not vectorized. Only 11% of vector register length is used (average across all SSE/AVX instructions). By vectorizing your loop, you can lower the cost of an iteration from 2.33 to 0.19 cycles (12.00x speedup).

Details

All SSE/AVX instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized loop can use their full power.

Workaround

Try another compiler or update/tune your current one
Remove inter-iterations dependences from your loop and make it unit-stride:
- If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly: C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)
- If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This loop is probably writing/copying data or processing integer elements.

Matching between your loop (in the source code) and the binary loop

The binary loop does not contain any FP arithmetical operations. The binary loop is loading 48 bytes. The binary loop is storing 16 bytes.

General properties

nb instructions	15
nb uops	14
loop length	60
used x86 registers	7
used mmx registers	0
used xmm registers	0
used ymm registers	0
used zmm registers	0
nb stack references	6

Front-end

ASSUMED MACRO FUSION FIT IN UOP CACHE

micro-operation queue	2.33 cycles
front end	2.33 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11
uops	0.70	0.60	2.00	2.00	1.00	0.60	0.50	1.00	1.00	1.00	0.60	2.00
cycles	0.70	0.60	2.00	2.00	1.00	0.60	0.50	1.00	1.00	1.00	0.60	2.00

Execution ports to units layout:

P0 (256 bits): VPU, BRU, ALU, DIV/SQRT
P1 (256 bits): ALU, VPU
P2 (512 bits): load
P3 (512 bits): load
P4 (512 bits): store data
P5 (512 bits): ALU, VPU
P6: ALU, BRU
P7: store address
P8: store address
P9 (512 bits): store data
P10: ALU
P11 (512 bits): load

Cycles executing div or sqrt instructions

NA

Cycles summary

Front-end	2.33
Dispatch	2.00
Overall L1	2.33

Vectorization ratios

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Vector efficiency ratios

all	11%
load	12%
store	12%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	6%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 2.33 cycles. At this rate:

10% of peak load performance is reached (20.57 out of 192.00 bytes loaded per cycle (GB/s @ 1GHz))
5% of peak store performance is reached (6.86 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Performance is limited by instruction throughput (loading/decoding program instructions to execution core) (front-end is a bottleneck). By removing all these bottlenecks, you can lower the cost of an iteration from 2.33 to 2.00 cycles (1.17x speedup).

ASM code

In the binary file, the address of the loop is: 4a90e8

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	Latency	Recip. throughput	Vectorization
MOV -0x58(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x68(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV %RAX,-0x40(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RDX,-0x48(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
LEA (%R10,%RDX,8),%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XOR %R9D,%R9D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
ADD %RAX,%RCX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0x40(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x48(%RBP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x50(%RBP),%R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
INC %RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD %R13,%RDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
CMP %RAX,-0x60(%RBP)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	N/A
JNE 4a90e8 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl1EEEEJNS2_3ForILl2ENS_6policy4loop9loop_execEJNS8_ILl3ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEEE4execIRNS0_8LoopDataINS5_4listIJSG_EEENS5_5tupleIJNS_4impl4SpanINS_9Iterators16numeric_iteratorIN6Kripke6MomentElPSS_EESS_EENSO_INSQ_INSR_5GroupElPSW_EESW_EESZ_NSO_INSQ_INSR_4ZoneElPS10_EES10_EEEEENSM_IJEEEJZNK14ScatteringSdomclINSR_11ArchLayoutTINSR_12ArchT_OpenMPENSR_11LayoutT_DGZEEEEEvT_NSR_6SdomIdES1D_RKNSR_4Core3SetES1H_S1H_RNS1E_5FieldIdJSS_SW_S10_EEES1K_RNS1I_IdJNSR_8MaterialENSR_8LegendreENSR_11GlobalGroupES1N_EEERNS1I_INSR_7MixElemEJS10_EEERNS1I_IiJS10_EEERNS1I_IS1L_JS1Q_EEERNS1I_IdJS1Q_EEERNS1I_IS1M_JSS_EEEEUlSS_SW_SW_S10_E_EEEEEvOS1C_._omp_fn.0+0x2d8>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A

Function	void RAJA::internal::StatementExecutor, RAJA::statement::For<2l, RAJA::policy::loop::loop_exec, RAJA::statement::For<3l, RAJA::policy::loop::loop_exec, RAJA::statement::Lambda<0l> > > > >::exec, RAJA::statement::For<2l, RAJA::policy::loop::loop_exec, RAJA::statement::For<3l, RAJA::policy::loop::loop_exec, RAJA::statement::Lambda<0l> > > > >, camp::tuple, Kripke::Moment>, RAJA::impl::Span, Kripke::Group>, RAJA::impl::Span, Kripke::Group>, RAJA::impl::Span, Kripke::Zone> >, camp::tuple<>, ScatteringSdom::operator() >(Kripke::ArchLayoutT, Kripke::SdomId, Kripke::SdomId, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&) const::{lambda(Kripke::Moment, Kripke::Group, Kripke::Group, Kripke::Zone)#1}>&>(RAJA::internal::LoopData, RAJA::statement::For<2l, RAJA::policy::loop::loop_exec, RAJA::statement::For<3l, RAJA::policy::loop::loop_exec, RAJA::statement::Lambda<0l> > > > >, camp::tuple, Kripke::Moment>, RAJA::impl::Span, Kripke::Group>, RAJA::impl::Span, Kripke::Group>, RAJA::impl::Span, Kripke::Zone> >, camp::tuple<>, ScatteringSdom::operator() >(Kripke::ArchLayoutT, Kripke::SdomId, Kripke::SdomId, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&) const::{lambda(Kripke::Moment, Kripke::Group, Kripke::Group, Kripke::Zone)#1}>&) [clone ._omp_fn.0]
Source file and lines	forall.hpp:59-59
Module	exec

The loop is defined in:

/home/eoseret/qaas_runs_GNR/173-926-6874/intel/Kripke/build/Kripke/src/Kripke/Kernel/Scattering.cpp:87-97
/home/eoseret/qaas_runs_GNR/173-926-6874/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/index/IndexValue.hpp:105
/home/eoseret/qaas_runs_GNR/173-926-6874/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/policy/loop/forall.hpp:59
/home/eoseret/qaas_runs_GNR/173-926-6874/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/util/Layout.hpp:55
/home/eoseret/qaas_runs_GNR/173-926-6874/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/util/View.hpp:110

Warnings:

Non-innermost loop: analyzing only self part (ignoring child loops).
Ignoring paths for analysis
Too many paths. Rerun with max-paths=16
RecMII not computed since number of paths is unknown or > max_paths
Streams not analyzed since number of paths is unknown or > max_paths

Try to simplify control and/or increase the maximum number of paths per function/loop through the 'max-paths-nb' option.

This loop has 16 execution paths.

The presence of multiple execution paths is typically the main/first bottleneck.
Try to simplify control inside loop: ideally, try to remove all conditional expressions, for example by (if applicable):

hoisting them (moving them outside the loop)
turning them into conditional moves, MIN or MAX

Ex: if (x<0) x=0 => x = (x<0 ? 0 : x) (or MAX(0,x) after defining the corresponding macro)

gain
potential
hint
expert

Vectorization

Your loop is not vectorized. Only 11% of vector register length is used (average across all SSE/AVX instructions). By vectorizing your loop, you can lower the cost of an iteration from 2.33 to 0.19 cycles (12.00x speedup).

Details

All SSE/AVX instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized loop can use their full power.

Workaround

Try another compiler or update/tune your current one
Remove inter-iterations dependences from your loop and make it unit-stride:
- If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly: C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)
- If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This loop is probably writing/copying data or processing integer elements.

Matching between your loop (in the source code) and the binary loop

The binary loop does not contain any FP arithmetical operations. The binary loop is loading 48 bytes. The binary loop is storing 16 bytes.

General properties

nb instructions	15
nb uops	14
loop length	60
used x86 registers	7
used mmx registers	0
used xmm registers	0
used ymm registers	0
used zmm registers	0
nb stack references	6

Front-end

ASSUMED MACRO FUSION FIT IN UOP CACHE

micro-operation queue	2.33 cycles
front end	2.33 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11
uops	0.70	0.60	2.00	2.00	1.00	0.60	0.50	1.00	1.00	1.00	0.60	2.00
cycles	0.70	0.60	2.00	2.00	1.00	0.60	0.50	1.00	1.00	1.00	0.60	2.00

Execution ports to units layout:

P0 (256 bits): VPU, BRU, ALU, DIV/SQRT
P1 (256 bits): ALU, VPU
P2 (512 bits): load
P3 (512 bits): load
P4 (512 bits): store data
P5 (512 bits): ALU, VPU
P6: ALU, BRU
P7: store address
P8: store address
P9 (512 bits): store data
P10: ALU
P11 (512 bits): load

Cycles executing div or sqrt instructions

NA

Cycles summary

Front-end	2.33
Dispatch	2.00
Overall L1	2.33

Vectorization ratios

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Vector efficiency ratios

all	11%
load	12%
store	12%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	6%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 2.33 cycles. At this rate:

10% of peak load performance is reached (20.57 out of 192.00 bytes loaded per cycle (GB/s @ 1GHz))
5% of peak store performance is reached (6.86 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Performance is limited by instruction throughput (loading/decoding program instructions to execution core) (front-end is a bottleneck). By removing all these bottlenecks, you can lower the cost of an iteration from 2.33 to 2.00 cycles (1.17x speedup).

ASM code

In the binary file, the address of the loop is: 4a90e8

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	Latency	Recip. throughput	Vectorization
MOV -0x58(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x68(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV %RAX,-0x40(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RDX,-0x48(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
LEA (%R10,%RDX,8),%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XOR %R9D,%R9D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
ADD %RAX,%RCX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0x40(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x48(%RBP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x50(%RBP),%R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
INC %RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD %R13,%RDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
CMP %RAX,-0x60(%RBP)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	N/A
JNE 4a90e8 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl1EEEEJNS2_3ForILl2ENS_6policy4loop9loop_execEJNS8_ILl3ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEEE4execIRNS0_8LoopDataINS5_4listIJSG_EEENS5_5tupleIJNS_4impl4SpanINS_9Iterators16numeric_iteratorIN6Kripke6MomentElPSS_EESS_EENSO_INSQ_INSR_5GroupElPSW_EESW_EESZ_NSO_INSQ_INSR_4ZoneElPS10_EES10_EEEEENSM_IJEEEJZNK14ScatteringSdomclINSR_11ArchLayoutTINSR_12ArchT_OpenMPENSR_11LayoutT_DGZEEEEEvT_NSR_6SdomIdES1D_RKNSR_4Core3SetES1H_S1H_RNS1E_5FieldIdJSS_SW_S10_EEES1K_RNS1I_IdJNSR_8MaterialENSR_8LegendreENSR_11GlobalGroupES1N_EEERNS1I_INSR_7MixElemEJS10_EEERNS1I_IiJS10_EEERNS1I_IS1L_JS1Q_EEERNS1I_IdJS1Q_EEERNS1I_IS1M_JSS_EEEEUlSS_SW_SW_S10_E_EEEEEvOS1C_._omp_fn.0+0x2d8>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A

Report Configuration

Vectorization

Details

Workaround

Execution units bottlenecks

Type of elements and instruction set

Matching between your loop (in the source code) and the binary loop

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code

Vectorization

Details

Workaround

Execution units bottlenecks

Type of elements and instruction set

Matching between your loop (in the source code) and the binary loop

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code