OV - exec - Loop 1910

	Loop Id: 1910	Module: exec	Source: RangeSegment.hpp:120-120 [...]	Coverage: 0.01%

0x49c4d0 MOV	-0x48(%RBP),%R15

0x49c4d4 MOV	-0x80(%RBP),%RCX

0x49c4d8 LEA	(%R15,%R12,1),%R10

0x49c4dc MOV	-0x38(%RBP),%R15

0x49c4e0 MOV	-0x78(%RBP),%RDI

0x49c4e4 IMUL	%R10,%R15

0x49c4e8 LEA	(%R14,%RCX,1),%RSI

0x49c4ec MOV	-0x58(%RBP),%R8

0x49c4f0 ADD	%RDI,%R15

0x49c4f3 MOV	-0x60(%RBP),%RCX

0x49c4f7 ADD	%R13,%R15

0x49c4fa LEA	(%R8,%RSI,8),%R8

0x49c4fe LEA	(%RCX,%R15,8),%RDI

0x49c502 MOV	-0x68(%RBP),%RSI

0x49c506 MOV	-0x40(%RBP),%R15

0x49c50a IMUL	%R14,%RSI

0x49c50e IMUL	%R15,%R10

0x49c512 XOR	%R15D,%R15D

0x49c515 ADD	%R10,%RSI

0x49c518 MOV	-0x50(%RBP),%R10

0x49c51c ADD	%R13,%RSI

0x49c51f LEA	(%R10,%RSI,8),%RSI

0x49c523 NOPL	(%RAX,%RAX,1)

  (1909) 0x49c528 MOV	%R9,%R10

  (1909) 0x49c52b XOR	%ECX,%ECX

  (1909) 0x49c52d AND	$0x7,%R10D

  (1909) 0x49c531 JE	49c613

  (1909) 0x49c537 CMP	$0x1,%R10

  (1909) 0x49c53b JE	49c5f2

  (1909) 0x49c541 CMP	$0x2,%R10

  (1909) 0x49c545 JE	49c5da

  (1909) 0x49c54b CMP	$0x3,%R10

  (1909) 0x49c54f JE	49c5c2

  (1909) 0x49c551 CMP	$0x4,%R10

  (1909) 0x49c555 JE	49c5aa

  (1909) 0x49c557 CMP	$0x5,%R10

  (1909) 0x49c55b JE	49c592

  (1909) 0x49c55d CMP	$0x6,%R10

  (1909) 0x49c561 JE	49c57a

  (1909) 0x49c563 VMOVSD	(%R8),%XMM0

  (1909) 0x49c568 VMOVSD	(%RSI),%XMM7

  (1909) 0x49c56c MOV	$0x1,%ECX

  (1909) 0x49c571 VFMADD132SD	(%RDI),%XMM7,%XMM0

  (1909) 0x49c576 VMOVSD	%XMM0,(%RSI)

  (1909) 0x49c57a VMOVSD	(%RSI,%RCX,8),%XMM2

  (1909) 0x49c57f VMOVSD	(%R8),%XMM1

  (1909) 0x49c584 VFMADD132SD	(%RDI,%RCX,8),%XMM2,%XMM1

  (1909) 0x49c58a VMOVSD	%XMM1,(%RSI,%RCX,8)

  (1909) 0x49c58f INC	%RCX

  (1909) 0x49c592 VMOVSD	(%RSI,%RCX,8),%XMM6

  (1909) 0x49c597 VMOVSD	(%R8),%XMM3

  (1909) 0x49c59c VFMADD132SD	(%RDI,%RCX,8),%XMM6,%XMM3

  (1909) 0x49c5a2 VMOVSD	%XMM3,(%RSI,%RCX,8)

  (1909) 0x49c5a7 INC	%RCX

  (1909) 0x49c5aa VMOVSD	(%RSI,%RCX,8),%XMM5

  (1909) 0x49c5af VMOVSD	(%R8),%XMM4

  (1909) 0x49c5b4 VFMADD132SD	(%RDI,%RCX,8),%XMM5,%XMM4

  (1909) 0x49c5ba VMOVSD	%XMM4,(%RSI,%RCX,8)

  (1909) 0x49c5bf INC	%RCX

  (1909) 0x49c5c2 VMOVSD	(%RSI,%RCX,8),%XMM9

  (1909) 0x49c5c7 VMOVSD	(%R8),%XMM8

  (1909) 0x49c5cc VFMADD132SD	(%RDI,%RCX,8),%XMM9,%XMM8

  (1909) 0x49c5d2 VMOVSD	%XMM8,(%RSI,%RCX,8)

  (1909) 0x49c5d7 INC	%RCX

  (1909) 0x49c5da VMOVSD	(%RSI,%RCX,8),%XMM11

  (1909) 0x49c5df VMOVSD	(%R8),%XMM10

  (1909) 0x49c5e4 VFMADD132SD	(%RDI,%RCX,8),%XMM11,%XMM10

  (1909) 0x49c5ea VMOVSD	%XMM10,(%RSI,%RCX,8)

  (1909) 0x49c5ef INC	%RCX

  (1909) 0x49c5f2 VMOVSD	(%RSI,%RCX,8),%XMM13

  (1909) 0x49c5f7 VMOVSD	(%R8),%XMM12

  (1909) 0x49c5fc VFMADD132SD	(%RDI,%RCX,8),%XMM13,%XMM12

  (1909) 0x49c602 VMOVSD	%XMM12,(%RSI,%RCX,8)

  (1909) 0x49c607 INC	%RCX

  (1909) 0x49c60a CMP	%RCX,%R9

  (1909) 0x49c60d JE	49c6dd

    (1908) 0x49c613 VMOVSD	(%R8),%XMM14

    (1908) 0x49c618 VMOVSD	(%RSI,%RCX,8),%XMM15

    (1908) 0x49c61d VMOVSD	0x8(%RSI,%RCX,8),%XMM7

    (1908) 0x49c623 VFMADD132SD	(%RDI,%RCX,8),%XMM15,%XMM14

    (1908) 0x49c629 VMOVSD	0x10(%RSI,%RCX,8),%XMM2

    (1908) 0x49c62f VMOVSD	0x18(%RSI,%RCX,8),%XMM6

    (1908) 0x49c635 VMOVSD	0x20(%RSI,%RCX,8),%XMM5

    (1908) 0x49c63b VMOVSD	0x28(%RSI,%RCX,8),%XMM9

    (1908) 0x49c641 VMOVSD	%XMM14,(%RSI,%RCX,8)

    (1908) 0x49c646 VMOVSD	(%R8),%XMM0

    (1908) 0x49c64b VMOVSD	0x30(%RSI,%RCX,8),%XMM11

    (1908) 0x49c651 VFMADD132SD	0x8(%RDI,%RCX,8),%XMM7,%XMM0

    (1908) 0x49c658 VMOVSD	0x38(%RSI,%RCX,8),%XMM13

    (1908) 0x49c65e VMOVSD	%XMM0,0x8(%RSI,%RCX,8)

    (1908) 0x49c664 VMOVSD	(%R8),%XMM1

    (1908) 0x49c669 VFMADD132SD	0x10(%RDI,%RCX,8),%XMM2,%XMM1

    (1908) 0x49c670 VMOVSD	%XMM1,0x10(%RSI,%RCX,8)

    (1908) 0x49c676 VMOVSD	(%R8),%XMM3

    (1908) 0x49c67b VFMADD132SD	0x18(%RDI,%RCX,8),%XMM6,%XMM3

    (1908) 0x49c682 VMOVSD	%XMM3,0x18(%RSI,%RCX,8)

    (1908) 0x49c688 VMOVSD	(%R8),%XMM4

    (1908) 0x49c68d VFMADD132SD	0x20(%RDI,%RCX,8),%XMM5,%XMM4

    (1908) 0x49c694 VMOVSD	%XMM4,0x20(%RSI,%RCX,8)

    (1908) 0x49c69a VMOVSD	(%R8),%XMM8

    (1908) 0x49c69f VFMADD132SD	0x28(%RDI,%RCX,8),%XMM9,%XMM8

    (1908) 0x49c6a6 VMOVSD	%XMM8,0x28(%RSI,%RCX,8)

    (1908) 0x49c6ac VMOVSD	(%R8),%XMM10

    (1908) 0x49c6b1 VFMADD132SD	0x30(%RDI,%RCX,8),%XMM11,%XMM10

    (1908) 0x49c6b8 VMOVSD	%XMM10,0x30(%RSI,%RCX,8)

    (1908) 0x49c6be VMOVSD	(%R8),%XMM12

    (1908) 0x49c6c3 VFMADD132SD	0x38(%RDI,%RCX,8),%XMM13,%XMM12

    (1908) 0x49c6ca VMOVSD	%XMM12,0x38(%RSI,%RCX,8)

    (1908) 0x49c6d0 ADD	$0x8,%RCX

    (1908) 0x49c6d4 CMP	%RCX,%R9

    (1908) 0x49c6d7 JNE	49c613

  (1909) 0x49c6dd INC	%R15

  (1909) 0x49c6e0 ADD	%RBX,%R8

  (1909) 0x49c6e3 ADD	%RDX,%RDI

  (1909) 0x49c6e6 CMP	%R15,%R11

  (1909) 0x49c6e9 JNE	49c528

0x49c6ef CMP	%RAX,-0x70(%RBP)

0x49c6f3 JE	49c709

0x49c6f5 INC	%R12

0x49c6f8 CMP	%R12,-0x88(%RBP)

0x49c6ff JLE	49c718

0x49c701 INC	%RAX

0x49c704 JMP	49c4d0

0x49c718 INCQ	-0x90(%RBP)

0x49c71f MOV	-0x98(%RBP),%R8

0x49c726 XOR	%R12D,%R12D

0x49c729 MOV	-0x90(%RBP),%R14

0x49c730 LEA	(%R8,%R14,1),%R14

0x49c734 JMP	49c701

/home/eoseret/qaas_runs_GNR/173-926-6874/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/util/Operators.hpp: 307 - 307

--------------------------------------------------------------------------------

307:     return Ret{lhs} + rhs;

/home/eoseret/qaas_runs_GNR/173-926-6874/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/index/RangeSegment.hpp: 120 - 120

--------------------------------------------------------------------------------

120:   RAJA_HOST_DEVICE RAJA_INLINE ~TypedRangeSegment() {}

/home/eoseret/qaas_runs_GNR/173-926-6874/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/policy/loop/forall.hpp: 59 - 59

--------------------------------------------------------------------------------

59:   for (decltype(distance_it) i = 0; i < distance_it; ++i) {

/home/eoseret/qaas_runs_GNR/173-926-6874/intel/Kripke/build/Kripke/src/Kripke/Kernel/LTimes.cpp: 62 - 62

--------------------------------------------------------------------------------

62:            phi(nm,g,z) += ell(nm, d) * psi(d, g, z);

/home/eoseret/qaas_runs_GNR/173-926-6874/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/internal/Iterators.hpp: 177 - 177

--------------------------------------------------------------------------------

177:     return value_type(val + rhs);

/home/eoseret/qaas_runs_GNR/173-926-6874/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/util/Layout.hpp: 55 - 55

--------------------------------------------------------------------------------

55:     return a * b;

/home/eoseret/qaas_runs_GNR/173-926-6874/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/policy/openmp/kernel/Collapse.hpp: 81 - 81

--------------------------------------------------------------------------------

81: #pragma omp parallel for private(i0, i1) firstprivate(privatizer) \

Coverage (%)	Name	Source Location	Module
○97.87	gomp_thread_start	team.c:130	libgomp.so.1.0.0
○2.13	GOMP_parallel	libgomp.h:982	libgomp.so.1.0.0

Path /

Metric	Value
CQA speedup if no scalar integer	1.00
CQA speedup if FP arith vectorized	1.00
CQA speedup if fully vectorized	8.00
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.36
Bottlenecks	micro-operation queue,
Function	void RAJA::internal::StatementExecutor, RAJA::statement::For<1l, RAJA::policy::loop::loop_exec, RAJA::statement::For<3l, RAJA::policy::loop::loop_exec, RAJA::statement::Lambda<0l> > > > >::exec, RAJA::statement::For<1l, RAJA::policy::loop::loop_exec, RAJA::statement::For<3l, RAJA::policy::loop::loop_exec, RAJA::statement::Lambda<0l> > > > >, camp::tuple, Kripke::Moment>, RAJA::impl::Span, Kripke::Direction>, RAJA::impl::Span, Kripke::Group>, RAJA::impl::Span, Kripke::Zone> >, camp::tuple<>, LTimesSdom::operator() >(Kripke::ArchLayoutT, Kripke::SdomId, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&) const::{lambda(Kripke::Moment, Kripke::Direction, Kripke::Group, Kripke::Zone)#1}>&>(RAJA::internal::LoopData, RAJA::statement::For<1l, RAJA::policy::loop::loop_exec, RAJA::statement::For<3l, RAJA::policy::loop::loop_exec, RAJA::statement::Lambda<0l> > > > >, camp::tuple, Kripke::Moment>, RAJA::impl::Span, Kripke::Direction>, RAJA::impl::Span, Kripke::Group>, RAJA::impl::Span, Kripke::Zone> >, camp::tuple<>, LTimesSdom::operator() >(Kripke::ArchLayoutT, Kripke::SdomId, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&) const::{lambda(Kripke::Moment, Kripke::Direction, Kripke::Group, Kripke::Zone)#1}>&) [clone ._omp_fn.0]
Source	Operators.hpp:307-307,RangeSegment.hpp:120-120,forall.hpp:59-59,Iterators.hpp:177-177,Layout.hpp:55-55,Collapse.hpp:81-81
Source loop unroll info	NA
Source loop unroll confidence level	NA
Unroll/vectorization loop type	NA
Unroll factor	NA
CQA cycles	6.33
CQA cycles if no scalar integer	6.33
CQA cycles if FP arith vectorized	6.33
CQA cycles if fully vectorized	0.79
Front-end cycles	6.33
P0 cycles	2.40
P1 cycles	4.40
P2 cycles	4.67
P3 cycles	4.67
P4 cycles	0.50
P5 cycles	2.20
P6 cycles	2.20
P7 cycles	0.50
P8 cycles	0.50
P9 cycles	0.50
P10 cycles	2.20
P11 cycles	4.67
DIV/SQRT cycles	0.00
Inter-iter dependencies cycles	NA
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	36.00
Nb uops	38.00
Nb loads	14.00
Nb stores	1.00
Nb stack references	13.00
FLOP/cycle	0.00
Nb FLOP add-sub	0.00
Nb FLOP mul	0.00
Nb FLOP fma	0.00
Nb FLOP div	0.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	0.00
Nb FLOP rsqrt	0.00
Bytes/cycle	18.95
Bytes prefetched	0.00
Bytes loaded	112.00
Bytes stored	8.00
Stride 0	NA
Stride 1	NA
Stride n	NA
Stride unknown	NA
Stride indirect	NA
Vectorization ratio all	0.00
Vectorization ratio load	0.00
Vectorization ratio store	NA
Vectorization ratio mul	NA
Vectorization ratio add_sub	NA
Vectorization ratio fma	NA
Vectorization ratio div_sqrt	NA
Vectorization ratio other	0.00
Vector-efficiency ratio all	12.50
Vector-efficiency ratio load	12.50
Vector-efficiency ratio store	NA
Vector-efficiency ratio mul	NA
Vector-efficiency ratio add_sub	NA
Vector-efficiency ratio fma	NA
Vector-efficiency ratio div_sqrt	NA
Vector-efficiency ratio other	12.50

Metric	Value
CQA speedup if no scalar integer	1.00
CQA speedup if FP arith vectorized	1.00
CQA speedup if fully vectorized	8.00
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.36
Bottlenecks	micro-operation queue,
Function	void RAJA::internal::StatementExecutor, RAJA::statement::For<1l, RAJA::policy::loop::loop_exec, RAJA::statement::For<3l, RAJA::policy::loop::loop_exec, RAJA::statement::Lambda<0l> > > > >::exec, RAJA::statement::For<1l, RAJA::policy::loop::loop_exec, RAJA::statement::For<3l, RAJA::policy::loop::loop_exec, RAJA::statement::Lambda<0l> > > > >, camp::tuple, Kripke::Moment>, RAJA::impl::Span, Kripke::Direction>, RAJA::impl::Span, Kripke::Group>, RAJA::impl::Span, Kripke::Zone> >, camp::tuple<>, LTimesSdom::operator() >(Kripke::ArchLayoutT, Kripke::SdomId, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&) const::{lambda(Kripke::Moment, Kripke::Direction, Kripke::Group, Kripke::Zone)#1}>&>(RAJA::internal::LoopData, RAJA::statement::For<1l, RAJA::policy::loop::loop_exec, RAJA::statement::For<3l, RAJA::policy::loop::loop_exec, RAJA::statement::Lambda<0l> > > > >, camp::tuple, Kripke::Moment>, RAJA::impl::Span, Kripke::Direction>, RAJA::impl::Span, Kripke::Group>, RAJA::impl::Span, Kripke::Zone> >, camp::tuple<>, LTimesSdom::operator() >(Kripke::ArchLayoutT, Kripke::SdomId, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&) const::{lambda(Kripke::Moment, Kripke::Direction, Kripke::Group, Kripke::Zone)#1}>&) [clone ._omp_fn.0]
Source	Operators.hpp:307-307,RangeSegment.hpp:120-120,forall.hpp:59-59,Iterators.hpp:177-177,Layout.hpp:55-55,Collapse.hpp:81-81
Source loop unroll info	NA
Source loop unroll confidence level	NA
Unroll/vectorization loop type	NA
Unroll factor	NA
CQA cycles	6.33
CQA cycles if no scalar integer	6.33
CQA cycles if FP arith vectorized	6.33
CQA cycles if fully vectorized	0.79
Front-end cycles	6.33
P0 cycles	2.40
P1 cycles	4.40
P2 cycles	4.67
P3 cycles	4.67
P4 cycles	0.50
P5 cycles	2.20
P6 cycles	2.20
P7 cycles	0.50
P8 cycles	0.50
P9 cycles	0.50
P10 cycles	2.20
P11 cycles	4.67
DIV/SQRT cycles	0.00
Inter-iter dependencies cycles	NA
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	36.00
Nb uops	38.00
Nb loads	14.00
Nb stores	1.00
Nb stack references	13.00
FLOP/cycle	0.00
Nb FLOP add-sub	0.00
Nb FLOP mul	0.00
Nb FLOP fma	0.00
Nb FLOP div	0.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	0.00
Nb FLOP rsqrt	0.00
Bytes/cycle	18.95
Bytes prefetched	0.00
Bytes loaded	112.00
Bytes stored	8.00
Stride 0	NA
Stride 1	NA
Stride n	NA
Stride unknown	NA
Stride indirect	NA
Vectorization ratio all	0.00
Vectorization ratio load	0.00
Vectorization ratio store	NA
Vectorization ratio mul	NA
Vectorization ratio add_sub	NA
Vectorization ratio fma	NA
Vectorization ratio div_sqrt	NA
Vectorization ratio other	0.00
Vector-efficiency ratio all	12.50
Vector-efficiency ratio load	12.50
Vector-efficiency ratio store	NA
Vector-efficiency ratio mul	NA
Vector-efficiency ratio add_sub	NA
Vector-efficiency ratio fma	NA
Vector-efficiency ratio div_sqrt	NA
Vector-efficiency ratio other	12.50

Path /

Average path: Display a virtual path defined by average values of all real paths

Function	void RAJA::internal::StatementExecutor, RAJA::statement::For<1l, RAJA::policy::loop::loop_exec, RAJA::statement::For<3l, RAJA::policy::loop::loop_exec, RAJA::statement::Lambda<0l> > > > >::exec, RAJA::statement::For<1l, RAJA::policy::loop::loop_exec, RAJA::statement::For<3l, RAJA::policy::loop::loop_exec, RAJA::statement::Lambda<0l> > > > >, camp::tuple, Kripke::Moment>, RAJA::impl::Span, Kripke::Direction>, RAJA::impl::Span, Kripke::Group>, RAJA::impl::Span, Kripke::Zone> >, camp::tuple<>, LTimesSdom::operator() >(Kripke::ArchLayoutT, Kripke::SdomId, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&) const::{lambda(Kripke::Moment, Kripke::Direction, Kripke::Group, Kripke::Zone)#1}>&>(RAJA::internal::LoopData, RAJA::statement::For<1l, RAJA::policy::loop::loop_exec, RAJA::statement::For<3l, RAJA::policy::loop::loop_exec, RAJA::statement::Lambda<0l> > > > >, camp::tuple, Kripke::Moment>, RAJA::impl::Span, Kripke::Direction>, RAJA::impl::Span, Kripke::Group>, RAJA::impl::Span, Kripke::Zone> >, camp::tuple<>, LTimesSdom::operator() >(Kripke::ArchLayoutT, Kripke::SdomId, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&) const::{lambda(Kripke::Moment, Kripke::Direction, Kripke::Group, Kripke::Zone)#1}>&) [clone ._omp_fn.0]
Source file and lines	RangeSegment.hpp:120-120
Module	exec

The loop is defined in:

/home/eoseret/qaas_runs_GNR/173-926-6874/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/util/Operators.hpp:307
/home/eoseret/qaas_runs_GNR/173-926-6874/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/index/RangeSegment.hpp:120
/home/eoseret/qaas_runs_GNR/173-926-6874/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/policy/loop/forall.hpp:59
/home/eoseret/qaas_runs_GNR/173-926-6874/intel/Kripke/build/Kripke/src/Kripke/Kernel/LTimes.cpp:62
/home/eoseret/qaas_runs_GNR/173-926-6874/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/internal/Iterators.hpp:177
/home/eoseret/qaas_runs_GNR/173-926-6874/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/util/Layout.hpp:55
/home/eoseret/qaas_runs_GNR/173-926-6874/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/policy/openmp/kernel/Collapse.hpp:81

Warnings:

Non-innermost loop: analyzing only self part (ignoring child loops).
Ignoring paths for analysis
Too many paths. Rerun with max-paths=30
RecMII not computed since number of paths is unknown or > max_paths
Streams not analyzed since number of paths is unknown or > max_paths

Try to simplify control and/or increase the maximum number of paths per function/loop through the 'max-paths-nb' option.

This loop has 30 execution paths.

The presence of multiple execution paths is typically the main/first bottleneck.
Try to simplify control inside loop: ideally, try to remove all conditional expressions, for example by (if applicable):

hoisting them (moving them outside the loop)
turning them into conditional moves, MIN or MAX

Ex: if (x<0) x=0 => x = (x<0 ? 0 : x) (or MAX(0,x) after defining the corresponding macro)

gain
potential
hint
expert

Vectorization

Your loop is not vectorized. 8 data elements could be processed at once in vector registers. By vectorizing your loop, you can lower the cost of an iteration from 6.33 to 0.79 cycles (8.00x speedup).

Details

All SSE/AVX instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized loop can use their full power.

Workaround

Try another compiler or update/tune your current one
Remove inter-iterations dependences from your loop and make it unit-stride:
- If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly: C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)
- If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

INC: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-926-6874/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/policy/openmp/kernel/Collapse.hpp:81

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This loop is probably writing/copying data or processing integer elements.

Matching between your loop (in the source code) and the binary loop

The binary loop does not contain any FP arithmetical operations. The binary loop is loading 112 bytes. The binary loop is storing 8 bytes.

General properties

nb instructions	36
nb uops	38
loop length	144
used x86 registers	11
used mmx registers	0
used xmm registers	0
used ymm registers	0
used zmm registers	0
nb stack references	13

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	6.33 cycles
front end	6.33 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11
uops	2.40	3.00	4.67	4.67	0.50	2.20	2.20	0.50	0.50	0.50	2.20	4.67
cycles	2.40	4.40	4.67	4.67	0.50	2.20	2.20	0.50	0.50	0.50	2.20	4.67

Execution ports to units layout:

P0 (256 bits): VPU, BRU, ALU, DIV/SQRT
P1 (256 bits): ALU, VPU
P2 (512 bits): load
P3 (512 bits): load
P4 (512 bits): store data
P5 (512 bits): ALU, VPU
P6: ALU, BRU
P7: store address
P8: store address
P9 (512 bits): store data
P10: ALU
P11 (512 bits): load

Cycles executing div or sqrt instructions

Cycles summary

Front-end	6.33
Dispatch	4.67
Overall L1	6.33

Vectorization ratios

all	0%
load	0%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Vector efficiency ratios

all	12%
load	12%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	12%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 6.33 cycles. At this rate:

9% of peak load performance is reached (17.68 out of 192.00 bytes loaded per cycle (GB/s @ 1GHz))
0% of peak store performance is reached (1.26 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Performance is limited by instruction throughput (loading/decoding program instructions to execution core) (front-end is a bottleneck). By removing all these bottlenecks, you can lower the cost of an iteration from 6.33 to 4.67 cycles (1.36x speedup).

ASM code

In the binary file, the address of the loop is: 49c4d0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	Latency	Recip. throughput	Vectorization
MOV -0x48(%RBP),%R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x80(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%R15,%R12,1),%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0x38(%RBP),%R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x78(%RBP),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
IMUL %R10,%R15	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
LEA (%R14,%RCX,1),%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0x58(%RBP),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
ADD %RDI,%R15	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV -0x60(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
ADD %R13,%R15	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
LEA (%R8,%RSI,8),%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA (%RCX,%R15,8),%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0x68(%RBP),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x40(%RBP),%R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
IMUL %R14,%RSI	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
IMUL %R15,%R10	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
XOR %R15D,%R15D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
ADD %R10,%RSI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV -0x50(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
ADD %R13,%RSI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
LEA (%R10,%RSI,8),%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP %RAX,-0x70(%RBP)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JE 49c709 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl2EEEEJNS2_3ForILl1ENS_6policy4loop9loop_execEJNS8_ILl3ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEEE4execIRNS0_8LoopDataINS5_4listIJSG_EEENS5_5tupleIJNS_4impl4SpanINS_9Iterators16numeric_iteratorIN6Kripke6MomentElPSS_EESS_EENSO_INSQ_INSR_9DirectionElPSW_EESW_EENSO_INSQ_INSR_5GroupElPS10_EES10_EENSO_INSQ_INSR_4ZoneElPS14_EES14_EEEEENSM_IJEEEJZNK10LTimesSdomclINSR_11ArchLayoutTINSR_12ArchT_OpenMPENSR_11LayoutT_DGZEEEEEvT_NSR_6SdomIdERKNSR_4Core3SetES1L_S1L_S1L_RNS1I_5FieldIdJSW_S10_S14_EEERNS1M_IdJSS_S10_S14_EEERNS1M_IdJSS_SW_EEEEUlSS_SW_S10_S14_E_EEEEEvOS1G_._omp_fn.0+0x399>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
INC %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP %R12,-0x88(%RBP)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JLE 49c718 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl2EEEEJNS2_3ForILl1ENS_6policy4loop9loop_execEJNS8_ILl3ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEEE4execIRNS0_8LoopDataINS5_4listIJSG_EEENS5_5tupleIJNS_4impl4SpanINS_9Iterators16numeric_iteratorIN6Kripke6MomentElPSS_EESS_EENSO_INSQ_INSR_9DirectionElPSW_EESW_EENSO_INSQ_INSR_5GroupElPS10_EES10_EENSO_INSQ_INSR_4ZoneElPS14_EES14_EEEEENSM_IJEEEJZNK10LTimesSdomclINSR_11ArchLayoutTINSR_12ArchT_OpenMPENSR_11LayoutT_DGZEEEEEvT_NSR_6SdomIdERKNSR_4Core3SetES1L_S1L_S1L_RNS1I_5FieldIdJSW_S10_S14_EEERNS1M_IdJSS_S10_S14_EEERNS1M_IdJSS_SW_EEEEUlSS_SW_S10_S14_E_EEEEEvOS1G_._omp_fn.0+0x3a8>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
INC %RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JMP 49c4d0 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl2EEEEJNS2_3ForILl1ENS_6policy4loop9loop_execEJNS8_ILl3ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEEE4execIRNS0_8LoopDataINS5_4listIJSG_EEENS5_5tupleIJNS_4impl4SpanINS_9Iterators16numeric_iteratorIN6Kripke6MomentElPSS_EESS_EENSO_INSQ_INSR_9DirectionElPSW_EESW_EENSO_INSQ_INSR_5GroupElPS10_EES10_EENSO_INSQ_INSR_4ZoneElPS14_EES14_EEEEENSM_IJEEEJZNK10LTimesSdomclINSR_11ArchLayoutTINSR_12ArchT_OpenMPENSR_11LayoutT_DGZEEEEEvT_NSR_6SdomIdERKNSR_4Core3SetES1L_S1L_S1L_RNS1I_5FieldIdJSW_S10_S14_EEERNS1M_IdJSS_S10_S14_EEERNS1M_IdJSS_SW_EEEEUlSS_SW_S10_S14_E_EEEEEvOS1G_._omp_fn.0+0x160>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
INCQ -0x90(%RBP)	3	0.20	0.20	0.33	0.33	0.50	0.20	0.20	0.50	0.50	0.50	0.20	0.33	1	0.50	N/A
MOV -0x98(%RBP),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
XOR %R12D,%R12D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0x90(%RBP),%R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%R8,%R14,1),%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
JMP 49c701 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl2EEEEJNS2_3ForILl1ENS_6policy4loop9loop_execEJNS8_ILl3ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEEE4execIRNS0_8LoopDataINS5_4listIJSG_EEENS5_5tupleIJNS_4impl4SpanINS_9Iterators16numeric_iteratorIN6Kripke6MomentElPSS_EESS_EENSO_INSQ_INSR_9DirectionElPSW_EESW_EENSO_INSQ_INSR_5GroupElPS10_EES10_EENSO_INSQ_INSR_4ZoneElPS14_EES14_EEEEENSM_IJEEEJZNK10LTimesSdomclINSR_11ArchLayoutTINSR_12ArchT_OpenMPENSR_11LayoutT_DGZEEEEEvT_NSR_6SdomIdERKNSR_4Core3SetES1L_S1L_S1L_RNS1I_5FieldIdJSW_S10_S14_EEERNS1M_IdJSS_S10_S14_EEERNS1M_IdJSS_SW_EEEEUlSS_SW_S10_S14_E_EEEEEvOS1G_._omp_fn.0+0x391>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A

Function	void RAJA::internal::StatementExecutor, RAJA::statement::For<1l, RAJA::policy::loop::loop_exec, RAJA::statement::For<3l, RAJA::policy::loop::loop_exec, RAJA::statement::Lambda<0l> > > > >::exec, RAJA::statement::For<1l, RAJA::policy::loop::loop_exec, RAJA::statement::For<3l, RAJA::policy::loop::loop_exec, RAJA::statement::Lambda<0l> > > > >, camp::tuple, Kripke::Moment>, RAJA::impl::Span, Kripke::Direction>, RAJA::impl::Span, Kripke::Group>, RAJA::impl::Span, Kripke::Zone> >, camp::tuple<>, LTimesSdom::operator() >(Kripke::ArchLayoutT, Kripke::SdomId, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&) const::{lambda(Kripke::Moment, Kripke::Direction, Kripke::Group, Kripke::Zone)#1}>&>(RAJA::internal::LoopData, RAJA::statement::For<1l, RAJA::policy::loop::loop_exec, RAJA::statement::For<3l, RAJA::policy::loop::loop_exec, RAJA::statement::Lambda<0l> > > > >, camp::tuple, Kripke::Moment>, RAJA::impl::Span, Kripke::Direction>, RAJA::impl::Span, Kripke::Group>, RAJA::impl::Span, Kripke::Zone> >, camp::tuple<>, LTimesSdom::operator() >(Kripke::ArchLayoutT, Kripke::SdomId, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&) const::{lambda(Kripke::Moment, Kripke::Direction, Kripke::Group, Kripke::Zone)#1}>&) [clone ._omp_fn.0]
Source file and lines	RangeSegment.hpp:120-120
Module	exec

The loop is defined in:

/home/eoseret/qaas_runs_GNR/173-926-6874/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/util/Operators.hpp:307
/home/eoseret/qaas_runs_GNR/173-926-6874/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/index/RangeSegment.hpp:120
/home/eoseret/qaas_runs_GNR/173-926-6874/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/policy/loop/forall.hpp:59
/home/eoseret/qaas_runs_GNR/173-926-6874/intel/Kripke/build/Kripke/src/Kripke/Kernel/LTimes.cpp:62
/home/eoseret/qaas_runs_GNR/173-926-6874/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/internal/Iterators.hpp:177
/home/eoseret/qaas_runs_GNR/173-926-6874/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/util/Layout.hpp:55
/home/eoseret/qaas_runs_GNR/173-926-6874/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/policy/openmp/kernel/Collapse.hpp:81

Warnings:

Non-innermost loop: analyzing only self part (ignoring child loops).
Ignoring paths for analysis
Too many paths. Rerun with max-paths=30
RecMII not computed since number of paths is unknown or > max_paths
Streams not analyzed since number of paths is unknown or > max_paths

hoisting them (moving them outside the loop)
turning them into conditional moves, MIN or MAX

Ex: if (x<0) x=0 => x = (x<0 ? 0 : x) (or MAX(0,x) after defining the corresponding macro)

gain
potential
hint
expert

Vectorization

Your loop is not vectorized. 8 data elements could be processed at once in vector registers. By vectorizing your loop, you can lower the cost of an iteration from 6.33 to 0.79 cycles (8.00x speedup).

Details

All SSE/AVX instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized loop can use their full power.

Workaround

Try another compiler or update/tune your current one
Remove inter-iterations dependences from your loop and make it unit-stride:
- If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly: C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)
- If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

INC: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-926-6874/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/policy/openmp/kernel/Collapse.hpp:81

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This loop is probably writing/copying data or processing integer elements.

Matching between your loop (in the source code) and the binary loop

The binary loop does not contain any FP arithmetical operations. The binary loop is loading 112 bytes. The binary loop is storing 8 bytes.

General properties

nb instructions	36
nb uops	38
loop length	144
used x86 registers	11
used mmx registers	0
used xmm registers	0
used ymm registers	0
used zmm registers	0
nb stack references	13

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	6.33 cycles
front end	6.33 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11
uops	2.40	3.00	4.67	4.67	0.50	2.20	2.20	0.50	0.50	0.50	2.20	4.67
cycles	2.40	4.40	4.67	4.67	0.50	2.20	2.20	0.50	0.50	0.50	2.20	4.67

Execution ports to units layout:

P0 (256 bits): VPU, BRU, ALU, DIV/SQRT
P1 (256 bits): ALU, VPU
P2 (512 bits): load
P3 (512 bits): load
P4 (512 bits): store data
P5 (512 bits): ALU, VPU
P6: ALU, BRU
P7: store address
P8: store address
P9 (512 bits): store data
P10: ALU
P11 (512 bits): load

Cycles executing div or sqrt instructions

Cycles summary

Front-end	6.33
Dispatch	4.67
Overall L1	6.33

Vectorization ratios

all	0%
load	0%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Vector efficiency ratios

all	12%
load	12%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	12%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 6.33 cycles. At this rate:

9% of peak load performance is reached (17.68 out of 192.00 bytes loaded per cycle (GB/s @ 1GHz))
0% of peak store performance is reached (1.26 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

ASM code

In the binary file, the address of the loop is: 49c4d0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	Latency	Recip. throughput	Vectorization
MOV -0x48(%RBP),%R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x80(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%R15,%R12,1),%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0x38(%RBP),%R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x78(%RBP),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
IMUL %R10,%R15	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
LEA (%R14,%RCX,1),%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0x58(%RBP),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
ADD %RDI,%R15	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV -0x60(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
ADD %R13,%R15	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
LEA (%R8,%RSI,8),%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA (%RCX,%R15,8),%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0x68(%RBP),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x40(%RBP),%R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
IMUL %R14,%RSI	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
IMUL %R15,%R10	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
XOR %R15D,%R15D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
ADD %R10,%RSI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV -0x50(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
ADD %R13,%RSI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
LEA (%R10,%RSI,8),%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP %RAX,-0x70(%RBP)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JE 49c709 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl2EEEEJNS2_3ForILl1ENS_6policy4loop9loop_execEJNS8_ILl3ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEEE4execIRNS0_8LoopDataINS5_4listIJSG_EEENS5_5tupleIJNS_4impl4SpanINS_9Iterators16numeric_iteratorIN6Kripke6MomentElPSS_EESS_EENSO_INSQ_INSR_9DirectionElPSW_EESW_EENSO_INSQ_INSR_5GroupElPS10_EES10_EENSO_INSQ_INSR_4ZoneElPS14_EES14_EEEEENSM_IJEEEJZNK10LTimesSdomclINSR_11ArchLayoutTINSR_12ArchT_OpenMPENSR_11LayoutT_DGZEEEEEvT_NSR_6SdomIdERKNSR_4Core3SetES1L_S1L_S1L_RNS1I_5FieldIdJSW_S10_S14_EEERNS1M_IdJSS_S10_S14_EEERNS1M_IdJSS_SW_EEEEUlSS_SW_S10_S14_E_EEEEEvOS1G_._omp_fn.0+0x399>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
INC %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP %R12,-0x88(%RBP)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
JLE 49c718 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl2EEEEJNS2_3ForILl1ENS_6policy4loop9loop_execEJNS8_ILl3ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEEE4execIRNS0_8LoopDataINS5_4listIJSG_EEENS5_5tupleIJNS_4impl4SpanINS_9Iterators16numeric_iteratorIN6Kripke6MomentElPSS_EESS_EENSO_INSQ_INSR_9DirectionElPSW_EESW_EENSO_INSQ_INSR_5GroupElPS10_EES10_EENSO_INSQ_INSR_4ZoneElPS14_EES14_EEEEENSM_IJEEEJZNK10LTimesSdomclINSR_11ArchLayoutTINSR_12ArchT_OpenMPENSR_11LayoutT_DGZEEEEEvT_NSR_6SdomIdERKNSR_4Core3SetES1L_S1L_S1L_RNS1I_5FieldIdJSW_S10_S14_EEERNS1M_IdJSS_S10_S14_EEERNS1M_IdJSS_SW_EEEEUlSS_SW_S10_S14_E_EEEEEvOS1G_._omp_fn.0+0x3a8>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
INC %RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JMP 49c4d0 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl2EEEEJNS2_3ForILl1ENS_6policy4loop9loop_execEJNS8_ILl3ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEEE4execIRNS0_8LoopDataINS5_4listIJSG_EEENS5_5tupleIJNS_4impl4SpanINS_9Iterators16numeric_iteratorIN6Kripke6MomentElPSS_EESS_EENSO_INSQ_INSR_9DirectionElPSW_EESW_EENSO_INSQ_INSR_5GroupElPS10_EES10_EENSO_INSQ_INSR_4ZoneElPS14_EES14_EEEEENSM_IJEEEJZNK10LTimesSdomclINSR_11ArchLayoutTINSR_12ArchT_OpenMPENSR_11LayoutT_DGZEEEEEvT_NSR_6SdomIdERKNSR_4Core3SetES1L_S1L_S1L_RNS1I_5FieldIdJSW_S10_S14_EEERNS1M_IdJSS_S10_S14_EEERNS1M_IdJSS_SW_EEEEUlSS_SW_S10_S14_E_EEEEEvOS1G_._omp_fn.0+0x160>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
INCQ -0x90(%RBP)	3	0.20	0.20	0.33	0.33	0.50	0.20	0.20	0.50	0.50	0.50	0.20	0.33	1	0.50	N/A
MOV -0x98(%RBP),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
XOR %R12D,%R12D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV -0x90(%RBP),%R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA (%R8,%R14,1),%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
JMP 49c701 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl2EEEEJNS2_3ForILl1ENS_6policy4loop9loop_execEJNS8_ILl3ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEEE4execIRNS0_8LoopDataINS5_4listIJSG_EEENS5_5tupleIJNS_4impl4SpanINS_9Iterators16numeric_iteratorIN6Kripke6MomentElPSS_EESS_EENSO_INSQ_INSR_9DirectionElPSW_EESW_EENSO_INSQ_INSR_5GroupElPS10_EES10_EENSO_INSQ_INSR_4ZoneElPS14_EES14_EEEEENSM_IJEEEJZNK10LTimesSdomclINSR_11ArchLayoutTINSR_12ArchT_OpenMPENSR_11LayoutT_DGZEEEEEvT_NSR_6SdomIdERKNSR_4Core3SetES1L_S1L_S1L_RNS1I_5FieldIdJSW_S10_S14_EEERNS1M_IdJSS_S10_S14_EEERNS1M_IdJSS_SW_EEEEUlSS_SW_S10_S14_E_EEEEEvOS1G_._omp_fn.0+0x391>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A

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Vectorization

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Complex instructions

Details

Type of elements and instruction set

Matching between your loop (in the source code) and the binary loop

General properties

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Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code

Vectorization

Details

Workaround

Execution units bottlenecks

Complex instructions

Details

Type of elements and instruction set

Matching between your loop (in the source code) and the binary loop

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code