OV - exec - Function update_top(int, int, int, int, double*, bool) [clone ._omp

	Function: update_top(int, int, int, int, double*, bool) [clone ._omp_fn.0]	Module: exec	Source: local_halos.cpp:42-46	Coverage (incl. loops): 0.01% \| (excl. loops): 0.00%

/home/hbollore/qaas/qaas-runs/174-118-5752/intel/TeaLeaf/build/TeaLeaf/src/omp/local_halos.cpp: 42 - 46

--------------------------------------------------------------------------------

42:   #pragma omp parallel for

43: #endif

44:     for (int kk = halo_depth; kk < x - halo_depth; ++kk) {

45:       int base = kk;

46:       buffer[base + (y - halo_depth + jj) * x] = buffer[base + (y - halo_depth - 1 - jj) * x];

0x406e60 STP	X29, X30, [SP, #976]!

0x406e64 ADD	X29, SP, #0

0x406e68 STP	X19, X20, [SP, #16]

0x406e6c ORR	X20, XZR, X0

0x406e70 STP	X21, X22, [SP, #32]

0x406e74 LDR	W22, [X0, #8]

0x406e78 LDR	W21, [X0, #16]

0x406e7c BL	4016d0

0x406e80 ORR	W19, WZR, W0

0x406e84 BL	4016e0

0x406e88 ORR	W1, WZR, W0

0x406e8c SUB	W0, W22, W21,LSL #1

0x406e90 SDIV	W2, W0, W19

0x406e94 MSUB	W3, W2, W19, W0

0x406e98 CMP	W1, W3

0x406e9c B.LT	407010

(92) 0x406ea0 MADD	W4, W2, W1, W3

(92) 0x406ea4 ADD	W5, W2, W4

(92) 0x406ea8 CMP	W4, W5

(92) 0x406eac B.GE	407000

(92) 0x406eb0 LDR	W12, [X20, #12]

(92) 0x406eb4 ADD	W7, W21, W4

(92) 0x406eb8 ADD	W11, W21, W5

(92) 0x406ebc SBFM	X6, X7, #0, #31

(92) 0x406ec0 ORN	W8, WZR, W7

(92) 0x406ec4 LDR	W13, [X20, #20]

(92) 0x406ec8 ADD	W9, W11, W8

(92) 0x406ecc ADD	X19, X6, #1

(92) 0x406ed0 AND	W10, W9, #128

(92) 0x406ed4 LDR	X20, [X20]

(92) 0x406ed8 SUB	W14, W12, W21

(92) 0x406edc SUB	W15, W14, #1

(92) 0x406ee0 SUB	W16, W15, W13

(92) 0x406ee4 ADD	W17, W13, W14

(92) 0x406ee8 MADD	W18, W16, W22, WZR

(92) 0x406eec MADD	W30, W17, W22, WZR

(92) 0x406ef0 ADD	X22, X20, W18,SXTW #3

(92) 0x406ef4 LDR	D31, [X22, X6,LSL #3]

(92) 0x406ef8 ADD	X21, X20, W30,SXTW #3

(92) 0x406efc STR	D31, [X21, X6,LSL #3]

(92) 0x406f00 CMP	W11, W19

(92) 0x406f04 B.LE	407000

(92) 0x406f08 CBZ	W10, 406f98

(92) 0x406f0c CMP	W10, #1

(92) 0x406f10 B.EQ	406f84

(92) 0x406f14 CMP	W10, #2

(92) 0x406f18 B.EQ	406f78

(92) 0x406f1c CMP	W10, #3

(92) 0x406f20 B.EQ	406f6c

(92) 0x406f24 CMP	W10, #4

(92) 0x406f28 B.EQ	406f60

(92) 0x406f2c CMP	W10, #5

(92) 0x406f30 B.EQ	406f54

(92) 0x406f34 CMP	W10, #6

(92) 0x406f38 B.EQ	406f48

(92) 0x406f3c LDR	D0, [X22, X19,LSL #3]

(92) 0x406f40 STR	D0, [X21, X19,LSL #3]

(92) 0x406f44 ADD	X19, X19, #1

(92) 0x406f48 LDR	D1, [X22, X19,LSL #3]

(92) 0x406f4c STR	D1, [X21, X19,LSL #3]

(92) 0x406f50 ADD	X19, X19, #1

(92) 0x406f54 LDR	D2, [X22, X19,LSL #3]

(92) 0x406f58 STR	D2, [X21, X19,LSL #3]

(92) 0x406f5c ADD	X19, X19, #1

(92) 0x406f60 LDR	D3, [X22, X19,LSL #3]

(92) 0x406f64 STR	D3, [X21, X19,LSL #3]

(92) 0x406f68 ADD	X19, X19, #1

(92) 0x406f6c LDR	D4, [X22, X19,LSL #3]

(92) 0x406f70 STR	D4, [X21, X19,LSL #3]

(92) 0x406f74 ADD	X19, X19, #1

(92) 0x406f78 LDR	D5, [X22, X19,LSL #3]

(92) 0x406f7c STR	D5, [X21, X19,LSL #3]

(92) 0x406f80 ADD	X19, X19, #1

(92) 0x406f84 LDR	D6, [X22, X19,LSL #3]

(92) 0x406f88 STR	D6, [X21, X19,LSL #3]

(92) 0x406f8c ADD	X19, X19, #1

(92) 0x406f90 CMP	W11, W19

(92) 0x406f94 B.LE	407000

  (93) 0x406f98 LDR	D7, [X22, X19,LSL #3]

  (93) 0x406f9c ADD	X1, X19, #1

  (93) 0x406fa0 ADD	X2, X19, #2

  (93) 0x406fa4 ADD	X0, X19, #3

  (93) 0x406fa8 ADD	X3, X19, #4

  (93) 0x406fac ADD	X4, X19, #5

  (93) 0x406fb0 ADD	X7, X19, #6

  (93) 0x406fb4 ADD	X5, X19, #7

  (93) 0x406fb8 STR	D7, [X21, X19,LSL #3]

  (93) 0x406fbc ADD	X19, X19, #8

  (93) 0x406fc0 LDR	D16, [X22, X1,LSL #3]

  (93) 0x406fc4 STR	D16, [X21, X1,LSL #3]

  (93) 0x406fc8 LDR	D17, [X22, X2,LSL #3]

  (93) 0x406fcc STR	D17, [X21, X2,LSL #3]

  (93) 0x406fd0 LDR	D18, [X22, X0,LSL #3]

  (93) 0x406fd4 STR	D18, [X21, X0,LSL #3]

  (93) 0x406fd8 LDR	D19, [X22, X3,LSL #3]

  (93) 0x406fdc STR	D19, [X21, X3,LSL #3]

  (93) 0x406fe0 LDR	D20, [X22, X4,LSL #3]

  (93) 0x406fe4 STR	D20, [X21, X4,LSL #3]

  (93) 0x406fe8 LDR	D21, [X22, X7,LSL #3]

  (93) 0x406fec STR	D21, [X21, X7,LSL #3]

  (93) 0x406ff0 LDR	D22, [X22, X5,LSL #3]

  (93) 0x406ff4 STR	D22, [X21, X5,LSL #3]

  (93) 0x406ff8 CMP	W11, W19

  (93) 0x406ffc B.GT	406f98

(92) 0x407000 LDP	X19, X20, [SP, #16]

(92) 0x407004 LDP	X21, X22, [SP, #32]

(92) 0x407008 LDP	X29, X30, [SP], #48

(92) 0x40700c RET

(92) 0x407010 ADD	W2, W2, #1

(92) 0x407014 MOVZ	W3, #0

(92) 0x407018 B	406ea0

0x40701c HINT	#0

Coverage (%)	Name	Source Location	Module
►99.14+	gomp_thread_start	team.c:130	libgomp.so.1.0.0
○	start_thread		libc.so.6
○	thread_start		libc.so.6

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run gcc_8

Source file and lines	local_halos.cpp:42-46
Module	exec

The function is defined in /home/hbollore/qaas/qaas-runs/174-118-5752/intel/TeaLeaf/build/TeaLeaf/src/omp/local_halos.cpp:42-46.

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Vectorization

Your function is not vectorized. Only 55% of vector register length is used (average across all VPU instructions). By vectorizing your function, you can lower the cost of an iteration from 12.50 to 3.12 cycles (4.00x speedup).

Details

All VPU instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 12.50 to 1.00 cycles (12.50x speedup).

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 8 bytes. The binary function is storing 48 bytes.

General properties

nb instructions	17
loop length	68
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

2.00 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	P16
uops	1.50	1.50	1.83	1.83	1.83	1.83	2.00	1.67	0.00	0.00	0.00	0.00	1.83	1.50	1.67	1.50	1.50
cycles	1.50	1.50	1.83	1.83	1.83	1.83	2.00	1.67	0.00	0.00	0.00	0.00	1.83	1.50	1.67	1.50	1.50

Execution ports to units layout:

P0: BRU
P1: BRU
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6: ALU
P7: ALU
P8 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P9 (128 bits): VPU, ALU, FP store data
P10 (128 bits): VPU, ALU, DIV/SQRT
P11 (128 bits): ALU, VPU
P12 (256 bits): store address, load
P13 (256 bits): store address, load
P14 (256 bits): load
P15 (64 bits): store data
P16 (64 bits): store data

Cycles executing div or sqrt instructions

5.00-12.50

Cycles summary

Front-end	2.00
Overall L1	5.00-12.50

Vectorization ratios

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	0%
other	0%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 12.50 cycles. At this rate:

0% of peak load performance is reached (0.64 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
8% of peak store performance is reached (3.84 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the function is: 406e60

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	P16	Latency	Recip. throughput	Vectorization
STP X29, X30, [SP, #976]!	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
ADD X29, SP, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
STP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
ORR X20, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
STP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
LDR W22, [X0, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
LDR W21, [X0, #16]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
BL 4016d0 <@plt_start@+0x100>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR W19, WZR, W0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (25.0%)
BL 4016e0 <@plt_start@+0x110>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR W1, WZR, W0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB W0, W22, W21,LSL #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SDIV W2, W0, W19	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	5-12	5-12.50	scal (25.0%)
MSUB W3, W2, W19, W0	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1	N/A
CMP W1, W3	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	N/A
B.LT 407010 <_Z10update_topiiiiPdb._omp_fn.0+0x1b0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
HINT #0																					N/A

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run gcc_8

Source file and lines	local_halos.cpp:42-46
Module	exec

The function is defined in /home/hbollore/qaas/qaas-runs/174-118-5752/intel/TeaLeaf/build/TeaLeaf/src/omp/local_halos.cpp:42-46.

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Vectorization

Details

All VPU instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 12.50 to 1.00 cycles (12.50x speedup).

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 8 bytes. The binary function is storing 48 bytes.

General properties

nb instructions	17
loop length	68
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

2.00 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	P16
uops	1.50	1.50	1.83	1.83	1.83	1.83	2.00	1.67	0.00	0.00	0.00	0.00	1.83	1.50	1.67	1.50	1.50
cycles	1.50	1.50	1.83	1.83	1.83	1.83	2.00	1.67	0.00	0.00	0.00	0.00	1.83	1.50	1.67	1.50	1.50

Execution ports to units layout:

P0: BRU
P1: BRU
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6: ALU
P7: ALU
P8 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P9 (128 bits): VPU, ALU, FP store data
P10 (128 bits): VPU, ALU, DIV/SQRT
P11 (128 bits): ALU, VPU
P12 (256 bits): store address, load
P13 (256 bits): store address, load
P14 (256 bits): load
P15 (64 bits): store data
P16 (64 bits): store data

Cycles executing div or sqrt instructions

5.00-12.50

Cycles summary

Front-end	2.00
Overall L1	5.00-12.50

Vectorization ratios

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	0%
other	0%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 12.50 cycles. At this rate:

0% of peak load performance is reached (0.64 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
8% of peak store performance is reached (3.84 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the function is: 406e60

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	P16	Latency	Recip. throughput	Vectorization
STP X29, X30, [SP, #976]!	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
ADD X29, SP, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
STP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
ORR X20, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
STP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
LDR W22, [X0, #8]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
LDR W21, [X0, #16]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
BL 4016d0 <@plt_start@+0x100>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR W19, WZR, W0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (25.0%)
BL 4016e0 <@plt_start@+0x110>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR W1, WZR, W0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB W0, W22, W21,LSL #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SDIV W2, W0, W19	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	5-12	5-12.50	scal (25.0%)
MSUB W3, W2, W19, W0	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1	N/A
CMP W1, W3	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	N/A
B.LT 407010 <_Z10update_topiiiiPdb._omp_fn.0+0x1b0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
HINT #0																					N/A

Name	Coverage (%)	Time (s)
▼update_top(int, int, int, int, double*, bool) [clone ._omp_fn.0]–	0.01	0.02
▼Loop 92 - local_halos.cpp:42-46 - exec–	0.01	0.01
○Loop 93 - local_halos.cpp:46-46 - exec	0.00	0.01

Report Configuration

Vectorization

Details

Workaround

Expensive FP math instructions/calls

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code

Vectorization

Details

Workaround

Expensive FP math instructions/calls

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code