OV - exec - Function update_right(int, int, int, int, double*, bool) [clone ._omp

	Function: update_right(int, int, int, int, double*, bool) [clone ._omp_fn.0]	Module: exec	Source: local_halos.cpp:25-30	Coverage (incl. loops): 0.02% \| (excl. loops): 0.00%

/home/hbollore/qaas/qaas-runs/174-118-5752/intel/TeaLeaf/build/TeaLeaf/src/omp/local_halos.cpp: 25 - 30

--------------------------------------------------------------------------------

25:   #pragma omp parallel for

26: #endif

27:   for (int jj = halo_depth; jj < y - halo_depth; ++jj) {

28:     for (int kk = 0; kk < depth; ++kk) {

29:       int base = jj * x;

30:       buffer[base + (x - halo_depth + kk)] = buffer[base + (x - halo_depth - 1 - kk)];

0x4065a0 STP	X29, X30, [SP, #992]!

0x4065a4 ADD	X29, SP, #0

0x4065a8 STP	X19, X20, [SP, #16]

0x4065ac ORR	X20, XZR, X0

0x4065b0 BL	401910

0x4065b4 ORR	W19, WZR, W0

0x4065b8 BL	4018a0

0x4065bc ORR	W5, WZR, W0

0x4065c0 LDP	W0, W3, [X20, #12]

0x4065c4 SUB	W0, W0, W3,LSL #1

0x4065c8 SDIV	W2, W0, W19

0x4065cc MSUB	W1, W2, W19, W0

0x4065d0 CMP	W5, W1

0x4065d4 B.LT	4066a4

(124) 0x4065d8 MADD	W5, W2, W5, W1

(124) 0x4065dc ADD	W2, W2, W5

(124) 0x4065e0 CMP	W5, W2

(124) 0x4065e4 B.GE	406698

(124) 0x4065e8 LDR	W6, [X20, #20]

(124) 0x4065ec ADD	W5, W3, W5

(124) 0x4065f0 ADD	W8, W3, W2

(124) 0x4065f4 LDR	X7, [X20]

(124) 0x4065f8 LDR	W10, [X20, #8]

(124) 0x4065fc CMP	W6, #0

(124) 0x406600 B.LE	406698

(124) 0x406604 SUB	W0, W6, #1

(124) 0x406608 CMP	W0, #2

(124) 0x40660c B.LS	4066b0

(124) 0x406610 SUB	W13, W10, W3

(124) 0x406614 MADD	W9, W10, W5, WZR

(124) 0x406618 SBFM	X2, X10, #0, #31

(124) 0x40661c SUB	X2, X2, W3,SXTW

(124) 0x406620 ADD	X2, X2, W9,SXTW

(124) 0x406624 ADD	X2, X7, X2,LSL #3

(124) 0x406628 SUB	W14, W13, #1

(124) 0x40662c AND	W11, W6, #1951

(124) 0x406630 UBFM	W4, W6, #1, #31

(124) 0x406634 SUB	W14, W14, W11

(124) 0x406638 SUB	X2, X2, #16

(124) 0x40663c ADD	W13, W13, W11

(124) 0x406640 UBFM	X4, X4, #60, #59

(124) 0x406644 SBFM	X12, X10, #61, #31

  (128) 0x406648 ADD	X3, X2, #16

  (128) 0x40664c MOVZ	X0, #0

    (127) 0x406650 SUB	X1, XZR, X0

    (127) 0x406654 LDR	Q31, [X2, X1]

    (127) 0x406658 EXT	V31.16B, V31.16B, V31.16B, #8

    (127) 0x40665c STR	Q31, [X3, X0]

    (127) 0x406660 ADD	X0, X0, #16

    (127) 0x406664 CMP	X4, X0

    (127) 0x406668 B.NE	406650

  (128) 0x40666c CMP	W6, W11

  (128) 0x406670 B.EQ	406684

  (128) 0x406674 ADD	W0, W9, W14

  (128) 0x406678 ADD	W1, W9, W13

  (128) 0x40667c LDR	D31, [X7, X0,SXTW #3]

  (128) 0x406680 STR	D31, [X7, X1,SXTW #3]

  (128) 0x406684 ADD	W5, W5, #1

  (128) 0x406688 ADD	W9, W9, W10

  (128) 0x40668c ADD	X2, X2, X12

  (128) 0x406690 CMP	W8, W5

  (128) 0x406694 B.GT	406648

(124) 0x406698 LDP	X19, X20, [SP, #16]

(124) 0x40669c LDP	X29, X30, [SP], #32

(124) 0x4066a0 RET

(124) 0x4066a4 ADD	W2, W2, #1

(124) 0x4066a8 MOVZ	W1, #0

(124) 0x4066ac B	4065d8

(124) 0x4066b0 MADD	W0, W10, W5, WZR

(124) 0x4066b4 SBFM	X9, X10, #0, #31

(124) 0x4066b8 SBFM	X6, X6, #0, #31

(124) 0x4066bc SBFM	X3, X3, #0, #31

(124) 0x4066c0 ADD	X1, X9, X6

(124) 0x4066c4 SUB	X11, XZR, X6,LSL #3

(124) 0x4066c8 SUB	X6, X9, X3

(124) 0x4066cc SBFM	X10, X10, #60, #31

(124) 0x4066d0 SBFM	X0, X0, #0, #31

(124) 0x4066d4 UBFM	X9, X9, #61, #60

(124) 0x4066d8 SUB	X3, X0, X3

(124) 0x4066dc ADD	X6, X6, X0

(124) 0x4066e0 ADD	X1, X1, X3

(124) 0x4066e4 UBFM	X6, X6, #60, #59

(124) 0x4066e8 ADD	X1, X7, X1,LSL #3

(124) 0x4066ec UBFM	X3, X7, #63, #62

  (126) 0x4066f0 ADD	X0, X1, X11

  (126) 0x4066f4 SUB	X4, X6, #8

  (126) 0x4066f8 HINT	#0

  (126) 0x4066fc HINT	#0

    (125) 0x406700 SUB	X2, X4, X0

    (125) 0x406704 LDR	D31, [X2, X3]

    (125) 0x406708 STR	D31, [X0], #8

    (125) 0x40670c CMP	X0, X1

    (125) 0x406710 B.NE	406700

  (126) 0x406714 ADD	W5, W5, #1

  (126) 0x406718 ADD	X6, X6, X10

  (126) 0x40671c ADD	X1, X1, X9

  (126) 0x406720 CMP	W8, W5

  (126) 0x406724 B.GT	4066f0

(124) 0x406728 B	406698

Coverage (%)	Name	Source Location	Module
►97.47+	gomp_thread_start	team.c:130	libgomp.so.1.0.0
○	start_thread		libc.so.6
○	thread_start		libc.so.6
►1.27+	start_thread		libc.so.6
○	thread_start		libc.so.6
►1.05+	GOMP_parallel	libgomp.h:980	libgomp.so.1.0.0
○	update_face(int, int, int, int[...]	local_halos.cpp:33	exec
○	run_local_halos(Chunk*, Settin[...]	local_halos.cpp:103	exec
○	halo_update_driver(Chunk*, Set[...]	halo_update_driver.cpp:12	exec
○	cg_driver(Chunk*, Settings&, d[...]	cg_driver.cpp:20	exec
○	solve(Chunk*, Settings&, int, [...]	diffuse.cpp:51	exec
○	diffuse(Chunk*, Settings&)	diffuse.cpp:12	exec
○	main	main.cpp:179	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	new_allocator.h:104	exec

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run gcc_0

Source file and lines	local_halos.cpp:25-30
Module	exec

The function is defined in /home/hbollore/qaas/qaas-runs/174-118-5752/intel/TeaLeaf/build/TeaLeaf/src/omp/local_halos.cpp:25-30.

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Vectorization

Your function is not vectorized. Only 53% of vector register length is used (average across all VPU instructions). By vectorizing your function, you can lower the cost of an iteration from 12.50 to 3.12 cycles (4.00x speedup).

Details

All VPU instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 12.50 to 1.00 cycles (12.50x speedup).

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 8 bytes. The binary function is storing 32 bytes.

General properties

nb instructions	14
loop length	56
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

1.75 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	P16
uops	1.50	1.50	1.83	1.83	1.83	1.83	2.00	1.67	0.00	0.00	0.00	0.00	1.00	1.00	1.00	1.00	1.00
cycles	1.50	1.50	1.83	1.83	1.83	1.83	2.00	1.67	0.00	0.00	0.00	0.00	1.00	1.00	1.00	1.00	1.00

Execution ports to units layout:

P0: BRU
P1: BRU
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6: ALU
P7: ALU
P8 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P9 (128 bits): VPU, ALU, FP store data
P10 (128 bits): VPU, ALU, DIV/SQRT
P11 (128 bits): ALU, VPU
P12 (256 bits): store address, load
P13 (256 bits): store address, load
P14 (256 bits): load
P15 (64 bits): store data
P16 (64 bits): store data

Cycles executing div or sqrt instructions

5.00-12.50

Cycles summary

Front-end	1.75
Overall L1	5.00-12.50

Vectorization ratios

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	0%
other	0%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 12.50 cycles. At this rate:

0% of peak load performance is reached (0.64 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
5% of peak store performance is reached (2.56 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the function is: 4065a0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P12	P13	P14	P15	P16	Latency	Recip. throughput	Vectorization
STP X29, X30, [SP, #992]!	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
ADD X29, SP, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	scal (50.0%)
STP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
ORR X20, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
BL 401910 <@plt_start@+0x300>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR W19, WZR, W0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	scal (25.0%)
BL 4018a0 <@plt_start@+0x290>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR W5, WZR, W0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
LDP W0, W3, [X20, #12]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
SUB W0, W0, W3,LSL #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	scal (25.0%)
SDIV W2, W0, W19	1	0	0	0	0	0	0	1	0	0	0	0	0	0	5-12	5-12.50	scal (25.0%)
MSUB W1, W2, W19, W0	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
CMP W5, W1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	N/A
B.LT 4066a4 <_Z12update_rightiiiiPdb._omp_fn.0+0x104>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run gcc_0

Source file and lines	local_halos.cpp:25-30
Module	exec

The function is defined in /home/hbollore/qaas/qaas-runs/174-118-5752/intel/TeaLeaf/build/TeaLeaf/src/omp/local_halos.cpp:25-30.

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Vectorization

Details

All VPU instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 12.50 to 1.00 cycles (12.50x speedup).

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 8 bytes. The binary function is storing 32 bytes.

General properties

nb instructions	14
loop length	56
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

1.75 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	P16
uops	1.50	1.50	1.83	1.83	1.83	1.83	2.00	1.67	0.00	0.00	0.00	0.00	1.00	1.00	1.00	1.00	1.00
cycles	1.50	1.50	1.83	1.83	1.83	1.83	2.00	1.67	0.00	0.00	0.00	0.00	1.00	1.00	1.00	1.00	1.00

Execution ports to units layout:

P0: BRU
P1: BRU
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6: ALU
P7: ALU
P8 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P9 (128 bits): VPU, ALU, FP store data
P10 (128 bits): VPU, ALU, DIV/SQRT
P11 (128 bits): ALU, VPU
P12 (256 bits): store address, load
P13 (256 bits): store address, load
P14 (256 bits): load
P15 (64 bits): store data
P16 (64 bits): store data

Cycles executing div or sqrt instructions

5.00-12.50

Cycles summary

Front-end	1.75
Overall L1	5.00-12.50

Vectorization ratios

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	0%
other	0%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 12.50 cycles. At this rate:

0% of peak load performance is reached (0.64 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
5% of peak store performance is reached (2.56 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the function is: 4065a0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P12	P13	P14	P15	P16	Latency	Recip. throughput	Vectorization
STP X29, X30, [SP, #992]!	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
ADD X29, SP, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	scal (50.0%)
STP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
ORR X20, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
BL 401910 <@plt_start@+0x300>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR W19, WZR, W0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	scal (25.0%)
BL 4018a0 <@plt_start@+0x290>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR W5, WZR, W0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
LDP W0, W3, [X20, #12]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
SUB W0, W0, W3,LSL #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	scal (25.0%)
SDIV W2, W0, W19	1	0	0	0	0	0	0	1	0	0	0	0	0	0	5-12	5-12.50	scal (25.0%)
MSUB W1, W2, W19, W0	1	0	0	0	0	0	0	1	0	0	0	0	0	0	2	1	N/A
CMP W5, W1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	N/A
B.LT 4066a4 <_Z12update_rightiiiiPdb._omp_fn.0+0x104>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A

Name	Coverage (%)	Time (s)
▼update_right(int, int, int, int, double*, bool) [clone ._omp_fn.0]–	0.02	0.02
▼Loop 124 - local_halos.cpp:25-30 - exec–	0.00	0.00
▼Loop 126 - local_halos.cpp:28-30 - exec–	0.00	0.00
○Loop 125 - local_halos.cpp:28-30 - exec	0.01	0.02
▼Loop 128 - local_halos.cpp:27-30 - exec–	0.00	0.00
○Loop 127 - local_halos.cpp:28-30 - exec	0.00	0.00

Report Configuration

Vectorization

Details

Workaround

Expensive FP math instructions/calls

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code

Vectorization

Details

Workaround

Expensive FP math instructions/calls

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code