	*************************************************
	*                                               *
	*          ONE-View report generation           *
	*                                               *
	*************************************************

[MAQAO] Info: Experiment configuration summary is available adding -dbg=1 in command line

* [MAQAO] Warning: Experiment directory /home/eoseret/qaas/qaas_runs/178-237-4322/intel/TeaLeaf/run/oneview_runs/compilers/gcc_5/oneview_results_1782387176 already exists and is reused.
           It can be replaced using --replace in the command line.
[MAQAO] Info: 
[MAQAO] Info: START THE APPLICATION PROFILING
[MAQAO] Info: -> RUNNING THE PROFILER...
[MAQAO] Info:   LPROF has already been run
[MAQAO] Info: STOP THE APPLICATION PROFILING
[MAQAO] Info: 
[MAQAO] Info: START FUNCTIONS AND LOOPS ANALYSIS ...
[MAQAO] Info: STOP FUNCTIONS AND LOOPS ANALYSIS ...
[MAQAO] Info: 
[MAQAO] Info: START THE REPORT GENERATION
[MAQAO] Info: -> ONE-VIEW EXPERIMENT DIRECTORY: /home/eoseret/qaas/qaas_runs/178-237-4322/intel/TeaLeaf/run/oneview_runs/compilers/gcc_5/oneview_results_1782387176


+===================================================================================================================+
+                                                   1  -  GLOBAL                                                    +
+===================================================================================================================+


+-------------------------------------------------------------------------------------------------------------------+
+                                            1.1  -  Experiment Summary                                             +
+-------------------------------------------------------------------------------------------------------------------+

  Application:			/home/eoseret/qaas/qaas_runs/178-237-4322/intel/TeaLeaf/run/binaries/gcc_5/exec
  Timestamp:			2026-06-25 11:32:56
  Universal Timestamp:		1782387176
  Experiment Type:		MPI; OpenMP; Throughput; 
  Machine:			ip-172-31-38-240.ec2.internal
  Architecture:			aarch64
  Micro Architecture:		ARM_NEOVERSE_V1
  OS Version:			Linux 6.1.170-213.321.amzn2023.aarch64 #1 SMP Thu May 14 12:18:13 UTC 2026
  Compilation Options:		
		exec: GNU C++17 14.2.1 20250110 (Red Hat 14.2.1-7) -mcpu=neoverse-v1 -mlittle-endian -mabi=lp64 -g -O3 -O3 -std=c++17 -fno-tree-vectorize -fno-openmp-simd -funroll-loops -ffast-math -fno-omit-frame-pointer -fopenmp 
  Number of processes observed:	1
  Number of threads observed:	64
  MAQAO version:		2026.0.0
  MAQAO build:			Build information not available




+-------------------------------------------------------------------------------------------------------------------+
+                                              1.2  -  Global Metrics                                               +
+-------------------------------------------------------------------------------------------------------------------+

  Total Time:				266.98 s
  Max (Thread Active Time):		266.44 s
  Average Active Time:			266.32 s
  Activity Ratio:			99.8 %
  Average number of active threads:	63.840
  Affinity Stability:			99.9 %
  Time spent in analyzed loops:		97.1 %
  Time spent in analyzed innermost loops: 96.9 %
  Time spent in user code:		97.2 %
  Compilation Options Score:		100
  Array Access Efficiency:		75.0 %

   Potential Speedups
  ----------------------------------------------------
  Perfect Flow Complexity:		1.00
  Perfect OpenMP/MPI/Pthread/TBB:	1.02
  Perfect OpenMP/MPI/Pthread/TBB + Load Distribution:	1.03
  If No Scalar Integer:
      Potential Speedup:		1.00
      Nb Loops to get 80%:		2
  If FP Vectorized:
      Potential Speedup:		1.00
      Nb Loops to get 80%:		3
  If Fully Vectorized:
      Potential Speedup:		3.67
      Nb Loops to get 80%:		3
  If Only FP Arithmetic:
      Potential Speedup:		1.31
      Nb Loops to get 80%:		2




+-------------------------------------------------------------------------------------------------------------------+
+                                            1.3  -  Potential Speedups                                             +
+-------------------------------------------------------------------------------------------------------------------+

  If No Scalar Integer:
      Number of loops   | 1      | 2      | 5      | 6      | 9      | 
      Cumulated Speedup | 1.0002 | 1.0003 | 1.0003 | 1.0003 | 1.0003 | 
  Top 5 loops:
    exec - 57:	1.0002
    exec - 15:	1.0003
    exec - 59:	1.0003
    exec - 18:	1.0003
    exec - 17:	1.0003

  If FP Vectorized:
      Number of loops   | 1      | 2      | 5      | 6      | 9      | 
      Cumulated Speedup | 1.0001 | 1.0002 | 1.0003 | 1.0003 | 1.0003 | 
  Top 5 loops:
    exec - 15:	1.0001
    exec - 17:	1.0002
    exec - 18:	1.0003
    exec - 59:	1.0003
    exec - 19:	1.0003

  If Fully Vectorized:
      Number of loops   | 1      | 2      | 5      | 6      | 9      | 
      Cumulated Speedup | 1.4834 | 2.3288 | 3.6680 | 3.6702 | 3.6750 | 
  Top 5 loops:
    exec - 19:	1.4834
    exec - 16:	2.3288
    exec - 20:	3.6562
    exec - 15:	3.6642
    exec - 57:	3.668

  If Only FP Arithmetic:
      Number of loops   | 1      | 2      | 5      | 6      | 9      | 
      Cumulated Speedup | 1.1847 | 1.3114 | 1.3130 | 1.3133 | 1.3133 | 
  Top 5 loops:
    exec - 20:	1.1847
    exec - 16:	1.3114
    exec - 57:	1.312
    exec - 15:	1.3126
    exec - 59:	1.313



+===================================================================================================================+
+                                                   2  -  SUMMARY                                                   +
+===================================================================================================================+


+-------------------------------------------------------------------------------------------------------------------+
+                                            2.1  -  EXPERIMENT QUALITY                                             +
+-------------------------------------------------------------------------------------------------------------------+

  [4 / 4] Application profile is long enough (266.44 s)
To have good quality measurements, it is advised that the application profiling time is greater than 10 seconds.

  [3 / 3] Most of time spent in analyzed modules comes from functions with source/debug info
-g option gives access to debugging informations, such are source locations.

  [2.9993034403243 / 3] Architecture specific option -mcpu is used


  [3 / 3] Most of time spent in analyzed modules comes from functions with compilation options informations and
-fno-omit-frame-pointer is present
-fno-omit-frame-pointer improves the accuracy of callchains found during the application profiling.

  [3 / 3] Optimization level option is correctly used


  [3 / 3] Host configuration allows retrieval of all necessary metrics.


  [2 / 2] Application is correctly profiled ("Others" category represents 0.00 % of the execution time)
To have a representative profiling, it is advised that the category "Others" represents less than 20% of the
execution time in order to analyze as much as possible of the user code

  [1 / 1] Lstopo present. The Topology lstopo report will be generated.



+-------------------------------------------------------------------------------------------------------------------+
+                                               2.2  -  CODE QUALITY                                                +
+-------------------------------------------------------------------------------------------------------------------+

  [4 / 4] Enough time of the experiment time spent in analyzed loops (97.08%)
If the time spent in analyzed loops is less than 30%, standard loop optimizations will have a limited impact on
application performances.

  [4 / 4] Threads activity is good
On average, more than 99.75% of observed threads are actually active 

  [4 / 4] CPU activity is good
CPU cores are active 99.76% of time

  [4 / 4] Loop profile is not flat
At least one loop coverage is greater than 4% (43.45%), representing an hotspot for the application

  [4 / 4] Enough time of the experiment time spent in analyzed innermost loops (96.91%)
If the time spent in analyzed innermost loops is less than 15%, standard innermost loop optimizations such as
vectorisation will have a limited impact on application performances.

  [4 / 4] Affinity is good (99.94%)
Threads are not migrating to CPU cores: probably successfully pinned

  [3 / 3] Less than 10% (0.00%) is spend in BLAS1 operations
It could be more efficient to inline by hand BLAS1 operations

  [3 / 3] Functions mostly use all threads
Functions running on a reduced number of threads (typically sequential code) cover less than 10% of application
walltime (1.02%)

  [3 / 3] Cumulative Outermost/In between loops coverage (0.17%) lower than cumulative innermost loop coverage (96.91%)
Having cumulative Outermost/In between loops coverage greater than cumulative innermost loop coverage will make loop
optimization more complex

  [2 / 2] Less than 10% (0.00%) is spend in BLAS2 operations
BLAS2 calls usually could make a poor cache usage and could benefit from inlining.

  [2 / 2] Less than 10% (0.00%) is spend in Libm/SVML (special functions)



+-------------------------------------------------------------------------------------------------------------------+
+                                              2.3  -  LOOPS OVERVIEW                                               +
+-------------------------------------------------------------------------------------------------------------------+

  Top 5 loops:
   + exec - 19  :
     analysis: Execution Time: 43 % - Vectorization Ratio: 0.00 % - Vector Length Use: 25.00 %
     Data Access Issues: 8
        [8] [SA] Presence of constant non unit stride data access - Use array restructuring, perform loop interchange
            or use gather instructions to lower a bit the cost. There are 4 issues ( = data accesses) costing 2
            point each.
     Vectorization Roadblocks: 8
        [8] [SA] Presence of constant non unit stride data access - Use array restructuring, perform loop interchange
            or use gather instructions to lower a bit the cost. There are 4 issues ( = data accesses) costing 2
            point each.

   + exec - 16  :
     analysis: Execution Time: 32 % - Vectorization Ratio: 0.00 % - Vector Length Use: 25.00 %
     Data Access Issues: 20
        [20] [SA] Presence of constant non unit stride data access - Use array restructuring, perform loop interchange
            or use gather instructions to lower a bit the cost. There are 10 issues ( = data accesses) costing 2
            point each.
     Vectorization Roadblocks: 20
        [20] [SA] Presence of constant non unit stride data access - Use array restructuring, perform loop interchange
            or use gather instructions to lower a bit the cost. There are 10 issues ( = data accesses) costing 2
            point each.

   + exec - 20  :
     analysis: Execution Time: 20 % - Vectorization Ratio: 0.00 % - Vector Length Use: 25.00 %
     Data Access Issues: 4
        [4] [SA] Presence of constant non unit stride data access - Use array restructuring, perform loop interchange
            or use gather instructions to lower a bit the cost. There are 2 issues ( = data accesses) costing 2
            point each.
     Vectorization Roadblocks: 4
        [4] [SA] Presence of constant non unit stride data access - Use array restructuring, perform loop interchange
            or use gather instructions to lower a bit the cost. There are 2 issues ( = data accesses) costing 2
            point each.

   + exec - 15  :
     analysis: Execution Time: 0 % - Vectorization Ratio: 0.00 % - Vector Length Use: 23.01 %
     Loop Computation Issues: 2
        [2] [SA] Presence of a large number of scalar integer instructions - Simplify loop structure, perform loop
            splitting or perform unroll and jam. This issue costs 2 points.
     Control Flow Issues: 6
        [4] [SA] Several paths (4 paths) - Simplify control structure or force the compiler to use masked
            instructions. There are 4 issues ( = paths) costing 1 point each.
        [2] [SA] Non innermost loop (Outermost) - Collapse loop with innermost ones. This issue costs 2 points.
     Vectorization Roadblocks: 6
        [4] [SA] Several paths (4 paths) - Simplify control structure or force the compiler to use masked
            instructions. There are 4 issues ( = paths) costing 1 point each.
        [2] [SA] Non innermost loop (Outermost) - Collapse loop with innermost ones. This issue costs 2 points.

   + exec - 57  :
     analysis: Execution Time: 0 % - Vectorization Ratio: 0.00 % - Vector Length Use: 25.00 %
     Loop Computation Issues: 2
        [2] [SA] Presence of a large number of scalar integer instructions - Simplify loop structure, perform loop
            splitting or perform unroll and jam. This issue costs 2 points.
     Control Flow Issues: 21
        [19] [SA] Too many paths (15 paths) - Simplify control structure. There are 15 issues ( = paths) costing 1
            point each with a malus of 4 points.
        [2] [SA] Non innermost loop (Outermost) - Collapse loop with innermost ones. This issue costs 2 points.
     Vectorization Roadblocks: 21
        [19] [SA] Too many paths (15 paths) - Simplify control structure. There are 15 issues ( = paths) costing 1
            point each with a malus of 4 points.
        [2] [SA] Non innermost loop (Outermost) - Collapse loop with innermost ones. This issue costs 2 points.



+===================================================================================================================+
+                                                 3  -  APPLICATION                                                 +
+===================================================================================================================+


+-------------------------------------------------------------------------------------------------------------------+
+                                              3.1  -  Categorization                                               +
+-------------------------------------------------------------------------------------------------------------------+

   Category | IO     | Exe    | Others  | TBB   | String | Pthread | MPI   | OMP   | System | Memory | Math  |
  ----------+--------+--------+---------+-------+--------+---------+-------+-------+--------+--------+-------+
   Time (%) | 0.00   | 97.19  | 0.00    | 0.00  | 0.00   | 0.00    | 0.00  | 2.76  | 0.05   | 0.00   | 0.00  |




+-------------------------------------------------------------------------------------------------------------------+
+                                         3.2  -  Function Based Profiling                                          +
+-------------------------------------------------------------------------------------------------------------------+

   Buckets                   | Nb Functions              | Coverage                  | Cumulated Coverage        |
  ---------------------------+---------------------------+---------------------------+---------------------------+
   > 8%                      | 3                         | 97.04                     | 97.04                     |
   4% to 8%                  | 0                         | 0.00                      | 97.04                     |
   2% to 4%                  | 1                         | 2.72                      | 99.76                     |
   1% to 2%                  | 0                         | 0.00                      | 99.76                     |
   0.5% to 1%                | 0                         | 0.00                      | 99.76                     |
   0.25% to 0.5%             | 0                         | 0.00                      | 99.76                     |
   0.125% to 0.25%           | 0                         | 0.00                      | 99.76                     |
   < 0.125%                  | 29                        | 0.18                      | 99.94                     |




+-------------------------------------------------------------------------------------------------------------------+
+                                           3.3  -  Loop Based Profiling                                            +
+-------------------------------------------------------------------------------------------------------------------+

   Buckets                   | Nb Loops                  | Coverage                  | Cumulated Coverage        |
  ---------------------------+---------------------------+---------------------------+---------------------------+
   > 8%                      | 3                         | 96.87                     | 96.87                     |
   4% to 8%                  | 0                         | 0.00                      | 96.87                     |
   2% to 4%                  | 0                         | 0.00                      | 96.87                     |
   1% to 2%                  | 0                         | 0.00                      | 96.87                     |
   0.5% to 1%                | 0                         | 0.00                      | 96.87                     |
   0.25% to 0.5%             | 0                         | 0.00                      | 96.87                     |
   0.125% to 0.25%           | 0                         | 0.00                      | 96.87                     |
   < 0.125%                  | 13                        | 0.05                      | 96.91                     |


+===================================================================================================================+
+                                                  4  -  FUNCTIONS                                                  +
+===================================================================================================================+


+-------------------------------------------------------------------------------------------------------------------+
+                                             4.1  -  Top 10 Functions                                              +
+-------------------------------------------------------------------------------------------------------------------+

   Function                                               | Module               | Coverage (%)  | Time (s)      |
  --------------------------------------------------------+----------------------+---------------+---------------+
   cg_calc_ur(int, int, int, double, double*, double*,... | exec                 | 43.51         | 115.86        |
   cg_calc_w(int, int, int, double*, double const*, do... | exec                 | 32.74         | 87.19         |
   cg_calc_p(int, int, int, double, double*, double co... | exec                 | 20.79         | 55.38         |
   omp_get_num_procs                                      | libgomp.so.1.0.0     | 2.72          | 7.25          |
   update_left(int, int, int, int, double*, bool) [clo... | exec                 | 0.04          | 0.12          |
   omp_fulfill_event                                      | libgomp.so.1.0.0     | 0.03          | 0.07          |
   update_right(int, int, int, int, double*, bool) [cl... | exec                 | 0.03          | 0.07          |
   down_read_trylock                                      | kernel               | 0.02          | 0.05          |
   update_bottom(int, int, int, int, double*, bool) [c... | exec                 | 0.02          | 0.05          |
   cg_init(int, int, int, int, double, double, double*... | exec                 | 0.01          | 0.04          |


+===================================================================================================================+
+                                                    5  -  LOOPS                                                    +
+===================================================================================================================+


+-------------------------------------------------------------------------------------------------------------------+
+                                               5.1  -  Top 10 Loops                                                +
+-------------------------------------------------------------------------------------------------------------------+

   Loop Id        | Module               | Source Location                                       | Coverage (%)  |
  ----------------+----------------------+-------------------------------------------------------+---------------+
   19             | exec                 | cg.cpp:108-113                                        | 43.45         |
   16             | exec                 | cg.cpp:86-90                                          | 32.63         |
   20             | exec                 | cg.cpp:128-131                                        | 20.78         |
   15             | exec                 | cg.cpp:86-90                                          | 0.08          |
   57             | exec                 | local_halos.cpp:13-15                                 | 0.04          |
   18             | exec                 | cg.cpp:108-108,cg.cpp:111-113                         | 0.03          |
   59             | exec                 | local_halos.cpp:28-30                                 | 0.02          |
   17             | exec                 | cg.cpp:105-105                                        | 0.02          |
   13             | exec                 | cg.cpp:62-68                                          | 0.01          |
   91             | exec                 | solver_methods.cpp:69-72                              | 0.01          |





+===================================================================================================================+
+                                                     6  -  CQA                                                     +
+===================================================================================================================+


+-------------------------------------------------------------------------------------------------------------------+
+                                                   6.1  -  Loops                                                   +
+-------------------------------------------------------------------------------------------------------------------+





      6.1.1  -  Loop 19 from exec
  =========================================================================================================

The loop is defined in /home/eoseret/qaas/qaas_runs/178-237-4322/intel/TeaLeaf/build/TeaLeaf/src/omp/cg.cpp:108-113.

The related source loop is not unrolled or unrolled with no peel/tail loop.

      6.1.1.1  -  Path 1
  ---------------------------------------------------------------------------------------------------------

9% of peak computational performance is used (3.00 out of 32.00 FLOP per cycle (GFLOPS @ 1GHz))

      6.1.1.1.1  -  Vectorization
  ---------------------------------------------------------------------------------------------------------

Your loop is not vectorized.
4 data elements could be processed at once in vector registers.
By vectorizing your loop, you can lower the cost of an iteration from 8.00 to 2.00 cycles (4.00x speedup).

Details
All VPU instructions are used in scalar version (process only one data element in vector registers).
Since your execution units are vector units, only a vectorized loop can use their full power.


Workaround
 - Try another compiler or update/tune your current one
 - Remove inter-iterations dependences from your loop and make it unit-stride:
  * If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly:
C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)<<image_row_maj>>
  * If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA):
for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)





      6.1.1.1.2  -  FMA
  ---------------------------------------------------------------------------------------------------------

Detected 12 FMA (fused multiply-add) operations.




      6.1.1.1.3  -  Slow data structures access
  ---------------------------------------------------------------------------------------------------------

Detected data structures (typically arrays) that cannot be efficiently read/written

Details
 - Constant non-unit stride: 4 occurrence(s)
Non-unit stride (uncontiguous) accesses are not efficiently using data caches


Workaround
 - Try to reorganize arrays of structures to structures of arrays
 - Consider to permute loops (see vectorization gain report)



      6.1.1.1.4  -  Matching between your loop (in the source code) and the binary loop
  ---------------------------------------------------------------------------------------------------------

The binary loop is composed of 24 FP arithmetical operations:
 - 12: addition or subtraction (all inside FMA instructions)
 - 12: multiply (all inside FMA instructions)
The binary loop does not load or store any data.







      6.1.2  -  Loop 16 from exec
  =========================================================================================================

The loop is defined in /home/eoseret/qaas/qaas_runs/178-237-4322/intel/TeaLeaf/build/TeaLeaf/src/omp/cg.cpp:86-90.

The related source loop is not unrolled or unrolled with no peel/tail loop.

      6.1.2.1  -  Path 1
  ---------------------------------------------------------------------------------------------------------

12% of peak computational performance is used (4.09 out of 32.00 FLOP per cycle (GFLOPS @ 1GHz))

      6.1.2.1.1  -  Vectorization
  ---------------------------------------------------------------------------------------------------------

Your loop is not vectorized.
4 data elements could be processed at once in vector registers.
By vectorizing your loop, you can lower the cost of an iteration from 7.33 to 1.83 cycles (4.00x speedup).

Details
All VPU instructions are used in scalar version (process only one data element in vector registers).
Since your execution units are vector units, only a vectorized loop can use their full power.


Workaround
 - Try another compiler or update/tune your current one
 - Remove inter-iterations dependences from your loop and make it unit-stride:
  * If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly:
C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)<<image_row_maj>>
  * If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA):
for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)





      6.1.2.1.2  -  FMA
  ---------------------------------------------------------------------------------------------------------

Detected 8 FMA (fused multiply-add) operations.
Presence of both ADD/SUB and MUL operations.

Workaround
Try to change order in which elements are evaluated (using parentheses) in arithmetic expressions containing both ADD/SUB and MUL operations to enable your compiler to generate FMA instructions wherever possible.
For instance a + b*c is a valid FMA (MUL then ADD).
However (a+b)* c cannot be translated into an FMA (ADD then MUL).




      6.1.2.1.3  -  Slow data structures access
  ---------------------------------------------------------------------------------------------------------

Detected data structures (typically arrays) that cannot be efficiently read/written

Details
 - Constant non-unit stride: 10 occurrence(s)
Non-unit stride (uncontiguous) accesses are not efficiently using data caches


Workaround
 - Try to reorganize arrays of structures to structures of arrays
 - Consider to permute loops (see vectorization gain report)



      6.1.2.1.4  -  Matching between your loop (in the source code) and the binary loop
  ---------------------------------------------------------------------------------------------------------

The binary loop is composed of 30 FP arithmetical operations:
 - 18: addition or subtraction (8 inside FMA instructions)
 - 12: multiply (8 inside FMA instructions)
The binary loop does not load or store any data.







      6.1.3  -  Loop 20 from exec
  =========================================================================================================

The loop is defined in /home/eoseret/qaas/qaas_runs/178-237-4322/intel/TeaLeaf/build/TeaLeaf/src/omp/cg.cpp:128-131.

The related source loop is not unrolled or unrolled with no peel/tail loop.

      6.1.3.1  -  Path 1
  ---------------------------------------------------------------------------------------------------------

6% of peak computational performance is used (2.00 out of 32.00 FLOP per cycle (GFLOPS @ 1GHz))

      6.1.3.1.1  -  Vectorization
  ---------------------------------------------------------------------------------------------------------

Your loop is not vectorized.
4 data elements could be processed at once in vector registers.
By vectorizing your loop, you can lower the cost of an iteration from 8.00 to 2.00 cycles (4.00x speedup).

Details
All VPU instructions are used in scalar version (process only one data element in vector registers).
Since your execution units are vector units, only a vectorized loop can use their full power.


Workaround
 - Try another compiler or update/tune your current one
 - Remove inter-iterations dependences from your loop and make it unit-stride:
  * If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly:
C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)<<image_row_maj>>
  * If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA):
for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)





      6.1.3.1.2  -  FMA
  ---------------------------------------------------------------------------------------------------------

Detected 8 FMA (fused multiply-add) operations.




      6.1.3.1.3  -  Slow data structures access
  ---------------------------------------------------------------------------------------------------------

Detected data structures (typically arrays) that cannot be efficiently read/written

Details
 - Constant non-unit stride: 2 occurrence(s)
Non-unit stride (uncontiguous) accesses are not efficiently using data caches


Workaround
 - Try to reorganize arrays of structures to structures of arrays
 - Consider to permute loops (see vectorization gain report)



      6.1.3.1.4  -  Matching between your loop (in the source code) and the binary loop
  ---------------------------------------------------------------------------------------------------------

The binary loop is composed of 16 FP arithmetical operations:
 - 8: addition or subtraction (all inside FMA instructions)
 - 8: multiply (all inside FMA instructions)
The binary loop does not load or store any data.







      6.1.4  -  Loop 15 from exec
  =========================================================================================================

The loop is defined in /home/eoseret/qaas/qaas_runs/178-237-4322/intel/TeaLeaf/build/TeaLeaf/src/omp/cg.cpp:86-90.

Warnings:
Non-innermost loop: analyzing only self part (ignoring child loops).
This loop has 4 execution paths.

The presence of multiple execution paths is typically the main/first bottleneck.
Try to simplify control inside loop: ideally, try to remove all conditional expressions, for example by (if applicable):
 - hoisting them (moving them outside the loop)
 - turning them into conditional moves, MIN or MAX


Ex: if (x<0) x=0 => x = (x<0 ? 0 : x) (or MAX(0,x) after defining the corresponding macro)


      6.1.4.1  -  Path 1
  ---------------------------------------------------------------------------------------------------------

0% of peak computational performance is used (0.00 out of 32.00 FLOP per cycle (GFLOPS @ 1GHz))

      6.1.4.1.1  -  Vectorization
  ---------------------------------------------------------------------------------------------------------

Your loop is not vectorized.
8 data elements could be processed at once in vector registers.
By vectorizing your loop, you can lower the cost of an iteration from 1.00 to 0.12 cycles (8.00x speedup).

Details
All VPU instructions are used in scalar version (process only one data element in vector registers).
Since your execution units are vector units, only a vectorized loop can use their full power.


Workaround
 - Try another compiler or update/tune your current one
 - Remove inter-iterations dependences from your loop and make it unit-stride:
  * If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly:
C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)<<image_row_maj>>
  * If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA):
for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)




No data for this section



      6.1.4.1.2  -  Matching between your loop (in the source code) and the binary loop
  ---------------------------------------------------------------------------------------------------------

The binary loop does not contain any FP arithmetical operations.
The binary loop does not load or store any data.




      6.1.4.2  -  Path 2
  ---------------------------------------------------------------------------------------------------------

0% of peak computational performance is used (0.00 out of 32.00 FLOP per cycle (GFLOPS @ 1GHz))

      6.1.4.2.1  -  Vectorization
  ---------------------------------------------------------------------------------------------------------

Your loop is not vectorized.
Only 31% of vector register length is used (average across all VPU instructions).
By vectorizing your loop, you can lower the cost of an iteration from 2.50 to 1.50 cycles (1.67x speedup).

Details
All VPU instructions are used in scalar version (process only one data element in vector registers).
Since your execution units are vector units, only a vectorized loop can use their full power.


Workaround
 - Try another compiler or update/tune your current one
 - Remove inter-iterations dependences from your loop and make it unit-stride:
  * If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly:
C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)<<image_row_maj>>
  * If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA):
for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)




No data for this section



      6.1.4.2.2  -  Slow data structures access
  ---------------------------------------------------------------------------------------------------------

Detected data structures (typically arrays) that cannot be efficiently read/written

Details
 - Constant unknown stride: 10 occurrence(s)
Non-unit stride (uncontiguous) accesses are not efficiently using data caches


Workaround
 - Try to reorganize arrays of structures to structures of arrays
 - Consider to permute loops (see vectorization gain report)



      6.1.4.2.3  -  Matching between your loop (in the source code) and the binary loop
  ---------------------------------------------------------------------------------------------------------

The binary loop does not contain any FP arithmetical operations.
The binary loop does not load or store any data.




      6.1.4.3  -  Path 3
  ---------------------------------------------------------------------------------------------------------

Warnings:
This path is accessible from 2 CFG paths (including child blocks)

9% of peak computational performance is used (3.16 out of 32.00 FLOP per cycle (GFLOPS @ 1GHz))

      6.1.4.3.1  -  Code clean check
  ---------------------------------------------------------------------------------------------------------

Detected a slowdown caused by scalar integer instructions (typically used for address computation).
By removing them, you can lower the cost of an iteration from 4.75 to 3.83 cycles (1.24x speedup).

Workaround
 - Try to reorganize arrays of structures to structures of arrays
 - Consider to permute loops (see vectorization gain report)



      6.1.4.3.2  -  Vectorization
  ---------------------------------------------------------------------------------------------------------

Your loop is not vectorized.
Only 24% of vector register length is used (average across all VPU instructions).
By vectorizing your loop, you can lower the cost of an iteration from 4.75 to 1.02 cycles (4.68x speedup).

Details
All VPU instructions are used in scalar version (process only one data element in vector registers).
Since your execution units are vector units, only a vectorized loop can use their full power.


Workaround
 - Try another compiler or update/tune your current one
 - Remove inter-iterations dependences from your loop and make it unit-stride:
  * If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly:
C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)<<image_row_maj>>
  * If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA):
for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)





      6.1.4.3.3  -  FMA
  ---------------------------------------------------------------------------------------------------------

Detected 4 FMA (fused multiply-add) operations.
Presence of both ADD/SUB and MUL operations.

Workaround
Try to change order in which elements are evaluated (using parentheses) in arithmetic expressions containing both ADD/SUB and MUL operations to enable your compiler to generate FMA instructions wherever possible.
For instance a + b*c is a valid FMA (MUL then ADD).
However (a+b)* c cannot be translated into an FMA (ADD then MUL).




      6.1.4.3.4  -  Slow data structures access
  ---------------------------------------------------------------------------------------------------------

Detected data structures (typically arrays) that cannot be efficiently read/written

Details
 - Constant unknown stride: 10 occurrence(s)
Non-unit stride (uncontiguous) accesses are not efficiently using data caches


Workaround
 - Try to reorganize arrays of structures to structures of arrays
 - Consider to permute loops (see vectorization gain report)



      6.1.4.3.5  -  Matching between your loop (in the source code) and the binary loop
  ---------------------------------------------------------------------------------------------------------

The binary loop is composed of 15 FP arithmetical operations:
 - 9: addition or subtraction (4 inside FMA instructions)
 - 6: multiply (4 inside FMA instructions)
The binary loop does not load or store any data.







      6.1.5  -  Loop 57 from exec
  =========================================================================================================

The loop is defined in /home/eoseret/qaas/qaas_runs/178-237-4322/intel/TeaLeaf/build/TeaLeaf/src/omp/local_halos.cpp:13-15.

Warnings:
 - Non-innermost loop: analyzing only self part (ignoring child loops).
 - Ignoring paths for analysis
 - Too many paths. Rerun with max-paths=15
 - RecMII not computed since number of paths is unknown or > max_paths
 - Streams not analyzed since number of paths is unknown or > max_paths

Try to simplify control and/or increase the maximum number of paths per function/loop through the 'max-paths-nb' option.

This loop has 15 execution paths.

The presence of multiple execution paths is typically the main/first bottleneck.
Try to simplify control inside loop: ideally, try to remove all conditional expressions, for example by (if applicable):
 - hoisting them (moving them outside the loop)
 - turning them into conditional moves, MIN or MAX


Ex: if (x<0) x=0 => x = (x<0 ? 0 : x) (or MAX(0,x) after defining the corresponding macro)


      6.1.5.1  -  Path 1
  ---------------------------------------------------------------------------------------------------------

0% of peak computational performance is used (0.00 out of 32.00 FLOP per cycle (GFLOPS @ 1GHz))

      6.1.5.1.1  -  Code clean check
  ---------------------------------------------------------------------------------------------------------

Detected a slowdown caused by scalar integer instructions (typically used for address computation).
By removing them, you can lower the cost of an iteration from 8.00 to 4.83 cycles (1.66x speedup).

Workaround
 - Try to reorganize arrays of structures to structures of arrays
 - Consider to permute loops (see vectorization gain report)



      6.1.5.1.2  -  Vectorization
  ---------------------------------------------------------------------------------------------------------

Your loop is not vectorized.
4 data elements could be processed at once in vector registers.
By vectorizing your loop, you can lower the cost of an iteration from 8.00 to 2.00 cycles (4.00x speedup).

Details
All VPU instructions are used in scalar version (process only one data element in vector registers).
Since your execution units are vector units, only a vectorized loop can use their full power.


Workaround
 - Try another compiler or update/tune your current one
 - Remove inter-iterations dependences from your loop and make it unit-stride:
  * If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly:
C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)<<image_row_maj>>
  * If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA):
for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)




No data for this section



      6.1.5.1.3  -  Matching between your loop (in the source code) and the binary loop
  ---------------------------------------------------------------------------------------------------------

The binary loop does not contain any FP arithmetical operations.
The binary loop does not load or store any data.







      6.1.6  -  Loop 18 from exec
  =========================================================================================================

The loop is defined in /home/eoseret/qaas/qaas_runs/178-237-4322/intel/TeaLeaf/build/TeaLeaf/src/omp/cg.cpp:108-113.

Analyzed code is defined in /home/eoseret/qaas/qaas_runs/178-237-4322/intel/TeaLeaf/build/TeaLeaf/src/omp/cg.cpp:108,111-113.

Warnings:
 - Non-innermost loop: analyzing only self part (ignoring child loops).
 - Ignoring paths for analysis
 - Too many paths. Rerun with max-paths=8
 - RecMII not computed since number of paths is unknown or > max_paths
 - Streams not analyzed since number of paths is unknown or > max_paths

Try to simplify control and/or increase the maximum number of paths per function/loop through the 'max-paths-nb' option.

This loop has 8 execution paths.

The presence of multiple execution paths is typically the main/first bottleneck.
Try to simplify control inside loop: ideally, try to remove all conditional expressions, for example by (if applicable):
 - hoisting them (moving them outside the loop)
 - turning them into conditional moves, MIN or MAX


Ex: if (x<0) x=0 => x = (x<0 ? 0 : x) (or MAX(0,x) after defining the corresponding macro)


      6.1.6.1  -  Path 1
  ---------------------------------------------------------------------------------------------------------

8% of peak computational performance is used (2.72 out of 32.00 FLOP per cycle (GFLOPS @ 1GHz))

      6.1.6.1.1  -  Code clean check
  ---------------------------------------------------------------------------------------------------------

Detected a slowdown caused by scalar integer instructions (typically used for address computation).
By removing them, you can lower the cost of an iteration from 6.63 to 6.00 cycles (1.10x speedup).

Workaround
 - Try to reorganize arrays of structures to structures of arrays
 - Consider to permute loops (see vectorization gain report)



      6.1.6.1.2  -  Vectorization
  ---------------------------------------------------------------------------------------------------------

Your loop is not vectorized.
Only 26% of vector register length is used (average across all VPU instructions).
By vectorizing your loop, you can lower the cost of an iteration from 6.63 to 3.00 cycles (2.21x speedup).

Details
All VPU instructions are used in scalar version (process only one data element in vector registers).
Since your execution units are vector units, only a vectorized loop can use their full power.


Workaround
 - Try another compiler or update/tune your current one
 - Remove inter-iterations dependences from your loop and make it unit-stride:
  * If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly:
C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)<<image_row_maj>>
  * If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA):
for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)





      6.1.6.1.3  -  FMA
  ---------------------------------------------------------------------------------------------------------

Detected 9 FMA (fused multiply-add) operations.




      6.1.6.1.4  -  Matching between your loop (in the source code) and the binary loop
  ---------------------------------------------------------------------------------------------------------

The binary loop is composed of 18 FP arithmetical operations:
 - 9: addition or subtraction (all inside FMA instructions)
 - 9: multiply (all inside FMA instructions)
The binary loop does not load or store any data.







      6.1.7  -  Loop 59 from exec
  =========================================================================================================

The loop is defined in /home/eoseret/qaas/qaas_runs/178-237-4322/intel/TeaLeaf/build/TeaLeaf/src/omp/local_halos.cpp:28-30.

Warnings:
 - Non-innermost loop: analyzing only self part (ignoring child loops).
 - Ignoring paths for analysis
 - Too many paths. Rerun with max-paths=15
 - RecMII not computed since number of paths is unknown or > max_paths
 - Streams not analyzed since number of paths is unknown or > max_paths

Try to simplify control and/or increase the maximum number of paths per function/loop through the 'max-paths-nb' option.

This loop has 15 execution paths.

The presence of multiple execution paths is typically the main/first bottleneck.
Try to simplify control inside loop: ideally, try to remove all conditional expressions, for example by (if applicable):
 - hoisting them (moving them outside the loop)
 - turning them into conditional moves, MIN or MAX


Ex: if (x<0) x=0 => x = (x<0 ? 0 : x) (or MAX(0,x) after defining the corresponding macro)


      6.1.7.1  -  Path 1
  ---------------------------------------------------------------------------------------------------------

0% of peak computational performance is used (0.00 out of 32.00 FLOP per cycle (GFLOPS @ 1GHz))

      6.1.7.1.1  -  Code clean check
  ---------------------------------------------------------------------------------------------------------

Detected a slowdown caused by scalar integer instructions (typically used for address computation).
By removing them, you can lower the cost of an iteration from 6.50 to 4.83 cycles (1.34x speedup).

Workaround
 - Try to reorganize arrays of structures to structures of arrays
 - Consider to permute loops (see vectorization gain report)



      6.1.7.1.2  -  Vectorization
  ---------------------------------------------------------------------------------------------------------

Your loop is not vectorized.
4 data elements could be processed at once in vector registers.
By vectorizing your loop, you can lower the cost of an iteration from 6.50 to 1.62 cycles (4.00x speedup).

Details
All VPU instructions are used in scalar version (process only one data element in vector registers).
Since your execution units are vector units, only a vectorized loop can use their full power.


Workaround
 - Try another compiler or update/tune your current one
 - Remove inter-iterations dependences from your loop and make it unit-stride:
  * If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly:
C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)<<image_row_maj>>
  * If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA):
for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)




No data for this section



      6.1.7.1.3  -  Matching between your loop (in the source code) and the binary loop
  ---------------------------------------------------------------------------------------------------------

The binary loop does not contain any FP arithmetical operations.
The binary loop does not load or store any data.







      6.1.8  -  Loop 17 from exec
  =========================================================================================================

The loop is defined in /home/eoseret/qaas/qaas_runs/178-237-4322/intel/TeaLeaf/build/TeaLeaf/src/omp/cg.cpp:105.

The related source loop is not unrolled or unrolled with no peel/tail loop.

      6.1.8.1  -  Path 1
  ---------------------------------------------------------------------------------------------------------

Warnings:
The number of fused uops of the instruction [CAS	X20, X15, [X19]] is unknown
1% of peak computational performance is used (0.50 out of 32.00 FLOP per cycle (GFLOPS @ 1GHz))

      6.1.8.1.1  -  Vectorization
  ---------------------------------------------------------------------------------------------------------

Your loop is not vectorized.
4 data elements could be processed at once in vector registers.
By vectorizing your loop, you can lower the cost of an iteration from 2.00 to 0.50 cycles (4.00x speedup).

Details
All VPU instructions are used in scalar version (process only one data element in vector registers).
Since your execution units are vector units, only a vectorized loop can use their full power.


Workaround
 - Try another compiler or update/tune your current one
 - Remove inter-iterations dependences from your loop and make it unit-stride:
  * If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly:
C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)<<image_row_maj>>
  * If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA):
for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)




No data for this section



      6.1.8.1.2  -  Matching between your loop (in the source code) and the binary loop
  ---------------------------------------------------------------------------------------------------------

The binary loop is composed of 1 FP arithmetical operations:
 - 1: addition or subtraction
The binary loop is loading 8 bytes.
The binary loop is storing 8 bytes.


      6.1.8.1.3  -  Arithmetic intensity
  ---------------------------------------------------------------------------------------------------------

Arithmetic intensity is 0.06 FP operations per loaded or stored byte.







      6.1.9  -  Loop 13 from exec
  =========================================================================================================

The loop is defined in /home/eoseret/qaas/qaas_runs/178-237-4322/intel/TeaLeaf/build/TeaLeaf/src/omp/cg.cpp:62-68.

The related source loop is not unrolled or unrolled with no peel/tail loop.

      6.1.9.1  -  Path 1
  ---------------------------------------------------------------------------------------------------------

12% of peak computational performance is used (4.15 out of 32.00 FLOP per cycle (GFLOPS @ 1GHz))

      6.1.9.1.1  -  Vectorization
  ---------------------------------------------------------------------------------------------------------

Your loop is not vectorized.
4 data elements could be processed at once in vector registers.
By vectorizing your loop, you can lower the cost of an iteration from 8.67 to 2.17 cycles (4.00x speedup).

Details
All VPU instructions are used in scalar version (process only one data element in vector registers).
Since your execution units are vector units, only a vectorized loop can use their full power.


Workaround
 - Try another compiler or update/tune your current one
 - Remove inter-iterations dependences from your loop and make it unit-stride:
  * If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly:
C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)<<image_row_maj>>
  * If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA):
for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)





      6.1.9.1.2  -  FMA
  ---------------------------------------------------------------------------------------------------------

Detected 10 FMA (fused multiply-add) operations.
Presence of both ADD/SUB and MUL operations.

Workaround
Try to change order in which elements are evaluated (using parentheses) in arithmetic expressions containing both ADD/SUB and MUL operations to enable your compiler to generate FMA instructions wherever possible.
For instance a + b*c is a valid FMA (MUL then ADD).
However (a+b)* c cannot be translated into an FMA (ADD then MUL).




      6.1.9.1.3  -  Slow data structures access
  ---------------------------------------------------------------------------------------------------------

Detected data structures (typically arrays) that cannot be efficiently read/written

Details
 - Constant non-unit stride: 12 occurrence(s)
Non-unit stride (uncontiguous) accesses are not efficiently using data caches


Workaround
 - Try to reorganize arrays of structures to structures of arrays
 - Consider to permute loops (see vectorization gain report)



      6.1.9.1.4  -  Matching between your loop (in the source code) and the binary loop
  ---------------------------------------------------------------------------------------------------------

The binary loop is composed of 36 FP arithmetical operations:
 - 22: addition or subtraction (10 inside FMA instructions)
 - 14: multiply (10 inside FMA instructions)
The binary loop does not load or store any data.





[MAQAO] Info: STOP THE REPORT GENERATION
[MAQAO] Info: 
[MAQAO] Info: If your application produces files, they can be found in directory "/home/eoseret/qaas/qaas_runs/178-237-4322/intel/TeaLeaf/run/oneview_runs/compilers/gcc_5/oneview_run_1782387176"
[MAQAO] Info: 
