OV - exec - Function main.omp

	Function: main.omp_outlined.18	Module: exec	Source: stream.c:290-292	Coverage (incl. loops): 0.16% \| (excl. loops): 0.00%

/beegfs/hackathon/users/eoseret/qaas_runs_test/gmz12.benchmarkcenter.megware.com/177-365-2841/stream/build/stream/src/stream.c: 290 - 292

--------------------------------------------------------------------------------

290: #pragma omp parallel for

291:     for (j = 0; j < STREAM_ARRAY_SIZE; j++)

292: 		a[j] = 2.0E0 * a[j];

0x2039d0 PUSH	%RBP

0x2039d1 MOV	%RSP,%RBP

0x2039d4 PUSH	%R14

0x2039d6 PUSH	%RBX

0x2039d7 SUB	$0x20,%RSP

0x2039db MOV	(%RDI),%EBX

0x2039dd LEA	-0x7(%RIP),%RAX

0x2039e4 MOV	$0x38eb,%R14

0x2039ee MOVQ	$0,-0x28(%RBP)

0x2039f6 MOVQ	$0x3344ffff,-0x18(%RBP)

0x2039fe MOVQ	$0x1,-0x30(%RBP)

0x203a06 MOVL	$0,-0x1c(%RBP)

0x203a0d ADD	%RAX,%R14

0x203a10 SUB	$0x8,%RSP

0x203a14 MOV	$-0x1338,%RDI

0x203a1e LEA	-0x30(%RBP),%RAX

0x203a22 LEA	-0x1c(%RBP),%RCX

0x203a26 MOV	$-0x1028,%R10

0x203a30 LEA	-0x28(%RBP),%R8

0x203a34 LEA	-0x18(%RBP),%R9

0x203a38 MOV	%EBX,%ESI

0x203a3a MOV	$0x22,%EDX

0x203a3f ADD	%R14,%RDI

0x203a42 PUSH	$0x1

0x203a44 PUSH	$0x1

0x203a46 PUSH	%RAX

0x203a47 CALLQ	(%R14,%R10,1)

0x203a4b ADD	$0x20,%RSP

0x203a4f MOV	-0x18(%RBP),%RCX

0x203a53 MOV	$0x3344ffff,%EAX

0x203a58 CMP	$0x3344ffff,%RCX

0x203a5f CMOVL	%RCX,%RAX

0x203a63 MOV	-0x28(%RBP),%RCX

0x203a67 MOV	%RAX,-0x18(%RBP)

0x203a6b CMP	%RAX,%RCX

0x203a6e JG	203b88

0x203a74 MOV	%RAX,%RSI

0x203a77 SUB	%RCX,%RSI

0x203a7a MOV	$0x28,%RDX

0x203a84 INC	%RSI

0x203a87 CMP	$0x4,%RSI

0x203a8b JB	203b63

0x203a91 CMP	$0x20,%RSI

0x203a95 JAE	203a9e

0x203a97 XOR	%EDI,%EDI

0x203a99 JMP	203b2a

0x203a9e LEA	(%R14,%RDX,1),%R8

0x203aa2 MOV	%RSI,%RDI

0x203aa5 AND	$-0x20,%RDI

0x203aa9 XOR	%R9D,%R9D

0x203aac LEA	0xc0(%R8,%RCX,8),%R8

0x203ab4 NOPW	%CS:(%RAX,%RAX,1)

(8) 0x203ac0 VMOVUPD	-0xc0(%R8,%R9,8),%ZMM0

(8) 0x203ac8 VMOVUPD	-0x80(%R8,%R9,8),%ZMM1

(8) 0x203ad0 VMOVUPD	-0x40(%R8,%R9,8),%ZMM2

(8) 0x203ad8 VMOVUPD	(%R8,%R9,8),%ZMM3

(8) 0x203adf VADDPD	%ZMM0,%ZMM0,%ZMM0

(8) 0x203ae5 VADDPD	%ZMM1,%ZMM1,%ZMM1

(8) 0x203aeb VADDPD	%ZMM2,%ZMM2,%ZMM2

(8) 0x203af1 VADDPD	%ZMM3,%ZMM3,%ZMM3

(8) 0x203af7 VMOVUPD	%ZMM0,-0xc0(%R8,%R9,8)

(8) 0x203aff VMOVUPD	%ZMM1,-0x80(%R8,%R9,8)

(8) 0x203b07 VMOVUPD	%ZMM2,-0x40(%R8,%R9,8)

(8) 0x203b0f VMOVUPD	%ZMM3,(%R8,%R9,8)

(8) 0x203b16 ADD	$0x20,%R9

(8) 0x203b1a CMP	%R9,%RDI

(8) 0x203b1d JNE	203ac0

0x203b1f CMP	%RDI,%RSI

0x203b22 JE	203b88

0x203b24 TEST	$0x1c,%SIL

0x203b28 JE	203b60

0x203b2a LEA	(%R14,%RDX,1),%R9

0x203b2e MOV	%RSI,%R8

0x203b31 AND	$-0x4,%R8

0x203b35 LEA	(%R9,%RCX,8),%R9

0x203b39 ADD	%R8,%RCX

0x203b3c NOPL	(%RAX)

(9) 0x203b40 VMOVUPD	(%R9,%RDI,8),%YMM0

(9) 0x203b46 VADDPD	%YMM0,%YMM0,%YMM0

(9) 0x203b4a VMOVUPD	%YMM0,(%R9,%RDI,8)

(9) 0x203b50 ADD	$0x4,%RDI

(9) 0x203b54 CMP	%RDI,%R8

(9) 0x203b57 JNE	203b40

0x203b59 CMP	%R8,%RSI

0x203b5c JNE	203b63

0x203b5e JMP	203b88

0x203b60 ADD	%RDI,%RCX

0x203b63 DEC	%RCX

0x203b66 ADD	%R14,%RDX

0x203b69 NOPL	(%RAX)

(7) 0x203b70 VMOVSD	0x8(%RDX,%RCX,8),%XMM0

(7) 0x203b76 VADDSD	%XMM0,%XMM0,%XMM0

(7) 0x203b7a VMOVSD	%XMM0,0x8(%RDX,%RCX,8)

(7) 0x203b80 INC	%RCX

(7) 0x203b83 CMP	%RAX,%RCX

(7) 0x203b86 JL	203b70

0x203b88 MOV	$-0x1320,%RDI

0x203b92 MOV	$-0x1018,%RAX

0x203b9c MOV	%EBX,%ESI

0x203b9e ADD	%R14,%RDI

0x203ba1 VZEROUPPER

0x203ba4 CALLQ	(%R14,%RAX,1)

0x203ba8 ADD	$0x20,%RSP

0x203bac POP	%RBX

0x203bad POP	%R14

0x203baf POP	%RBP

0x203bb0 RET

0x203bb1 NOPW	%CS:(%RAX,%RAX,1)

Coverage (%)	Name	Source Location	Module
►98.96+	__kmp_invoke_microtask		libomp.so
○	__kmp_invoke_task_func		libomp.so
►1.04+	__kmp_invoke_microtask		libomp.so
○	__kmp_invoke_task_func		libomp.so
○	unknown kernel region	unknown kernel region	kernel

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run orig_0

Source file and lines	stream.c:290-292
Module	exec

The function is defined in /beegfs/hackathon/users/eoseret/qaas_runs_test/gmz12.benchmarkcenter.megware.com/177-365-2841/stream/build/stream/src/stream.c:290-292.

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Vectorization

Your function is probably not vectorized. Only 10% of vector register length is used (average across all SSE/AVX instructions). By vectorizing your function, you can lower the cost of an iteration from 10.63 to 0.76 cycles (13.94x speedup).

Details

Store and arithmetical SSE/AVX instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

unknown: 2 occurrences►
- /beegfs/hackathon/users/eoseret/qaas_runs_test/gmz12.benchmarkcenter.megware.com/177-365-2841/stream/build/stream/src/stream.c:290
- /beegfs/hackathon/users/eoseret/qaas_runs_test/gmz12.benchmarkcenter.megware.com/177-365-2841/stream/build/stream/src/stream.c:290

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

CMOVL: 1 occurrences►
- /beegfs/hackathon/users/eoseret/qaas_runs_test/gmz12.benchmarkcenter.megware.com/177-365-2841/stream/build/stream/src/stream.c:291
LEA: 1 occurrences►
- /beegfs/hackathon/users/eoseret/qaas_runs_test/gmz12.benchmarkcenter.megware.com/177-365-2841/stream/build/stream/src/stream.c:290

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 36 bytes. The binary function is storing 36 bytes.

General properties

nb instructions	81
nb uops	85
loop length	352
used x86 registers	12
used mmx registers	0
used xmm registers	0
used ymm registers	0
used zmm registers	0
nb stack references	4

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	10.63 cycles
front end	10.63 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	8.67	8.67	8.67	8.67	8.67	8.67	3.25	3.25	3.25	3.25	0.00	0.00	0.00	0.00	0.00	0.00
cycles	8.67	8.67	8.67	8.67	8.67	8.67	3.25	3.25	3.25	3.25	0.00	0.00	0.00	0.00	0.00	0.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	10.63
Dispatch	8.67
Overall L1	10.63

Vectorization ratios

all	5%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	10%

Vector efficiency ratios

all	10%
load	6%
store	7%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	12%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 10.63 cycles. At this rate:

1% of peak load performance is reached (3.39 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
2% of peak store performance is reached (3.39 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Performance is limited by instruction throughput (loading/decoding program instructions to execution core) (front-end is a bottleneck). By removing all these bottlenecks, you can lower the cost of an iteration from 10.63 to 8.67 cycles (1.23x speedup).

ASM code

In the binary file, the address of the function is: 2039d0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB $0x20,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV (%RDI),%EBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (6.3%)
LEA -0x7(%RIP),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV $0x38eb,%R14	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOVQ $0,-0x28(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
MOVQ $0x3344ffff,-0x18(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
MOVQ $0x1,-0x30(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
MOVL $0,-0x1c(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
ADD %RAX,%R14	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
SUB $0x8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV $-0x1338,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
LEA -0x30(%RBP),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
LEA -0x1c(%RBP),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV $-0x1028,%R10	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
LEA -0x28(%RBP),%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
LEA -0x18(%RBP),%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV %EBX,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
MOV $0x22,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
ADD %R14,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RAX	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CALLQ (%R14,%R10,1)	4	0	0	0	0.33	0.33	0.33	0.50	0.50	0.50	0.50	0	2.20	N/A
ADD $0x20,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV -0x18(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV $0x3344ffff,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
CMP $0x3344ffff,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
CMOVL %RCX,%RAX	2	0.33	0.33	0.33	0.33	0.33	0.33	0	0	0	0	1	0.33	N/A
MOV -0x28(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RAX,-0x18(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
CMP %RAX,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JG 203b88 <main.omp_outlined.18+0x1b8>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0.33-1	N/A
MOV %RAX,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
SUB %RCX,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
MOV $0x28,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
INC %RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
CMP $0x4,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JB 203b63 <main.omp_outlined.18+0x193>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0.33-1	N/A
CMP $0x20,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JAE 203a9e <main.omp_outlined.18+0xce>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0.33-1	N/A
XOR %EDI,%EDI	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
JMP 203b2a <main.omp_outlined.18+0x15a>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0.50	N/A
LEA (%R14,%RDX,1),%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV %RSI,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
AND $-0x20,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
XOR %R9D,%R9D	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA 0xc0(%R8,%RCX,8),%R8	2	0	0	0.50	0.50	0	0	0.25	0.25	0.25	0.25	2	0.50	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.13	N/A
CMP %RDI,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JE 203b88 <main.omp_outlined.18+0x1b8>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0.33-1	N/A
TEST $0x1c,%SIL	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
JE 203b60 <main.omp_outlined.18+0x190>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0.33-1	N/A
LEA (%R14,%RDX,1),%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV %RSI,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
AND $-0x4,%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
LEA (%R9,%RCX,8),%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
ADD %R8,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0.13	N/A
CMP %R8,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JNE 203b63 <main.omp_outlined.18+0x193>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0.33-1	N/A
JMP 203b88 <main.omp_outlined.18+0x1b8>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0.50	N/A
ADD %RDI,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
DEC %RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
ADD %R14,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0.13	N/A
MOV $-0x1320,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV $-0x1018,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV %EBX,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
ADD %R14,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
VZEROUPPER	1	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALLQ (%R14,%RAX,1)	4	0	0	0	0.33	0.33	0.33	0.50	0.50	0.50	0.50	0	2.20	N/A
ADD $0x20,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
RET	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.13	N/A

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run orig_0

Source file and lines	stream.c:290-292
Module	exec

gain
potential
hint
expert

Vectorization

Details

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

unknown: 2 occurrences►
- /beegfs/hackathon/users/eoseret/qaas_runs_test/gmz12.benchmarkcenter.megware.com/177-365-2841/stream/build/stream/src/stream.c:290
- /beegfs/hackathon/users/eoseret/qaas_runs_test/gmz12.benchmarkcenter.megware.com/177-365-2841/stream/build/stream/src/stream.c:290

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

CMOVL: 1 occurrences►
- /beegfs/hackathon/users/eoseret/qaas_runs_test/gmz12.benchmarkcenter.megware.com/177-365-2841/stream/build/stream/src/stream.c:291
LEA: 1 occurrences►
- /beegfs/hackathon/users/eoseret/qaas_runs_test/gmz12.benchmarkcenter.megware.com/177-365-2841/stream/build/stream/src/stream.c:290

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 36 bytes. The binary function is storing 36 bytes.

General properties

nb instructions	81
nb uops	85
loop length	352
used x86 registers	12
used mmx registers	0
used xmm registers	0
used ymm registers	0
used zmm registers	0
nb stack references	4

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	10.63 cycles
front end	10.63 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	8.67	8.67	8.67	8.67	8.67	8.67	3.25	3.25	3.25	3.25	0.00	0.00	0.00	0.00	0.00	0.00
cycles	8.67	8.67	8.67	8.67	8.67	8.67	3.25	3.25	3.25	3.25	0.00	0.00	0.00	0.00	0.00	0.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	10.63
Dispatch	8.67
Overall L1	10.63

Vectorization ratios

all	5%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	10%

Vector efficiency ratios

all	10%
load	6%
store	7%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	12%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 10.63 cycles. At this rate:

1% of peak load performance is reached (3.39 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
2% of peak store performance is reached (3.39 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

ASM code

In the binary file, the address of the function is: 2039d0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB $0x20,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV (%RDI),%EBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (6.3%)
LEA -0x7(%RIP),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV $0x38eb,%R14	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOVQ $0,-0x28(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
MOVQ $0x3344ffff,-0x18(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
MOVQ $0x1,-0x30(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
MOVL $0,-0x1c(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
ADD %RAX,%R14	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
SUB $0x8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV $-0x1338,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
LEA -0x30(%RBP),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
LEA -0x1c(%RBP),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV $-0x1028,%R10	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
LEA -0x28(%RBP),%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
LEA -0x18(%RBP),%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV %EBX,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
MOV $0x22,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
ADD %R14,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RAX	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CALLQ (%R14,%R10,1)	4	0	0	0	0.33	0.33	0.33	0.50	0.50	0.50	0.50	0	2.20	N/A
ADD $0x20,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV -0x18(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV $0x3344ffff,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
CMP $0x3344ffff,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
CMOVL %RCX,%RAX	2	0.33	0.33	0.33	0.33	0.33	0.33	0	0	0	0	1	0.33	N/A
MOV -0x28(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RAX,-0x18(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
CMP %RAX,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JG 203b88 <main.omp_outlined.18+0x1b8>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0.33-1	N/A
MOV %RAX,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
SUB %RCX,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
MOV $0x28,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
INC %RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
CMP $0x4,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JB 203b63 <main.omp_outlined.18+0x193>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0.33-1	N/A
CMP $0x20,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JAE 203a9e <main.omp_outlined.18+0xce>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0.33-1	N/A
XOR %EDI,%EDI	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
JMP 203b2a <main.omp_outlined.18+0x15a>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0.50	N/A
LEA (%R14,%RDX,1),%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV %RSI,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
AND $-0x20,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
XOR %R9D,%R9D	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA 0xc0(%R8,%RCX,8),%R8	2	0	0	0.50	0.50	0	0	0.25	0.25	0.25	0.25	2	0.50	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.13	N/A
CMP %RDI,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JE 203b88 <main.omp_outlined.18+0x1b8>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0.33-1	N/A
TEST $0x1c,%SIL	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
JE 203b60 <main.omp_outlined.18+0x190>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0.33-1	N/A
LEA (%R14,%RDX,1),%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV %RSI,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
AND $-0x4,%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
LEA (%R9,%RCX,8),%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
ADD %R8,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0.13	N/A
CMP %R8,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JNE 203b63 <main.omp_outlined.18+0x193>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0.33-1	N/A
JMP 203b88 <main.omp_outlined.18+0x1b8>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0.50	N/A
ADD %RDI,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
DEC %RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
ADD %R14,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0.13	N/A
MOV $-0x1320,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV $-0x1018,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV %EBX,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
ADD %R14,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
VZEROUPPER	1	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALLQ (%R14,%RAX,1)	4	0	0	0	0.33	0.33	0.33	0.50	0.50	0.50	0.50	0	2.20	N/A
ADD $0x20,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
RET	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.13	N/A

Name	Coverage (%)	Time (s)
▼main.omp_outlined.18–	0.16	0.03
○Loop 8 - stream.c:292-292 - exec	0.16	0.03
○Loop 7 - stream.c:291-292 - exec	0.00	0.00
○Loop 9 - stream.c:292-292 - exec	0.00	0.00

Report Configuration

Vectorization

Details

Workaround

Execution units bottlenecks

CALL instructions

Details

Complex instructions

Details

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code

Vectorization

Details

Workaround

Execution units bottlenecks

CALL instructions

Details

Complex instructions

Details

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code