OV - exec - Function main.omp

	Function: main.omp_outlined.14	Module: exec	Source: stream.c:271-275	Coverage (incl. loops): 0.69% \| (excl. loops): 0.00%

/beegfs/hackathon/users/eoseret/qaas_runs_test/gmz16.benchmarkcenter.megware.com/177-374-0012/stream-scale/build/stream-scale/src/stream.c: 271 - 275

--------------------------------------------------------------------------------

271: #pragma omp parallel for

272:     for (j=0; j<STREAM_ARRAY_SIZE; j++) {

273: 	    a[j] = 1.0;

274: 	    b[j] = 2.0;

275: 	    c[j] = 0.0;

0x2032f0 PUSH	%RBP

0x2032f1 MOV	%RSP,%RBP

0x2032f4 PUSH	%R15

0x2032f6 PUSH	%R14

0x2032f8 PUSH	%R12

0x2032fa PUSH	%RBX

0x2032fb SUB	$0x20,%RSP

0x2032ff MOV	(%RDI),%R14D

0x203302 LEA	0x2ed7(%RIP),%RBX

0x203309 MOVQ	$0,-0x38(%RBP)

0x203311 MOVQ	$0x3344ffff,-0x28(%RBP)

0x203319 MOVQ	$0x1,-0x40(%RBP)

0x203321 MOVL	$0,-0x2c(%RBP)

0x203328 SUB	$0x8,%RSP

0x20332c MOV	$0x10b8,%RDI

0x203336 LEA	-0x40(%RBP),%RAX

0x20333a LEA	-0x2c(%RBP),%RCX

0x20333e LEA	-0x38(%RBP),%R8

0x203342 LEA	-0x28(%RBP),%R9

0x203346 MOV	%R14D,%ESI

0x203349 MOV	$0x22,%EDX

0x20334e ADD	%RBX,%RDI

0x203351 PUSH	$0x1

0x203353 PUSH	$0x1

0x203355 PUSH	%RAX

0x203356 CALL	203fe0 <@plt_start@+0x80>

0x20335b ADD	$0x20,%RSP

0x20335f MOV	-0x28(%RBP),%RAX

0x203363 MOV	-0x38(%RBP),%R12

0x203367 MOV	$0x3344ffff,%R15D

0x20336d CMP	$0x3344ffff,%RAX

0x203373 CMOVL	%RAX,%R15

0x203377 MOV	%R15,-0x28(%RBP)

0x20337b CMP	%R15,%R12

0x20337e JG	2033f2

0x203380 MOV	$0x334501190,%RAX

0x20338a XOR	%ESI,%ESI

0x20338c ADD	%RBX,%RAX

0x20338f LEA	(%RAX,%R12,8),%RDI

0x203393 MOV	%R15,%RAX

0x203396 SUB	%R12,%RAX

0x203399 LEA	0x8(,%RAX,8),%RDX

0x2033a1 CALL	203ff0 <@plt_start@+0x90>

0x2033a6 MOV	$0x1190,%RAX

0x2033b0 MOV	$0x19a281190,%RDX

0x2033ba DEC	%R12

0x2033bd MOV	$0x3ff0000000000000,%RCX

0x2033c7 MOV	$0x4000000000000000,%RSI

0x2033d1 ADD	%RBX,%RAX

0x2033d4 ADD	%RBX,%RDX

0x2033d7 NOPW	(%RAX,%RAX,1)

(4) 0x2033e0 MOV	%RCX,0x8(%RAX,%R12,8)

(4) 0x2033e5 MOV	%RSI,0x8(%RDX,%R12,8)

(4) 0x2033ea INC	%R12

(4) 0x2033ed CMP	%R15,%R12

(4) 0x2033f0 JL	2033e0

0x2033f2 MOV	$0x10d0,%RAX

0x2033fc MOV	%R14D,%ESI

0x2033ff ADD	%RAX,%RBX

0x203402 MOV	%RBX,%RDI

0x203405 CALL	204000 <@plt_start@+0xa0>

0x20340a ADD	$0x20,%RSP

0x20340e POP	%RBX

0x20340f POP	%R12

0x203411 POP	%R14

0x203413 POP	%R15

0x203415 POP	%RBP

0x203416 RET

0x203417 NOPW	(%RAX,%RAX,1)

Coverage (%)	Name	Source Location	Module
►99.35+	__kmp_invoke_microtask		libomp.so
○	__kmp_invoke_task_func		libomp.so

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run aocc_5

Source file and lines	stream.c:271-275
Module	exec

The function is defined in /beegfs/hackathon/users/eoseret/qaas_runs_test/gmz16.benchmarkcenter.megware.com/177-374-0012/stream-scale/build/stream-scale/src/stream.c:271-275.

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Vectorization

Your function is not vectorized. Only 9% of vector register length is used (average across all SSE/AVX instructions). By vectorizing your function, you can lower the cost of an iteration from 10.83 to 0.73 cycles (14.84x speedup).

Details

All SSE/AVX instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

unknown: 3 occurrences►
- /beegfs/hackathon/users/eoseret/qaas_runs_test/gmz16.benchmarkcenter.megware.com/177-374-0012/stream-scale/build/stream-scale/src/stream.c:271
- /beegfs/hackathon/users/eoseret/qaas_runs_test/gmz16.benchmarkcenter.megware.com/177-374-0012/stream-scale/build/stream-scale/src/stream.c:275
- /beegfs/hackathon/users/eoseret/qaas_runs_test/gmz16.benchmarkcenter.megware.com/177-374-0012/stream-scale/build/stream-scale/src/stream.c:271

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 20 bytes. The binary function is storing 36 bytes.

General properties

nb instructions	64
nb uops	65
loop length	286
used x86 registers	13
used mmx registers	0
used xmm registers	0
used ymm registers	0
used zmm registers	0
nb stack references	4

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	10.83 cycles
front end	10.83 cycles

Back-end

	ALU0/BRU0	ALU1	ALU2	ALU3	BRU1	AGU0	AGU1	AGU2	FP0	FP1	FP2	FP3	FP4	FP5
uops	8.25	8.25	8.00	8.00	2.50	3.67	3.67	3.67	0.00	0.00	0.00	0.00	0.00	0.00
cycles	8.25	8.25	8.00	8.00	2.50	3.67	3.67	3.67	0.00	0.00	0.00	0.00	0.00	0.00

Execution ports to units layout:

ALU0/BRU0: ALU, BRU
ALU1: ALU
ALU2: ALU
ALU3: ALU
BRU1: BRU
AGU0 (256 bits): store address, load
AGU1 (256 bits): store address, load
AGU2 (256 bits): store address, load
FP0 (256 bits): VPU, DIV/SQRT
FP1 (256 bits): VPU, DIV/SQRT
FP2 (256 bits): VPU
FP3 (256 bits): VPU
FP4 (256 bits): FP store data
FP5 (256 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	10.83
Dispatch	8.25
Overall L1	10.83

Vectorization ratios

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Vector efficiency ratios

all	9%
load	6%
store	7%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	9%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 10.83 cycles. At this rate:

1% of peak load performance is reached (1.85 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
5% of peak store performance is reached (3.32 out of 64.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Performance is limited by instruction throughput (loading/decoding program instructions to execution core) (front-end is a bottleneck). By removing all these bottlenecks, you can lower the cost of an iteration from 10.83 to 8.25 cycles (1.31x speedup).

ASM code

In the binary file, the address of the function is: 2032f0

Instruction	Nb FU	ALU0/BRU0	ALU1	ALU2	ALU3	BRU1	AGU0	AGU1	AGU2	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0.17	N/A
PUSH %R15	1	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R12	1	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB $0x20,%RSP	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	N/A
MOV (%RDI),%R14D	1	0	0	0	0	0	0.33	0.33	0.33	3	0.33	scal (6.3%)
LEA 0x2ed7(%RIP),%RBX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	N/A
MOVQ $0,-0x38(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	4	0.50	scal (6.3%)
MOVQ $0x3344ffff,-0x28(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	4	0.50	scal (6.3%)
MOVQ $0x1,-0x40(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	4	0.50	scal (6.3%)
MOVL $0,-0x2c(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	4	0.50	scal (6.3%)
SUB $0x8,%RSP	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	N/A
MOV $0x10b8,%RDI	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.33	N/A
LEA -0x40(%RBP),%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	N/A
LEA -0x2c(%RBP),%RCX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	N/A
LEA -0x38(%RBP),%R8	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	N/A
LEA -0x28(%RBP),%R9	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	N/A
MOV %R14D,%ESI	1	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
MOV $0x22,%EDX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	scal (6.3%)
ADD %RBX,%RDI	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	N/A
PUSH $0x1	1	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH $0x1	1	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RAX	1	0	0	0	0	0	0	0	0	1	0.50	N/A
CALL 203fe0 <@plt_start@+0x80>	2	0.50	0	0	0	0.50	0.33	0.33	0.33	0	0.50	N/A
ADD $0x20,%RSP	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	N/A
MOV -0x28(%RBP),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	3	0.33	N/A
MOV -0x38(%RBP),%R12	1	0	0	0	0	0	0.33	0.33	0.33	3	0.33	N/A
MOV $0x3344ffff,%R15D	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	scal (6.3%)
CMP $0x3344ffff,%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	scal (12.5%)
CMOVL %RAX,%R15	1	0.50	0	0	0.50	0	0	0	0	1	0.50	scal (12.5%)
MOV %R15,-0x28(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	4	0.50	scal (12.5%)
CMP %R15,%R12	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	scal (12.5%)
JG 2033f2 <main.omp_outlined.14+0x102>	1	0.50	0	0	0	0.50	0	0	0	1	0.50-1	N/A
MOV $0x334501190,%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.33	N/A
XOR %ESI,%ESI	1	0	0	0	0	0	0	0	0	0	0.25	scal (6.3%)
ADD %RBX,%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	N/A
LEA (%RAX,%R12,8),%RDI	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	N/A
MOV %R15,%RAX	1	0	0	0	0	0	0	0	0	0	0.17	N/A
SUB %R12,%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	N/A
LEA 0x8(,%RAX,8),%RDX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	N/A
CALL 203ff0 <@plt_start@+0x90>	2	0.50	0	0	0	0.50	0.33	0.33	0.33	0	0.50	N/A
MOV $0x1190,%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.33	N/A
MOV $0x19a281190,%RDX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.33	scal (12.5%)
DEC %R12	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	N/A
MOV $0x3ff0000000000000,%RCX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.33	scal (12.5%)
MOV $0x4000000000000000,%RSI	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.33	scal (12.5%)
ADD %RBX,%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	N/A
ADD %RBX,%RDX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	scal (12.5%)
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0.09	N/A
MOV $0x10d0,%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.33	N/A
MOV %R14D,%ESI	1	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
ADD %RAX,%RBX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	scal (12.5%)
MOV %RBX,%RDI	1	0	0	0	0	0	0	0	0	0	0.17	N/A
CALL 204000 <@plt_start@+0xa0>	2	0.50	0	0	0	0.50	0.33	0.33	0.33	0	0.50	N/A
ADD $0x20,%RSP	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	1	0.33	N/A
RET	1	0.50	0	0	0	0.50	0	0	0	1	0.50	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0.09	N/A

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run aocc_5

Source file and lines	stream.c:271-275
Module	exec

gain
potential
hint
expert

Vectorization

Details

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

unknown: 3 occurrences►
- /beegfs/hackathon/users/eoseret/qaas_runs_test/gmz16.benchmarkcenter.megware.com/177-374-0012/stream-scale/build/stream-scale/src/stream.c:271
- /beegfs/hackathon/users/eoseret/qaas_runs_test/gmz16.benchmarkcenter.megware.com/177-374-0012/stream-scale/build/stream-scale/src/stream.c:275
- /beegfs/hackathon/users/eoseret/qaas_runs_test/gmz16.benchmarkcenter.megware.com/177-374-0012/stream-scale/build/stream-scale/src/stream.c:271

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 20 bytes. The binary function is storing 36 bytes.

General properties

nb instructions	64
nb uops	65
loop length	286
used x86 registers	13
used mmx registers	0
used xmm registers	0
used ymm registers	0
used zmm registers	0
nb stack references	4

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	10.83 cycles
front end	10.83 cycles

Back-end

	ALU0/BRU0	ALU1	ALU2	ALU3	BRU1	AGU0	AGU1	AGU2	FP0	FP1	FP2	FP3	FP4	FP5
uops	8.25	8.25	8.00	8.00	2.50	3.67	3.67	3.67	0.00	0.00	0.00	0.00	0.00	0.00
cycles	8.25	8.25	8.00	8.00	2.50	3.67	3.67	3.67	0.00	0.00	0.00	0.00	0.00	0.00

Execution ports to units layout:

ALU0/BRU0: ALU, BRU
ALU1: ALU
ALU2: ALU
ALU3: ALU
BRU1: BRU
AGU0 (256 bits): store address, load
AGU1 (256 bits): store address, load
AGU2 (256 bits): store address, load
FP0 (256 bits): VPU, DIV/SQRT
FP1 (256 bits): VPU, DIV/SQRT
FP2 (256 bits): VPU
FP3 (256 bits): VPU
FP4 (256 bits): FP store data
FP5 (256 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	10.83
Dispatch	8.25
Overall L1	10.83

Vectorization ratios

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Vector efficiency ratios

all	9%
load	6%
store	7%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	9%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 10.83 cycles. At this rate:

1% of peak load performance is reached (1.85 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
5% of peak store performance is reached (3.32 out of 64.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

ASM code

In the binary file, the address of the function is: 2032f0

Instruction	Nb FU	ALU0/BRU0	ALU1	ALU2	ALU3	BRU1	AGU0	AGU1	AGU2	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0.17	N/A
PUSH %R15	1	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R12	1	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB $0x20,%RSP	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	N/A
MOV (%RDI),%R14D	1	0	0	0	0	0	0.33	0.33	0.33	3	0.33	scal (6.3%)
LEA 0x2ed7(%RIP),%RBX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	N/A
MOVQ $0,-0x38(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	4	0.50	scal (6.3%)
MOVQ $0x3344ffff,-0x28(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	4	0.50	scal (6.3%)
MOVQ $0x1,-0x40(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	4	0.50	scal (6.3%)
MOVL $0,-0x2c(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	4	0.50	scal (6.3%)
SUB $0x8,%RSP	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	N/A
MOV $0x10b8,%RDI	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.33	N/A
LEA -0x40(%RBP),%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	N/A
LEA -0x2c(%RBP),%RCX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	N/A
LEA -0x38(%RBP),%R8	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	N/A
LEA -0x28(%RBP),%R9	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	N/A
MOV %R14D,%ESI	1	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
MOV $0x22,%EDX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	scal (6.3%)
ADD %RBX,%RDI	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	N/A
PUSH $0x1	1	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH $0x1	1	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RAX	1	0	0	0	0	0	0	0	0	1	0.50	N/A
CALL 203fe0 <@plt_start@+0x80>	2	0.50	0	0	0	0.50	0.33	0.33	0.33	0	0.50	N/A
ADD $0x20,%RSP	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	N/A
MOV -0x28(%RBP),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	3	0.33	N/A
MOV -0x38(%RBP),%R12	1	0	0	0	0	0	0.33	0.33	0.33	3	0.33	N/A
MOV $0x3344ffff,%R15D	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	scal (6.3%)
CMP $0x3344ffff,%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	scal (12.5%)
CMOVL %RAX,%R15	1	0.50	0	0	0.50	0	0	0	0	1	0.50	scal (12.5%)
MOV %R15,-0x28(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	4	0.50	scal (12.5%)
CMP %R15,%R12	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	scal (12.5%)
JG 2033f2 <main.omp_outlined.14+0x102>	1	0.50	0	0	0	0.50	0	0	0	1	0.50-1	N/A
MOV $0x334501190,%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.33	N/A
XOR %ESI,%ESI	1	0	0	0	0	0	0	0	0	0	0.25	scal (6.3%)
ADD %RBX,%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	N/A
LEA (%RAX,%R12,8),%RDI	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	N/A
MOV %R15,%RAX	1	0	0	0	0	0	0	0	0	0	0.17	N/A
SUB %R12,%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	N/A
LEA 0x8(,%RAX,8),%RDX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	N/A
CALL 203ff0 <@plt_start@+0x90>	2	0.50	0	0	0	0.50	0.33	0.33	0.33	0	0.50	N/A
MOV $0x1190,%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.33	N/A
MOV $0x19a281190,%RDX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.33	scal (12.5%)
DEC %R12	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	N/A
MOV $0x3ff0000000000000,%RCX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.33	scal (12.5%)
MOV $0x4000000000000000,%RSI	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.33	scal (12.5%)
ADD %RBX,%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	N/A
ADD %RBX,%RDX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	scal (12.5%)
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0.09	N/A
MOV $0x10d0,%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.33	N/A
MOV %R14D,%ESI	1	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
ADD %RAX,%RBX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	scal (12.5%)
MOV %RBX,%RDI	1	0	0	0	0	0	0	0	0	0	0.17	N/A
CALL 204000 <@plt_start@+0xa0>	2	0.50	0	0	0	0.50	0.33	0.33	0.33	0	0.50	N/A
ADD $0x20,%RSP	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	1	0.33	N/A
RET	1	0.50	0	0	0	0.50	0	0	0	1	0.50	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0.09	N/A

Name	Coverage (%)	Time (s)
▼main.omp_outlined.14–	0.69	0.04
○Loop 4 - stream.c:272-274 - exec	0.69	0.04

Report Configuration

Vectorization

Details

Workaround

Execution units bottlenecks

CALL instructions

Details

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code

Vectorization

Details

Workaround

Execution units bottlenecks

CALL instructions

Details

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code