| Loop Id: 11 | Module: exec | Source: stream.c:272-276 | Coverage: 0.28% |
|---|
| Loop Id: 11 | Module: exec | Source: stream.c:272-276 | Coverage: 0.28% |
|---|
0x403160 LEA (%R11,%R14,8),%R15 |
0x403164 ADD $0x8,%R14 |
0x403168 VMOVUPD %ZMM0,(%RCX,%R15,1) [2] |
0x40316f VMOVDQU64 %ZMM1,(%RDX,%R15,1) [3] |
0x403176 VMOVUPD %ZMM2,(%RSI,%R15,1) [1] |
0x40317d CMP %R8,%R14 |
0x403180 JB 403160 |
/beegfs/hackathon/users/eoseret/qaas_runs_test/gmz16.benchmarkcenter.megware.com/177-374-0958/stream/build/stream/src/stream.c: 272 - 276 |
-------------------------------------------------------------------------------- |
272: for (j=0; j<STREAM_ARRAY_SIZE; j++) { |
273: a[j] = 1.0; |
274: b[j] = 2.0; |
275: c[j] = 0.0; |
276: } |
| Coverage (%) | Name | Source Location | Module |
|---|---|---|---|
| ►100.00+ | __kmp_invoke_microtask | libiomp5.so | |
| ○ | __kmp_invoke_task_func | libiomp5.so |
| min | med | avg | max |
|---|---|---|---|
| Percentile Index | 10 | 20 | 30 | 40 | 50 | 60 | 70 | 80 | 90 | 100 |
|---|---|---|---|---|---|---|---|---|---|---|
| Value |
| min | med | avg | max |
|---|---|---|---|
| Percentile Index | 10 | 20 | 30 | 40 | 50 | 60 | 70 | 80 | 90 | 100 |
|---|---|---|---|---|---|---|---|---|---|---|
| Value |
| Path / |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.00 |
| CQA speedup if FP arith vectorized | 1.00 |
| CQA speedup if fully vectorized | 1.00 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 2.00 |
| Bottlenecks | P12, P13, |
| Function | main.extracted.40 |
| Source | stream.c:272-276 |
| Source loop unroll info | not unrolled or unrolled with no peel/tail loop |
| Source loop unroll confidence level | max |
| Unroll/vectorization loop type | NA |
| Unroll factor | NA |
| CQA cycles | 3.00 |
| CQA cycles if no scalar integer | 3.00 |
| CQA cycles if FP arith vectorized | 3.00 |
| CQA cycles if fully vectorized | 3.00 |
| Front-end cycles | 1.50 |
| P0 cycles | 0.75 |
| P1 cycles | 0.75 |
| P2 cycles | 0.50 |
| P3 cycles | 0.50 |
| P4 cycles | 0.50 |
| P5 cycles | 1.00 |
| P6 cycles | 1.00 |
| P7 cycles | 1.00 |
| P8 cycles | 0.00 |
| P9 cycles | 0.00 |
| P10 cycles | 0.00 |
| P11 cycles | 0.00 |
| P12 cycles | 3.00 |
| P13 cycles | 3.00 |
| DIV/SQRT cycles | 0.00 |
| Inter-iter dependencies cycles | 1 |
| FE+BE cycles (UFS) | NA |
| Stall cycles (UFS) | NA |
| Nb insns | 7.00 |
| Nb uops | 9.00 |
| Nb loads | 0.00 |
| Nb stores | 3.00 |
| Nb stack references | 0.00 |
| FLOP/cycle | 0.00 |
| Nb FLOP add-sub | 0.00 |
| Nb FLOP mul | 0.00 |
| Nb FLOP fma | 0.00 |
| Nb FLOP div | 0.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 64.00 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 0.00 |
| Bytes stored | 192.00 |
| Stride 0 | 0.00 |
| Stride 1 | 0.00 |
| Stride n | 0.00 |
| Stride unknown | 0.00 |
| Stride indirect | 0.00 |
| Vectorization ratio all | 100.00 |
| Vectorization ratio load | NA |
| Vectorization ratio store | 100.00 |
| Vectorization ratio mul | NA |
| Vectorization ratio add_sub | NA |
| Vectorization ratio fma | NA |
| Vectorization ratio div_sqrt | NA |
| Vectorization ratio other | NA |
| Vector-efficiency ratio all | 100.00 |
| Vector-efficiency ratio load | NA |
| Vector-efficiency ratio store | 100.00 |
| Vector-efficiency ratio mul | NA |
| Vector-efficiency ratio add_sub | NA |
| Vector-efficiency ratio fma | NA |
| Vector-efficiency ratio div_sqrt | NA |
| Vector-efficiency ratio other | NA |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.00 |
| CQA speedup if FP arith vectorized | 1.00 |
| CQA speedup if fully vectorized | 1.00 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 2.00 |
| Bottlenecks | P12, P13, |
| Function | main.extracted.40 |
| Source | stream.c:272-276 |
| Source loop unroll info | not unrolled or unrolled with no peel/tail loop |
| Source loop unroll confidence level | max |
| Unroll/vectorization loop type | NA |
| Unroll factor | NA |
| CQA cycles | 3.00 |
| CQA cycles if no scalar integer | 3.00 |
| CQA cycles if FP arith vectorized | 3.00 |
| CQA cycles if fully vectorized | 3.00 |
| Front-end cycles | 1.50 |
| P0 cycles | 0.75 |
| P1 cycles | 0.75 |
| P2 cycles | 0.50 |
| P3 cycles | 0.50 |
| P4 cycles | 0.50 |
| P5 cycles | 1.00 |
| P6 cycles | 1.00 |
| P7 cycles | 1.00 |
| P8 cycles | 0.00 |
| P9 cycles | 0.00 |
| P10 cycles | 0.00 |
| P11 cycles | 0.00 |
| P12 cycles | 3.00 |
| P13 cycles | 3.00 |
| DIV/SQRT cycles | 0.00 |
| Inter-iter dependencies cycles | 1 |
| FE+BE cycles (UFS) | NA |
| Stall cycles (UFS) | NA |
| Nb insns | 7.00 |
| Nb uops | 9.00 |
| Nb loads | 0.00 |
| Nb stores | 3.00 |
| Nb stack references | 0.00 |
| FLOP/cycle | 0.00 |
| Nb FLOP add-sub | 0.00 |
| Nb FLOP mul | 0.00 |
| Nb FLOP fma | 0.00 |
| Nb FLOP div | 0.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 64.00 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 0.00 |
| Bytes stored | 192.00 |
| Stride 0 | 0.00 |
| Stride 1 | 0.00 |
| Stride n | 0.00 |
| Stride unknown | 0.00 |
| Stride indirect | 0.00 |
| Vectorization ratio all | 100.00 |
| Vectorization ratio load | NA |
| Vectorization ratio store | 100.00 |
| Vectorization ratio mul | NA |
| Vectorization ratio add_sub | NA |
| Vectorization ratio fma | NA |
| Vectorization ratio div_sqrt | NA |
| Vectorization ratio other | NA |
| Vector-efficiency ratio all | 100.00 |
| Vector-efficiency ratio load | NA |
| Vector-efficiency ratio store | 100.00 |
| Vector-efficiency ratio mul | NA |
| Vector-efficiency ratio add_sub | NA |
| Vector-efficiency ratio fma | NA |
| Vector-efficiency ratio div_sqrt | NA |
| Vector-efficiency ratio other | NA |
| Path / |
| Function | main.extracted.40 |
| Source file and lines | stream.c:272-276 |
| Module | exec |
| nb instructions | 7 |
| nb uops | 9 |
| loop length | 34 |
| used x86 registers | 7 |
| used mmx registers | 0 |
| used xmm registers | 0 |
| used ymm registers | 0 |
| used zmm registers | 3 |
| nb stack references | 0 |
| micro-operation queue | 1.50 cycles |
| front end | 1.50 cycles |
| ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 0.75 | 0.75 | 0.50 | 0.50 | 0.50 | 1.00 | 1.00 | 1.00 | 0.00 | 0.00 | 0.00 | 0.00 | 3.00 | 3.00 |
| cycles | 0.75 | 0.75 | 0.50 | 0.50 | 0.50 | 1.00 | 1.00 | 1.00 | 0.00 | 0.00 | 0.00 | 0.00 | 3.00 | 3.00 |
| Cycles executing div or sqrt instructions | NA |
| Longest recurrence chain latency (RecMII) | 1.00 |
| Front-end | 1.50 |
| Dispatch | 3.00 |
| Data deps. | 1.00 |
| Overall L1 | 3.00 |
| all | 100% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | 100% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | NA (no other vectorizable/vectorized instructions) |
| all | 100% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | 100% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | NA (no other vectorizable/vectorized instructions) |
| all | 100% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | 100% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | NA (no other vectorizable/vectorized instructions) |
| all | 100% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | 100% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | NA (no other vectorizable/vectorized instructions) |
| all | 100% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | 100% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | NA (no other vectorizable/vectorized instructions) |
| all | 100% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | 100% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | NA (no other vectorizable/vectorized instructions) |
| Instruction | Nb FU | ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | Latency | Recip. throughput | Vectorization |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| LEA (%R11,%R14,8),%R15 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| ADD $0x8,%R14 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| VMOVUPD %ZMM0,(%RCX,%R15,1) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
| VMOVDQU64 %ZMM1,(%RDX,%R15,1) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 4 | 2 | vect (100.0%) |
| VMOVUPD %ZMM2,(%RSI,%R15,1) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
| CMP %R8,%R14 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| JB 403160 <main.extracted.40+0xe0> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
| Function | main.extracted.40 |
| Source file and lines | stream.c:272-276 |
| Module | exec |
| nb instructions | 7 |
| nb uops | 9 |
| loop length | 34 |
| used x86 registers | 7 |
| used mmx registers | 0 |
| used xmm registers | 0 |
| used ymm registers | 0 |
| used zmm registers | 3 |
| nb stack references | 0 |
| micro-operation queue | 1.50 cycles |
| front end | 1.50 cycles |
| ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 0.75 | 0.75 | 0.50 | 0.50 | 0.50 | 1.00 | 1.00 | 1.00 | 0.00 | 0.00 | 0.00 | 0.00 | 3.00 | 3.00 |
| cycles | 0.75 | 0.75 | 0.50 | 0.50 | 0.50 | 1.00 | 1.00 | 1.00 | 0.00 | 0.00 | 0.00 | 0.00 | 3.00 | 3.00 |
| Cycles executing div or sqrt instructions | NA |
| Longest recurrence chain latency (RecMII) | 1.00 |
| Front-end | 1.50 |
| Dispatch | 3.00 |
| Data deps. | 1.00 |
| Overall L1 | 3.00 |
| all | 100% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | 100% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | NA (no other vectorizable/vectorized instructions) |
| all | 100% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | 100% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | NA (no other vectorizable/vectorized instructions) |
| all | 100% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | 100% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | NA (no other vectorizable/vectorized instructions) |
| all | 100% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | 100% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | NA (no other vectorizable/vectorized instructions) |
| all | 100% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | 100% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | NA (no other vectorizable/vectorized instructions) |
| all | 100% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | 100% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | NA (no other vectorizable/vectorized instructions) |
| Instruction | Nb FU | ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | Latency | Recip. throughput | Vectorization |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| LEA (%R11,%R14,8),%R15 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| ADD $0x8,%R14 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| VMOVUPD %ZMM0,(%RCX,%R15,1) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
| VMOVDQU64 %ZMM1,(%RDX,%R15,1) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 4 | 2 | vect (100.0%) |
| VMOVUPD %ZMM2,(%RSI,%R15,1) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
| CMP %R8,%R14 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| JB 403160 <main.extracted.40+0xe0> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |