OV - exec - Function main.omp

	Function: main.omp_outlined.18	Module: exec	Source: stream.c:290-292	Coverage (incl. loops): 0.50% \| (excl. loops): 0.00%

/beegfs/hackathon/users/eoseret/qaas_runs_test/ins01.benchmarkcenter.megware.com/177-374-0840/stream-add/build/stream-add/src/stream.c: 290 - 292

--------------------------------------------------------------------------------

290: #pragma omp parallel for

291:     for (j = 0; j < STREAM_ARRAY_SIZE; j++)

292: 		a[j] = 2.0E0 * a[j];

0x203350 PUSH	%RBP

0x203351 MOV	%RSP,%RBP

0x203354 PUSH	%R14

0x203356 PUSH	%RBX

0x203357 SUB	$0x20,%RSP

0x20335b MOV	(%RDI),%R14D

0x20335e LEA	0x31cb(%RIP),%RBX

0x203365 MOVQ	$0,-0x28(%RBP)

0x20336d MOVQ	$0x3344ffff,-0x18(%RBP)

0x203375 MOVQ	$0x1,-0x30(%RBP)

0x20337d MOVL	$0,-0x1c(%RBP)

0x203384 SUB	$0x8,%RSP

0x203388 MOV	$0x1100,%RDI

0x203392 LEA	-0x30(%RBP),%RAX

0x203396 LEA	-0x1c(%RBP),%RCX

0x20339a LEA	-0x28(%RBP),%R8

0x20339e LEA	-0x18(%RBP),%R9

0x2033a2 MOV	%R14D,%ESI

0x2033a5 MOV	$0x22,%EDX

0x2033aa ADD	%RBX,%RDI

0x2033ad PUSH	$0x1

0x2033af PUSH	$0x1

0x2033b1 PUSH	%RAX

0x2033b2 CALL	204330 <@plt_start@+0x80>

0x2033b7 ADD	$0x20,%RSP

0x2033bb MOV	-0x18(%RBP),%RCX

0x2033bf MOV	$0x3344ffff,%EAX

0x2033c4 CMP	$0x3344ffff,%RCX

0x2033cb CMOVL	%RCX,%RAX

0x2033cf MOV	-0x28(%RBP),%RCX

0x2033d3 MOV	%RAX,-0x18(%RBP)

0x2033d7 CMP	%RAX,%RCX

0x2033da JG	203488

0x2033e0 MOV	%RAX,%RSI

0x2033e3 SUB	%RCX,%RSI

0x2033e6 MOV	$0x1190,%RDX

0x2033f0 INC	%RSI

0x2033f3 CMP	$0x8,%RSI

0x2033f7 JB	203464

0x2033f9 LEA	(%RBX,%RDX,1),%R8

0x2033fd MOV	%RSI,%RDI

0x203400 AND	$-0x8,%RDI

0x203404 XOR	%R9D,%R9D

0x203407 LEA	0x30(%R8,%RCX,8),%R8

0x20340c ADD	%RDI,%RCX

0x20340f NOP

(7) 0x203410 VMOVUPD	-0x30(%R8,%R9,8),%XMM0

(7) 0x203417 VMOVUPD	-0x20(%R8,%R9,8),%XMM1

(7) 0x20341e VMOVUPD	-0x10(%R8,%R9,8),%XMM2

(7) 0x203425 VMOVUPD	(%R8,%R9,8),%XMM3

(7) 0x20342b VADDPD	%XMM0,%XMM0,%XMM0

(7) 0x20342f VADDPD	%XMM1,%XMM1,%XMM1

(7) 0x203433 VADDPD	%XMM2,%XMM2,%XMM2

(7) 0x203437 VADDPD	%XMM3,%XMM3,%XMM3

(7) 0x20343b VMOVUPD	%XMM0,-0x30(%R8,%R9,8)

(7) 0x203442 VMOVUPD	%XMM1,-0x20(%R8,%R9,8)

(7) 0x203449 VMOVUPD	%XMM2,-0x10(%R8,%R9,8)

(7) 0x203450 VMOVUPD	%XMM3,(%R8,%R9,8)

(7) 0x203456 ADD	$0x8,%R9

(7) 0x20345a CMP	%R9,%RDI

(7) 0x20345d JNE	203410

0x20345f CMP	%RDI,%RSI

0x203462 JE	203488

0x203464 DEC	%RCX

0x203467 ADD	%RBX,%RDX

0x20346a NOPW	(%RAX,%RAX,1)

(6) 0x203470 VMOVSD	0x8(%RDX,%RCX,8),%XMM0

(6) 0x203476 VADDSD	%XMM0,%XMM0,%XMM0

(6) 0x20347a VMOVSD	%XMM0,0x8(%RDX,%RCX,8)

(6) 0x203480 INC	%RCX

(6) 0x203483 CMP	%RAX,%RCX

(6) 0x203486 JL	203470

0x203488 MOV	$0x1118,%RAX

0x203492 MOV	%R14D,%ESI

0x203495 ADD	%RAX,%RBX

0x203498 MOV	%RBX,%RDI

0x20349b CALL	204350 <@plt_start@+0xa0>

0x2034a0 ADD	$0x20,%RSP

0x2034a4 POP	%RBX

0x2034a5 POP	%R14

0x2034a7 POP	%RBP

0x2034a8 RET

0x2034a9 NOPL	(%RAX)

Coverage (%)	Name	Source Location	Module
►100.00+	__kmp_invoke_microtask		libomp.so
○	__kmp_invoke_task_func		libomp.so

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run aocc_4

Source file and lines	stream.c:290-292
Module	exec

The function is defined in /beegfs/hackathon/users/eoseret/qaas_runs_test/ins01.benchmarkcenter.megware.com/177-374-0840/stream-add/build/stream-add/src/stream.c:290-292.

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Vectorization

Your function is not vectorized. Only 9% of vector register length is used (average across all SSE/AVX instructions). By vectorizing your function, you can lower the cost of an iteration from 10.33 to 0.72 cycles (14.38x speedup).

Details

All SSE/AVX instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

unknown: 2 occurrences►
- /beegfs/hackathon/users/eoseret/qaas_runs_test/ins01.benchmarkcenter.megware.com/177-374-0840/stream-add/build/stream-add/src/stream.c:290
- /beegfs/hackathon/users/eoseret/qaas_runs_test/ins01.benchmarkcenter.megware.com/177-374-0840/stream-add/build/stream-add/src/stream.c:290

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

LEA: 1 occurrences►
- /beegfs/hackathon/users/eoseret/qaas_runs_test/ins01.benchmarkcenter.megware.com/177-374-0840/stream-add/build/stream-add/src/stream.c:290

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 20 bytes. The binary function is storing 36 bytes.

General properties

nb instructions	62
nb uops	62
loop length	249
used x86 registers	11
used mmx registers	0
used xmm registers	0
used ymm registers	0
used zmm registers	0
nb stack references	4

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	10.33 cycles
front end	10.33 cycles

Back-end

	ALU0/BRU0	ALU1	ALU2	ALU3	BRU1	AGU0	AGU1	AGU2	FP0	FP1	FP2	FP3	FP4	FP5
uops	8.00	8.00	8.00	8.00	3.00	3.67	3.67	3.67	0.00	0.00	0.00	0.00	0.00	0.00
cycles	8.00	8.00	8.00	8.00	3.00	3.67	3.67	3.67	0.00	0.00	0.00	0.00	0.00	0.00

Execution ports to units layout:

ALU0/BRU0: ALU, BRU
ALU1: ALU
ALU2: ALU
ALU3: ALU
BRU1: BRU
AGU0 (256 bits): store address, load
AGU1 (256 bits): store address, load
AGU2 (256 bits): store address, load
FP0 (256 bits): VPU, DIV/SQRT
FP1 (256 bits): VPU, DIV/SQRT
FP2 (256 bits): VPU
FP3 (256 bits): VPU
FP4 (256 bits): FP store data
FP5 (256 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	10.33
Dispatch	8.00
Overall L1	10.33

Vectorization ratios

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Vector efficiency ratios

all	9%
load	6%
store	7%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	10%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 10.33 cycles. At this rate:

2% of peak load performance is reached (1.94 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
5% of peak store performance is reached (3.48 out of 64.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Performance is limited by instruction throughput (loading/decoding program instructions to execution core) (front-end is a bottleneck). By removing all these bottlenecks, you can lower the cost of an iteration from 10.33 to 8.00 cycles (1.29x speedup).

ASM code

In the binary file, the address of the function is: 203350

Instruction	Nb FU	ALU0/BRU0	ALU1	ALU2	ALU3	BRU1	AGU0	AGU1	AGU2	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0.17	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB $0x20,%RSP	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	N/A
MOV (%RDI),%R14D	1	0	0	0	0	0	0.33	0.33	0.33	3	0.33	scal (6.3%)
LEA 0x31cb(%RIP),%RBX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	N/A
MOVQ $0,-0x28(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	4	0.50	scal (6.3%)
MOVQ $0x3344ffff,-0x18(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	4	0.50	scal (6.3%)
MOVQ $0x1,-0x30(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	4	0.50	scal (6.3%)
MOVL $0,-0x1c(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	4	0.50	scal (6.3%)
SUB $0x8,%RSP	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	N/A
MOV $0x1100,%RDI	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.33	N/A
LEA -0x30(%RBP),%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	N/A
LEA -0x1c(%RBP),%RCX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	N/A
LEA -0x28(%RBP),%R8	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	N/A
LEA -0x18(%RBP),%R9	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	N/A
MOV %R14D,%ESI	1	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
MOV $0x22,%EDX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	N/A
ADD %RBX,%RDI	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	N/A
PUSH $0x1	1	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH $0x1	1	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RAX	1	0	0	0	0	0	0	0	0	1	0.50	N/A
CALL 204330 <@plt_start@+0x80>	2	0.50	0	0	0	0.50	0.33	0.33	0.33	0	0.50	N/A
ADD $0x20,%RSP	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	N/A
MOV -0x18(%RBP),%RCX	1	0	0	0	0	0	0.33	0.33	0.33	3	0.33	N/A
MOV $0x3344ffff,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	N/A
CMP $0x3344ffff,%RCX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	scal (12.5%)
CMOVL %RCX,%RAX	1	0.50	0	0	0.50	0	0	0	0	1	0.50	N/A
MOV -0x28(%RBP),%RCX	1	0	0	0	0	0	0.33	0.33	0.33	3	0.33	N/A
MOV %RAX,-0x18(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	4	0.50	scal (12.5%)
CMP %RAX,%RCX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	scal (12.5%)
JG 203488 <main.omp_outlined.18+0x138>	1	0.50	0	0	0	0.50	0	0	0	1	0.50-1	N/A
MOV %RAX,%RSI	1	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
SUB %RCX,%RSI	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	scal (12.5%)
MOV $0x1190,%RDX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.33	N/A
INC %RSI	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	scal (12.5%)
CMP $0x8,%RSI	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	scal (12.5%)
JB 203464 <main.omp_outlined.18+0x114>	1	0.50	0	0	0	0.50	0	0	0	1	0.50-1	N/A
LEA (%RBX,%RDX,1),%R8	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	N/A
MOV %RSI,%RDI	1	0	0	0	0	0	0	0	0	0	0.17	N/A
AND $-0x8,%RDI	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	N/A
XOR %R9D,%R9D	1	0	0	0	0	0	0	0	0	0	0.25	scal (6.3%)
LEA 0x30(%R8,%RCX,8),%R8	2	0	0	0.50	0.50	0	0.33	0.33	0.33	2	0.50	N/A
ADD %RDI,%RCX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	N/A
NOP	0	0	0	0	0	0	0	0	0	0	0.09	N/A
CMP %RDI,%RSI	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	scal (12.5%)
JE 203488 <main.omp_outlined.18+0x138>	1	0.50	0	0	0	0.50	0	0	0	1	0.50-1	N/A
DEC %RCX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	N/A
ADD %RBX,%RDX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0.09	N/A
MOV $0x1118,%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.33	N/A
MOV %R14D,%ESI	1	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
ADD %RAX,%RBX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	N/A
MOV %RBX,%RDI	1	0	0	0	0	0	0	0	0	0	0.17	N/A
CALL 204350 <@plt_start@+0xa0>	2	0.50	0	0	0	0.50	0.33	0.33	0.33	0	0.50	N/A
ADD $0x20,%RSP	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	1	0.33	N/A
RET	1	0.50	0	0	0	0.50	0	0	0	1	0.50	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0.09	N/A

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run aocc_4

Source file and lines	stream.c:290-292
Module	exec

gain
potential
hint
expert

Vectorization

Details

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

unknown: 2 occurrences►
- /beegfs/hackathon/users/eoseret/qaas_runs_test/ins01.benchmarkcenter.megware.com/177-374-0840/stream-add/build/stream-add/src/stream.c:290
- /beegfs/hackathon/users/eoseret/qaas_runs_test/ins01.benchmarkcenter.megware.com/177-374-0840/stream-add/build/stream-add/src/stream.c:290

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

LEA: 1 occurrences►
- /beegfs/hackathon/users/eoseret/qaas_runs_test/ins01.benchmarkcenter.megware.com/177-374-0840/stream-add/build/stream-add/src/stream.c:290

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 20 bytes. The binary function is storing 36 bytes.

General properties

nb instructions	62
nb uops	62
loop length	249
used x86 registers	11
used mmx registers	0
used xmm registers	0
used ymm registers	0
used zmm registers	0
nb stack references	4

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	10.33 cycles
front end	10.33 cycles

Back-end

	ALU0/BRU0	ALU1	ALU2	ALU3	BRU1	AGU0	AGU1	AGU2	FP0	FP1	FP2	FP3	FP4	FP5
uops	8.00	8.00	8.00	8.00	3.00	3.67	3.67	3.67	0.00	0.00	0.00	0.00	0.00	0.00
cycles	8.00	8.00	8.00	8.00	3.00	3.67	3.67	3.67	0.00	0.00	0.00	0.00	0.00	0.00

Execution ports to units layout:

ALU0/BRU0: ALU, BRU
ALU1: ALU
ALU2: ALU
ALU3: ALU
BRU1: BRU
AGU0 (256 bits): store address, load
AGU1 (256 bits): store address, load
AGU2 (256 bits): store address, load
FP0 (256 bits): VPU, DIV/SQRT
FP1 (256 bits): VPU, DIV/SQRT
FP2 (256 bits): VPU
FP3 (256 bits): VPU
FP4 (256 bits): FP store data
FP5 (256 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	10.33
Dispatch	8.00
Overall L1	10.33

Vectorization ratios

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Vector efficiency ratios

all	9%
load	6%
store	7%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	10%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 10.33 cycles. At this rate:

2% of peak load performance is reached (1.94 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
5% of peak store performance is reached (3.48 out of 64.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

ASM code

In the binary file, the address of the function is: 203350

Instruction	Nb FU	ALU0/BRU0	ALU1	ALU2	ALU3	BRU1	AGU0	AGU1	AGU2	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0.17	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB $0x20,%RSP	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	N/A
MOV (%RDI),%R14D	1	0	0	0	0	0	0.33	0.33	0.33	3	0.33	scal (6.3%)
LEA 0x31cb(%RIP),%RBX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	N/A
MOVQ $0,-0x28(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	4	0.50	scal (6.3%)
MOVQ $0x3344ffff,-0x18(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	4	0.50	scal (6.3%)
MOVQ $0x1,-0x30(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	4	0.50	scal (6.3%)
MOVL $0,-0x1c(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	4	0.50	scal (6.3%)
SUB $0x8,%RSP	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	N/A
MOV $0x1100,%RDI	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.33	N/A
LEA -0x30(%RBP),%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	N/A
LEA -0x1c(%RBP),%RCX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	N/A
LEA -0x28(%RBP),%R8	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	N/A
LEA -0x18(%RBP),%R9	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	N/A
MOV %R14D,%ESI	1	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
MOV $0x22,%EDX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	N/A
ADD %RBX,%RDI	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	N/A
PUSH $0x1	1	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH $0x1	1	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RAX	1	0	0	0	0	0	0	0	0	1	0.50	N/A
CALL 204330 <@plt_start@+0x80>	2	0.50	0	0	0	0.50	0.33	0.33	0.33	0	0.50	N/A
ADD $0x20,%RSP	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	N/A
MOV -0x18(%RBP),%RCX	1	0	0	0	0	0	0.33	0.33	0.33	3	0.33	N/A
MOV $0x3344ffff,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	N/A
CMP $0x3344ffff,%RCX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	scal (12.5%)
CMOVL %RCX,%RAX	1	0.50	0	0	0.50	0	0	0	0	1	0.50	N/A
MOV -0x28(%RBP),%RCX	1	0	0	0	0	0	0.33	0.33	0.33	3	0.33	N/A
MOV %RAX,-0x18(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	4	0.50	scal (12.5%)
CMP %RAX,%RCX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	scal (12.5%)
JG 203488 <main.omp_outlined.18+0x138>	1	0.50	0	0	0	0.50	0	0	0	1	0.50-1	N/A
MOV %RAX,%RSI	1	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
SUB %RCX,%RSI	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	scal (12.5%)
MOV $0x1190,%RDX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.33	N/A
INC %RSI	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	scal (12.5%)
CMP $0x8,%RSI	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	scal (12.5%)
JB 203464 <main.omp_outlined.18+0x114>	1	0.50	0	0	0	0.50	0	0	0	1	0.50-1	N/A
LEA (%RBX,%RDX,1),%R8	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	N/A
MOV %RSI,%RDI	1	0	0	0	0	0	0	0	0	0	0.17	N/A
AND $-0x8,%RDI	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	N/A
XOR %R9D,%R9D	1	0	0	0	0	0	0	0	0	0	0.25	scal (6.3%)
LEA 0x30(%R8,%RCX,8),%R8	2	0	0	0.50	0.50	0	0.33	0.33	0.33	2	0.50	N/A
ADD %RDI,%RCX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	N/A
NOP	0	0	0	0	0	0	0	0	0	0	0.09	N/A
CMP %RDI,%RSI	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	scal (12.5%)
JE 203488 <main.omp_outlined.18+0x138>	1	0.50	0	0	0	0.50	0	0	0	1	0.50-1	N/A
DEC %RCX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	N/A
ADD %RBX,%RDX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0.09	N/A
MOV $0x1118,%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.33	N/A
MOV %R14D,%ESI	1	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
ADD %RAX,%RBX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	N/A
MOV %RBX,%RDI	1	0	0	0	0	0	0	0	0	0	0.17	N/A
CALL 204350 <@plt_start@+0xa0>	2	0.50	0	0	0	0.50	0.33	0.33	0.33	0	0.50	N/A
ADD $0x20,%RSP	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	1	0.33	N/A
RET	1	0.50	0	0	0	0.50	0	0	0	1	0.50	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0.09	N/A

Name	Coverage (%)	Time (s)
▼main.omp_outlined.18–	0.50	0.04
○Loop 7 - stream.c:292-292 - exec	0.50	0.04
○Loop 6 - stream.c:291-292 - exec	0.00	0.00

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