OV - exec - Function main._omp

	Function: main._omp_fn.2	Module: exec	Source: stream.c:275-279	Coverage (incl. loops): 0.04% \| (excl. loops): 0.00%

/home/eoseret/Tools/QaaS/qaas_runs/175-492-1446/intel/stream/build/stream/src/stream.c: 275 - 279

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275: #pragma omp parallel for

276:     for (j=0; j<STREAM_ARRAY_SIZE; j++) {

277: 	    a[j] = 1.0;

278: 	    b[j] = 2.0;

279: 	    c[j] = 0.0;

0x402350 STP	X29, X30, [SP, #992]!

0x402354 ADD	X29, SP, #0

0x402358 STR	X19, [SP, #16]

0x40235c BL	400740

0x402360 SBFM	X19, X0, #0, #31

0x402364 BL	400710

0x402368 MOVZ	X2, #13125

0x40236c SBFM	X0, X0, #0, #31

0x402370 SDIV	X1, X2, X19

0x402374 MSUB	X3, X1, X19, X2

0x402378 CMP	X0, X3

0x40237c B.LT	402424

(18) 0x402380 MADD	X0, X1, X0, X3

(18) 0x402384 ADD	X5, X1, X0

(18) 0x402388 CMP	X0, X5

(18) 0x40238c B.GE	402418

(18) 0x402390 ADRP	X4, 402390

(18) 0x402394 SUB	X9, X1, #1

(18) 0x402398 LDR	X8, [X4, #1400]

(18) 0x40239c LDR	X12, [X8, #16]

(18) 0x4023a0 LDP	X7, X6, [X8]

(18) 0x4023a4 CMP	X9, #10

(18) 0x4023a8 B.LS	402430

(18) 0x4023ac ADD	X13, X12, X0,LSL #3

(18) 0x4023b0 ADD	X14, X7, X0,LSL #3

(18) 0x4023b4 WHILEWR	P15.D, X13, X14

(18) 0x4023b8 CSINC	W15, WZR, WZR, #2

(18) 0x4023bc ADD	X16, X6, X0,LSL #3

(18) 0x4023c0 WHILEWR	P15.D, X13, X16

(18) 0x4023c4 CSINC	W11, WZR, WZR, #2

(18) 0x4023c8 WHILEWR	P15.D, X14, X16

(18) 0x4023cc CSINC	W10, WZR, WZR, #2

(18) 0x4023d0 CMP	W11, #0

(18) 0x4023d4 CCMP	W10, #0, #4, #1

(18) 0x4023d8 CCMP	W15, #0, #4, #1

(18) 0x4023dc B.EQ	402430

(18) 0x4023e0 MOVZ	X18, #0

(18) 0x4023e4 CNTD	X17, ALL

(18) 0x4023e8 WHILELO	P7.D, XZR, X1

(18) 0x4023ec FDUP	Z31.D, #112

(18) 0x4023f0 FDUP	Z30.D, #0

(18) 0x4023f4 DUP	Z29.D, #0

(18) 0x4023f8 HINT	#0

(18) 0x4023fc HINT	#0

  (20) 0x402400 ST1D	{Z31.D}, P7, [X13, X18,LSL #3]

  (20) 0x402404 ST1D	{Z30.D}, P7, [X14, X18,LSL #3]

  (20) 0x402408 ST1D	{Z29.D}, P7, [X16, X18,LSL #3]

  (20) 0x40240c ADD	X18, X18, X17

  (20) 0x402410 WHILELO	P7.D, X18, X1

  (20) 0x402414 B.NE	402400

(18) 0x402418 LDR	X19, [SP, #16]

(18) 0x40241c LDP	X29, X30, [SP], #32

(18) 0x402420 RET

(18) 0x402424 ADD	X1, X1, #1

(18) 0x402428 MOVZ	X3, #0

(18) 0x40242c B	402380

(18) 0x402430 SUB	X30, X5, X0

(18) 0x402434 FMOV	D0, #1.0000000

(18) 0x402438 FMOV	D1, #2.0000000

(18) 0x40243c ANDS	X19, X30, #4224

(18) 0x402440 B.EQ	4024ec

(18) 0x402444 CMP	X19, #1

(18) 0x402448 B.EQ	4024d4

(18) 0x40244c CMP	X19, #2

(18) 0x402450 B.EQ	4024c4

(18) 0x402454 CMP	X19, #3

(18) 0x402458 B.EQ	4024b4

(18) 0x40245c CMP	X19, #4

(18) 0x402460 B.EQ	4024a4

(18) 0x402464 CMP	X19, #5

(18) 0x402468 B.EQ	402494

(18) 0x40246c CMP	X19, #6

(18) 0x402470 B.EQ	402484

(18) 0x402474 STR	D0, [X12, X0,LSL #3]

(18) 0x402478 STR	D1, [X7, X0,LSL #3]

(18) 0x40247c STR	XZR, [X6, X0,LSL #3]

(18) 0x402480 ADD	X0, X0, #1

(18) 0x402484 STR	D0, [X12, X0,LSL #3]

(18) 0x402488 STR	D1, [X7, X0,LSL #3]

(18) 0x40248c STR	XZR, [X6, X0,LSL #3]

(18) 0x402490 ADD	X0, X0, #1

(18) 0x402494 STR	D0, [X12, X0,LSL #3]

(18) 0x402498 STR	D1, [X7, X0,LSL #3]

(18) 0x40249c STR	XZR, [X6, X0,LSL #3]

(18) 0x4024a0 ADD	X0, X0, #1

(18) 0x4024a4 STR	D0, [X12, X0,LSL #3]

(18) 0x4024a8 STR	D1, [X7, X0,LSL #3]

(18) 0x4024ac STR	XZR, [X6, X0,LSL #3]

(18) 0x4024b0 ADD	X0, X0, #1

(18) 0x4024b4 STR	D0, [X12, X0,LSL #3]

(18) 0x4024b8 STR	D1, [X7, X0,LSL #3]

(18) 0x4024bc STR	XZR, [X6, X0,LSL #3]

(18) 0x4024c0 ADD	X0, X0, #1

(18) 0x4024c4 STR	D0, [X12, X0,LSL #3]

(18) 0x4024c8 STR	D1, [X7, X0,LSL #3]

(18) 0x4024cc STR	XZR, [X6, X0,LSL #3]

(18) 0x4024d0 ADD	X0, X0, #1

(18) 0x4024d4 STR	D0, [X12, X0,LSL #3]

(18) 0x4024d8 STR	D1, [X7, X0,LSL #3]

(18) 0x4024dc STR	XZR, [X6, X0,LSL #3]

(18) 0x4024e0 ADD	X0, X0, #1

(18) 0x4024e4 CMP	X5, X0

(18) 0x4024e8 B.EQ	402418

  (19) 0x4024ec STR	D0, [X12, X0,LSL #3]

  (19) 0x4024f0 ADD	X1, X0, #1

  (19) 0x4024f4 ADD	X13, X0, #2

  (19) 0x4024f8 STR	D1, [X7, X0,LSL #3]

  (19) 0x4024fc ADD	X8, X0, #3

  (19) 0x402500 ADD	X9, X0, #4

  (19) 0x402504 STR	XZR, [X6, X0,LSL #3]

  (19) 0x402508 ADD	X4, X0, #5

  (19) 0x40250c ADD	X3, X0, #6

  (19) 0x402510 STR	D0, [X12, X1,LSL #3]

  (19) 0x402514 ADD	X2, X0, #7

  (19) 0x402518 ADD	X0, X0, #8

  (19) 0x40251c STR	D1, [X7, X1,LSL #3]

  (19) 0x402520 STR	XZR, [X6, X1,LSL #3]

  (19) 0x402524 STR	D0, [X12, X13,LSL #3]

  (19) 0x402528 STR	D1, [X7, X13,LSL #3]

  (19) 0x40252c STR	XZR, [X6, X13,LSL #3]

  (19) 0x402530 STR	D0, [X12, X8,LSL #3]

  (19) 0x402534 STR	D1, [X7, X8,LSL #3]

  (19) 0x402538 STR	XZR, [X6, X8,LSL #3]

  (19) 0x40253c STR	D0, [X12, X9,LSL #3]

  (19) 0x402540 STR	D1, [X7, X9,LSL #3]

  (19) 0x402544 STR	XZR, [X6, X9,LSL #3]

  (19) 0x402548 STR	D0, [X12, X4,LSL #3]

  (19) 0x40254c STR	D1, [X7, X4,LSL #3]

  (19) 0x402550 STR	XZR, [X6, X4,LSL #3]

  (19) 0x402554 STR	D0, [X12, X3,LSL #3]

  (19) 0x402558 STR	D1, [X7, X3,LSL #3]

  (19) 0x40255c STR	XZR, [X6, X3,LSL #3]

  (19) 0x402560 STR	D0, [X12, X2,LSL #3]

  (19) 0x402564 STR	D1, [X7, X2,LSL #3]

  (19) 0x402568 STR	XZR, [X6, X2,LSL #3]

  (19) 0x40256c CMP	X5, X0

  (19) 0x402570 B.NE	4024ec

(18) 0x402574 B	402418

0x402578 (bad)

0x40257c (bad)

Coverage (%)	Name	Source Location	Module
►98.47+	gomp_thread_start	team.c:130	libgomp.so.1.0.0
○	start_thread		libc.so.6
○	thread_start		libc.so.6
►1.53+	GOMP_parallel	libgomp.h:980	libgomp.so.1.0.0
○	main	stream.c:282	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	stream.c:290	exec

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Source file and lines	stream.c:275-279
Module	exec

The function is defined in /home/eoseret/Tools/QaaS/qaas_runs/175-492-1446/intel/stream/build/stream/src/stream.c:275-279.

This function cannot be analyzed: at least one bad instruction.

Name	Coverage (%)	Time (s)
▼main._omp_fn.2–	0.04	0.01
▼Loop 18 - stream.c:275-279 - exec–	0.00	0.00
○Loop 20 - stream.c:277-279 - exec	0.04	0.01
○Loop 19 - stream.c:277-279 - exec	0.00	0.00

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