OV - exec - Loop 2

	Loop Id: 2	Module: exec	Source: stream.c:356-356	Coverage: 95.72%

0x4022a9 VMOVUPD	(%R8,%RCX,1),%ZMM9    [1]

0x4022b0 VFMADD213PD	(%RDI,%RCX,1),%ZMM0,%ZMM9    [2]

0x4022b7 VMOVUPD	%ZMM9,(%RSI,%RCX,1)    [3]

0x4022be VMOVUPD	0x40(%R8,%RCX,1),%ZMM10    [1]

0x4022c6 VFMADD213PD	0x40(%RDI,%RCX,1),%ZMM0,%ZMM10    [2]

0x4022ce VMOVUPD	%ZMM10,0x40(%RSI,%RCX,1)    [3]

0x4022d6 VMOVUPD	0x80(%R8,%RCX,1),%ZMM11    [1]

0x4022de VFMADD213PD	0x80(%RDI,%RCX,1),%ZMM0,%ZMM11    [2]

0x4022e6 VMOVUPD	%ZMM11,0x80(%RSI,%RCX,1)    [3]

0x4022ee VMOVUPD	0xc0(%R8,%RCX,1),%ZMM12    [1]

0x4022f6 VFMADD213PD	0xc0(%RDI,%RCX,1),%ZMM0,%ZMM12    [2]

0x4022fe VMOVUPD	%ZMM12,0xc0(%RSI,%RCX,1)    [3]

0x402306 VMOVUPD	0x100(%R8,%RCX,1),%ZMM13    [1]

0x40230e VFMADD213PD	0x100(%RDI,%RCX,1),%ZMM0,%ZMM13    [2]

0x402316 VMOVUPD	%ZMM13,0x100(%RSI,%RCX,1)    [3]

0x40231e VMOVUPD	0x140(%R8,%RCX,1),%ZMM14    [1]

0x402326 VFMADD213PD	0x140(%RDI,%RCX,1),%ZMM0,%ZMM14    [2]

0x40232e VMOVUPD	%ZMM14,0x140(%RSI,%RCX,1)    [3]

0x402336 VMOVUPD	0x180(%R8,%RCX,1),%ZMM15    [1]

0x40233e VFMADD213PD	0x180(%RDI,%RCX,1),%ZMM0,%ZMM15    [2]

0x402346 VMOVUPD	%ZMM15,0x180(%RSI,%RCX,1)    [3]

0x40234e VMOVUPD	0x1c0(%R8,%RCX,1),%ZMM2    [1]

0x402356 VFMADD213PD	0x1c0(%RDI,%RCX,1),%ZMM0,%ZMM2    [2]

0x40235e VMOVUPD	%ZMM2,0x1c0(%RSI,%RCX,1)    [3]

0x402366 ADD	$0x200,%RCX

0x40236d CMP	%R10,%RCX

0x402370 JNE	4022a9

/beegfs/hackathon/users/eoseret/qaas_runs_test/isix05.benchmarkcenter.megware.com/177-373-7249/stream-triad/build/stream-triad/src/stream.c: 356 - 356

--------------------------------------------------------------------------------

356: 	    a[j] = b[j]+scalar*c[j];

Coverage (%)	Name	Source Location	Module
○83.47	gomp_thread_start	team.c:130	libgomp.so.1.0.0
○16.53	GOMP_parallel	libgomp.h:982	libgomp.so.1.0.0

Coverage (%)	Name	Source Location	Module
○99.02	gomp_thread_start	team.c:130	libgomp.so.1.0.0

Coverage (%)	Name	Source Location	Module
○99.25	gomp_thread_start	team.c:130	libgomp.so.1.0.0

Coverage (%)	Name	Source Location	Module
○99.24	gomp_thread_start	team.c:130	libgomp.so.1.0.0

Coverage (%)	Name	Source Location	Module
○99.37	gomp_thread_start	team.c:130	libgomp.so.1.0.0

Coverage (%)	Name	Source Location	Module
○99.44	gomp_thread_start	team.c:130	libgomp.so.1.0.0

Coverage (%)	Name	Source Location	Module
○99.54	gomp_thread_start	team.c:130	libgomp.so.1.0.0

Coverage (%)	Name	Source Location	Module
○99.66	gomp_thread_start	team.c:130	libgomp.so.1.0.0

Coverage (%)	Name	Source Location	Module
○99.71	gomp_thread_start	team.c:130	libgomp.so.1.0.0

Coverage (%)	Name	Source Location	Module
○99.61	gomp_thread_start	team.c:130	libgomp.so.1.0.0

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Metric	Value
CQA speedup if no scalar integer	1.00
CQA speedup if FP arith vectorized	1.00
CQA speedup if fully vectorized	1.00
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.06
Bottlenecks	micro-operation queue,
Function	main._omp_fn.4
Source	stream.c:356-356
Source loop unroll info	not unrolled or unrolled with no peel/tail loop
Source loop unroll confidence level	max
Unroll/vectorization loop type	NA
Unroll factor	NA
CQA cycles	5.67
CQA cycles if no scalar integer	5.67
CQA cycles if FP arith vectorized	5.67
CQA cycles if fully vectorized	5.67
Front-end cycles	5.67
P0 cycles	4.00
P1 cycles	4.00
P2 cycles	5.33
P3 cycles	5.33
P4 cycles	4.00
P5 cycles	4.00
P6 cycles	1.00
P7 cycles	4.00
P8 cycles	4.00
P9 cycles	4.00
P10 cycles	0.40
P11 cycles	5.33
DIV/SQRT cycles	0.00
Inter-iter dependencies cycles	1
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	27.00
Nb uops	26.00
Nb loads	16.00
Nb stores	8.00
Nb stack references	0.00
FLOP/cycle	22.59
Nb FLOP add-sub	0.00
Nb FLOP mul	0.00
Nb FLOP fma	64.00
Nb FLOP div	0.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	0.00
Nb FLOP rsqrt	0.00
Bytes/cycle	271.06
Bytes prefetched	0.00
Bytes loaded	1024.00
Bytes stored	512.00
Stride 0	0.00
Stride 1	3.00
Stride n	0.00
Stride unknown	0.00
Stride indirect	0.00
Vectorization ratio all	100.00
Vectorization ratio load	100.00
Vectorization ratio store	100.00
Vectorization ratio mul	NA
Vectorization ratio add_sub	NA
Vectorization ratio fma	100.00
Vectorization ratio div_sqrt	NA
Vectorization ratio other	NA
Vector-efficiency ratio all	100.00
Vector-efficiency ratio load	100.00
Vector-efficiency ratio store	100.00
Vector-efficiency ratio mul	NA
Vector-efficiency ratio add_sub	NA
Vector-efficiency ratio fma	100.00
Vector-efficiency ratio div_sqrt	NA
Vector-efficiency ratio other	NA

Metric	Value
CQA speedup if no scalar integer	1.00
CQA speedup if FP arith vectorized	1.00
CQA speedup if fully vectorized	1.00
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.06
Bottlenecks	micro-operation queue,
Function	main._omp_fn.4
Source	stream.c:356-356
Source loop unroll info	not unrolled or unrolled with no peel/tail loop
Source loop unroll confidence level	max
Unroll/vectorization loop type	NA
Unroll factor	NA
CQA cycles	5.67
CQA cycles if no scalar integer	5.67
CQA cycles if FP arith vectorized	5.67
CQA cycles if fully vectorized	5.67
Front-end cycles	5.67
P0 cycles	4.00
P1 cycles	4.00
P2 cycles	5.33
P3 cycles	5.33
P4 cycles	4.00
P5 cycles	4.00
P6 cycles	1.00
P7 cycles	4.00
P8 cycles	4.00
P9 cycles	4.00
P10 cycles	0.40
P11 cycles	5.33
DIV/SQRT cycles	0.00
Inter-iter dependencies cycles	1
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	27.00
Nb uops	26.00
Nb loads	16.00
Nb stores	8.00
Nb stack references	0.00
FLOP/cycle	22.59
Nb FLOP add-sub	0.00
Nb FLOP mul	0.00
Nb FLOP fma	64.00
Nb FLOP div	0.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	0.00
Nb FLOP rsqrt	0.00
Bytes/cycle	271.06
Bytes prefetched	0.00
Bytes loaded	1024.00
Bytes stored	512.00
Stride 0	0.00
Stride 1	3.00
Stride n	0.00
Stride unknown	0.00
Stride indirect	0.00
Vectorization ratio all	100.00
Vectorization ratio load	100.00
Vectorization ratio store	100.00
Vectorization ratio mul	NA
Vectorization ratio add_sub	NA
Vectorization ratio fma	100.00
Vectorization ratio div_sqrt	NA
Vectorization ratio other	NA
Vector-efficiency ratio all	100.00
Vector-efficiency ratio load	100.00
Vector-efficiency ratio store	100.00
Vector-efficiency ratio mul	NA
Vector-efficiency ratio add_sub	NA
Vector-efficiency ratio fma	100.00
Vector-efficiency ratio div_sqrt	NA
Vector-efficiency ratio other	NA

Path /

Average path: Display a virtual path defined by average values of all real paths

Function	main._omp_fn.4
Source file and lines	stream.c:356-356
Module	exec

The loop is defined in /beegfs/hackathon/users/eoseret/qaas_runs_test/isix05.benchmarkcenter.megware.com/177-373-7249/stream-triad/build/stream-triad/src/stream.c:356.

The related source loop is not unrolled or unrolled with no peel/tail loop.

gain
potential
hint
expert

Vectorization

Your loop is fully vectorized, using full register length.

Details

All SSE/AVX instructions are used in vector version (process two or more data elements in vector registers).

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

FMA

Detected 64 FMA (fused multiply-add) operations.

Type of elements and instruction set

8 AVX-512 instructions are processing arithmetic or math operations on double precision FP elements in vector mode (eight at a time).

Matching between your loop (in the source code) and the binary loop

The binary loop is composed of 128 FP arithmetical operations:

64: addition or subtraction (all inside FMA instructions)
64: multiply (all inside FMA instructions)

The binary loop is loading 1024 bytes (128 double precision FP elements). The binary loop is storing 512 bytes (64 double precision FP elements).

Arithmetic intensity

Arithmetic intensity is 0.08 FP operations per loaded or stored byte.

Unroll opportunity

Loop is data access bound.

Workaround

Unroll your loop if trip count is significantly higher than target unroll factor and if some data references are common to consecutive iterations. This can be done manually. Or by recompiling with -funroll-loops and/or -floop-unroll-and-jam. Or with the unroll (resp. unroll_and_jam) directive on top of the inner (resp. surrounding) loop. You can enforce an unroll factor: #pragma GCC unroll N

General properties

nb instructions	27
nb uops	26
loop length	205
used x86 registers	5
used mmx registers	0
used xmm registers	0
used ymm registers	0
used zmm registers	9
nb stack references	0

Front-end

ASSUMED MACRO FUSION FIT IN UOP CACHE

micro-operation queue	5.67 cycles
front end	5.67 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11
uops	4.00	0.60	5.33	5.33	4.00	4.00	1.00	4.00	4.00	4.00	0.40	5.33
cycles	4.00	4.00	5.33	5.33	4.00	4.00	1.00	4.00	4.00	4.00	0.40	5.33

Execution ports to units layout:

P0 (256 bits): VPU, BRU, ALU, DIV/SQRT
P1 (256 bits): ALU, VPU
P2 (512 bits): load
P3 (512 bits): load
P4 (512 bits): store data
P5 (512 bits): ALU, VPU
P6: ALU, BRU
P7: store address
P8: store address
P9 (512 bits): store data
P10: ALU
P11 (512 bits): load

Cycles executing div or sqrt instructions	NA
Longest recurrence chain latency (RecMII)	1.00

Cycles summary

Front-end	5.67
Dispatch	5.33
Data deps.	1.00
Overall L1	5.67

Vectorization ratios

all	100%
load	100%
store	100%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	100%
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	NA (no other vectorizable/vectorized instructions)

Vector efficiency ratios

all	100%
load	100%
store	100%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	100%
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	NA (no other vectorizable/vectorized instructions)

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 5.67 cycles. At this rate:

94% of peak load performance is reached (180.71 out of 192.00 bytes loaded per cycle (GB/s @ 1GHz))
70% of peak store performance is reached (90.35 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Performance is limited by instruction throughput (loading/decoding program instructions to execution core) (front-end is a bottleneck). By removing all these bottlenecks, you can lower the cost of an iteration from 5.67 to 5.33 cycles (1.06x speedup).

ASM code

In the binary file, the address of the loop is: 4022a9

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	Latency	Recip. throughput	Vectorization
VMOVUPD (%R8,%RCX,1),%ZMM9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	0-1	0.50	vect (100.0%)
VFMADD213PD (%RDI,%RCX,1),%ZMM0,%ZMM9	1	0.50	0	0.33	0.33	0	0.50	0	0	0	0	0	0.33	4	0.50	vect (100.0%)
VMOVUPD %ZMM9,(%RSI,%RCX,1)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	1	vect (100.0%)
VMOVUPD 0x40(%R8,%RCX,1),%ZMM10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	0-1	0.50	vect (100.0%)
VFMADD213PD 0x40(%RDI,%RCX,1),%ZMM0,%ZMM10	1	0.50	0	0.33	0.33	0	0.50	0	0	0	0	0	0.33	4	0.50	vect (100.0%)
VMOVUPD %ZMM10,0x40(%RSI,%RCX,1)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	1	vect (100.0%)
VMOVUPD 0x80(%R8,%RCX,1),%ZMM11	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	0-1	0.50	vect (100.0%)
VFMADD213PD 0x80(%RDI,%RCX,1),%ZMM0,%ZMM11	1	0.50	0	0.33	0.33	0	0.50	0	0	0	0	0	0.33	4	0.50	vect (100.0%)
VMOVUPD %ZMM11,0x80(%RSI,%RCX,1)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	1	vect (100.0%)
VMOVUPD 0xc0(%R8,%RCX,1),%ZMM12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	0-1	0.50	vect (100.0%)
VFMADD213PD 0xc0(%RDI,%RCX,1),%ZMM0,%ZMM12	1	0.50	0	0.33	0.33	0	0.50	0	0	0	0	0	0.33	4	0.50	vect (100.0%)
VMOVUPD %ZMM12,0xc0(%RSI,%RCX,1)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	1	vect (100.0%)
VMOVUPD 0x100(%R8,%RCX,1),%ZMM13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	0-1	0.50	vect (100.0%)
VFMADD213PD 0x100(%RDI,%RCX,1),%ZMM0,%ZMM13	1	0.50	0	0.33	0.33	0	0.50	0	0	0	0	0	0.33	4	0.50	vect (100.0%)
VMOVUPD %ZMM13,0x100(%RSI,%RCX,1)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	1	vect (100.0%)
VMOVUPD 0x140(%R8,%RCX,1),%ZMM14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	0-1	0.50	vect (100.0%)
VFMADD213PD 0x140(%RDI,%RCX,1),%ZMM0,%ZMM14	1	0.50	0	0.33	0.33	0	0.50	0	0	0	0	0	0.33	4	0.50	vect (100.0%)
VMOVUPD %ZMM14,0x140(%RSI,%RCX,1)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	1	vect (100.0%)
VMOVUPD 0x180(%R8,%RCX,1),%ZMM15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	0-1	0.50	vect (100.0%)
VFMADD213PD 0x180(%RDI,%RCX,1),%ZMM0,%ZMM15	1	0.50	0	0.33	0.33	0	0.50	0	0	0	0	0	0.33	4	0.50	vect (100.0%)
VMOVUPD %ZMM15,0x180(%RSI,%RCX,1)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	1	vect (100.0%)
VMOVUPD 0x1c0(%R8,%RCX,1),%ZMM2	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	0-1	0.50	vect (100.0%)
VFMADD213PD 0x1c0(%RDI,%RCX,1),%ZMM0,%ZMM2	1	0.50	0	0.33	0.33	0	0.50	0	0	0	0	0	0.33	4	0.50	vect (100.0%)
VMOVUPD %ZMM2,0x1c0(%RSI,%RCX,1)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	1	vect (100.0%)
ADD $0x200,%RCX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
CMP %R10,%RCX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
JNE 4022a9 <main._omp_fn.4+0x1a9>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A

Function	main._omp_fn.4
Source file and lines	stream.c:356-356
Module	exec

gain
potential
hint
expert

Vectorization

Your loop is fully vectorized, using full register length.

Details

All SSE/AVX instructions are used in vector version (process two or more data elements in vector registers).

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

FMA

Detected 64 FMA (fused multiply-add) operations.

Type of elements and instruction set

8 AVX-512 instructions are processing arithmetic or math operations on double precision FP elements in vector mode (eight at a time).

Matching between your loop (in the source code) and the binary loop

The binary loop is composed of 128 FP arithmetical operations:

64: addition or subtraction (all inside FMA instructions)
64: multiply (all inside FMA instructions)

The binary loop is loading 1024 bytes (128 double precision FP elements). The binary loop is storing 512 bytes (64 double precision FP elements).

Arithmetic intensity

Arithmetic intensity is 0.08 FP operations per loaded or stored byte.

Unroll opportunity

Loop is data access bound.

Workaround

General properties

nb instructions	27
nb uops	26
loop length	205
used x86 registers	5
used mmx registers	0
used xmm registers	0
used ymm registers	0
used zmm registers	9
nb stack references	0

Front-end

ASSUMED MACRO FUSION FIT IN UOP CACHE

micro-operation queue	5.67 cycles
front end	5.67 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11
uops	4.00	0.60	5.33	5.33	4.00	4.00	1.00	4.00	4.00	4.00	0.40	5.33
cycles	4.00	4.00	5.33	5.33	4.00	4.00	1.00	4.00	4.00	4.00	0.40	5.33

Execution ports to units layout:

P0 (256 bits): VPU, BRU, ALU, DIV/SQRT
P1 (256 bits): ALU, VPU
P2 (512 bits): load
P3 (512 bits): load
P4 (512 bits): store data
P5 (512 bits): ALU, VPU
P6: ALU, BRU
P7: store address
P8: store address
P9 (512 bits): store data
P10: ALU
P11 (512 bits): load

Cycles executing div or sqrt instructions	NA
Longest recurrence chain latency (RecMII)	1.00

Cycles summary

Front-end	5.67
Dispatch	5.33
Data deps.	1.00
Overall L1	5.67

Vectorization ratios

all	100%
load	100%
store	100%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	100%
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	NA (no other vectorizable/vectorized instructions)

Vector efficiency ratios

all	100%
load	100%
store	100%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	100%
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	NA (no other vectorizable/vectorized instructions)

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 5.67 cycles. At this rate:

94% of peak load performance is reached (180.71 out of 192.00 bytes loaded per cycle (GB/s @ 1GHz))
70% of peak store performance is reached (90.35 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

ASM code

In the binary file, the address of the loop is: 4022a9

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	Latency	Recip. throughput	Vectorization
VMOVUPD (%R8,%RCX,1),%ZMM9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	0-1	0.50	vect (100.0%)
VFMADD213PD (%RDI,%RCX,1),%ZMM0,%ZMM9	1	0.50	0	0.33	0.33	0	0.50	0	0	0	0	0	0.33	4	0.50	vect (100.0%)
VMOVUPD %ZMM9,(%RSI,%RCX,1)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	1	vect (100.0%)
VMOVUPD 0x40(%R8,%RCX,1),%ZMM10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	0-1	0.50	vect (100.0%)
VFMADD213PD 0x40(%RDI,%RCX,1),%ZMM0,%ZMM10	1	0.50	0	0.33	0.33	0	0.50	0	0	0	0	0	0.33	4	0.50	vect (100.0%)
VMOVUPD %ZMM10,0x40(%RSI,%RCX,1)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	1	vect (100.0%)
VMOVUPD 0x80(%R8,%RCX,1),%ZMM11	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	0-1	0.50	vect (100.0%)
VFMADD213PD 0x80(%RDI,%RCX,1),%ZMM0,%ZMM11	1	0.50	0	0.33	0.33	0	0.50	0	0	0	0	0	0.33	4	0.50	vect (100.0%)
VMOVUPD %ZMM11,0x80(%RSI,%RCX,1)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	1	vect (100.0%)
VMOVUPD 0xc0(%R8,%RCX,1),%ZMM12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	0-1	0.50	vect (100.0%)
VFMADD213PD 0xc0(%RDI,%RCX,1),%ZMM0,%ZMM12	1	0.50	0	0.33	0.33	0	0.50	0	0	0	0	0	0.33	4	0.50	vect (100.0%)
VMOVUPD %ZMM12,0xc0(%RSI,%RCX,1)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	1	vect (100.0%)
VMOVUPD 0x100(%R8,%RCX,1),%ZMM13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	0-1	0.50	vect (100.0%)
VFMADD213PD 0x100(%RDI,%RCX,1),%ZMM0,%ZMM13	1	0.50	0	0.33	0.33	0	0.50	0	0	0	0	0	0.33	4	0.50	vect (100.0%)
VMOVUPD %ZMM13,0x100(%RSI,%RCX,1)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	1	vect (100.0%)
VMOVUPD 0x140(%R8,%RCX,1),%ZMM14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	0-1	0.50	vect (100.0%)
VFMADD213PD 0x140(%RDI,%RCX,1),%ZMM0,%ZMM14	1	0.50	0	0.33	0.33	0	0.50	0	0	0	0	0	0.33	4	0.50	vect (100.0%)
VMOVUPD %ZMM14,0x140(%RSI,%RCX,1)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	1	vect (100.0%)
VMOVUPD 0x180(%R8,%RCX,1),%ZMM15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	0-1	0.50	vect (100.0%)
VFMADD213PD 0x180(%RDI,%RCX,1),%ZMM0,%ZMM15	1	0.50	0	0.33	0.33	0	0.50	0	0	0	0	0	0.33	4	0.50	vect (100.0%)
VMOVUPD %ZMM15,0x180(%RSI,%RCX,1)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	1	vect (100.0%)
VMOVUPD 0x1c0(%R8,%RCX,1),%ZMM2	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	0-1	0.50	vect (100.0%)
VFMADD213PD 0x1c0(%RDI,%RCX,1),%ZMM0,%ZMM2	1	0.50	0	0.33	0.33	0	0.50	0	0	0	0	0	0.33	4	0.50	vect (100.0%)
VMOVUPD %ZMM2,0x1c0(%RSI,%RCX,1)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	1	vect (100.0%)
ADD $0x200,%RCX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
CMP %R10,%RCX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
JNE 4022a9 <main._omp_fn.4+0x1a9>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A

▶Scalability Runs Description

Run 1x6	Number processes: 1Number nodes: NANumber processes per node: 1Run Command: <executable>MPI Command: mpirun -n <number_processes> --bind-to none --report-bindings Dataset: Run Directory: /beegfs/hackathon/users/eoseret/qaas_runs_test/isix05.benchmarkcenter.megware.com/177-373-7249/stream-triad/run/oneview_runs/multicore/gcc_2/oneview_run_1773738055OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threadsOMP_NUM_THREADS: 6
Run 1x96	Number processes: 1Number processes per node: 1Run Command: <executable>MPI Command: mpirun -n <number_processes> --bind-to none --report-bindings Dataset: Run Directory: /beegfs/hackathon/users/eoseret/qaas_runs_test/isix05.benchmarkcenter.megware.com/177-373-7249/stream-triad/run/oneview_runs/multicore/gcc_2/oneview_run_1773738055OMP_NUM_THREADS: 96OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads
Run 1x120	Number processes: 1Number processes per node: 1Run Command: <executable>MPI Command: mpirun -n <number_processes> --bind-to none --report-bindings Dataset: Run Directory: /beegfs/hackathon/users/eoseret/qaas_runs_test/isix05.benchmarkcenter.megware.com/177-373-7249/stream-triad/run/oneview_runs/multicore/gcc_2/oneview_run_1773738055OMP_NUM_THREADS: 120OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads
Run 1x126	Number processes: 1Number processes per node: 1Run Command: <executable>MPI Command: mpirun -n <number_processes> --bind-to none --report-bindings Dataset: Run Directory: /beegfs/hackathon/users/eoseret/qaas_runs_test/isix05.benchmarkcenter.megware.com/177-373-7249/stream-triad/run/oneview_runs/multicore/gcc_2/oneview_run_1773738055OMP_NUM_THREADS: 126OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads
Run 1x144	Number processes: 1Number processes per node: 1Run Command: <executable>MPI Command: mpirun -n <number_processes> --bind-to none --report-bindings Dataset: Run Directory: /beegfs/hackathon/users/eoseret/qaas_runs_test/isix05.benchmarkcenter.megware.com/177-373-7249/stream-triad/run/oneview_runs/multicore/gcc_2/oneview_run_1773738055OMP_NUM_THREADS: 144OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads
Run 1x168	Number processes: 1Number processes per node: 1Run Command: <executable>MPI Command: mpirun -n <number_processes> --bind-to none --report-bindings Dataset: Run Directory: /beegfs/hackathon/users/eoseret/qaas_runs_test/isix05.benchmarkcenter.megware.com/177-373-7249/stream-triad/run/oneview_runs/multicore/gcc_2/oneview_run_1773738055OMP_NUM_THREADS: 168OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads
Run 1x192	Number processes: 1Number processes per node: 1Run Command: <executable>MPI Command: mpirun -n <number_processes> --bind-to none --report-bindings Dataset: Run Directory: /beegfs/hackathon/users/eoseret/qaas_runs_test/isix05.benchmarkcenter.megware.com/177-373-7249/stream-triad/run/oneview_runs/multicore/gcc_2/oneview_run_1773738055OMP_NUM_THREADS: 192OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads
Run 1x216	Number processes: 1Number processes per node: 1Run Command: <executable>MPI Command: mpirun -n <number_processes> --bind-to none --report-bindings Dataset: Run Directory: /beegfs/hackathon/users/eoseret/qaas_runs_test/isix05.benchmarkcenter.megware.com/177-373-7249/stream-triad/run/oneview_runs/multicore/gcc_2/oneview_run_1773738055OMP_NUM_THREADS: 216OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads
Run 1x240	Number processes: 1Number processes per node: 1Run Command: <executable>MPI Command: mpirun -n <number_processes> --bind-to none --report-bindings Dataset: Run Directory: /beegfs/hackathon/users/eoseret/qaas_runs_test/isix05.benchmarkcenter.megware.com/177-373-7249/stream-triad/run/oneview_runs/multicore/gcc_2/oneview_run_1773738055OMP_NUM_THREADS: 240OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads
Run 1x256	Number processes: 1Number processes per node: 1Run Command: <executable>MPI Command: mpirun -n <number_processes> --bind-to none --report-bindings Dataset: Run Directory: /beegfs/hackathon/users/eoseret/qaas_runs_test/isix05.benchmarkcenter.megware.com/177-373-7249/stream-triad/run/oneview_runs/multicore/gcc_2/oneview_run_1773738055OMP_NUM_THREADS: 256OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads

(1x6) Efficiency	(1x6) Potential Speed-Up (%)	(1x96) Efficiency	(1x96) Potential Speed-Up (%)	(1x120) Efficiency	(1x120) Potential Speed-Up (%)	(1x126) Efficiency	(1x126) Potential Speed-Up (%)	(1x144) Efficiency	(1x144) Potential Speed-Up (%)	(1x168) Efficiency	(1x168) Potential Speed-Up (%)	(1x192) Efficiency	(1x192) Potential Speed-Up (%)	(1x216) Efficiency	(1x216) Potential Speed-Up (%)	(1x240) Efficiency	(1x240) Potential Speed-Up (%)	(1x256) Efficiency	(1x256) Potential Speed-Up (%)
1	0	0.55	38.91	0.45	48.75	0.42	52.72	0.35	55.62	0.32	63.64	0.24	63.66	0.23	68.57	0.22	71.26	0.21	74.51

Speed-Up and Efficiency

▶Detailed Speed-Up and Efficiency

Run	Number of threads	Efficiency (ideal is 1)	Speedup	Ideal Speedup	Time (s)	Coverage (%)
1x6	6	1	1	1	18.910001754761	95.718460083008
1x96	96	0.55	8.79	16	2.2950003147125	86.329307556152
1x120	120	0.45	8.98	20	2.2499997615814	88.46183013916
1x126	126	0.42	8.85	21	2.1599998474121	91.11393737793
1x144	144	0.35	8.5	24	2.4050004482269	86.118515014648
1x168	168	0.32	8.85	28	2.0999999046326	93.075080871582
1x192	192	0.24	7.76	32	2.7299997806549	84.054710388184
1x216	216	0.23	8.11	36	2.4800000190735	88.508476257324
1x240	240	0.22	8.8	40	2.2250003814697	91.374778747559
1x256	256	0.21	8.84	42.666666666667	2.0750000476837	93.999008178711

Report Configuration

Vectorization

Details

Execution units bottlenecks

FMA

Type of elements and instruction set

Matching between your loop (in the source code) and the binary loop

Arithmetic intensity

Unroll opportunity

Workaround

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code

Vectorization

Details

Execution units bottlenecks

FMA

Type of elements and instruction set

Matching between your loop (in the source code) and the binary loop

Arithmetic intensity

Unroll opportunity

Workaround

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code

▶Scalability Runs Description

▼Columns Filter

Speed-Up and Efficiency

▶Detailed Speed-Up and Efficiency