OV - exec - Function main.omp

	Function: main.omp_outlined.27	Module: exec	Source: stream.c:342-344	Coverage (incl. loops): 95.95% \| (excl. loops): 0.00%

/beegfs/hackathon/users/eoseret/qaas_runs_test/isix03.benchmarkcenter.megware.com/177-373-7190/stream-add/build/stream-add/src/stream.c: 342 - 344

--------------------------------------------------------------------------------

342: #pragma omp parallel for

343: 	for (j=0; j<STREAM_ARRAY_SIZE; j++)

344: 	    c[j] = a[j]+b[j];

0x203450 PUSH	%RBP

0x203451 MOV	%RSP,%RBP

0x203454 PUSH	%R15

0x203456 PUSH	%R14

0x203458 PUSH	%R13

0x20345a PUSH	%R12

0x20345c PUSH	%RBX

0x20345d SUB	$0x28,%RSP

0x203461 MOVQ	$0,-0x40(%RBP)

0x203469 MOVQ	$0x3344ffff,-0x30(%RBP)

0x203471 LEA	0x31f8(%RIP),%RBX

0x203478 MOVQ	$0x1,-0x48(%RBP)

0x203480 MOVL	$0,-0x34(%RBP)

0x203487 MOV	(%RDI),%R14D

0x20348a SUB	$0x8,%RSP

0x20348e LEA	-0x48(%RBP),%RAX

0x203492 MOV	$0x1148,%RDI

0x20349c ADD	%RBX,%RDI

0x20349f LEA	-0x34(%RBP),%RCX

0x2034a3 LEA	-0x40(%RBP),%R8

0x2034a7 LEA	-0x30(%RBP),%R9

0x2034ab MOV	%R14D,%ESI

0x2034ae MOV	$0x22,%EDX

0x2034b3 PUSH	$0x1

0x2034b5 PUSH	$0x1

0x2034b7 PUSH	%RAX

0x2034b8 CALL	204470 <@plt_start@+0x80>

0x2034bd ADD	$0x20,%RSP

0x2034c1 MOV	-0x30(%RBP),%RCX

0x2034c5 CMP	$0x3344ffff,%RCX

0x2034cc MOV	$0x3344ffff,%EAX

0x2034d1 CMOVL	%RCX,%RAX

0x2034d5 MOV	%RAX,-0x30(%RBP)

0x2034d9 MOV	-0x40(%RBP),%R8

0x2034dd CMP	%RAX,%R8

0x2034e0 JG	20364d

0x2034e6 MOV	%RAX,%RDI

0x2034e9 SUB	%R8,%RDI

0x2034ec INC	%RDI

0x2034ef MOV	$0x1190,%RCX

0x2034f9 MOV	$0x19a281190,%RDX

0x203503 MOV	$0x334501190,%RSI

0x20350d CMP	$0x4,%RDI

0x203511 JAE	20351b

0x203513 MOV	%R8,%R10

0x203516 JMP	203620

0x20351b CMP	$0x20,%RDI

0x20351f JAE	203529

0x203521 XOR	%R9D,%R9D

0x203524 JMP	2035d9

0x203529 MOV	%RDI,%R9

0x20352c AND	$-0x20,%R9

0x203530 LEA	(%RBX,%RCX,1),%R10

0x203534 LEA	0xc0(%R10,%R8,8),%R10

0x20353c LEA	(%RBX,%RDX,1),%R11

0x203540 LEA	0xc0(%R11,%R8,8),%R11

0x203548 LEA	(%RBX,%RSI,1),%R15

0x20354c LEA	0xc0(%R15,%R8,8),%R15

0x203554 XOR	%R12D,%R12D

0x203557 NOPW	(%RAX,%RAX,1)

(8) 0x203560 VMOVUPD	-0xc0(%R11,%R12,8),%ZMM0

(8) 0x203568 VMOVUPD	-0x80(%R11,%R12,8),%ZMM1

(8) 0x203570 VMOVUPD	-0x40(%R11,%R12,8),%ZMM2

(8) 0x203578 VMOVUPD	(%R11,%R12,8),%ZMM3

(8) 0x20357f VADDPD	-0xc0(%R10,%R12,8),%ZMM0,%ZMM0

(8) 0x203587 VADDPD	-0x80(%R10,%R12,8),%ZMM1,%ZMM1

(8) 0x20358f VADDPD	-0x40(%R10,%R12,8),%ZMM2,%ZMM2

(8) 0x203597 VADDPD	(%R10,%R12,8),%ZMM3,%ZMM3

(8) 0x20359e VMOVUPD	%ZMM0,-0xc0(%R15,%R12,8)

(8) 0x2035a6 VMOVUPD	%ZMM1,-0x80(%R15,%R12,8)

(8) 0x2035ae VMOVUPD	%ZMM2,-0x40(%R15,%R12,8)

(8) 0x2035b6 VMOVUPD	%ZMM3,(%R15,%R12,8)

(8) 0x2035bd ADD	$0x20,%R12

(8) 0x2035c1 CMP	%R12,%R9

(8) 0x2035c4 JNE	203560

0x2035c6 CMP	%R9,%RDI

0x2035c9 JE	20364d

0x2035cf TEST	$0x1c,%DIL

0x2035d3 JE	203677

0x2035d9 MOV	%RDI,%R11

0x2035dc AND	$-0x4,%R11

0x2035e0 LEA	(%R8,%R11,1),%R10

0x2035e4 LEA	(%RBX,%RCX,1),%R15

0x2035e8 LEA	(%R15,%R8,8),%R15

0x2035ec LEA	(%RBX,%RDX,1),%R12

0x2035f0 LEA	(%R12,%R8,8),%R12

0x2035f4 LEA	(%RBX,%RSI,1),%R13

0x2035f8 LEA	(%R13,%R8,8),%R8

0x2035fd NOPL	(%RAX)

(10) 0x203600 VMOVUPD	(%R12,%R9,8),%YMM0

(10) 0x203606 VADDPD	(%R15,%R9,8),%YMM0,%YMM0

(10) 0x20360c VMOVUPD	%YMM0,(%R8,%R9,8)

(10) 0x203612 ADD	$0x4,%R9

(10) 0x203616 CMP	%R9,%R11

(10) 0x203619 JNE	203600

0x20361b CMP	%R11,%RDI

0x20361e JE	20364d

0x203620 DEC	%R10

0x203623 ADD	%RBX,%RCX

0x203626 ADD	%RBX,%RDX

0x203629 ADD	%RBX,%RSI

0x20362c NOPL	(%RAX)

(9) 0x203630 VMOVSD	0x8(%RDX,%R10,8),%XMM0

(9) 0x203637 VADDSD	0x8(%RCX,%R10,8),%XMM0,%XMM0

(9) 0x20363e VMOVSD	%XMM0,0x8(%RSI,%R10,8)

(9) 0x203645 INC	%R10

(9) 0x203648 CMP	%RAX,%R10

(9) 0x20364b JL	203630

0x20364d MOV	$0x1160,%RAX

0x203657 ADD	%RAX,%RBX

0x20365a MOV	%RBX,%RDI

0x20365d MOV	%R14D,%ESI

0x203660 VZEROUPPER

0x203663 CALL	204490 <@plt_start@+0xa0>

0x203668 ADD	$0x28,%RSP

0x20366c POP	%RBX

0x20366d POP	%R12

0x20366f POP	%R13

0x203671 POP	%R14

0x203673 POP	%R15

0x203675 POP	%RBP

0x203676 RET

0x203677 ADD	%R9,%R8

0x20367a JMP	203513

0x20367f NOP

Coverage (%)	Name	Source Location	Module
►99.67+	__kmp_invoke_microtask		libomp.so
○	__kmp_invoke_task_func		libomp.so

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run aocc_7

Source file and lines	stream.c:342-344
Module	exec

The function is defined in /beegfs/hackathon/users/eoseret/qaas_runs_test/isix03.benchmarkcenter.megware.com/177-373-7190/stream-add/build/stream-add/src/stream.c:342-344.

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Vectorization

Your function is probably not vectorized. Only 11% of vector register length is used (average across all SSE/AVX instructions). By vectorizing your function, you can lower the cost of an iteration from 16.83 to 1.20 cycles (14.00x speedup).

Details

Store and arithmetical SSE/AVX instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

unknown: 2 occurrences►
- /beegfs/hackathon/users/eoseret/qaas_runs_test/isix03.benchmarkcenter.megware.com/177-373-7190/stream-add/build/stream-add/src/stream.c:342
- /beegfs/hackathon/users/eoseret/qaas_runs_test/isix03.benchmarkcenter.megware.com/177-373-7190/stream-add/build/stream-add/src/stream.c:342

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

VZEROUPPER: 1 occurrences►
- /beegfs/hackathon/users/eoseret/qaas_runs_test/isix03.benchmarkcenter.megware.com/177-373-7190/stream-add/build/stream-add/src/stream.c:342

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 20 bytes. The binary function is storing 36 bytes.

General properties

nb instructions	98
nb uops	101
loop length	402
used x86 registers	16
used mmx registers	0
used xmm registers	0
used ymm registers	0
used zmm registers	0
nb stack references	4

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	16.83 cycles
front end	16.83 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11
uops	6.80	6.80	3.33	3.33	8.00	6.80	6.80	8.00	8.00	8.00	6.80	3.33
cycles	6.80	7.60	3.33	3.33	8.00	6.80	6.80	8.00	8.00	8.00	6.80	3.33

Execution ports to units layout:

P0 (256 bits): VPU, BRU, ALU, DIV/SQRT
P1 (256 bits): ALU, VPU
P2 (512 bits): load
P3 (512 bits): load
P4 (512 bits): store data
P5 (512 bits): ALU, VPU
P6: ALU, BRU
P7: store address
P8: store address
P9 (512 bits): store data
P10: ALU
P11 (512 bits): load

Cycles executing div or sqrt instructions

Cycles summary

Front-end	16.83
Dispatch	8.00
Overall L1	16.83

Vectorization ratios

all	5%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	14%

Vector efficiency ratios

all	11%
load	6%
store	7%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	14%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 16.83 cycles. At this rate:

0% of peak load performance is reached (1.19 out of 192.00 bytes loaded per cycle (GB/s @ 1GHz))
1% of peak store performance is reached (2.14 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Performance is limited by instruction throughput (loading/decoding program instructions to execution core) (front-end is a bottleneck). By removing all these bottlenecks, you can lower the cost of an iteration from 16.83 to 8.00 cycles (2.10x speedup).

ASM code

In the binary file, the address of the function is: 203450

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
PUSH %R15	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R14	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R13	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R12	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %RBX	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
SUB $0x28,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOVQ $0,-0x40(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOVQ $0x3344ffff,-0x30(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
LEA 0x31f8(%RIP),%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOVQ $0x1,-0x48(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOVL $0,-0x34(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOV (%RDI),%R14D	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (6.3%)
SUB $0x8,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
LEA -0x48(%RBP),%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV $0x1148,%RDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.28	N/A
ADD %RBX,%RDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
LEA -0x34(%RBP),%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA -0x40(%RBP),%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA -0x30(%RBP),%R9	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R14D,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV $0x22,%EDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
PUSH $0x1	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH $0x1	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %RAX	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
CALL 204470 <@plt_start@+0x80>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
ADD $0x20,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV -0x30(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP $0x3344ffff,%RCX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV $0x3344ffff,%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
CMOVL %RCX,%RAX	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	1	0.50	N/A
MOV %RAX,-0x30(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV -0x40(%RBP),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP %RAX,%R8	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JG 20364d <main.omp_outlined.27+0x1fd>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %RAX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB %R8,%RDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
INC %RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV $0x1190,%RCX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.28	N/A
MOV $0x19a281190,%RDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.28	N/A
MOV $0x334501190,%RSI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.28	N/A
CMP $0x4,%RDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JAE 20351b <main.omp_outlined.27+0xcb>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %R8,%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JMP 203620 <main.omp_outlined.27+0x1d0>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
CMP $0x20,%RDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JAE 203529 <main.omp_outlined.27+0xd9>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
XOR %R9D,%R9D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
JMP 2035d9 <main.omp_outlined.27+0x189>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
MOV %RDI,%R9	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
AND $-0x20,%R9	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
LEA (%RBX,%RCX,1),%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA 0xc0(%R10,%R8,8),%R10	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
LEA (%RBX,%RDX,1),%R11	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA 0xc0(%R11,%R8,8),%R11	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
LEA (%RBX,%RSI,1),%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA 0xc0(%R15,%R8,8),%R15	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
XOR %R12D,%R12D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP %R9,%RDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 20364d <main.omp_outlined.27+0x1fd>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
TEST $0x1c,%DIL	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	N/A
JE 203677 <main.omp_outlined.27+0x227>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %RDI,%R11	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
AND $-0x4,%R11	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
LEA (%R8,%R11,1),%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA (%RBX,%RCX,1),%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA (%R15,%R8,8),%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA (%RBX,%RDX,1),%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA (%R12,%R8,8),%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA (%RBX,%RSI,1),%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA (%R13,%R8,8),%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP %R11,%RDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 20364d <main.omp_outlined.27+0x1fd>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
DEC %R10	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD %RBX,%RCX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
ADD %RBX,%RDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
ADD %RBX,%RSI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV $0x1160,%RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.28	N/A
ADD %RAX,%RBX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %RBX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R14D,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
VZEROUPPER	2	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 204490 <@plt_start@+0xa0>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
ADD $0x28,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
POP %RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %RBP	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
RET	1	0.50	0	0.33	0.33	0	0	0.50	0	0	0	0	0.33	0	2.13	N/A
ADD %R9,%R8	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
JMP 203513 <main.omp_outlined.27+0xc3>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
NOP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run aocc_7

Source file and lines	stream.c:342-344
Module	exec

gain
potential
hint
expert

Vectorization

Details

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

unknown: 2 occurrences►
- /beegfs/hackathon/users/eoseret/qaas_runs_test/isix03.benchmarkcenter.megware.com/177-373-7190/stream-add/build/stream-add/src/stream.c:342
- /beegfs/hackathon/users/eoseret/qaas_runs_test/isix03.benchmarkcenter.megware.com/177-373-7190/stream-add/build/stream-add/src/stream.c:342

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

VZEROUPPER: 1 occurrences►
- /beegfs/hackathon/users/eoseret/qaas_runs_test/isix03.benchmarkcenter.megware.com/177-373-7190/stream-add/build/stream-add/src/stream.c:342

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 20 bytes. The binary function is storing 36 bytes.

General properties

nb instructions	98
nb uops	101
loop length	402
used x86 registers	16
used mmx registers	0
used xmm registers	0
used ymm registers	0
used zmm registers	0
nb stack references	4

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	16.83 cycles
front end	16.83 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11
uops	6.80	6.80	3.33	3.33	8.00	6.80	6.80	8.00	8.00	8.00	6.80	3.33
cycles	6.80	7.60	3.33	3.33	8.00	6.80	6.80	8.00	8.00	8.00	6.80	3.33

Execution ports to units layout:

P0 (256 bits): VPU, BRU, ALU, DIV/SQRT
P1 (256 bits): ALU, VPU
P2 (512 bits): load
P3 (512 bits): load
P4 (512 bits): store data
P5 (512 bits): ALU, VPU
P6: ALU, BRU
P7: store address
P8: store address
P9 (512 bits): store data
P10: ALU
P11 (512 bits): load

Cycles executing div or sqrt instructions

Cycles summary

Front-end	16.83
Dispatch	8.00
Overall L1	16.83

Vectorization ratios

all	5%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	14%

Vector efficiency ratios

all	11%
load	6%
store	7%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	14%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 16.83 cycles. At this rate:

0% of peak load performance is reached (1.19 out of 192.00 bytes loaded per cycle (GB/s @ 1GHz))
1% of peak store performance is reached (2.14 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

ASM code

In the binary file, the address of the function is: 203450

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
PUSH %R15	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R14	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R13	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R12	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %RBX	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
SUB $0x28,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOVQ $0,-0x40(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOVQ $0x3344ffff,-0x30(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
LEA 0x31f8(%RIP),%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOVQ $0x1,-0x48(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOVL $0,-0x34(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOV (%RDI),%R14D	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (6.3%)
SUB $0x8,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
LEA -0x48(%RBP),%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV $0x1148,%RDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.28	N/A
ADD %RBX,%RDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
LEA -0x34(%RBP),%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA -0x40(%RBP),%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA -0x30(%RBP),%R9	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R14D,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV $0x22,%EDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
PUSH $0x1	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH $0x1	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %RAX	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
CALL 204470 <@plt_start@+0x80>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
ADD $0x20,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV -0x30(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP $0x3344ffff,%RCX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV $0x3344ffff,%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
CMOVL %RCX,%RAX	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	1	0.50	N/A
MOV %RAX,-0x30(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV -0x40(%RBP),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP %RAX,%R8	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JG 20364d <main.omp_outlined.27+0x1fd>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %RAX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB %R8,%RDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
INC %RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV $0x1190,%RCX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.28	N/A
MOV $0x19a281190,%RDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.28	N/A
MOV $0x334501190,%RSI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.28	N/A
CMP $0x4,%RDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JAE 20351b <main.omp_outlined.27+0xcb>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %R8,%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JMP 203620 <main.omp_outlined.27+0x1d0>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
CMP $0x20,%RDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JAE 203529 <main.omp_outlined.27+0xd9>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
XOR %R9D,%R9D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
JMP 2035d9 <main.omp_outlined.27+0x189>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
MOV %RDI,%R9	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
AND $-0x20,%R9	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
LEA (%RBX,%RCX,1),%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA 0xc0(%R10,%R8,8),%R10	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
LEA (%RBX,%RDX,1),%R11	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA 0xc0(%R11,%R8,8),%R11	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
LEA (%RBX,%RSI,1),%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA 0xc0(%R15,%R8,8),%R15	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
XOR %R12D,%R12D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP %R9,%RDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 20364d <main.omp_outlined.27+0x1fd>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
TEST $0x1c,%DIL	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	N/A
JE 203677 <main.omp_outlined.27+0x227>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %RDI,%R11	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
AND $-0x4,%R11	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
LEA (%R8,%R11,1),%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA (%RBX,%RCX,1),%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA (%R15,%R8,8),%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA (%RBX,%RDX,1),%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA (%R12,%R8,8),%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA (%RBX,%RSI,1),%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA (%R13,%R8,8),%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP %R11,%RDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JE 20364d <main.omp_outlined.27+0x1fd>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
DEC %R10	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD %RBX,%RCX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
ADD %RBX,%RDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
ADD %RBX,%RSI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV $0x1160,%RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.28	N/A
ADD %RAX,%RBX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %RBX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R14D,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
VZEROUPPER	2	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 204490 <@plt_start@+0xa0>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
ADD $0x28,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
POP %RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %RBP	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
RET	1	0.50	0	0.33	0.33	0	0	0.50	0	0	0	0	0.33	0	2.13	N/A
ADD %R9,%R8	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
JMP 203513 <main.omp_outlined.27+0xc3>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
NOP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A

Name	Coverage (%)	Time (s)
▼main.omp_outlined.27–	95.95	3.43
○Loop 8 - stream.c:344-344 - exec	95.95	3.33
○Loop 9 - stream.c:343-344 - exec	0.00	0.00
○Loop 10 - stream.c:344-344 - exec	0.00	0.00

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Matching between your function (in the source code) and the binary function

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Vector efficiency ratios

Cycles and memory resources usage

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