Loop Id: 3 | Module: exec | Source: Step10_orig.c:19-35 [...] | Coverage: 19.44% |
---|
Loop Id: 3 | Module: exec | Source: Step10_orig.c:19-35 [...] | Coverage: 19.44% |
---|
0x202200 VMOVSS %XMM0,-0x50(%RBP) [3] |
0x202205 VADDSS -0x38(%RBP),%XMM2,%XMM0 [3] |
0x20220a VMOVSD -0x18d2(%RIP),%XMM1 [2] |
0x202212 VMOVSS %XMM2,-0x4c(%RBP) [3] |
0x202217 VCVTSS2SD %XMM0,%XMM0,%XMM0 |
0x20221b CALL 202600 <@plt_start@+0x90> |
0x202220 VMOVSS -0x4c(%RBP),%XMM2 [3] |
0x202225 VMOVSS -0x1935(%RIP),%XMM1 [2] |
0x20222d ADD $0x4,%R12 |
0x202231 VFMADD213SS -0x1932(%RIP),%XMM2,%XMM1 [2] |
0x20223a VFMADD213SS -0x1937(%RIP),%XMM2,%XMM1 [2] |
0x202243 VFMADD213SS -0x194c(%RIP),%XMM2,%XMM1 [2] |
0x20224c VFMADD213SS -0x1965(%RIP),%XMM2,%XMM1 [2] |
0x202255 VFMADD213SS -0x195a(%RIP),%XMM2,%XMM1 [2] |
0x20225e VCVTSS2SD %XMM1,%XMM1,%XMM1 |
0x202262 VSUBSD %XMM1,%XMM0,%XMM0 |
0x202266 VCVTSD2SS %XMM0,%XMM0,%XMM0 |
0x20226a VMULSS -0x50(%RBP),%XMM0,%XMM0 [3] |
0x20226f VCMPSS $0xe,-0x197e(%RIP),%XMM2,%K1 [2] |
0x20227a VMOVSS -0x60(%RBP),%XMM3 [3] |
0x20227f VMOVSS -0x64(%RBP),%XMM2 [3] |
0x202284 VMOVSS -0x68(%RBP),%XMM1 [3] |
0x202289 VMOVSS %XMM0,%XMM0,%XMM0{%K1}{z} |
0x20228f VFMADD231SS -0x5c(%RBP),%XMM0,%XMM3 [3] |
0x202295 VFMADD231SS -0x58(%RBP),%XMM0,%XMM2 [3] |
0x20229b VFMADD231SS -0x54(%RBP),%XMM0,%XMM1 [3] |
0x2022a1 CMP %R12,%RBX |
0x2022a4 JE 202140 |
0x2022aa VMOVSS 0x204880(%R12),%XMM0 [1] |
0x2022b4 VMOVSS %XMM1,-0x68(%RBP) [3] |
0x2022b9 VMOVSS %XMM2,-0x64(%RBP) [3] |
0x2022be VMOVSS %XMM3,-0x60(%RBP) [3] |
0x2022c3 VSUBSS -0x48(%RBP),%XMM0,%XMM1 [3] |
0x2022c8 VMOVSS 0x266300(%R12),%XMM0 [1] |
0x2022d2 VSUBSS -0x44(%RBP),%XMM0,%XMM2 [3] |
0x2022d7 VMOVSS 0x2c7d80(%R12),%XMM0 [1] |
0x2022e1 VSUBSS -0x40(%RBP),%XMM0,%XMM0 [3] |
0x2022e6 VMOVSS %XMM1,-0x5c(%RBP) [3] |
0x2022eb VMOVSS %XMM2,-0x58(%RBP) [3] |
0x2022f0 VMULSS %XMM2,%XMM2,%XMM2 |
0x2022f4 VMOVSS %XMM0,-0x54(%RBP) [3] |
0x2022f9 VFMADD231SS %XMM1,%XMM1,%XMM2 |
0x2022fe VFMADD231SS %XMM0,%XMM0,%XMM2 |
0x202303 VMOVSS -0x3c(%RBP),%XMM0 [3] |
0x202308 VUCOMISS %XMM2,%XMM0 |
0x20230c VXORPS %XMM0,%XMM0,%XMM0 |
0x202310 JBE 202200 |
0x202316 VMOVSS 0x329800(%R12),%XMM0 [1] |
0x202320 JMP 202200 |
/home/eoseret/qaas_runs_CPU_9468/172-289-8348/intel/HACCmk/build/HACCmk/src/main.c: 142 - 142 |
-------------------------------------------------------------------------------- |
142: Step10_orig( n, xx[i], yy[i], zz[i], fsrrmax2, mp_rsm2, xx, yy, zz, mass, &dx1, &dy1, &dz1 ); |
/home/eoseret/qaas_runs_CPU_9468/172-289-8348/intel/HACCmk/build/HACCmk/src/Step10_orig.c: 19 - 35 |
-------------------------------------------------------------------------------- |
19: for ( j = 0; j < count1; j++ ) |
20: { |
21: dxc = xx1[j] - xxi; |
22: dyc = yy1[j] - yyi; |
23: dzc = zz1[j] - zzi; |
24: |
25: r2 = dxc * dxc + dyc * dyc + dzc * dzc; |
26: |
27: m = ( r2 < fsrrmax2 ) ? mass1[j] : 0.0f; |
28: |
29: f = pow( r2 + mp_rsm2, -1.5 ) - ( ma0 + r2*(ma1 + r2*(ma2 + r2*(ma3 + r2*(ma4 + r2*ma5))))); |
30: |
31: f = ( r2 > 0.0f ) ? m * f : 0.0f; |
32: |
33: xi = xi + f * dxc; |
34: yi = yi + f * dyc; |
35: zi = zi + f * dzc; |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►100.00+ | __kmp_invoke_microtask | libomp.so | |
○ | __kmp_invoke_task_func | libomp.so |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.03 |
CQA speedup if FP arith vectorized | 1.03 |
CQA speedup if fully vectorized | 8.93 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.31 |
Bottlenecks | |
Function | .omp_outlined..6 |
Source | main.c:142-142,Step10_orig.c:19-35 |
Source loop unroll info | not unrolled or unrolled with no peel/tail loop |
Source loop unroll confidence level | max |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 11.17 |
CQA cycles if no scalar integer | 10.83 |
CQA cycles if FP arith vectorized | 10.85 |
CQA cycles if fully vectorized | 1.25 |
Front-end cycles | 8.50 |
P0 cycles | 1.75 |
P1 cycles | 0.75 |
P2 cycles | 0.75 |
P3 cycles | 0.50 |
P4 cycles | 1.75 |
P5 cycles | 11.17 |
P6 cycles | 11.17 |
P7 cycles | 11.17 |
P8 cycles | 6.50 |
P9 cycles | 6.50 |
P10 cycles | 5.00 |
P11 cycles | 5.00 |
P12 cycles | 4.50 |
P13 cycles | 4.50 |
DIV/SQRT cycles | 0.00 |
Inter-iter dependencies cycles | 0 |
FE+BE cycles (UFS) | NA |
Stall cycles (UFS) | NA |
Nb insns | 48.00 |
Nb uops | 51.00 |
Nb loads | 24.50 |
Nb stores | 8.00 |
Nb stack references | 13.00 |
FLOP/cycle | 2.42 |
Nb FLOP add-sub | 5.00 |
Nb FLOP mul | 2.00 |
Nb FLOP fma | 10.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 12.00 |
Bytes prefetched | 0.00 |
Bytes loaded | 102.00 |
Bytes stored | 32.00 |
Stride 0 | 2.00 |
Stride 1 | 0.00 |
Stride n | 1.00 |
Stride unknown | 0.00 |
Stride indirect | 0.00 |
Vectorization ratio all | 2.35 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | 0.00 |
Vectorization ratio add_sub | 0.00 |
Vectorization ratio fma | 0.00 |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 14.29 |
Vector-efficiency ratio all | 7.13 |
Vector-efficiency ratio load | 6.51 |
Vector-efficiency ratio store | 6.25 |
Vector-efficiency ratio mul | 6.25 |
Vector-efficiency ratio add_sub | 7.50 |
Vector-efficiency ratio fma | 6.25 |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 9.82 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.03 |
CQA speedup if FP arith vectorized | 1.03 |
CQA speedup if fully vectorized | 8.92 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.31 |
Bottlenecks | P5, P6, P7, |
Function | .omp_outlined..6 |
Source | main.c:142-142,Step10_orig.c:19-35 |
Source loop unroll info | not unrolled or unrolled with no peel/tail loop |
Source loop unroll confidence level | max |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 11.33 |
CQA cycles if no scalar integer | 11.00 |
CQA cycles if FP arith vectorized | 11.02 |
CQA cycles if fully vectorized | 1.27 |
Front-end cycles | 8.67 |
P0 cycles | 2.00 |
P1 cycles | 0.75 |
P2 cycles | 0.75 |
P3 cycles | 0.50 |
P4 cycles | 2.00 |
P5 cycles | 11.33 |
P6 cycles | 11.33 |
P7 cycles | 11.33 |
P8 cycles | 6.50 |
P9 cycles | 6.50 |
P10 cycles | 5.00 |
P11 cycles | 5.00 |
P12 cycles | 4.50 |
P13 cycles | 4.50 |
DIV/SQRT cycles | 0.00 |
Inter-iter dependencies cycles | 0 |
FE+BE cycles (UFS) | NA |
Stall cycles (UFS) | NA |
Nb insns | 49.00 |
Nb uops | 52.00 |
Nb loads | 25.00 |
Nb stores | 8.00 |
Nb stack references | 13.00 |
FLOP/cycle | 2.38 |
Nb FLOP add-sub | 5.00 |
Nb FLOP mul | 2.00 |
Nb FLOP fma | 10.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 12.00 |
Bytes prefetched | 0.00 |
Bytes loaded | 104.00 |
Bytes stored | 32.00 |
Stride 0 | 2.00 |
Stride 1 | 0.00 |
Stride n | 1.00 |
Stride unknown | 0.00 |
Stride indirect | 0.00 |
Vectorization ratio all | 2.33 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | 0.00 |
Vectorization ratio add_sub | 0.00 |
Vectorization ratio fma | 0.00 |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 14.29 |
Vector-efficiency ratio all | 7.12 |
Vector-efficiency ratio load | 6.50 |
Vector-efficiency ratio store | 6.25 |
Vector-efficiency ratio mul | 6.25 |
Vector-efficiency ratio add_sub | 7.50 |
Vector-efficiency ratio fma | 6.25 |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 9.82 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.03 |
CQA speedup if FP arith vectorized | 1.03 |
CQA speedup if fully vectorized | 8.95 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.32 |
Bottlenecks | P5, P6, P7, |
Function | .omp_outlined..6 |
Source | main.c:142-142,Step10_orig.c:19-35 |
Source loop unroll info | not unrolled or unrolled with no peel/tail loop |
Source loop unroll confidence level | max |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 11.00 |
CQA cycles if no scalar integer | 10.67 |
CQA cycles if FP arith vectorized | 10.69 |
CQA cycles if fully vectorized | 1.23 |
Front-end cycles | 8.33 |
P0 cycles | 1.50 |
P1 cycles | 0.75 |
P2 cycles | 0.75 |
P3 cycles | 0.50 |
P4 cycles | 1.50 |
P5 cycles | 11.00 |
P6 cycles | 11.00 |
P7 cycles | 11.00 |
P8 cycles | 6.50 |
P9 cycles | 6.50 |
P10 cycles | 5.00 |
P11 cycles | 5.00 |
P12 cycles | 4.50 |
P13 cycles | 4.50 |
DIV/SQRT cycles | 0.00 |
Inter-iter dependencies cycles | 0 |
FE+BE cycles (UFS) | NA |
Stall cycles (UFS) | NA |
Nb insns | 47.00 |
Nb uops | 50.00 |
Nb loads | 24.00 |
Nb stores | 8.00 |
Nb stack references | 13.00 |
FLOP/cycle | 2.45 |
Nb FLOP add-sub | 5.00 |
Nb FLOP mul | 2.00 |
Nb FLOP fma | 10.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 12.00 |
Bytes prefetched | 0.00 |
Bytes loaded | 100.00 |
Bytes stored | 32.00 |
Stride 0 | 2.00 |
Stride 1 | 0.00 |
Stride n | 1.00 |
Stride unknown | 0.00 |
Stride indirect | 0.00 |
Vectorization ratio all | 2.38 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | 0.00 |
Vectorization ratio add_sub | 0.00 |
Vectorization ratio fma | 0.00 |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 14.29 |
Vector-efficiency ratio all | 7.14 |
Vector-efficiency ratio load | 6.51 |
Vector-efficiency ratio store | 6.25 |
Vector-efficiency ratio mul | 6.25 |
Vector-efficiency ratio add_sub | 7.50 |
Vector-efficiency ratio fma | 6.25 |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 9.82 |
Path / |
Function | .omp_outlined..6 |
Source file and lines | Step10_orig.c:19-35 |
Module | exec |
nb instructions | 48 |
nb uops | 51 |
loop length | 285.50 |
used x86 registers | 3 |
used mmx registers | 0 |
used xmm registers | 4 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 13 |
ADD-SUB / MUL ratio | 2.50 |
micro-operation queue | 8.50 cycles |
front end | 8.50 cycles |
ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 1.75 | 0.75 | 0.75 | 0.50 | 1.75 | 11.17 | 11.17 | 11.17 | 6.50 | 6.50 | 5.00 | 5.00 | 4.50 | 4.50 |
cycles | 1.75 | 0.75 | 0.75 | 0.50 | 1.75 | 11.17 | 11.17 | 11.17 | 6.50 | 6.50 | 5.00 | 5.00 | 4.50 | 4.50 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 0.00 |
Front-end | 8.50 |
Dispatch | 11.17 |
Data deps. | 0.00 |
Overall L1 | 11.17 |
all | 2% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | 0% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 14% |
all | 7% |
load | 6% |
store | 6% |
mul | 6% |
add-sub | 7% |
fma | 6% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 9% |
Function | .omp_outlined..6 |
Source file and lines | Step10_orig.c:19-35 |
Module | exec |
nb instructions | 49 |
nb uops | 52 |
loop length | 293 |
used x86 registers | 3 |
used mmx registers | 0 |
used xmm registers | 4 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 13 |
ADD-SUB / MUL ratio | 2.50 |
micro-operation queue | 8.67 cycles |
front end | 8.67 cycles |
ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 2.00 | 0.75 | 0.75 | 0.50 | 2.00 | 11.33 | 11.33 | 11.33 | 6.50 | 6.50 | 5.00 | 5.00 | 4.50 | 4.50 |
cycles | 2.00 | 0.75 | 0.75 | 0.50 | 2.00 | 11.33 | 11.33 | 11.33 | 6.50 | 6.50 | 5.00 | 5.00 | 4.50 | 4.50 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 0.00 |
Front-end | 8.67 |
Dispatch | 11.33 |
Data deps. | 0.00 |
Overall L1 | 11.33 |
all | 2% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | 0% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 14% |
all | 7% |
load | 6% |
store | 6% |
mul | 6% |
add-sub | 7% |
fma | 6% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 9% |
Instruction | Nb FU | ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | Latency | Recip. throughput | Vectorization |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
VMOVSS %XMM0,-0x50(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 | scal (6.3%) |
VADDSS -0x38(%RBP),%XMM2,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 | scal (6.3%) |
VMOVSD -0x18d2(%RIP),%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
VMOVSS %XMM2,-0x4c(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 | scal (6.3%) |
VCVTSS2SD %XMM0,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 | scal (6.3%) |
CALL 202600 <@plt_start@+0x90> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
VMOVSS -0x4c(%RBP),%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
VMOVSS -0x1935(%RIP),%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
ADD $0x4,%R12 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
VFMADD213SS -0x1932(%RIP),%XMM2,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
VFMADD213SS -0x1937(%RIP),%XMM2,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
VFMADD213SS -0x194c(%RIP),%XMM2,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
VFMADD213SS -0x1965(%RIP),%XMM2,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
VFMADD213SS -0x195a(%RIP),%XMM2,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
VCVTSS2SD %XMM1,%XMM1,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 | scal (6.3%) |
VSUBSD %XMM1,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 | scal (12.5%) |
VCVTSD2SS %XMM0,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 | scal (12.5%) |
VMULSS -0x50(%RBP),%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | scal (6.3%) |
VCMPSS $0xe,-0x197e(%RIP),%XMM2,%K1 | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | scal (6.3%) |
VMOVSS -0x60(%RBP),%XMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
VMOVSS -0x64(%RBP),%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
VMOVSS -0x68(%RBP),%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
VMOVSS %XMM0,%XMM0,%XMM0{%K1}{z} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 | scal (6.3%) |
VFMADD231SS -0x5c(%RBP),%XMM0,%XMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
VFMADD231SS -0x58(%RBP),%XMM0,%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
VFMADD231SS -0x54(%RBP),%XMM0,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
CMP %R12,%RBX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
JE 202140 <.omp_outlined..6+0xb0> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
VMOVSS 0x204880(%R12),%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
VMOVSS %XMM1,-0x68(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 | scal (6.3%) |
VMOVSS %XMM2,-0x64(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 | scal (6.3%) |
VMOVSS %XMM3,-0x60(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 | scal (6.3%) |
VSUBSS -0x48(%RBP),%XMM0,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 | scal (6.3%) |
VMOVSS 0x266300(%R12),%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
VSUBSS -0x44(%RBP),%XMM0,%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 | scal (6.3%) |
VMOVSS 0x2c7d80(%R12),%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
VSUBSS -0x40(%RBP),%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 | scal (6.3%) |
VMOVSS %XMM1,-0x5c(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 | scal (6.3%) |
VMOVSS %XMM2,-0x58(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 | scal (6.3%) |
VMULSS %XMM2,%XMM2,%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | scal (6.3%) |
VMOVSS %XMM0,-0x54(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 | scal (6.3%) |
VFMADD231SS %XMM1,%XMM1,%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
VFMADD231SS %XMM0,%XMM0,%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
VMOVSS -0x3c(%RBP),%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
VUCOMISS %XMM2,%XMM0 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0.50 | 6 | 1 | scal (6.3%) |
VXORPS %XMM0,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
JBE 202200 <.omp_outlined..6+0x170> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
VMOVSS 0x329800(%R12),%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
JMP 202200 <.omp_outlined..6+0x170> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
Function | .omp_outlined..6 |
Source file and lines | Step10_orig.c:19-35 |
Module | exec |
nb instructions | 47 |
nb uops | 50 |
loop length | 278 |
used x86 registers | 3 |
used mmx registers | 0 |
used xmm registers | 4 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 13 |
ADD-SUB / MUL ratio | 2.50 |
micro-operation queue | 8.33 cycles |
front end | 8.33 cycles |
ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 1.50 | 0.75 | 0.75 | 0.50 | 1.50 | 11.00 | 11.00 | 11.00 | 6.50 | 6.50 | 5.00 | 5.00 | 4.50 | 4.50 |
cycles | 1.50 | 0.75 | 0.75 | 0.50 | 1.50 | 11.00 | 11.00 | 11.00 | 6.50 | 6.50 | 5.00 | 5.00 | 4.50 | 4.50 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 0.00 |
Front-end | 8.33 |
Dispatch | 11.00 |
Data deps. | 0.00 |
Overall L1 | 11.00 |
all | 2% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | 0% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 14% |
all | 7% |
load | 6% |
store | 6% |
mul | 6% |
add-sub | 7% |
fma | 6% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 9% |
Instruction | Nb FU | ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | Latency | Recip. throughput | Vectorization |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
VMOVSS %XMM0,-0x50(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 | scal (6.3%) |
VADDSS -0x38(%RBP),%XMM2,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 | scal (6.3%) |
VMOVSD -0x18d2(%RIP),%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
VMOVSS %XMM2,-0x4c(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 | scal (6.3%) |
VCVTSS2SD %XMM0,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 | scal (6.3%) |
CALL 202600 <@plt_start@+0x90> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
VMOVSS -0x4c(%RBP),%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
VMOVSS -0x1935(%RIP),%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
ADD $0x4,%R12 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
VFMADD213SS -0x1932(%RIP),%XMM2,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
VFMADD213SS -0x1937(%RIP),%XMM2,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
VFMADD213SS -0x194c(%RIP),%XMM2,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
VFMADD213SS -0x1965(%RIP),%XMM2,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
VFMADD213SS -0x195a(%RIP),%XMM2,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
VCVTSS2SD %XMM1,%XMM1,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 | scal (6.3%) |
VSUBSD %XMM1,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 | scal (12.5%) |
VCVTSD2SS %XMM0,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 | scal (12.5%) |
VMULSS -0x50(%RBP),%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | scal (6.3%) |
VCMPSS $0xe,-0x197e(%RIP),%XMM2,%K1 | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | scal (6.3%) |
VMOVSS -0x60(%RBP),%XMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
VMOVSS -0x64(%RBP),%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
VMOVSS -0x68(%RBP),%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
VMOVSS %XMM0,%XMM0,%XMM0{%K1}{z} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 | scal (6.3%) |
VFMADD231SS -0x5c(%RBP),%XMM0,%XMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
VFMADD231SS -0x58(%RBP),%XMM0,%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
VFMADD231SS -0x54(%RBP),%XMM0,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
CMP %R12,%RBX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
JE 202140 <.omp_outlined..6+0xb0> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
VMOVSS 0x204880(%R12),%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
VMOVSS %XMM1,-0x68(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 | scal (6.3%) |
VMOVSS %XMM2,-0x64(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 | scal (6.3%) |
VMOVSS %XMM3,-0x60(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 | scal (6.3%) |
VSUBSS -0x48(%RBP),%XMM0,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 | scal (6.3%) |
VMOVSS 0x266300(%R12),%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
VSUBSS -0x44(%RBP),%XMM0,%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 | scal (6.3%) |
VMOVSS 0x2c7d80(%R12),%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
VSUBSS -0x40(%RBP),%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 | scal (6.3%) |
VMOVSS %XMM1,-0x5c(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 | scal (6.3%) |
VMOVSS %XMM2,-0x58(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 | scal (6.3%) |
VMULSS %XMM2,%XMM2,%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | scal (6.3%) |
VMOVSS %XMM0,-0x54(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 | scal (6.3%) |
VFMADD231SS %XMM1,%XMM1,%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
VFMADD231SS %XMM0,%XMM0,%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
VMOVSS -0x3c(%RBP),%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
VUCOMISS %XMM2,%XMM0 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0.50 | 6 | 1 | scal (6.3%) |
VXORPS %XMM0,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
JBE 202200 <.omp_outlined..6+0x170> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |