Loop Id: 1 | Module: exec | Source: main.c:111-116 | Coverage: 0.01% |
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Loop Id: 1 | Module: exec | Source: main.c:111-116 | Coverage: 0.01% |
---|
0x201ef0 VADDPS %XMM1,%XMM0,%XMM1 |
0x201ef4 VCVTSI2SS %ECX,%XMM5,%XMM3 |
0x201ef8 VPERMILPD $0x1,%XMM1,%XMM2 |
0x201efe VEXTRACTPS $0x1,%XMM1,(%R12,%RCX,4) [1] |
0x201f05 VMOVSS %XMM1,(%R13,%RCX,4) [1] |
0x201f0c VFMADD132SS %XMM4,%XMM2,%XMM3 |
0x201f11 VMOVSS %XMM2,(%R15,%RCX,4) [1] |
0x201f17 VMOVSS %XMM3,(%RBX,%RCX,4) [1] |
0x201f1c INC %RCX |
0x201f1f CMP %RCX,%R14 |
0x201f22 JNE 201ef0 |
/home/kcamus/qaas_runs/170-239-9944/intel/HACCmk/build/HACCmk/src/main.c: 111 - 116 |
-------------------------------------------------------------------------------- |
111: for ( i = 1; i < n; i++ ) |
112: { |
113: xx[i] = xx[i-1] + dx1; |
114: yy[i] = yy[i-1] + dy1; |
115: zz[i] = zz[i-1] + dz1; |
116: mass[i] = (float)i * 0.01f + xx[i]; |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.50 |
CQA speedup if fully vectorized | 8.23 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.50 |
Bottlenecks | |
Function | main |
Source | main.c:111-116 |
Source loop unroll info | not unrolled or unrolled with no peel/tail loop |
Source loop unroll confidence level | max |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 3.00 |
CQA cycles if no scalar integer | 3.00 |
CQA cycles if FP arith vectorized | 2.00 |
CQA cycles if fully vectorized | 0.36 |
Front-end cycles | 2.00 |
DIV/SQRT cycles | 0.50 |
P0 cycles | 0.50 |
P1 cycles | 0.25 |
P2 cycles | 0.25 |
P3 cycles | 0.50 |
P4 cycles | 1.33 |
P5 cycles | 1.33 |
P6 cycles | 1.33 |
P7 cycles | 0.50 |
P8 cycles | 1.50 |
P9 cycles | 1.67 |
P10 cycles | 1.33 |
P11 cycles | 2.00 |
P12 cycles | 2.00 |
P13 cycles | 0.00 |
Inter-iter dependencies cycles | 3 |
FE+BE cycles (UFS) | NA |
Stall cycles (UFS) | NA |
Nb insns | 11.00 |
Nb uops | 12.00 |
Nb loads | 0.00 |
Nb stores | 4.00 |
Nb stack references | 0.00 |
FLOP/cycle | 2.00 |
Nb FLOP add-sub | 4.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 1.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 5.33 |
Bytes prefetched | 0.00 |
Bytes loaded | 0.00 |
Bytes stored | 16.00 |
Stride 0 | 0.00 |
Stride 1 | 4.00 |
Stride n | 0.00 |
Stride unknown | 0.00 |
Stride indirect | 0.00 |
Vectorization ratio all | 25.00 |
Vectorization ratio load | NA |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | 100.00 |
Vectorization ratio fma | 0.00 |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 50.00 |
Vector-efficiency ratio all | 10.94 |
Vector-efficiency ratio load | NA |
Vector-efficiency ratio store | 6.25 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | 25.00 |
Vector-efficiency ratio fma | 6.25 |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 15.63 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.50 |
CQA speedup if fully vectorized | 8.23 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.50 |
Bottlenecks | |
Function | main |
Source | main.c:111-116 |
Source loop unroll info | not unrolled or unrolled with no peel/tail loop |
Source loop unroll confidence level | max |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 3.00 |
CQA cycles if no scalar integer | 3.00 |
CQA cycles if FP arith vectorized | 2.00 |
CQA cycles if fully vectorized | 0.36 |
Front-end cycles | 2.00 |
DIV/SQRT cycles | 0.50 |
P0 cycles | 0.50 |
P1 cycles | 0.25 |
P2 cycles | 0.25 |
P3 cycles | 0.50 |
P4 cycles | 1.33 |
P5 cycles | 1.33 |
P6 cycles | 1.33 |
P7 cycles | 0.50 |
P8 cycles | 1.50 |
P9 cycles | 1.67 |
P10 cycles | 1.33 |
P11 cycles | 2.00 |
P12 cycles | 2.00 |
P13 cycles | 0.00 |
Inter-iter dependencies cycles | 3 |
FE+BE cycles (UFS) | NA |
Stall cycles (UFS) | NA |
Nb insns | 11.00 |
Nb uops | 12.00 |
Nb loads | 0.00 |
Nb stores | 4.00 |
Nb stack references | 0.00 |
FLOP/cycle | 2.00 |
Nb FLOP add-sub | 4.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 1.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 5.33 |
Bytes prefetched | 0.00 |
Bytes loaded | 0.00 |
Bytes stored | 16.00 |
Stride 0 | 0.00 |
Stride 1 | 4.00 |
Stride n | 0.00 |
Stride unknown | 0.00 |
Stride indirect | 0.00 |
Vectorization ratio all | 25.00 |
Vectorization ratio load | NA |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | 100.00 |
Vectorization ratio fma | 0.00 |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 50.00 |
Vector-efficiency ratio all | 10.94 |
Vector-efficiency ratio load | NA |
Vector-efficiency ratio store | 6.25 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | 25.00 |
Vector-efficiency ratio fma | 6.25 |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 15.63 |
Path / |
Function | main |
Source file and lines | main.c:111-116 |
Module | exec |
nb instructions | 11 |
nb uops | 12 |
loop length | 52 |
used x86 registers | 6 |
used mmx registers | 0 |
used xmm registers | 6 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 0 |
micro-operation queue | 2.00 cycles |
front end | 2.00 cycles |
ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 0.50 | 0.50 | 0.25 | 0.25 | 0.50 | 1.33 | 1.33 | 1.33 | 0.50 | 1.50 | 1.67 | 1.33 | 2.00 | 2.00 |
cycles | 0.50 | 0.50 | 0.25 | 0.25 | 0.50 | 1.33 | 1.33 | 1.33 | 0.50 | 1.50 | 1.67 | 1.33 | 2.00 | 2.00 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 3.00 |
Front-end | 2.00 |
Dispatch | 2.00 |
Data deps. | 3.00 |
Overall L1 | 3.00 |
all | 0% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 28% |
load | NA (no load vectorizable/vectorized instructions) |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 100% |
fma | 0% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 100% |
all | 25% |
load | NA (no load vectorizable/vectorized instructions) |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 100% |
fma | 0% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 50% |
all | 6% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 6% |
all | 11% |
load | NA (no load vectorizable/vectorized instructions) |
store | 6% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 25% |
fma | 6% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 25% |
all | 10% |
load | NA (no load vectorizable/vectorized instructions) |
store | 6% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 25% |
fma | 6% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 15% |
Instruction | Nb FU | ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
VADDPS %XMM1,%XMM0,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 |
VCVTSI2SS %ECX,%XMM5,%XMM3 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 1.25 |
VPERMILPD $0x1,%XMM1,%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 1 | 0.33 |
VEXTRACTPS $0x1,%XMM1,(%R12,%RCX,4) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 6 | 1 |
VMOVSS %XMM1,(%R13,%RCX,4) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
VFMADD132SS %XMM4,%XMM2,%XMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSS %XMM2,(%R15,%RCX,4) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
VMOVSS %XMM3,(%RBX,%RCX,4) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
INC %RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP %RCX,%R14 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JNE 201ef0 <main+0x1e0> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
Function | main |
Source file and lines | main.c:111-116 |
Module | exec |
nb instructions | 11 |
nb uops | 12 |
loop length | 52 |
used x86 registers | 6 |
used mmx registers | 0 |
used xmm registers | 6 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 0 |
micro-operation queue | 2.00 cycles |
front end | 2.00 cycles |
ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 0.50 | 0.50 | 0.25 | 0.25 | 0.50 | 1.33 | 1.33 | 1.33 | 0.50 | 1.50 | 1.67 | 1.33 | 2.00 | 2.00 |
cycles | 0.50 | 0.50 | 0.25 | 0.25 | 0.50 | 1.33 | 1.33 | 1.33 | 0.50 | 1.50 | 1.67 | 1.33 | 2.00 | 2.00 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 3.00 |
Front-end | 2.00 |
Dispatch | 2.00 |
Data deps. | 3.00 |
Overall L1 | 3.00 |
all | 0% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 28% |
load | NA (no load vectorizable/vectorized instructions) |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 100% |
fma | 0% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 100% |
all | 25% |
load | NA (no load vectorizable/vectorized instructions) |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 100% |
fma | 0% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 50% |
all | 6% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 6% |
all | 11% |
load | NA (no load vectorizable/vectorized instructions) |
store | 6% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 25% |
fma | 6% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 25% |
all | 10% |
load | NA (no load vectorizable/vectorized instructions) |
store | 6% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 25% |
fma | 6% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 15% |
Instruction | Nb FU | ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
VADDPS %XMM1,%XMM0,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 |
VCVTSI2SS %ECX,%XMM5,%XMM3 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 1.25 |
VPERMILPD $0x1,%XMM1,%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 1 | 0.33 |
VEXTRACTPS $0x1,%XMM1,(%R12,%RCX,4) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 6 | 1 |
VMOVSS %XMM1,(%R13,%RCX,4) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
VFMADD132SS %XMM4,%XMM2,%XMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSS %XMM2,(%R15,%RCX,4) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
VMOVSS %XMM3,(%RBX,%RCX,4) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
INC %RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP %RCX,%R14 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JNE 201ef0 <main+0x1e0> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |