Function: main | Module: exec | Source: main.c:50-191 [...] | Coverage: 0.04% |
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Function: main | Module: exec | Source: main.c:50-191 [...] | Coverage: 0.04% |
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/scratch_na/users/xoserete/qaas_runs/171-319-3146/intel/HACCmk/build/HACCmk/src/main.c: 50 - 191 |
-------------------------------------------------------------------------------- |
50: { |
[...] |
73: printf( "count is set %d\n", count ); |
74: printf( "Total MPI ranks %d\n", nprocs ); |
75: } |
76: |
77: if (argc == 2 && strncmp(argv[1], "-s", 2) == 0) |
78: NN = 15000; |
79: |
80: printf( "N is set %ld\n", NN ); |
81: |
82: #pragma omp parallel |
[...] |
97: for ( n = 400; n < NN; n = n + 20 ) |
[...] |
103: dx1 = 1.0f/(float)n; |
104: dy1 = 2.0f/(float)n; |
105: dz1 = 3.0f/(float)n; |
106: xx[0] = 0.f; |
107: yy[0] = 0.f; |
108: zz[0] = 0.f; |
109: mass[0] = 2.f; |
110: |
111: for ( i = 1; i < n; i++ ) |
112: { |
113: xx[i] = xx[i-1] + dx1; |
114: yy[i] = yy[i-1] + dy1; |
115: zz[i] = zz[i-1] + dz1; |
116: mass[i] = (float)i * 0.01f + xx[i]; |
117: } |
118: |
119: for ( i = 0; i < n; i++ ) |
120: { |
121: vx1[i] = 0.f; |
122: vy1[i] = 0.f; |
123: vz1[i] = 0.f; |
[...] |
139: #pragma omp parallel for private( dx1, dy1, dz1 ) |
[...] |
166: t3 = (t2 - t1) * 1e6; |
167: #endif |
168: |
169: elapsed = elapsed + t3; |
[...] |
185: printf( "\nKernel elapsed time, s: %18.8lf\n", elapsed*1e-6 ); |
[...] |
191: return 0; |
/scratch_na/users/xoserete/qaas_runs/171-319-3146/intel/HACCmk/build/HACCmk/src/mysecond.c: 22 - 23 |
-------------------------------------------------------------------------------- |
22: i = gettimeofday(&tp,&tzp); |
23: return ( (double) tp.tv_sec + (double) tp.tv_usec * 1.e-6 ); |
0x401850 PUSH %RBP |
0x401851 MOV %RSP,%RBP |
0x401854 PUSH %R15 |
0x401856 PUSH %R14 |
0x401858 PUSH %R13 |
0x40185a PUSH %R12 |
0x40185c PUSH %RBX |
0x40185d SUB $0x28,%RSP |
0x401861 MOV %RSI,%R14 |
0x401864 MOV %EDI,%R15D |
0x401867 MOV $0x10111ce4199d9fee,%RSI |
0x401871 MOV $0x3,%EDI |
0x401876 CALL 403530 <__intel_new_feature_proc_init> |
0x40187b MOV $0x406f38,%EDI |
0x401880 MOV $0xbb8,%ESI |
0x401885 XOR %EAX,%EAX |
0x401887 CALL 401310 <printf@plt> |
0x40188c MOV $0x406f49,%EDI |
0x401891 MOV $0x1,%ESI |
0x401896 XOR %EAX,%EAX |
0x401898 CALL 401310 <printf@plt> |
0x40189d MOV $0x186a0,%EBX |
0x4018a2 CMP $0x2,%R15D |
0x4018a6 JNE 4018c6 |
0x4018a8 MOV 0x8(%R14),%RDI |
0x4018ac MOV $0x406f5d,%ESI |
0x4018b1 MOV $0x2,%EDX |
0x4018b6 CALL 401390 <strncmp@plt> |
0x4018bb TEST %EAX,%EAX |
0x4018bd MOV $0x3a98,%EAX |
0x4018c2 CMOVE %RAX,%RBX |
0x4018c6 MOV $0x406f60,%EDI |
0x4018cb MOV %RBX,%RSI |
0x4018ce XOR %EAX,%EAX |
0x4018d0 CALL 401310 <printf@plt> |
0x4018d5 MOV $0x60b100,%EDI |
0x4018da MOV $0x401cf0,%EDX |
0x4018df MOV $0x1,%ESI |
0x4018e4 XOR %ECX,%ECX |
0x4018e6 XOR %EAX,%EAX |
0x4018e8 CALL 401400 <__kmpc_fork_call@plt> |
0x4018ed ADD $0x1fe68,%EBX |
0x4018f3 AND $0x1bdf8,%EBX |
0x4018f9 OR $0x4,%RBX |
0x4018fd IMUL $0xccccccd,%RBX,%RAX |
0x401904 SHR $0x20,%RAX |
0x401908 MOV %RAX,-0x30(%RBP) |
0x40190c VXORPS %XMM0,%XMM0,%XMM0 |
0x401910 MOV $0x18f,%R15D |
0x401916 VMOVSS 0x5536(%RIP),%XMM15 |
0x40191e VMOVDQU64 0x5598(%RIP),%YMM16 |
0x401928 VBROADCASTSS 0x5522(%RIP),%YMM17 |
0x401932 XOR %R12D,%R12D |
0x401935 JMP 401a6a |
0x40193a NOPW (%RAX,%RAX,1) |
(2) 0x401940 LEA (%R12,%R12,4),%RBX |
(2) 0x401944 SAL $0x4,%RBX |
(2) 0x401948 ADD $0x640,%RBX |
(2) 0x40194f MOV $0x791bf0,%EDI |
(2) 0x401954 XOR %ESI,%ESI |
(2) 0x401956 MOV %RBX,%RDX |
(2) 0x401959 VZEROUPPER |
(2) 0x40195c CALL 4056e0 <__intel_avx_rep_memset> |
(2) 0x401961 MOV $0x7f3670,%EDI |
(2) 0x401966 XOR %ESI,%ESI |
(2) 0x401968 MOV %RBX,%RDX |
(2) 0x40196b CALL 4056e0 <__intel_avx_rep_memset> |
(2) 0x401970 MOV $0x8550f0,%EDI |
(2) 0x401975 XOR %ESI,%ESI |
(2) 0x401977 MOV %RBX,%RDX |
(2) 0x40197a CALL 4056e0 <__intel_avx_rep_memset> |
(2) 0x40197f MOV %RSP,%RBX |
(2) 0x401982 MOV %RSP,%R14 |
(2) 0x401985 LEA -0x10(%R14),%RDI |
(2) 0x401989 MOV %RDI,%RSP |
(2) 0x40198c LEA -0x10(%RSP),%RSI |
(2) 0x401991 MOV %RSI,%RSP |
(2) 0x401994 CALL 401370 <gettimeofday@plt> |
(2) 0x401999 VCVTSI2SDQ -0x10(%R14),%XMM18,%XMM0 |
(2) 0x4019a0 VMOVSD %XMM0,-0x38(%RBP) |
(2) 0x4019a5 VCVTSI2SDQ -0x8(%R14),%XMM18,%XMM0 |
(2) 0x4019ac VMOVSD %XMM0,-0x40(%RBP) |
(2) 0x4019b1 MOV %RBX,%RSP |
(2) 0x4019b4 SUB $0x8,%RSP |
(2) 0x4019b8 MOV $0x60b160,%EDI |
(2) 0x4019bd MOV $0x401d20,%EDX |
(2) 0x4019c2 MOV $0x3e6b851f,%ECX |
(2) 0x4019c7 MOV $0x3f000000,%R8D |
(2) 0x4019cd MOV $0x3cf5c28f,%R9D |
(2) 0x4019d3 MOV $0x6,%ESI |
(2) 0x4019d8 XOR %EAX,%EAX |
(2) 0x4019da PUSH $0xbb7 |
(2) 0x4019df PUSH $0 |
(2) 0x4019e1 PUSH %R13 |
(2) 0x4019e3 CALL 401400 <__kmpc_fork_call@plt> |
(2) 0x4019e8 ADD $0x20,%RSP |
(2) 0x4019ec MOV %RSP,%RBX |
(2) 0x4019ef MOV %RSP,%R14 |
(2) 0x4019f2 LEA -0x10(%R14),%RDI |
(2) 0x4019f6 MOV %RDI,%RSP |
(2) 0x4019f9 LEA -0x10(%RSP),%RSI |
(2) 0x4019fe MOV %RSI,%RSP |
(2) 0x401a01 CALL 401370 <gettimeofday@plt> |
(2) 0x401a06 VBROADCASTSS 0x5444(%RIP),%YMM17 |
(2) 0x401a10 VMOVDQU64 0x54a6(%RIP),%YMM16 |
(2) 0x401a1a VMOVSS 0x5432(%RIP),%XMM15 |
(2) 0x401a22 VCVTSI2SDQ -0x10(%R14),%XMM18,%XMM0 |
(2) 0x401a29 VSUBSD -0x38(%RBP),%XMM0,%XMM0 |
(2) 0x401a2e VCVTSI2SDQ -0x8(%R14),%XMM18,%XMM1 |
(2) 0x401a35 VSUBSD -0x40(%RBP),%XMM1,%XMM1 |
(2) 0x401a3a VFMADD132SD 0x54dd(%RIP),%XMM0,%XMM1 |
(2) 0x401a43 MOV %RBX,%RSP |
(2) 0x401a46 VMOVSD -0x48(%RBP),%XMM0 |
(2) 0x401a4b VFMADD231SD 0x54d4(%RIP),%XMM1,%XMM0 |
(2) 0x401a54 LEA 0x1(%R12),%RAX |
(2) 0x401a59 ADD $0x14,%R15 |
(2) 0x401a5d CMP -0x30(%RBP),%R12 |
(2) 0x401a61 MOV %RAX,%R12 |
(2) 0x401a64 JE 401cba |
(2) 0x401a6a VMOVSD %XMM0,-0x48(%RBP) |
(2) 0x401a6f LEA (,%R12,4),%RAX |
(2) 0x401a77 LEA 0x190(%RAX,%RAX,4),%R13 |
(2) 0x401a7f VCVTSI2SS %R13D,%XMM18,%XMM0 |
(2) 0x401a85 VMOVSS 0x53c3(%RIP),%XMM1 |
(2) 0x401a8d VDIVSS %XMM0,%XMM1,%XMM0 |
(2) 0x401a91 VBROADCASTSS %XMM0,%XMM1 |
(2) 0x401a96 VMULPS 0x53f2(%RIP),%XMM1,%XMM1 |
(2) 0x401a9e MOVL $0,0x209748(%RIP) |
(2) 0x401aa8 MOVL $0,0x26b1be(%RIP) |
(2) 0x401ab2 MOVL $0,0x2ccc34(%RIP) |
(2) 0x401abc MOVL $0x40000000,0x32e6aa(%RIP) |
(2) 0x401ac6 LEA 0x18f(%RAX,%RAX,4),%RCX |
(2) 0x401ace CMP $0xb,%RCX |
(2) 0x401ad2 JAE 401af0 |
(2) 0x401ad4 VXORPS %XMM4,%XMM4,%XMM4 |
(2) 0x401ad8 VXORPS %XMM2,%XMM2,%XMM2 |
(2) 0x401adc XOR %EAX,%EAX |
(2) 0x401ade JMP 401c54 |
0x401ae3 NOPW %CS:(%RAX,%RAX,1) |
(2) 0x401af0 LEA (%RAX,%RAX,4),%RDX |
(2) 0x401af4 VXORPS %XMM3,%XMM3,%XMM3 |
(2) 0x401af8 VXORPS %XMM2,%XMM2,%XMM2 |
(2) 0x401afc MOV $-0x3,%RAX |
(2) 0x401b03 NOPW %CS:(%RAX,%RAX,1) |
(0) 0x401b10 VADDSS %XMM0,%XMM2,%XMM2 |
(0) 0x401b14 VMOVSS %XMM2,0x60b200(,%RAX,4) |
(0) 0x401b1d VADDPS %XMM1,%XMM3,%XMM3 |
(0) 0x401b21 VMOVSS %XMM3,0x66cc80(,%RAX,4) |
(0) 0x401b2a VEXTRACTPS $0x1,%XMM3,0x6ce700(,%RAX,4) |
(0) 0x401b35 LEA 0x4(%RAX),%ESI |
(0) 0x401b38 VCVTSI2SS %ESI,%XMM18,%XMM4 |
(0) 0x401b3e VFMADD132SS %XMM15,%XMM2,%XMM4 |
(0) 0x401b43 VMOVSS %XMM4,0x730180(,%RAX,4) |
(0) 0x401b4c INC %RAX |
(0) 0x401b4f JNE 401b10 |
(2) 0x401b51 ADD $0x18c,%RDX |
(2) 0x401b58 AND $-0x8,%RDX |
(2) 0x401b5c LEA 0x3(%RDX),%RAX |
(2) 0x401b60 VBROADCASTSS %XMM0,%YMM4 |
(2) 0x401b65 VBROADCASTSS %XMM2,%YMM11 |
(2) 0x401b6a VMOVUPS 0x532e(%RIP),%YMM13 |
(2) 0x401b72 VFMADD231PS %YMM13,%YMM4,%YMM11 |
(2) 0x401b77 VMOVSS 0x52d9(%RIP),%XMM14 |
(2) 0x401b7f VMULSS %XMM0,%XMM14,%XMM7 |
(2) 0x401b83 VMOVSHDUP %XMM1,%XMM8 |
(2) 0x401b87 VBROADCASTSS %XMM1,%YMM5 |
(2) 0x401b8c VBROADCASTSS 0x52c7(%RIP),%YMM6 |
(2) 0x401b95 VPERMPS %YMM3,%YMM6,%YMM9 |
(2) 0x401b9a VBROADCASTSS %XMM3,%YMM12 |
(2) 0x401b9f VFMADD231PS %YMM13,%YMM5,%YMM12 |
(2) 0x401ba4 VMULSS %XMM1,%XMM14,%XMM10 |
(2) 0x401ba8 VBROADCASTSD %XMM8,%YMM6 |
(2) 0x401bad VFMADD231PS %YMM13,%YMM6,%YMM9 |
(2) 0x401bb2 VMULSS %XMM14,%XMM8,%XMM13 |
(2) 0x401bb7 OR $0x2,%RDX |
(2) 0x401bbb MOV $0x3,%ESI |
(2) 0x401bc0 VBROADCASTSS %XMM7,%YMM7 |
(2) 0x401bc5 VBROADCASTSS %XMM10,%YMM8 |
(2) 0x401bca VBROADCASTSS %XMM13,%YMM10 |
(2) 0x401bcf NOP |
(1) 0x401bd0 VADDPS %YMM4,%YMM11,%YMM13 |
(1) 0x401bd4 VADDPS %YMM7,%YMM11,%YMM11 |
(1) 0x401bd8 VMOVUPS %YMM13,0x60b1f4(,%RSI,4) |
(1) 0x401be1 VADDPS %YMM5,%YMM12,%YMM14 |
(1) 0x401be5 VADDPS %YMM8,%YMM12,%YMM12 |
(1) 0x401bea VMOVUPS %YMM14,0x66cc74(,%RSI,4) |
(1) 0x401bf3 VADDPS %YMM6,%YMM9,%YMM14 |
(1) 0x401bf7 VADDPS %YMM10,%YMM9,%YMM9 |
(1) 0x401bfc VMOVUPS %YMM14,0x6ce6f4(,%RSI,4) |
(1) 0x401c05 VPBROADCASTD %ESI,%YMM14 |
(1) 0x401c0b VPADDD %YMM16,%YMM14,%YMM14 |
(1) 0x401c11 VCVTDQ2PS %YMM14,%YMM14 |
(1) 0x401c16 VFMADD132PS %YMM17,%YMM13,%YMM14 |
(1) 0x401c1c VMOVUPS %YMM14,0x730174(,%RSI,4) |
(1) 0x401c25 ADD $0x8,%RSI |
(1) 0x401c29 CMP %RDX,%RSI |
(1) 0x401c2c JLE 401bd0 |
(2) 0x401c2e VCVTSI2SS %RAX,%XMM18,%XMM4 |
(2) 0x401c34 VADDSS 0x5224(%RIP),%XMM4,%XMM4 |
(2) 0x401c3c CMP %RAX,%RCX |
(2) 0x401c3f JE 401940 |
(2) 0x401c45 VFMADD231SS %XMM4,%XMM0,%XMM2 |
(2) 0x401c4a VBROADCASTSS %XMM4,%XMM4 |
(2) 0x401c4f VFMADD213PS %XMM3,%XMM1,%XMM4 |
(2) 0x401c54 MOV %R15,%RCX |
(2) 0x401c57 SUB %RAX,%RCX |
(2) 0x401c5a LEA (,%RAX,4),%RDX |
(2) 0x401c62 XOR %ESI,%ESI |
(2) 0x401c64 NOPW %CS:(%RAX,%RAX,1) |
(3) 0x401c70 VADDSS %XMM0,%XMM2,%XMM2 |
(3) 0x401c74 VMOVSS %XMM2,0x60b1f4(%RDX,%RSI,4) |
(3) 0x401c7d VADDPS %XMM1,%XMM4,%XMM4 |
(3) 0x401c81 VMOVSS %XMM4,0x66cc74(%RDX,%RSI,4) |
(3) 0x401c8a VEXTRACTPS $0x1,%XMM4,0x6ce6f4(%RDX,%RSI,4) |
(3) 0x401c95 LEA 0x1(%RAX,%RSI,1),%EDI |
(3) 0x401c99 VCVTSI2SS %EDI,%XMM18,%XMM3 |
(3) 0x401c9f VFMADD132SS %XMM15,%XMM2,%XMM3 |
(3) 0x401ca4 VMOVSS %XMM3,0x730174(%RDX,%RSI,4) |
(3) 0x401cad INC %RSI |
(3) 0x401cb0 CMP %RSI,%RCX |
(3) 0x401cb3 JNE 401c70 |
(2) 0x401cb5 JMP 401940 |
0x401cba VMULSD 0x525e(%RIP),%XMM0,%XMM0 |
0x401cc2 MOV $0x1,%EAX |
0x401cc7 MOV $0x406f89,%EDI |
0x401ccc CALL 401310 <printf@plt> |
0x401cd1 XOR %EAX,%EAX |
0x401cd3 LEA -0x28(%RBP),%RSP |
0x401cd7 POP %RBX |
0x401cd8 POP %R12 |
0x401cda POP %R13 |
0x401cdc POP %R14 |
0x401cde POP %R15 |
0x401ce0 POP %RBP |
0x401ce1 RET |
0x401ce2 NOPW %CS:(%RAX,%RAX,1) |
0x401cec NOPL (%RAX) |
Path / |
Source file and lines | main.c:50-191 |
Module | exec |
nb instructions | 71 |
nb uops | 78 |
loop length | 307 |
used x86 registers | 12 |
used mmx registers | 0 |
used xmm registers | 2 |
used ymm registers | 2 |
used zmm registers | 0 |
nb stack references | 2 |
micro-operation queue | 13.00 cycles |
front end | 13.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 5.70 | 5.50 | 4.00 | 4.00 | 7.00 | 5.60 | 5.60 | 7.00 | 7.00 | 7.00 | 5.60 | 4.00 |
cycles | 5.70 | 5.50 | 4.00 | 4.00 | 7.00 | 5.60 | 5.60 | 7.00 | 7.00 | 7.00 | 5.60 | 4.00 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 11.96-11.99 |
Stall cycles | 0.00 |
Front-end | 13.00 |
Dispatch | 7.00 |
Overall L1 | 13.00 |
all | 4% |
load | 50% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 25% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 0% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 50% |
all | 7% |
load | 20% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 4% |
all | 9% |
load | 31% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 6% |
all | 12% |
load | 8% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 12% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 15% |
all | 9% |
load | 17% |
store | 12% |
mul | 12% |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 7% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
SUB $0x28,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RSI,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %EDI,%R15D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV $0x10111ce4199d9fee,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.28 |
MOV $0x3,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 403530 <__intel_new_feature_proc_init> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV $0x406f38,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0xbb8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CALL 401310 <printf@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV $0x406f49,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x1,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CALL 401310 <printf@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV $0x186a0,%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP $0x2,%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JNE 4018c6 <main+0x76> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x8(%R14),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x406f5d,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x2,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 401390 <strncmp@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
TEST %EAX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
MOV $0x3a98,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVE %RAX,%RBX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV $0x406f60,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RBX,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CALL 401310 <printf@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV $0x60b100,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x401cf0,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x1,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CALL 401400 <__kmpc_fork_call@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
ADD $0x1fe68,%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
AND $0x1bdf8,%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
OR $0x4,%RBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
IMUL $0xccccccd,%RBX,%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
SHR $0x20,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %RAX,-0x30(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VXORPS %XMM0,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV $0x18f,%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VMOVSS 0x5536(%RIP),%XMM15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVDQU64 0x5598(%RIP),%YMM16 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VBROADCASTSS 0x5522(%RIP),%YMM17 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
XOR %R12D,%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 401a6a <main+0x21a> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMULSD 0x525e(%RIP),%XMM0,%XMM0 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
MOV $0x1,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x406f89,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 401310 <printf@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Source file and lines | main.c:50-191 |
Module | exec |
nb instructions | 71 |
nb uops | 78 |
loop length | 307 |
used x86 registers | 12 |
used mmx registers | 0 |
used xmm registers | 2 |
used ymm registers | 2 |
used zmm registers | 0 |
nb stack references | 2 |
micro-operation queue | 13.00 cycles |
front end | 13.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 5.70 | 5.50 | 4.00 | 4.00 | 7.00 | 5.60 | 5.60 | 7.00 | 7.00 | 7.00 | 5.60 | 4.00 |
cycles | 5.70 | 5.50 | 4.00 | 4.00 | 7.00 | 5.60 | 5.60 | 7.00 | 7.00 | 7.00 | 5.60 | 4.00 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 11.96-11.99 |
Stall cycles | 0.00 |
Front-end | 13.00 |
Dispatch | 7.00 |
Overall L1 | 13.00 |
all | 4% |
load | 50% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 25% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 0% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 50% |
all | 7% |
load | 20% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 4% |
all | 9% |
load | 31% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 6% |
all | 12% |
load | 8% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 12% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 15% |
all | 9% |
load | 17% |
store | 12% |
mul | 12% |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 7% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
SUB $0x28,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RSI,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %EDI,%R15D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV $0x10111ce4199d9fee,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.28 |
MOV $0x3,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 403530 <__intel_new_feature_proc_init> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV $0x406f38,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0xbb8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CALL 401310 <printf@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV $0x406f49,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x1,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CALL 401310 <printf@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV $0x186a0,%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP $0x2,%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JNE 4018c6 <main+0x76> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x8(%R14),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x406f5d,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x2,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 401390 <strncmp@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
TEST %EAX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
MOV $0x3a98,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVE %RAX,%RBX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV $0x406f60,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RBX,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CALL 401310 <printf@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV $0x60b100,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x401cf0,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x1,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CALL 401400 <__kmpc_fork_call@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
ADD $0x1fe68,%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
AND $0x1bdf8,%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
OR $0x4,%RBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
IMUL $0xccccccd,%RBX,%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
SHR $0x20,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %RAX,-0x30(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VXORPS %XMM0,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV $0x18f,%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VMOVSS 0x5536(%RIP),%XMM15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVDQU64 0x5598(%RIP),%YMM16 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VBROADCASTSS 0x5522(%RIP),%YMM17 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
XOR %R12D,%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 401a6a <main+0x21a> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMULSD 0x525e(%RIP),%XMM0,%XMM0 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
MOV $0x1,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x406f89,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 401310 <printf@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼main– | 0.04 | 0.01 |
▼Loop 2 - main.c:77-169 - exec– | 0 | 0 |
○Loop 1 - main.c:111-116 - exec | 0.04 | 0.85 |
○Loop 3 - main.c:111-116 - exec | 0 | 0 |
○Loop 0 - main.c:111-116 - exec | 0 | 0 |