	*************************************************
	*                                               *
	*          ONE-View report generation           *
	*                                               *
	*************************************************

[MAQAO] Info: Experiment configuration summary is available adding -dbg=1 in command line

* [MAQAO] Warning: Experiment directory /beegfs/hackathon/users/eoseret/qaas_runs_test/178-663-3091/intel/CoMD/run/oneview_runs/defaults/gcc/oneview_results_1786633291 already exists and is reused.
           It can be replaced using --replace in the command line.
[MAQAO] Info: 
[MAQAO] Info: START THE APPLICATION PROFILING
[MAQAO] Info: -> RUNNING THE PROFILER...
[MAQAO] Info:   LPROF has already been run
[MAQAO] Info: STOP THE APPLICATION PROFILING
[MAQAO] Info: 
[MAQAO] Info: START FUNCTIONS AND LOOPS ANALYSIS ...
[MAQAO] Info: STOP FUNCTIONS AND LOOPS ANALYSIS ...
[MAQAO] Info: 
[MAQAO] Info: START THE REPORT GENERATION
[MAQAO] Info: -> ONE-VIEW EXPERIMENT DIRECTORY: /beegfs/hackathon/users/eoseret/qaas_runs_test/178-663-3091/intel/CoMD/run/oneview_runs/defaults/gcc/oneview_results_1786633291


+====================================================================================================================+
+                                                    1  -  GLOBAL                                                    +
+====================================================================================================================+


+--------------------------------------------------------------------------------------------------------------------+
+                                             1.1  -  Experiment Summary                                             +
+--------------------------------------------------------------------------------------------------------------------+

  Application:			/beegfs/hackathon/users/eoseret/qaas_runs_test/178-663-3091/intel/CoMD/run/base_runs/defaults/gcc/exec
  Timestamp:			2026-08-13 17:01:31
  Universal Timestamp:		1786633291
  Experiment Type:		MPI; OpenMP; Throughput; 
  Machine:			gmz17.benchmarkcenter.megware.com
  Architecture:			x86_64
  Micro Architecture:		ZEN_V5
  Model Name:			AMD EPYC 9655 96-Core Processor
  Cache Size:			1024 KB
  Number of Cores:		96
  OS Version:			Linux 5.14.0-687.29.1.el9_8.x86_64 #1 SMP PREEMPT_DYNAMIC Thu Jul 23 16:18:48 EDT 2026
  Compilation Options:		
		exec: GNU C23 15.1.0 -march=znver5 -mmmx -mpopcnt -msse -msse2 -msse3 -mssse3 -msse4.1 -msse4.2 -mavx -mavx2 -msse4a -mno-fma4 -mno-xop -mfma -mavx512f -mbmi -mbmi2 -maes -mpclmul -mavx512vl -mavx512bw -mavx512dq -mavx512cd -mavx512vbmi -mavx512ifma -mavx512vpopcntdq -mavx512vbmi2 -mgfni -mvpclmulqdq -mavx512vnni -mavx512bitalg -mavx512bf16 -mavx512vp2intersect -mno-3dnow -madx -mabm -mno-cldemote -mclflushopt -mclwb -mclzero -mcx16 -mno-enqcmd -mf16c -mfsgsbase -mfxsr -mno-hle -msahf -mno-lwp -mlzcnt -mmovbe -mmovdir64b -mmovdiri -mmwaitx -mno-pconfig -mpku -mprfchw -mno-ptwrite -mrdpid -mrdrnd -mrdseed -mno-rtm -mno-serialize -mno-sgx -msha -mshstk -mno-tbm -mno-tsxldtrk -mvaes -mno-waitpkg -mwbnoinvd -mxsave -mxsavec -mxsaveopt -mxsaves -mno-amx-tile -mno-amx-int8 -mno-amx-bf16 -mno-uintr -mno-hreset -mno-kl -mno-widekl -mavxvnni -mno-avx512fp16 -mno-avxifma -mno-avxvnniint8 -mno-avxneconvert -mno-cmpccxadd -mno-amx-fp16 -mno-prefetchi -mno-raoint -mno-amx-complex -mno-avxvnniint16 -mno-sm3 -mno-sha512 -mno-sm4 -mno-apxf -mno-usermsr -mno-avx10.2 -mno-amx-avx512 -mno-amx-tf32 -mno-amx-transpose -mno-amx-fp8 -mno-movrs -mno-amx-movrs --param=l1-cache-size=48 --param=l1-cache-line-size=64 --param=l2-cache-size=1024 -mtune=znver5 -g -O3 -fno-omit-frame-pointer -fcf-protection=none -fopenmp -funroll-loops 
  Number of processes observed:	1
  Number of threads observed:	192
  MAQAO version:		2026.1.0
  MAQAO build:			6d1be1d51c1e63266254997eb301734a7264775d::20260810-150026




+--------------------------------------------------------------------------------------------------------------------+
+                                               1.2  -  Global Metrics                                               +
+--------------------------------------------------------------------------------------------------------------------+

  Total Time:				13.25 s
  Max (Thread Active Time):		12.46 s
  Average Active Time:			5.22 s
  Activity Ratio:			40.2 %
  Average number of active threads:	75.651
  Affinity Stability:			97.8 %
  Time spent in analyzed loops:		72.5 %
  Time spent in analyzed innermost loops: 61.3 %
  Time spent in user code:		73.4 %
  Compilation Options Score:		100
  Array Access Efficiency:		90.1 %

   Potential Speedups
  ----------------------------------------------------
  Perfect Flow Complexity:		1.75
  Perfect OpenMP/MPI/Pthread/TBB:	1.13
  Perfect OpenMP/MPI/Pthread/TBB + Load Distribution:	3.23
  If No Scalar Integer:
      Potential Speedup:		1.01
      Nb Loops to get 80%:		4
  If FP Vectorized:
      Potential Speedup:		1.63
      Nb Loops to get 80%:		2
  If Fully Vectorized:
      Potential Speedup:		2.41
      Nb Loops to get 80%:		3
  If Only FP Arithmetic:
      Potential Speedup:		1.10
      Nb Loops to get 80%:		2




+--------------------------------------------------------------------------------------------------------------------+
+                                             1.3  -  Potential Speedups                                             +
+--------------------------------------------------------------------------------------------------------------------+

  If No Scalar Integer:
      Number of loops   | 1      | 5      | 11     | 15     | 21     | 
      Cumulated Speedup | 1.0024 | 1.0069 | 1.0072 | 1.0072 | 1.0072 | 
  Top 5 loops:
    exec - 83:	1.0024
    exec - 60:	1.0039
    exec - 106:	1.0053
    exec - 90:	1.0067
    exec - 94:	1.0069

  If FP Vectorized:
      Number of loops   | 1      | 5      | 11     | 15     | 21     | 
      Cumulated Speedup | 1.4550 | 1.6261 | 1.6293 | 1.6294 | 1.6294 | 
  Top 5 loops:
    exec - 93:	1.455
    exec - 92:	1.5876
    exec - 105:	1.611
    exec - 83:	1.6211
    exec - 104:	1.6261

  If Fully Vectorized:
      Number of loops   | 1      | 5      | 11     | 15     | 21     | 
      Cumulated Speedup | 1.7366 | 2.3051 | 2.4022 | 2.4095 | 2.4115 | 
  Top 5 loops:
    exec - 93:	1.7366
    exec - 92:	2.009
    exec - 61:	2.1694
    exec - 105:	2.277
    exec - 60:	2.3051

  If Only FP Arithmetic:
      Number of loops   | 1      | 5      | 11     | 15     | 21     | 
      Cumulated Speedup | 1.0430 | 1.1009 | 1.1042 | 1.1043 | 1.1043 | 
  Top 5 loops:
    exec - 61:	1.043
    exec - 87:	1.0844
    exec - 106:	1.091
    exec - 60:	1.0973
    exec - 83:	1.1009



+====================================================================================================================+
+                                                   2  -  SUMMARY                                                    +
+====================================================================================================================+


+--------------------------------------------------------------------------------------------------------------------+
+                                             2.1  -  EXPERIMENT QUALITY                                             +
+--------------------------------------------------------------------------------------------------------------------+

  [4 / 4] Application profile is long enough (12.46 s)
To have good quality measurements, it is advised that the application profiling time is greater than 10 seconds.

  [3 / 3] Most of time spent in analyzed modules comes from functions with source/debug info
-g option gives access to debugging informations, such are source locations.

  [3 / 3] Most of time spent in analyzed modules comes from functions with compilation options informations and
-fno-omit-frame-pointer is present
-fno-omit-frame-pointer improves the accuracy of callchains found during the application profiling.

  [3 / 3] Host configuration allows retrieval of all necessary metrics.


  [2.9989191025977 / 3] Most of time spent in analyzed modules (99.96%) comes from functions compiled with architecture specialization option
-march=znver5


  [3 / 3] Optimization level option is correctly used


  [2 / 2] Application is correctly profiled ("Others" category represents 0.19 % of the execution time)
To have a representative profiling, it is advised that the category "Others" represents less than 20% of the execution
time in order to analyze as much as possible of the user code

  [1 / 1] Lstopo present. The Topology lstopo report will be generated.


  [0 / 0] Fastmath not used
Consider to add ffast-math to compilation flags (or replace -O3 with -Ofast) to unlock potential extra speedup by
relaxing floating-point computation consistency. Warning: floating-point accuracy may be reduced and the compliance
to IEEE/ISO rules/specifications for math functions will be relaxed, typically 'errno' will no longer be set after
calling some math functions.


+--------------------------------------------------------------------------------------------------------------------+
+                                                2.2  -  CODE QUALITY                                                +
+--------------------------------------------------------------------------------------------------------------------+

  [4 / 4] Enough time of the experiment time spent in analyzed loops (72.51%)
If the time spent in analyzed loops is less than 30%, standard loop optimizations will have a limited impact on
application performances.

  [1 / 4] A significant amount of threads are idle (60.60%)
On average, more than 10% of observed threads are idle. Such threads are probably IO/sync waiting. Some hints: use
faster filesystems to read/write data, improve parallel load balancing and/or scheduling.

  [1 / 4] CPU activity is below 90% (40.16%)
CPU cores are idle more than 10% of time. Threads supposed to run on these cores are probably IO/sync waiting. Some
hints: use faster filesystems to read/write data, improve parallel load balancing and/or scheduling.

  [4 / 4] Loop profile is not flat
At least one loop coverage is greater than 4% (48.89%), representing an hotspot for the application

  [4 / 4] Enough time of the experiment time spent in analyzed innermost loops (61.32%)
If the time spent in analyzed innermost loops is less than 15%, standard innermost loop optimizations such as
vectorisation will have a limited impact on application performances.

  [4 / 4] Affinity is good (97.80%)
Threads are not migrating to CPU cores: probably successfully pinned

  [3 / 3] Less than 10% (0.00%) is spend in BLAS1 operations
It could be more efficient to inline by hand BLAS1 operations

  [0 / 3] Too many functions do not use all threads
Functions running on a reduced number of threads (typically sequential code) cover at least 10% of application
walltime (62.68%). Check both "Max Inclusive Time Over Threads" and "Nb Threads" in Functions or Loops tabs and
consider parallelizing sequential regions or improving parallelization of regions running on a reduced number of
threads

  [3 / 3] Cumulative Outermost/In between loops coverage (11.19%) lower than cumulative innermost loop coverage (61.32%)
Having cumulative Outermost/In between loops coverage greater than cumulative innermost loop coverage will make loop
optimization more complex

  [2 / 2] Less than 10% (0.00%) is spend in BLAS2 operations
BLAS2 calls usually could make a poor cache usage and could benefit from inlining.

  [2 / 2] Less than 10% (0.01%) is spend in Libm/SVML (special functions)



+--------------------------------------------------------------------------------------------------------------------+
+                                               2.3  -  LOOPS OVERVIEW                                               +
+--------------------------------------------------------------------------------------------------------------------+

  Top 5 loops:
   + exec - 93  :
     analysis: Execution Time: 48 % - Vectorization Ratio: 15.63 % - Vector Length Use: 14.45 %
     Loop Computation Issues: 8
        [8] [SA] Presence of expensive FP instructions - Perform hoisting, change algorithm, use SVML or proper
            numerical library or perform value profiling (count the number of distinct input values). There are 2
            issues (= instructions) costing 4 points each.
     Control Flow Issues: 13
        [13] [SA] Too many paths (9 paths) - Simplify control structure. There are 9 issues ( = paths) costing 1 point
            each with a malus of 4 points.
     Data Access Issues: 4
        [4] [SA] Presence of special instructions executing on a single port (BLEND/MERGE, BROADCAST) - Simplify data
            access and try to get stride 1 access. There are 4 issues (= instructions) costing 1 point each.
     Vectorization Roadblocks: 13
        [13] [SA] Too many paths (9 paths) - Simplify control structure. There are 9 issues ( = paths) costing 1 point
            each with a malus of 4 points.
     Inefficient Vectorization: 4
        [4] [SA] Presence of special instructions executing on a single port (BLEND/MERGE, BROADCAST) - Simplify data
            access and try to get stride 1 access. There are 4 issues (= instructions) costing 1 point each.

   + exec - 92  :
     analysis: Execution Time: 8 % - Vectorization Ratio: 16.42 % - Vector Length Use: 14.37 %
     Loop Computation Issues: 8
        [8] [SA] Presence of expensive FP instructions - Perform hoisting, change algorithm, use SVML or proper
            numerical library or perform value profiling (count the number of distinct input values). There are 2
            issues (= instructions) costing 4 points each.
     Control Flow Issues: 126
        [124] [SA] Too many paths (120 paths) - Simplify control structure. There are 120 issues ( = paths) costing 1
            point each with a malus of 4 points.
        [2] [SA] Non innermost loop (InBetween) - Collapse loop with innermost ones. This issue costs 2 points.
     Data Access Issues: 4
        [4] [SA] Presence of special instructions executing on a single port (BLEND/MERGE, BROADCAST) - Simplify data
            access and try to get stride 1 access. There are 4 issues (= instructions) costing 1 point each.
     Vectorization Roadblocks: 126
        [124] [SA] Too many paths (120 paths) - Simplify control structure. There are 120 issues ( = paths) costing 1
            point each with a malus of 4 points.
        [2] [SA] Non innermost loop (InBetween) - Collapse loop with innermost ones. This issue costs 2 points.
     Inefficient Vectorization: 4
        [4] [SA] Presence of special instructions executing on a single port (BLEND/MERGE, BROADCAST) - Simplify data
            access and try to get stride 1 access. There are 4 issues (= instructions) costing 1 point each.

   + exec - 61  :
     analysis: Execution Time: 4 % - Vectorization Ratio: 80.00 % - Vector Length Use: 21.88 %
     Data Access Issues: 12
        [12] [SA] Presence of special instructions executing on a single port (INSERT/EXTRACT, BLEND/MERGE,
            SHUFFLE/PERM) - Simplify data access and try to get stride 1 access. There are 12 issues (= instructions)
            costing 1 point each.
     Inefficient Vectorization: 12
        [12] [SA] Presence of special instructions executing on a single port (INSERT/EXTRACT, BLEND/MERGE,
            SHUFFLE/PERM) - Simplify data access and try to get stride 1 access. There are 12 issues (= instructions)
            costing 1 point each.

   + exec - 87  :
     analysis: Execution Time: 3 % - Vectorization Ratio: 100.00 % - Vector Length Use: 100.00 %
     Data Access Issues: 4
        [4] [SA] Presence of constant non unit stride data access - Use array restructuring, perform loop interchange
            or use gather instructions to lower a bit the cost. There are 2 issues ( = data accesses) costing 2 point
            each.
     Vectorization Roadblocks: 4
        [4] [SA] Presence of constant non unit stride data access - Use array restructuring, perform loop interchange
            or use gather instructions to lower a bit the cost. There are 2 issues ( = data accesses) costing 2 point
            each.

   + exec - 105 :
     analysis: Execution Time: 2 % - Vectorization Ratio: 0.00 % - Vector Length Use: 12.50 %
     Loop Computation Issues: 16
        [16] [SA] Presence of expensive FP instructions - Perform hoisting, change algorithm, use SVML or proper
            numerical library or perform value profiling (count the number of distinct input values). There are 4
            issues (= instructions) costing 4 points each.
     Data Access Issues: 8
        [8] [SA] Presence of constant non unit stride data access - Use array restructuring, perform loop interchange
            or use gather instructions to lower a bit the cost. There are 4 issues ( = data accesses) costing 2 point
            each.
     Vectorization Roadblocks: 8
        [8] [SA] Presence of constant non unit stride data access - Use array restructuring, perform loop interchange
            or use gather instructions to lower a bit the cost. There are 4 issues ( = data accesses) costing 2 point
            each.



+====================================================================================================================+
+                                                 3  -  APPLICATION                                                  +
+====================================================================================================================+


+--------------------------------------------------------------------------------------------------------------------+
+                                               3.1  -  Categorization                                               +
+--------------------------------------------------------------------------------------------------------------------+

   Category | IO     | Exe    | System  | Others  | Memory | String | MPI   | TBB   | OMP   | Pthread | Math  |
  ----------+--------+--------+---------+---------+--------+--------+-------+-------+-------+---------+-------+
   Time (%) | 0.00   | 73.38  | 0.33    | 0.19    | 0.00   | 0.07   | 0.00  | 0.00  | 26.02 | 0.00    | 0.01  |




+--------------------------------------------------------------------------------------------------------------------+
+                                          3.2  -  Function Based Profiling                                          +
+--------------------------------------------------------------------------------------------------------------------+

   Buckets                    | Nb Functions              | Coverage                  | Cumulated Coverage        |
  ----------------------------+---------------------------+---------------------------+---------------------------+
   > 8%                       | 3                         | 84.00                     | 84.00                     |
   4% to 8%                   | 1                         | 5.98                      | 89.97                     |
   2% to 4%                   | 2                         | 6.81                      | 96.78                     |
   1% to 2%                   | 1                         | 1.39                      | 98.17                     |
   0.5% to 1%                 | 1                         | 0.56                      | 98.73                     |
   0.25% to 0.5%              | 1                         | 0.48                      | 99.21                     |
   0.125% to 0.25%            | 1                         | 0.15                      | 99.35                     |
   < 0.125%                   | 41                        | 0.65                      | 100.00                    |




+--------------------------------------------------------------------------------------------------------------------+
+                                            3.3  -  Loop Based Profiling                                            +
+--------------------------------------------------------------------------------------------------------------------+

   Buckets                    | Nb Loops                  | Coverage                  | Cumulated Coverage        |
  ----------------------------+---------------------------+---------------------------+---------------------------+
   > 8%                       | 1                         | 48.89                     | 48.89                     |
   4% to 8%                   | 1                         | 4.71                      | 53.60                     |
   2% to 4%                   | 2                         | 6.27                      | 59.86                     |
   1% to 2%                   | 0                         | 0.00                      | 59.86                     |
   0.5% to 1%                 | 2                         | 1.16                      | 61.02                     |
   0.25% to 0.5%              | 0                         | 0.00                      | 61.02                     |
   0.125% to 0.25%            | 0                         | 0.00                      | 61.02                     |
   < 0.125%                   | 17                        | 0.30                      | 61.32                     |


+====================================================================================================================+
+                                                  4  -  FUNCTIONS                                                   +
+====================================================================================================================+


+--------------------------------------------------------------------------------------------------------------------+
+                                              4.1  -  Top 10 Functions                                              +
+--------------------------------------------------------------------------------------------------------------------+

   Function                                               | Module              | Coverage (%)   | Time (s)       |
  --------------------------------------------------------+---------------------+----------------+----------------+
   ljForce._omp_fn.1                                      | exec                | 58.17          | 3.04           |
   gomp_team_barrier_wait_end                             | libgomp.so.1.0.0    | 16.69          | 0.87           |
   gomp_barrier_wait_end                                  | libgomp.so.1.0.0    | 9.14           | 0.48           |
   sortAtomsInCell                                        | exec                | 5.98           | 0.31           |
   ljForce._omp_fn.0                                      | exec                | 3.78           | 0.20           |
   advancePosition._omp_fn.0                              | exec                | 3.03           | 0.16           |
   advanceVelocity._omp_fn.0                              | exec                | 1.39           | 0.07           |
   updateLinkCells                                        | exec                | 0.56           | 5.60           |
   unknown_kernel_region                                  | kernel              | 0.48           | 0.03           |
   msort_with_tmp.part.0                                  | libc.so.6           | 0.15           | 0.01           |


+====================================================================================================================+
+                                                    5  -  LOOPS                                                     +
+====================================================================================================================+


+--------------------------------------------------------------------------------------------------------------------+
+                                                5.1  -  Top 10 Loops                                                +
+--------------------------------------------------------------------------------------------------------------------+

   Loop Id        | Module              | Source Location                                        | Coverage (%)   |
  ----------------+---------------------+--------------------------------------------------------+----------------+
   93             | exec                | ljForce.c:191-191,ljForce.c:197-216                    | 48.89          |
   92             | exec                | ljForce.c:187-187,ljForce.c:191-191,ljForce.c:197-1... | 9.00           |
   61             | exec                | haloExchange.c:621-628                                 | 4.71           |
   87             | exec                | mytype.h:22-22,ljForce.c:161-161                       | 3.78           |
   105            | exec                | timestep.c:88-94                                       | 2.49           |
   106            | exec                | timestep.c:71-71,timestep.c:74-78                      | 1.37           |
   60             | exec                | haloExchange.c:633-642                                 | 0.60           |
   83             | exec                | linkCells.c:211-247,linkCells.c:295-301,linkCells.c... | 0.56           |
   104            | exec                | timestep.c:88-94                                       | 0.54           |
   90             | exec                | ljForce.c:178-182,ljForce.c:187-187,ljForce.c:191-1... | 0.19           |





+====================================================================================================================+
+                                                     6  -  CQA                                                      +
+====================================================================================================================+


+--------------------------------------------------------------------------------------------------------------------+
+                                                   6.1  -  Loops                                                    +
+--------------------------------------------------------------------------------------------------------------------+





      6.1.1  -  Loop 93 from exec
  ==========================================================================================================

The loop is defined in /beegfs/hackathon/users/eoseret/qaas_runs_test/178-663-3091/intel/CoMD/build/CoMD/CoMD/src-openmp/ljForce.c:191,197-216.

The related source loop is not unrolled or unrolled with no peel/tail loop.
Warnings:
 - Ignoring paths for analysis
 - Too many paths. Rerun with max-paths=9
 - RecMII not computed since number of paths is unknown or > max_paths
 - Streams not analyzed since number of paths is unknown or > max_paths

Try to simplify control and/or increase the maximum number of paths per function/loop through the 'max-paths-nb' option.

This loop has 9 execution paths.

The presence of multiple execution paths is typically the main/first bottleneck.
Try to simplify control inside loop: ideally, try to remove all conditional expressions, for example by (if applicable):
 - hoisting them (moving them outside the loop)
 - turning them into conditional moves, MIN or MAX


Ex: if (x<0) x=0 => x = (x<0 ? 0 : x) (or MAX(0,x) after defining the corresponding macro)


      6.1.1.1  -  Path 1
  ----------------------------------------------------------------------------------------------------------

8% of peak computational performance is used (3.88 out of 48.00 FLOP per cycle (GFLOPS @ 1GHz))

      6.1.1.1.1  -  Vectorization
  ----------------------------------------------------------------------------------------------------------

Your loop is not vectorized.
Only 14% of vector register length is used (average across all SSE/AVX instructions).
By fully vectorizing your loop, you can lower the cost of an iteration from 17.00 to 2.25 cycles (7.56x speedup).

Details
15% of SSE/AVX instructions are used in vector version (process two or more data elements in vector registers):
 - 33% of SSE/AVX loads are used in vector version.
 - 33% of SSE/AVX stores are used in vector version.
 - 25% of SSE/AVX addition or subtraction instructions are used in vector version.
 - 0% of SSE/AVX multiply instructions are used in vector version.
 - 11% of SSE/AVX fused multiply-add instructions are used in vector version.
 - 0% of SSE/AVX divide and square root instructions are used in vector version.
 - 20% of SSE/AVX instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.
Since your execution units are vector units, only a fully vectorized loop can use their full power.


Workaround
 - Try another compiler or update/tune your current one:
  * recompile with fassociative-math (included in Ofast or ffast-math) to extend loop vectorization to FP reductions.
 - Remove inter-iterations dependences from your loop and make it unit-stride:
  * If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly:
C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)<<image_row_maj>>
  * If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA):
for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)



      6.1.1.1.2  -  Execution units bottlenecks
  ----------------------------------------------------------------------------------------------------------

Performance is limited by execution of FP multiply or FMA (fused multiply-add) operations (the FP multiply/FMA unit is a bottleneck).

By removing all these bottlenecks, you can lower the cost of an iteration from 17.00 to 11.00 cycles (1.55x speedup).


Workaround
Reduce the number of FP multiply/FMA instructions




      6.1.1.1.3  -  Expensive FP math instructions/calls
  ----------------------------------------------------------------------------------------------------------

Detected performance impact from expensive FP math instructions/calls.
By removing/reexpressing them, you can lower the cost of an iteration from 17.00 to 16.00 cycles (1.06x speedup).


      6.1.1.1.4  -  FMA
  ----------------------------------------------------------------------------------------------------------

Detected 20 FMA (fused multiply-add) operations.
Presence of both ADD/SUB and MUL operations.

Workaround
Try to change order in which elements are evaluated (using parentheses) in arithmetic expressions containing both ADD/SUB and MUL operations to enable your compiler to generate FMA instructions wherever possible.
For instance a + b*c is a valid FMA (MUL then ADD).
However (a+b)* c cannot be translated into an FMA (ADD then MUL).




      6.1.1.1.5  -  Complex instructions
  ----------------------------------------------------------------------------------------------------------

Detected COMPLEX INSTRUCTIONS.


Details
These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.
 - VCOMISD: 4 occurrences<<list_path_1_complex_1>>



      6.1.1.1.6  -  Type of elements and instruction set
  ----------------------------------------------------------------------------------------------------------

42 SSE or AVX instructions are processing arithmetic or math operations on double precision FP elements in scalar mode (one at a time).
4 SSE or AVX instructions are processing arithmetic or math operations on double precision FP elements in vector mode (two at a time).



      6.1.1.1.7  -  Matching between your loop (in the source code) and the binary loop
  ----------------------------------------------------------------------------------------------------------

The binary loop is composed of 66 FP arithmetical operations:
 - 30: addition or subtraction (20 inside FMA instructions)
 - 34: multiply (20 inside FMA instructions)
 - 2: divide
The binary loop is loading 224 bytes (28 double precision FP elements).
The binary loop is storing 64 bytes (8 double precision FP elements).


      6.1.1.1.8  -  Arithmetic intensity
  ----------------------------------------------------------------------------------------------------------

Arithmetic intensity is 0.23 FP operations per loaded or stored byte.







      6.1.2  -  Loop 92 from exec
  ==========================================================================================================

The loop is defined in /beegfs/hackathon/users/eoseret/qaas_runs_test/178-663-3091/intel/CoMD/build/CoMD/CoMD/src-openmp/ljForce.c:187-191,197-216.

Analyzed code is defined in /beegfs/hackathon/users/eoseret/qaas_runs_test/178-663-3091/intel/CoMD/build/CoMD/CoMD/src-openmp/ljForce.c:187,191,197-198,201,206-210,213-216.

Warnings:
 - Non-innermost loop: analyzing only self part (ignoring child loops).
 - Ignoring paths for analysis
 - Too many paths. If you really need to analyze all of the 120 paths individually, rerun with max-paths=120
 - RecMII not computed since number of paths is unknown or > max_paths
 - Streams not analyzed since number of paths is unknown or > max_paths

Try to simplify control and/or increase the maximum number of paths per function/loop through the 'max-paths-nb' option.

This loop has 120 execution paths.

The presence of multiple execution paths is typically the main/first bottleneck.
Try to simplify control inside loop: ideally, try to remove all conditional expressions, for example by (if applicable):
 - hoisting them (moving them outside the loop)
 - turning them into conditional moves, MIN or MAX


Ex: if (x<0) x=0 => x = (x<0 ? 0 : x) (or MAX(0,x) after defining the corresponding macro)


      6.1.2.1  -  Path 1
  ----------------------------------------------------------------------------------------------------------

8% of peak computational performance is used (3.88 out of 48.00 FLOP per cycle (GFLOPS @ 1GHz))

      6.1.2.1.1  -  Vectorization
  ----------------------------------------------------------------------------------------------------------

Your loop is not vectorized.
Only 14% of vector register length is used (average across all SSE/AVX instructions).
By fully vectorizing your loop, you can lower the cost of an iteration from 17.00 to 2.25 cycles (7.56x speedup).

Details
16% of SSE/AVX instructions are used in vector version (process two or more data elements in vector registers):
 - 33% of SSE/AVX loads are used in vector version.
 - 33% of SSE/AVX stores are used in vector version.
 - 25% of SSE/AVX addition or subtraction instructions are used in vector version.
 - 0% of SSE/AVX multiply instructions are used in vector version.
 - 11% of SSE/AVX fused multiply-add instructions are used in vector version.
 - 0% of SSE/AVX divide and square root instructions are used in vector version.
 - 23% of SSE/AVX instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.
Since your execution units are vector units, only a fully vectorized loop can use their full power.


Workaround
 - Try another compiler or update/tune your current one:
  * recompile with fassociative-math (included in Ofast or ffast-math) to extend loop vectorization to FP reductions.
 - Remove inter-iterations dependences from your loop and make it unit-stride:
  * If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly:
C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)<<image_row_maj>>
  * If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA):
for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)



      6.1.2.1.2  -  Execution units bottlenecks
  ----------------------------------------------------------------------------------------------------------

Performance is limited by execution of FP multiply or FMA (fused multiply-add) operations (the FP multiply/FMA unit is a bottleneck).

By removing all these bottlenecks, you can lower the cost of an iteration from 17.00 to 12.88 cycles (1.32x speedup).


Workaround
Reduce the number of FP multiply/FMA instructions




      6.1.2.1.3  -  Expensive FP math instructions/calls
  ----------------------------------------------------------------------------------------------------------

Detected performance impact from expensive FP math instructions/calls.
By removing/reexpressing them, you can lower the cost of an iteration from 17.00 to 16.00 cycles (1.06x speedup).


      6.1.2.1.4  -  FMA
  ----------------------------------------------------------------------------------------------------------

Detected 20 FMA (fused multiply-add) operations.
Presence of both ADD/SUB and MUL operations.

Workaround
Try to change order in which elements are evaluated (using parentheses) in arithmetic expressions containing both ADD/SUB and MUL operations to enable your compiler to generate FMA instructions wherever possible.
For instance a + b*c is a valid FMA (MUL then ADD).
However (a+b)* c cannot be translated into an FMA (ADD then MUL).




      6.1.2.1.5  -  Complex instructions
  ----------------------------------------------------------------------------------------------------------

Detected COMPLEX INSTRUCTIONS.


Details
These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.
 - VCOMISD: 4 occurrences<<list_path_1_complex_1>>



      6.1.2.1.6  -  Type of elements and instruction set
  ----------------------------------------------------------------------------------------------------------

42 SSE or AVX instructions are processing arithmetic or math operations on double precision FP elements in scalar mode (one at a time).
4 SSE or AVX instructions are processing arithmetic or math operations on double precision FP elements in vector mode (two at a time).



      6.1.2.1.7  -  Matching between your loop (in the source code) and the binary loop
  ----------------------------------------------------------------------------------------------------------

The binary loop is composed of 66 FP arithmetical operations:
 - 30: addition or subtraction (20 inside FMA instructions)
 - 34: multiply (20 inside FMA instructions)
 - 2: divide
The binary loop is loading 232 bytes (29 double precision FP elements).
The binary loop is storing 64 bytes (8 double precision FP elements).


      6.1.2.1.8  -  Arithmetic intensity
  ----------------------------------------------------------------------------------------------------------

Arithmetic intensity is 0.22 FP operations per loaded or stored byte.







      6.1.3  -  Loop 61 from exec
  ==========================================================================================================

The loop is defined in /beegfs/hackathon/users/eoseret/qaas_runs_test/178-663-3091/intel/CoMD/build/CoMD/CoMD/src-openmp/haloExchange.c:621-628.

It is main loop of related source loop which is unrolled by 2 (including vectorization).

      6.1.3.1  -  Path 1
  ----------------------------------------------------------------------------------------------------------

0% of peak computational performance is used (0.00 out of 96.00 FLOP per cycle (GFLOPS @ 1GHz))

      6.1.3.1.1  -  Vectorization
  ----------------------------------------------------------------------------------------------------------

Your loop is partially vectorized.
Only 21% of vector register length is used (average across all SSE/AVX instructions).
By fully vectorizing your loop, you can lower the cost of an iteration from 8.00 to 1.75 cycles (4.57x speedup).

Details
80% of SSE/AVX instructions are used in vector version (process two or more data elements in vector registers):
 - 75% of SSE/AVX stores are used in vector version.
 - 60% of SSE/AVX instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.
Since your execution units are vector units, only a fully vectorized loop can use their full power.


Workaround
Use vector aligned instructions:
 1) align your arrays on 64 bytes boundaries: replace { void *p = malloc (size); } with { void *p; posix_memalign (&p, 64, size); }.
 2) inform your compiler that your arrays are vector aligned: if array 'foo' is 64 bytes-aligned, define a pointer 'p_foo' as __builtin_assume_aligned (foo, 64) and use it instead of 'foo' in the loop.



      6.1.3.1.2  -  Execution units bottlenecks
  ----------------------------------------------------------------------------------------------------------

Found no such bottlenecks but see expert reports for more complex bottlenecks.



No data for this section



      6.1.3.1.3  -  Complex instructions
  ----------------------------------------------------------------------------------------------------------

Detected COMPLEX INSTRUCTIONS.


Details
These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.
 - VPEXTRQ: 2 occurrences<<list_path_1_complex_1>>



      6.1.3.1.4  -  Type of elements and instruction set
  ----------------------------------------------------------------------------------------------------------

No instructions are processing arithmetic or math operations on FP elements. This loop is probably writing/copying data or processing integer elements.


      6.1.3.1.5  -  Matching between your loop (in the source code) and the binary loop
  ----------------------------------------------------------------------------------------------------------

The binary loop does not contain any FP arithmetical operations.
The binary loop is loading 224 bytes.
The binary loop is storing 224 bytes.







      6.1.4  -  Loop 87 from exec
  ==========================================================================================================

The loop is defined in:
 - /beegfs/hackathon/users/eoseret/qaas_runs_test/178-663-3091/intel/CoMD/build/CoMD/CoMD/src-openmp/mytype.h:22
 - /beegfs/hackathon/users/eoseret/qaas_runs_test/178-663-3091/intel/CoMD/build/CoMD/CoMD/src-openmp/ljForce.c:161


It is main loop of related source loop which is unrolled by 8 (including vectorization).

      6.1.4.1  -  Path 1
  ----------------------------------------------------------------------------------------------------------

0% of peak computational performance is used (0.00 out of 96.00 FLOP per cycle (GFLOPS @ 1GHz))

      6.1.4.1.1  -  Vectorization
  ----------------------------------------------------------------------------------------------------------

Your loop is fully vectorized, using full register length.


Details
All SSE/AVX instructions are used in vector version (process two or more data elements in vector registers).



      6.1.4.1.2  -  Execution units bottlenecks
  ----------------------------------------------------------------------------------------------------------

Found no such bottlenecks but see expert reports for more complex bottlenecks.



No data for this section



      6.1.4.1.3  -  Complex instructions
  ----------------------------------------------------------------------------------------------------------

Detected COMPLEX INSTRUCTIONS.


Details
These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.
 - VMOVUPD: 32 occurrences<<list_path_1_complex_1>>



      6.1.4.1.4  -  Slow data structures access
  ----------------------------------------------------------------------------------------------------------

Detected data structures (typically arrays) that cannot be efficiently read/written

Details
 - Constant non-unit stride: 2 occurrence(s)
Non-unit stride (uncontiguous) accesses are not efficiently using data caches


Workaround
 - Try to reorganize arrays of structures to structures of arrays
 - Consider to permute loops (see vectorization gain report)



      6.1.4.1.5  -  Vector unaligned load/store instructions
  ----------------------------------------------------------------------------------------------------------

Detected 32 optimal vector unaligned load/store instructions.


Details
 - VMOVUPD: 32 occurrences<<list_path_1_vec_align_1>>


Workaround
Use vector aligned instructions:
 1) align your arrays on 64 bytes boundaries: replace { void *p = malloc (size); } with { void *p; posix_memalign (&p, 64, size); }.
 2) inform your compiler that your arrays are vector aligned: if array 'foo' is 64 bytes-aligned, define a pointer 'p_foo' as __builtin_assume_aligned (foo, 64) and use it instead of 'foo' in the loop.
<<image_vec_align>>


      6.1.4.1.6  -  Type of elements and instruction set
  ----------------------------------------------------------------------------------------------------------

No instructions are processing arithmetic or math operations on FP elements. This loop is probably writing/copying data or processing integer elements.


      6.1.4.1.7  -  Matching between your loop (in the source code) and the binary loop
  ----------------------------------------------------------------------------------------------------------

The binary loop does not contain any FP arithmetical operations.
The binary loop is storing 2048 bytes.







      6.1.5  -  Loop 105 from exec
  ==========================================================================================================

The loop is defined in /beegfs/hackathon/users/eoseret/qaas_runs_test/178-663-3091/intel/CoMD/build/CoMD/CoMD/src-openmp/timestep.c:88-94.

The related source loop is not unrolled or unrolled with no peel/tail loop.

      6.1.5.1  -  Path 1
  ----------------------------------------------------------------------------------------------------------

5% of peak computational performance is used (2.50 out of 48.00 FLOP per cycle (GFLOPS @ 1GHz))

      6.1.5.1.1  -  Vectorization
  ----------------------------------------------------------------------------------------------------------

Your loop is not vectorized.
8 data elements could be processed at once in vector registers.
<<image_1x64_512>>By vectorizing your loop, you can lower the cost of an iteration from 16.00 to 2.00 cycles (8.00x speedup).

Details
All SSE/AVX instructions are used in scalar version (process only one data element in vector registers).
Since your execution units are vector units, only a vectorized loop can use their full power.


Workaround
 - Try another compiler or update/tune your current one:
  * recompile with fassociative-math (included in Ofast or ffast-math) to extend loop vectorization to FP reductions.
 - Remove inter-iterations dependences from your loop and make it unit-stride:
  * If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly:
C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)<<image_row_maj>>
  * If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA):
for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)



      6.1.5.1.2  -  Execution units bottlenecks
  ----------------------------------------------------------------------------------------------------------

Performance is limited by execution of divide and square root operations (the divide/square root unit is a bottleneck).

By removing all these bottlenecks, you can lower the cost of an iteration from 16.00 to 14.00 cycles (1.14x speedup).


Workaround
 - Reduce the number of division or square root instructions:
  * If denominator is constant over iterations, use reciprocal (replace x/y with x*(1/y)). Check precision impact. This will be done by your compiler with ffast-math or Ofast
 - Check whether you really need double precision. If not, switch to single precision to speedup execution





      6.1.5.1.3  -  Expensive FP math instructions/calls
  ----------------------------------------------------------------------------------------------------------

Detected performance impact from expensive FP math instructions/calls.
By removing/reexpressing them, you can lower the cost of an iteration from 16.00 to 12.00 cycles (1.33x speedup).


      6.1.5.1.4  -  FMA
  ----------------------------------------------------------------------------------------------------------

Detected 12 FMA (fused multiply-add) operations.




      6.1.5.1.5  -  Slow data structures access
  ----------------------------------------------------------------------------------------------------------

Detected data structures (typically arrays) that cannot be efficiently read/written

Details
 - Constant non-unit stride: 4 occurrence(s)
Non-unit stride (uncontiguous) accesses are not efficiently using data caches


Workaround
 - Try to reorganize arrays of structures to structures of arrays
 - Consider to permute loops (see vectorization gain report)



      6.1.5.1.6  -  Type of elements and instruction set
  ----------------------------------------------------------------------------------------------------------

28 SSE or AVX instructions are processing arithmetic or math operations on double precision FP elements in scalar mode (one at a time).



      6.1.5.1.7  -  Matching between your loop (in the source code) and the binary loop
  ----------------------------------------------------------------------------------------------------------

The binary loop is composed of 40 FP arithmetical operations:
 - 12: addition or subtraction (all inside FMA instructions)
 - 24: multiply (12 inside FMA instructions)
 - 4: divide
The binary loop is loading 240 bytes (30 double precision FP elements).
The binary loop is storing 96 bytes (12 double precision FP elements).


      6.1.5.1.8  -  Arithmetic intensity
  ----------------------------------------------------------------------------------------------------------

Arithmetic intensity is 0.12 FP operations per loaded or stored byte.


      6.1.5.1.9  -  Unroll opportunity
  ----------------------------------------------------------------------------------------------------------

Loop is potentially data access bound.

Workaround
Unroll your loop if trip count is significantly higher than target unroll factor and if some data references are common to consecutive iterations. This can be done manually. Or by recompiling with -funroll-loops and/or -floop-unroll-and-jam. Or with the unroll (resp. unroll_and_jam) directive on top of the inner (resp. surrounding) loop. You can enforce an unroll factor: #pragma GCC unroll N







      6.1.6  -  Loop 106 from exec
  ==========================================================================================================

The loop is defined in /beegfs/hackathon/users/eoseret/qaas_runs_test/178-663-3091/intel/CoMD/build/CoMD/CoMD/src-openmp/timestep.c:71-78.

Analyzed code is defined in /beegfs/hackathon/users/eoseret/qaas_runs_test/178-663-3091/intel/CoMD/build/CoMD/CoMD/src-openmp/timestep.c:71,74-78.

Warnings:
 - Non-innermost loop: analyzing only self part (ignoring child loops).
 - Ignoring paths for analysis
 - Too many paths. If you really need to analyze all of the 142 paths individually, rerun with max-paths=142
 - RecMII not computed since number of paths is unknown or > max_paths
 - Streams not analyzed since number of paths is unknown or > max_paths

Try to simplify control and/or increase the maximum number of paths per function/loop through the 'max-paths-nb' option.

This loop has 142 execution paths.

The presence of multiple execution paths is typically the main/first bottleneck.
Try to simplify control inside loop: ideally, try to remove all conditional expressions, for example by (if applicable):
 - hoisting them (moving them outside the loop)
 - turning them into conditional moves, MIN or MAX


Ex: if (x<0) x=0 => x = (x<0 ? 0 : x) (or MAX(0,x) after defining the corresponding macro)


      6.1.6.1  -  Path 1
  ----------------------------------------------------------------------------------------------------------

14% of peak computational performance is used (6.94 out of 48.00 FLOP per cycle (GFLOPS @ 1GHz))

      6.1.6.1.1  -  Code clean check
  ----------------------------------------------------------------------------------------------------------

Detected a slowdown caused by scalar integer instructions (typically used for address computation).
By removing them, you can lower the cost of an iteration from 32.88 to 29.50 cycles (1.11x speedup).

Workaround
 - Try to reorganize arrays of structures to structures of arrays
 - Consider to permute loops (see vectorization gain report)



      6.1.6.1.2  -  Vectorization
  ----------------------------------------------------------------------------------------------------------

Your loop is poorly vectorized.
Only 33% of vector register length is used (average across all SSE/AVX instructions).
By fully vectorizing your loop, you can lower the cost of an iteration from 32.88 to 21.21 cycles (1.55x speedup).

Details
33% of SSE/AVX instructions are used in vector version (process two or more data elements in vector registers):
 - 37% of SSE/AVX loads are used in vector version.
 - 38% of SSE/AVX stores are used in vector version.
 - 38% of SSE/AVX fused multiply-add instructions are used in vector version.
 - 0% of SSE/AVX instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.
Since your execution units are vector units, only a fully vectorized loop can use their full power.


Workaround
 - Try another compiler or update/tune your current one:
  * recompile with fassociative-math (included in Ofast or ffast-math) to extend loop vectorization to FP reductions.
 - Remove inter-iterations dependences from your loop and make it unit-stride:
  * If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly:
C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)<<image_row_maj>>
  * If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA):
for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)



      6.1.6.1.3  -  Execution units bottlenecks
  ----------------------------------------------------------------------------------------------------------

Found no such bottlenecks but see expert reports for more complex bottlenecks.




      6.1.6.1.4  -  FMA
  ----------------------------------------------------------------------------------------------------------

Detected 114 FMA (fused multiply-add) operations.




      6.1.6.1.5  -  Complex instructions
  ----------------------------------------------------------------------------------------------------------

Detected COMPLEX INSTRUCTIONS.


Details
These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.
 - LEA: 2 occurrences<<list_path_1_complex_1>>
 - VMOVUPD: 9 occurrences<<list_path_1_complex_2>>



      6.1.6.1.6  -  Vector unaligned load/store instructions
  ----------------------------------------------------------------------------------------------------------

Detected 18 optimal vector unaligned load/store instructions.


Details
 - VMOVUPD: 18 occurrences<<list_path_1_vec_align_1>>


Workaround
Use vector aligned instructions:
 1) align your arrays on 64 bytes boundaries: replace { void *p = malloc (size); } with { void *p; posix_memalign (&p, 64, size); }.
 2) inform your compiler that your arrays are vector aligned: if array 'foo' is 64 bytes-aligned, define a pointer 'p_foo' as __builtin_assume_aligned (foo, 64) and use it instead of 'foo' in the loop.
<<image_vec_align>>


      6.1.6.1.7  -  Type of elements and instruction set
  ----------------------------------------------------------------------------------------------------------

24 SSE or AVX instructions are processing arithmetic or math operations on double precision FP elements in scalar mode (one at a time).
3 SSE or AVX instructions are processing arithmetic or math operations on double precision FP elements in vector mode (two at a time).
3 AVX instructions are processing arithmetic or math operations on double precision FP elements in vector mode (four at a time).
9 AVX-512 instructions are processing arithmetic or math operations on double precision FP elements in vector mode (eight at a time).



      6.1.6.1.8  -  Matching between your loop (in the source code) and the binary loop
  ----------------------------------------------------------------------------------------------------------

The binary loop is composed of 228 FP arithmetical operations:
 - 114: addition or subtraction (all inside FMA instructions)
 - 114: multiply (all inside FMA instructions)
The binary loop is loading 1856 bytes (232 double precision FP elements).
The binary loop is storing 912 bytes (114 double precision FP elements).


      6.1.6.1.9  -  Arithmetic intensity
  ----------------------------------------------------------------------------------------------------------

Arithmetic intensity is 0.08 FP operations per loaded or stored byte.







      6.1.7  -  Loop 60 from exec
  ==========================================================================================================

The loop is defined in /beegfs/hackathon/users/eoseret/qaas_runs_test/178-663-3091/intel/CoMD/build/CoMD/CoMD/src-openmp/haloExchange.c:633-642.

The related source loop is not unrolled or unrolled with no peel/tail loop.

      6.1.7.1  -  Path 1
  ----------------------------------------------------------------------------------------------------------

0% of peak computational performance is used (0.00 out of 96.00 FLOP per cycle (GFLOPS @ 1GHz))

      6.1.7.1.1  -  Code clean check
  ----------------------------------------------------------------------------------------------------------

Detected a slowdown caused by scalar integer instructions (typically used for address computation).
By removing them, you can lower the cost of an iteration from 8.00 to 6.00 cycles (1.33x speedup).

Workaround
 - Try to reorganize arrays of structures to structures of arrays
 - Consider to permute loops (see vectorization gain report)



      6.1.7.1.2  -  Vectorization
  ----------------------------------------------------------------------------------------------------------

Your loop is not vectorized.
Only 10% of vector register length is used (average across all SSE/AVX instructions).
By vectorizing your loop, you can lower the cost of an iteration from 8.00 to 0.87 cycles (9.14x speedup).

Details
All SSE/AVX instructions are used in scalar version (process only one data element in vector registers).
Since your execution units are vector units, only a vectorized loop can use their full power.


Workaround
 - Try another compiler or update/tune your current one:
  * recompile with fassociative-math (included in Ofast or ffast-math) to extend loop vectorization to FP reductions.
 - Remove inter-iterations dependences from your loop and make it unit-stride:
  * If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly:
C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)<<image_row_maj>>
  * If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA):
for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)



      6.1.7.1.3  -  Execution units bottlenecks
  ----------------------------------------------------------------------------------------------------------

Performance is limited by:
 - reading data from caches/RAM (load units are a bottleneck)
 - writing data to caches/RAM (the store unit is a bottleneck)

By removing all these bottlenecks, you can lower the cost of an iteration from 8.00 to 6.00 cycles (1.33x speedup).


Workaround
 - Read less array elements
 - Write less array elements
 - Provide more information to your compiler:
  * hardcode the bounds of the corresponding 'for' loop
  * use the 'restrict' C99 keyword




No data for this section



      6.1.7.1.4  -  Slow data structures access
  ----------------------------------------------------------------------------------------------------------

Detected data structures (typically arrays) that cannot be efficiently read/written

Details
 - Constant non-unit stride: 4 occurrence(s)
Non-unit stride (uncontiguous) accesses are not efficiently using data caches


Workaround
 - Try to reorganize arrays of structures to structures of arrays
 - Consider to permute loops (see vectorization gain report)



      6.1.7.1.5  -  Type of elements and instruction set
  ----------------------------------------------------------------------------------------------------------

No instructions are processing arithmetic or math operations on FP elements. This loop is probably writing/copying data or processing integer elements.


      6.1.7.1.6  -  Matching between your loop (in the source code) and the binary loop
  ----------------------------------------------------------------------------------------------------------

The binary loop does not contain any FP arithmetical operations.
The binary loop is loading 112 bytes.
The binary loop is storing 112 bytes.


      6.1.7.1.7  -  Unroll opportunity
  ----------------------------------------------------------------------------------------------------------

Loop is data access bound.

Workaround
Unroll your loop if trip count is significantly higher than target unroll factor and if some data references are common to consecutive iterations. This can be done manually. Or by recompiling with -funroll-loops and/or -floop-unroll-and-jam. Or with the unroll (resp. unroll_and_jam) directive on top of the inner (resp. surrounding) loop. You can enforce an unroll factor: #pragma GCC unroll N







      6.1.8  -  Loop 83 from exec
  ==========================================================================================================

The loop is defined in /beegfs/hackathon/users/eoseret/qaas_runs_test/178-663-3091/intel/CoMD/build/CoMD/CoMD/src-openmp/linkCells.c:211-247,295-301,352-373.

The related source loop is not unrolled or unrolled with no peel/tail loop.
Warnings:
 - Ignoring paths for analysis
 - Too many paths. Rerun with max-paths=28
 - RecMII not computed since number of paths is unknown or > max_paths
 - Streams not analyzed since number of paths is unknown or > max_paths

Try to simplify control and/or increase the maximum number of paths per function/loop through the 'max-paths-nb' option.

This loop has 28 execution paths.

The presence of multiple execution paths is typically the main/first bottleneck.
Try to simplify control inside loop: ideally, try to remove all conditional expressions, for example by (if applicable):
 - hoisting them (moving them outside the loop)
 - turning them into conditional moves, MIN or MAX


Ex: if (x<0) x=0 => x = (x<0 ? 0 : x) (or MAX(0,x) after defining the corresponding macro)


      6.1.8.1  -  Path 1
  ----------------------------------------------------------------------------------------------------------

0% of peak computational performance is used (0.35 out of 48.00 FLOP per cycle (GFLOPS @ 1GHz))

      6.1.8.1.1  -  Code clean check
  ----------------------------------------------------------------------------------------------------------

Detected a slowdown caused by scalar integer instructions (typically used for address computation).
By removing them, you can lower the cost of an iteration from 17.38 to 9.88 cycles (1.76x speedup).

Workaround
 - Try to reorganize arrays of structures to structures of arrays
 - Consider to permute loops (see vectorization gain report)



      6.1.8.1.2  -  Vectorization
  ----------------------------------------------------------------------------------------------------------

Your loop is not vectorized.
Only 10% of vector register length is used (average across all SSE/AVX instructions).
By vectorizing your loop, you can lower the cost of an iteration from 17.38 to 1.24 cycles (14.05x speedup).

Details
All SSE/AVX instructions are used in scalar version (process only one data element in vector registers).
Since your execution units are vector units, only a vectorized loop can use their full power.


Workaround
 - Try another compiler or update/tune your current one:
  * recompile with fassociative-math (included in Ofast or ffast-math) to extend loop vectorization to FP reductions.
 - Remove inter-iterations dependences from your loop and make it unit-stride:
  * If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly:
C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)<<image_row_maj>>
  * If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA):
for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)



      6.1.8.1.3  -  Execution units bottlenecks
  ----------------------------------------------------------------------------------------------------------

Found no such bottlenecks but see expert reports for more complex bottlenecks.




      6.1.8.1.4  -  FMA
  ----------------------------------------------------------------------------------------------------------

Presence of both ADD/SUB and MUL operations.

Workaround
Try to change order in which elements are evaluated (using parentheses) in arithmetic expressions containing both ADD/SUB and MUL operations to enable your compiler to generate FMA instructions wherever possible.
For instance a + b*c is a valid FMA (MUL then ADD).
However (a+b)* c cannot be translated into an FMA (ADD then MUL).




      6.1.8.1.5  -  Complex instructions
  ----------------------------------------------------------------------------------------------------------

Detected COMPLEX INSTRUCTIONS.


Details
These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.
 - LEA: 4 occurrences<<list_path_1_complex_1>>
 - VCOMISD: 3 occurrences<<list_path_1_complex_2>>
 - VCVTTSD2SI: 3 occurrences<<list_path_1_complex_3>>



      6.1.8.1.6  -  Conversion instructions
  ----------------------------------------------------------------------------------------------------------

Detected expensive conversion instructions.

Details
 - VCVTTSD2SI (FP64 to INT32/64, scalar): 3 occurrences<<list_path_1_cvt_1>>


Workaround
Avoid mixing data with different types. In particular, check if the type of constants is the same as array elements.


      6.1.8.1.7  -  Type of elements and instruction set
  ----------------------------------------------------------------------------------------------------------

12 SSE or AVX instructions are processing arithmetic or math operations on double precision FP elements in scalar mode (one at a time).



      6.1.8.1.8  -  Matching between your loop (in the source code) and the binary loop
  ----------------------------------------------------------------------------------------------------------

The binary loop is composed of 6 FP arithmetical operations:
 - 3: addition or subtraction
 - 3: multiply
The binary loop is loading 116 bytes (14 double precision FP elements).


      6.1.8.1.9  -  Arithmetic intensity
  ----------------------------------------------------------------------------------------------------------

Arithmetic intensity is 0.05 FP operations per loaded or stored byte.







      6.1.9  -  Loop 104 from exec
  ==========================================================================================================

The loop is defined in /beegfs/hackathon/users/eoseret/qaas_runs_test/178-663-3091/intel/CoMD/build/CoMD/CoMD/src-openmp/timestep.c:88-94.

Warnings:
 - Non-innermost loop: analyzing only self part (ignoring child loops).
 - Ignoring paths for analysis
 - Too many paths. Rerun with max-paths=8
 - RecMII not computed since number of paths is unknown or > max_paths
 - Streams not analyzed since number of paths is unknown or > max_paths

Try to simplify control and/or increase the maximum number of paths per function/loop through the 'max-paths-nb' option.

This loop has 8 execution paths.

The presence of multiple execution paths is typically the main/first bottleneck.
Try to simplify control inside loop: ideally, try to remove all conditional expressions, for example by (if applicable):
 - hoisting them (moving them outside the loop)
 - turning them into conditional moves, MIN or MAX


Ex: if (x<0) x=0 => x = (x<0 ? 0 : x) (or MAX(0,x) after defining the corresponding macro)


      6.1.9.1  -  Path 1
  ----------------------------------------------------------------------------------------------------------

5% of peak computational performance is used (2.50 out of 48.00 FLOP per cycle (GFLOPS @ 1GHz))

      6.1.9.1.1  -  Vectorization
  ----------------------------------------------------------------------------------------------------------

Your loop is not vectorized.
Only 12% of vector register length is used (average across all SSE/AVX instructions).
By vectorizing your loop, you can lower the cost of an iteration from 12.00 to 1.50 cycles (8.00x speedup).

Details
All SSE/AVX instructions are used in scalar version (process only one data element in vector registers).
Since your execution units are vector units, only a vectorized loop can use their full power.


Workaround
 - Try another compiler or update/tune your current one:
  * recompile with fassociative-math (included in Ofast or ffast-math) to extend loop vectorization to FP reductions.
 - Remove inter-iterations dependences from your loop and make it unit-stride:
  * If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly:
C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)<<image_row_maj>>
  * If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA):
for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)



      6.1.9.1.2  -  Execution units bottlenecks
  ----------------------------------------------------------------------------------------------------------

Performance is limited by execution of divide and square root operations (the divide/square root unit is a bottleneck).

By removing all these bottlenecks, you can lower the cost of an iteration from 12.00 to 10.50 cycles (1.14x speedup).


Workaround
 - Reduce the number of division or square root instructions:
  * If denominator is constant over iterations, use reciprocal (replace x/y with x*(1/y)). Check precision impact. This will be done by your compiler with ffast-math or Ofast
 - Check whether you really need double precision. If not, switch to single precision to speedup execution





      6.1.9.1.3  -  Expensive FP math instructions/calls
  ----------------------------------------------------------------------------------------------------------

Detected performance impact from expensive FP math instructions/calls.
By removing/reexpressing them, you can lower the cost of an iteration from 12.00 to 9.38 cycles (1.28x speedup).


      6.1.9.1.4  -  FMA
  ----------------------------------------------------------------------------------------------------------

Detected 9 FMA (fused multiply-add) operations.




      6.1.9.1.5  -  Type of elements and instruction set
  ----------------------------------------------------------------------------------------------------------

21 SSE or AVX instructions are processing arithmetic or math operations on double precision FP elements in scalar mode (one at a time).



      6.1.9.1.6  -  Matching between your loop (in the source code) and the binary loop
  ----------------------------------------------------------------------------------------------------------

The binary loop is composed of 30 FP arithmetical operations:
 - 9: addition or subtraction (all inside FMA instructions)
 - 18: multiply (9 inside FMA instructions)
 - 3: divide
The binary loop is loading 224 bytes (28 double precision FP elements).
The binary loop is storing 72 bytes (9 double precision FP elements).


      6.1.9.1.7  -  Arithmetic intensity
  ----------------------------------------------------------------------------------------------------------

Arithmetic intensity is 0.10 FP operations per loaded or stored byte.







      6.1.10  -  Loop 90 from exec
  ==========================================================================================================

The loop is defined in /beegfs/hackathon/users/eoseret/qaas_runs_test/178-663-3091/intel/CoMD/build/CoMD/CoMD/src-openmp/ljForce.c:178-191,197-216.

Analyzed code is defined in /beegfs/hackathon/users/eoseret/qaas_runs_test/178-663-3091/intel/CoMD/build/CoMD/CoMD/src-openmp/ljForce.c:178-182,187,191,213.

Warnings:
 - Non-innermost loop: analyzing only self part (ignoring child loops).
 - Ignoring paths for analysis
 - Too many paths. If you really need to analyze all of the 3495 paths individually, rerun with max-paths=3495
 - RecMII not computed since number of paths is unknown or > max_paths
 - Streams not analyzed since number of paths is unknown or > max_paths

Try to simplify control and/or increase the maximum number of paths per function/loop through the 'max-paths-nb' option.

This loop has 3495 execution paths.

The presence of multiple execution paths is typically the main/first bottleneck.
Try to simplify control inside loop: ideally, try to remove all conditional expressions, for example by (if applicable):
 - hoisting them (moving them outside the loop)
 - turning them into conditional moves, MIN or MAX


Ex: if (x<0) x=0 => x = (x<0 ? 0 : x) (or MAX(0,x) after defining the corresponding macro)


      6.1.10.1  -  Path 1
  ----------------------------------------------------------------------------------------------------------

0% of peak computational performance is used (0.00 out of 96.00 FLOP per cycle (GFLOPS @ 1GHz))

      6.1.10.1.1  -  Code clean check
  ----------------------------------------------------------------------------------------------------------

Detected a slowdown caused by scalar integer instructions (typically used for address computation).
By removing them, you can lower the cost of an iteration from 3.63 to 1.13 cycles (3.22x speedup).

Workaround
 - Try to reorganize arrays of structures to structures of arrays
 - Consider to permute loops (see vectorization gain report)



      6.1.10.1.2  -  Vectorization
  ----------------------------------------------------------------------------------------------------------

Your loop is not vectorized.
Only 9% of vector register length is used (average across all SSE/AVX instructions).
By vectorizing your loop, you can lower the cost of an iteration from 3.63 to 0.28 cycles (12.89x speedup).

Details
All SSE/AVX instructions are used in scalar version (process only one data element in vector registers).
Since your execution units are vector units, only a vectorized loop can use their full power.


Workaround
 - Try another compiler or update/tune your current one:
  * recompile with fassociative-math (included in Ofast or ffast-math) to extend loop vectorization to FP reductions.
 - Remove inter-iterations dependences from your loop and make it unit-stride:
  * If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly:
C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)<<image_row_maj>>
  * If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA):
for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)



      6.1.10.1.3  -  Execution units bottlenecks
  ----------------------------------------------------------------------------------------------------------

Found no such bottlenecks but see expert reports for more complex bottlenecks.



No data for this section



      6.1.10.1.4  -  Type of elements and instruction set
  ----------------------------------------------------------------------------------------------------------

No instructions are processing arithmetic or math operations on FP elements. This loop is probably writing/copying data or processing integer elements.


      6.1.10.1.5  -  Matching between your loop (in the source code) and the binary loop
  ----------------------------------------------------------------------------------------------------------

The binary loop does not contain any FP arithmetical operations.
The binary loop is loading 56 bytes.
The binary loop is storing 28 bytes.





[MAQAO] Info: STOP THE REPORT GENERATION
[MAQAO] Info: 
[MAQAO] Info: If your application produces files, they can be found in directory "/beegfs/hackathon/users/eoseret/qaas_runs_test/178-663-3091/intel/CoMD/run/oneview_runs/defaults/gcc/oneview_run_1786633291"
[MAQAO] Info: 
