OV - exec - Function advancePosition.extracted

	Function: advancePosition.extracted	Module: exec	Source: timestep.c:85-96	Coverage (incl. loops): 0.63% \| (excl. loops): 0.08%

/beegfs/hackathon/users/eoseret/qaas_runs_test/gmz12.benchmarkcenter.megware.com/177-374-1600/CoMD/build/CoMD/CoMD/src-openmp/timestep.c: 85 - 96

--------------------------------------------------------------------------------

85:    #pragma omp parallel for

86:    for (int iBox=0; iBox<nBoxes; iBox++)

87:    {

88:       for (int iOff=MAXATOMS*iBox,ii=0; ii<s->boxes->nAtoms[iBox]; ii++,iOff++)

89:       {

90:          int iSpecies = s->atoms->iSpecies[iOff];

91:          real_t invMass = 1.0/s->species[iSpecies].mass;

92:          s->atoms->r[iOff][0] += dt*s->atoms->p[iOff][0]*invMass;

93:          s->atoms->r[iOff][1] += dt*s->atoms->p[iOff][1]*invMass;

94:          s->atoms->r[iOff][2] += dt*s->atoms->p[iOff][2]*invMass;

95:       }

96:    }

0x40f2d0 PUSH	%RBP

0x40f2d1 MOV	%RSP,%RBP

0x40f2d4 PUSH	%R15

0x40f2d6 PUSH	%R14

0x40f2d8 PUSH	%R13

0x40f2da PUSH	%R12

0x40f2dc PUSH	%RBX

0x40f2dd SUB	$0x48,%RSP

0x40f2e1 MOVL	$0,-0x4c(%RBP)

0x40f2e8 MOV	%RCX,%R15

0x40f2eb MOV	%RDX,-0x58(%RBP)

0x40f2ef MOV	(%RDI),%ESI

0x40f2f1 MOVL	$0,-0x30(%RBP)

0x40f2f8 MOV	%R9D,-0x2c(%RBP)

0x40f2fc MOVL	$0x1,-0x48(%RBP)

0x40f303 SUB	$0x8,%RSP

0x40f307 LEA	-0x48(%RBP),%RAX

0x40f30b LEA	-0x4c(%RBP),%RCX

0x40f30f LEA	-0x30(%RBP),%R8

0x40f313 LEA	-0x2c(%RBP),%R9

0x40f317 MOV	$0x41c950,%EDI

0x40f31c MOV	%ESI,-0x44(%RBP)

0x40f31f MOV	$0x22,%EDX

0x40f324 PUSH	$0x1

0x40f326 PUSH	$0x1

0x40f328 PUSH	%RAX

0x40f329 CALL	403250 <__kmpc_for_static_init_4@plt>

0x40f32e ADD	$0x20,%RSP

0x40f332 MOV	-0x2c(%RBP),%EAX

0x40f335 MOV	-0x30(%RBP),%EBX

0x40f338 MOV	%RAX,-0x40(%RBP)

0x40f33c CMP	%EBX,%EAX

0x40f33e JAE	40f35e

0x40f340 MOV	-0x44(%RBP),%ESI

0x40f343 MOV	$0x41c970,%EDI

0x40f348 ADD	$0x48,%RSP

0x40f34c POP	%RBX

0x40f34d POP	%R12

0x40f34f POP	%R13

0x40f351 POP	%R14

0x40f353 POP	%R15

0x40f355 POP	%RBP

0x40f356 VZEROUPPER

0x40f359 JMP	403310

0x40f35e MOV	-0x58(%RBP),%RAX

0x40f362 VPMOVSXBD	0x6eb4(%RIP),%ZMM2

0x40f36c VPMOVSXBD	0x621b(%RIP),%YMM3

0x40f375 VPMOVSXBQ	0x4331(%RIP),%ZMM5

0x40f37f VPMOVSXBQ	0x432f(%RIP),%ZMM6

0x40f389 VPMOVSXBQ	0x432d(%RIP),%ZMM7

0x40f393 VPMOVSXBQ	0x432b(%RIP),%ZMM8

0x40f39d VPMOVSXBQ	0x4329(%RIP),%ZMM9

0x40f3a7 VPMOVSXBQ	0x4327(%RIP),%ZMM10

0x40f3b1 VMOVDQU64	0x6705(%RIP),%ZMM11

0x40f3bb VPMOVSXBQ	0x431b(%RIP),%ZMM12

0x40f3c5 VPMOVSXBQ	0x4319(%RIP),%ZMM13

0x40f3cf VPMOVSXBQ	0x4317(%RIP),%ZMM14

0x40f3d9 VPMOVSXBQ	0x4315(%RIP),%ZMM15

0x40f3e3 VPMOVSXBQ	0x4313(%RIP),%ZMM16

0x40f3ed VPMOVSXBQ	0x4311(%RIP),%ZMM17

0x40f3f7 VMOVQ	%R15,%XMM0

0x40f3fc MOV	%EBX,%ESI

0x40f3fe SAL	$0x6,%ESI

0x40f401 XOR	%EDI,%EDI

0x40f403 VPXOR	%XMM4,%XMM4,%XMM4

0x40f407 VPBROADCASTQ	%XMM0,%ZMM1

0x40f40d MOV	0x18(%RAX),%RAX

0x40f411 MOV	0x78(%RAX),%RAX

0x40f415 MOV	%RAX,-0x68(%RBP)

0x40f419 MOV	-0x40(%RBP),%RAX

0x40f41d SUB	%EBX,%EAX

0x40f41f MOV	%RAX,-0x40(%RBP)

0x40f423 MOV	%RBX,-0x38(%RBP)

0x40f427 JMP	40f6e4

(107) 0x40f42c VPBROADCASTD	%XMM19,%ZMM19

(107) 0x40f432 MOV	%R14D,%ECX

(107) 0x40f435 LEA	(%R10,%RCX,1),%RAX

(107) 0x40f439 VPBROADCASTD	%XMM18,%ZMM18

(107) 0x40f43f VXORPD	%XMM22,%XMM22,%XMM22

(107) 0x40f445 VXORPD	%XMM24,%XMM24,%XMM24

(107) 0x40f44b VXORPD	%XMM25,%XMM25,%XMM25

(107) 0x40f451 VXORPD	%XMM26,%XMM26,%XMM26

(107) 0x40f457 VXORPD	%XMM27,%XMM27,%XMM27

(107) 0x40f45d VXORPD	%XMM28,%XMM28,%XMM28

(107) 0x40f463 LEA	(%RCX,%RCX,2),%RCX

(107) 0x40f467 VPCMPNLEUD	%ZMM2,%ZMM19,%K1

(107) 0x40f46e VPCMPNLEUD	%YMM2,%YMM19,%K3

(107) 0x40f475 VPCMPNLEUD	%YMM3,%YMM19,%K2

(107) 0x40f47c VPADDD	%ZMM2,%ZMM18,%ZMM18

(107) 0x40f482 VMOVDQU32	(%R15,%RAX,4),%ZMM20{%K1}{z}

(107) 0x40f489 KMOVQ	%K3,%K4

(107) 0x40f48e LEA	(%R10,%R10,2),%RAX

(107) 0x40f492 LEA	(%R8,%RAX,8),%RAX

(107) 0x40f496 LEA	0x1c0(%RAX,%RCX,8),%RAX

(107) 0x40f49e VEXTRACTI64X4	$0x1,%ZMM20,%YMM21

(107) 0x40f4a5 VPMOVSXDQ	%YMM20,%ZMM20

(107) 0x40f4ab VPMOVSXDQ	%YMM21,%ZMM21

(107) 0x40f4b1 VPADDQ	%ZMM20,%ZMM20,%ZMM19

(107) 0x40f4b7 VPXORD	%XMM20,%XMM20,%XMM20

(107) 0x40f4bd VGATHERQPD	0x8(%R11,%ZMM19,8),%ZMM20{%K4}

(107) 0x40f4c5 VPADDQ	%ZMM21,%ZMM21,%ZMM19

(107) 0x40f4cb KMOVQ	%K2,%K4

(107) 0x40f4d0 VGATHERQPD	0x8(%R11,%ZMM19,8),%ZMM22{%K4}

(107) 0x40f4d8 VEXTRACTI64X4	$0x1,%ZMM18,%YMM19

(107) 0x40f4df VPMOVZXDQ	%YMM18,%ZMM18

(107) 0x40f4e5 KMOVQ	%K3,%K4

(107) 0x40f4ea VPMOVZXDQ	%YMM19,%ZMM19

(107) 0x40f4f0 VDIVPD	%ZMM20,%ZMM1,%ZMM21

(107) 0x40f4f6 VDIVPD	%ZMM22,%ZMM1,%ZMM20

(107) 0x40f4fc VPBROADCASTQ	%R10,%ZMM22

(107) 0x40f502 VPADDQ	%ZMM18,%ZMM22,%ZMM18

(107) 0x40f508 VPADDQ	%ZMM19,%ZMM22,%ZMM19

(107) 0x40f50e VPADDQ	%ZMM18,%ZMM18,%ZMM22

(107) 0x40f514 VPADDQ	%ZMM19,%ZMM19,%ZMM23

(107) 0x40f51a VPADDQ	%ZMM18,%ZMM22,%ZMM22

(107) 0x40f520 VPXORD	%XMM18,%XMM18,%XMM18

(107) 0x40f526 VPADDQ	%ZMM19,%ZMM23,%ZMM23

(107) 0x40f52c VPXORD	%XMM19,%XMM19,%XMM19

(107) 0x40f532 VGATHERQPD	(%R9,%ZMM22,8),%ZMM24{%K4}

(107) 0x40f539 KMOVQ	%K3,%K4

(107) 0x40f53e VGATHERQPD	(%R8,%ZMM22,8),%ZMM18{%K4}

(107) 0x40f545 KMOVQ	%K3,%K4

(107) 0x40f54a VGATHERQPD	0x8(%R9,%ZMM22,8),%ZMM25{%K4}

(107) 0x40f552 KMOVQ	%K3,%K4

(107) 0x40f557 VGATHERQPD	0x8(%R8,%ZMM22,8),%ZMM26{%K4}

(107) 0x40f55f KMOVQ	%K2,%K4

(107) 0x40f564 VGATHERQPD	(%R9,%ZMM23,8),%ZMM27{%K4}

(107) 0x40f56b KMOVQ	%K2,%K4

(107) 0x40f570 VGATHERQPD	(%R8,%ZMM23,8),%ZMM19{%K4}

(107) 0x40f577 KMOVQ	%K2,%K4

(107) 0x40f57c VGATHERQPD	0x8(%R9,%ZMM23,8),%ZMM28{%K4}

(107) 0x40f584 KMOVQ	%K2,%K4

(107) 0x40f589 VFMADD231PD	%ZMM24,%ZMM21,%ZMM18

(107) 0x40f58f VXORPD	%XMM24,%XMM24,%XMM24

(107) 0x40f595 VGATHERQPD	0x8(%R8,%ZMM23,8),%ZMM24{%K4}

(107) 0x40f59d KMOVQ	%K3,%K4

(107) 0x40f5a2 VFMADD231PD	%ZMM25,%ZMM21,%ZMM26

(107) 0x40f5a8 VXORPD	%XMM25,%XMM25,%XMM25

(107) 0x40f5ae VGATHERQPD	0x10(%R9,%ZMM22,8),%ZMM25{%K4}

(107) 0x40f5b6 KMOVQ	%K2,%K4

(107) 0x40f5bb VFMADD231PD	%ZMM27,%ZMM20,%ZMM19

(107) 0x40f5c1 VXORPD	%XMM27,%XMM27,%XMM27

(107) 0x40f5c7 VGATHERQPD	0x10(%R9,%ZMM23,8),%ZMM27{%K4}

(107) 0x40f5cf VFMADD231PD	%ZMM28,%ZMM20,%ZMM24

(107) 0x40f5d5 VXORPD	%XMM28,%XMM28,%XMM28

(107) 0x40f5db VGATHERQPD	0x10(%R8,%ZMM22,8),%ZMM28{%K3}

(107) 0x40f5e3 VXORPD	%XMM22,%XMM22,%XMM22

(107) 0x40f5e9 VGATHERQPD	0x10(%R8,%ZMM23,8),%ZMM22{%K2}

(107) 0x40f5f1 VMOVAPD	%ZMM26,%ZMM23

(107) 0x40f5f7 VPERMT2PD	%ZMM18,%ZMM5,%ZMM23

(107) 0x40f5fd VMOVAPD	%ZMM24,%ZMM29

(107) 0x40f603 VPERMT2PD	%ZMM19,%ZMM5,%ZMM29

(107) 0x40f609 VFMADD231PD	%ZMM25,%ZMM21,%ZMM28

(107) 0x40f60f VMOVAPD	%ZMM18,%ZMM21

(107) 0x40f615 VPERMT2PD	%ZMM26,%ZMM6,%ZMM21

(107) 0x40f61b VPERMT2PD	%ZMM26,%ZMM7,%ZMM18

(107) 0x40f621 VMOVAPD	%ZMM19,%ZMM26

(107) 0x40f627 VPERMT2PD	%ZMM24,%ZMM6,%ZMM26

(107) 0x40f62d VPERMT2PD	%ZMM24,%ZMM7,%ZMM19

(107) 0x40f633 VFMADD231PD	%ZMM27,%ZMM20,%ZMM22

(107) 0x40f639 VPMOVM2B	%K1,%ZMM20

(107) 0x40f63f VPERMT2B	%ZMM4,%ZMM11,%ZMM20

(107) 0x40f645 VPERMT2PD	%ZMM22,%ZMM10,%ZMM29

(107) 0x40f64b VPERMT2PD	%ZMM28,%ZMM10,%ZMM23

(107) 0x40f651 VPERMT2PD	%ZMM22,%ZMM8,%ZMM19

(107) 0x40f657 VPERMT2PD	%ZMM22,%ZMM9,%ZMM26

(107) 0x40f65d VPMOVB2M	%ZMM20,%K1

(107) 0x40f663 VPERMT2PD	%ZMM28,%ZMM8,%ZMM18

(107) 0x40f669 VPERMT2PD	%ZMM28,%ZMM9,%ZMM21

(107) 0x40f66f KSHIFTRQ	$0x30,%K1,%K2

(107) 0x40f675 KSHIFTRQ	$0x28,%K1,%K3

(107) 0x40f67b KSHIFTRQ	$0x20,%K1,%K4

(107) 0x40f681 VMOVUPD	%ZMM0,(%RAX){%K2}

(107) 0x40f687 VMOVUPD	%ZMM0,-0x40(%RAX){%K2}

(107) 0x40f68e KSHIFTRQ	$0x18,%K1,%K2

(107) 0x40f694 VMOVUPD	%ZMM29,-0x80(%RAX){%K3}

(107) 0x40f69b VMOVUPD	%ZMM26,-0xc0(%RAX){%K4}

(107) 0x40f6a2 VMOVUPD	%ZMM19,-0x100(%RAX){%K2}

(107) 0x40f6a9 KSHIFTRQ	$0x10,%K1,%K2

(107) 0x40f6af VMOVUPD	%ZMM23,-0x140(%RAX){%K2}

(107) 0x40f6b6 KSHIFTRQ	$0x8,%K1,%K2

(107) 0x40f6bc VMOVUPD	%ZMM21,-0x180(%RAX){%K2}

(107) 0x40f6c3 VMOVUPD	%ZMM18,-0x1c0(%RAX){%K1}

(107) 0x40f6ca NOPW	(%RAX,%RAX,1)

(107) 0x40f6d0 ADD	$0x40,%ESI

(107) 0x40f6d3 LEA	0x1(%RDI),%RAX

(107) 0x40f6d7 CMP	-0x40(%RBP),%RDI

(107) 0x40f6db MOV	%RAX,%RDI

(107) 0x40f6de JE	40f340

(107) 0x40f6e4 MOV	-0x68(%RBP),%RCX

(107) 0x40f6e8 LEA	(%RDI,%RBX,1),%RAX

(107) 0x40f6ec MOVSXD	(%RCX,%RAX,4),%R12

(107) 0x40f6f0 TEST	%R12,%R12

(107) 0x40f6f3 JLE	40f6d0

(107) 0x40f6f5 MOV	-0x58(%RBP),%RDX

(107) 0x40f6f9 LEA	(%RDI,%RBX,1),%R10D

(107) 0x40f6fd MOV	%ESI,%R13D

(107) 0x40f700 LEA	(,%R13,8),%RAX

(107) 0x40f708 SAL	$0x2,%R13

(107) 0x40f70c SAL	$0x6,%R10D

(107) 0x40f710 MOV	0x20(%RDX),%RCX

(107) 0x40f714 MOV	0x28(%RDX),%R11

(107) 0x40f718 LEA	(,%R10,8),%RDX

(107) 0x40f720 LEA	(%RDX,%RDX,2),%RDX

(107) 0x40f724 MOV	0x20(%RCX),%R9

(107) 0x40f728 MOV	0x18(%RCX),%R8

(107) 0x40f72c MOV	0x10(%RCX),%R15

(107) 0x40f730 LEA	(%R12,%R10,1),%RCX

(107) 0x40f734 LEA	(%RCX,%RCX,2),%RCX

(107) 0x40f738 LEA	-0x8(%R9,%RCX,8),%RBX

(107) 0x40f73d LEA	(%R8,%RDX,1),%R14

(107) 0x40f741 CMP	%R14,%RBX

(107) 0x40f744 JB	40f7e0

(107) 0x40f74a LEA	-0x8(%R8,%RCX,8),%RCX

(107) 0x40f74f ADD	%R9,%RDX

(107) 0x40f752 CMP	%RDX,%RCX

(107) 0x40f755 JB	40f7e0

(107) 0x40f75b MOV	-0x38(%RBP),%RBX

(107) 0x40f75f LEA	0x10(%RAX,%RAX,2),%RAX

(107) 0x40f764 ADD	%R13,%R15

(107) 0x40f767 XOR	%ECX,%ECX

(107) 0x40f769 NOPL	(%RAX)

  (110) 0x40f770 MOVSXD	(%R15,%RCX,4),%RDX

  (110) 0x40f774 VMOVSD	-0x10(%R9,%RAX,1),%XMM19

  (110) 0x40f77c INC	%RCX

  (110) 0x40f77f SAL	$0x4,%RDX

  (110) 0x40f783 VDIVSD	0x8(%R11,%RDX,1),%XMM0,%XMM18

  (110) 0x40f78b VFMADD213SD	-0x10(%R8,%RAX,1),%XMM18,%XMM19

  (110) 0x40f793 VMOVSD	%XMM19,-0x10(%R8,%RAX,1)

  (110) 0x40f79b VMOVSD	-0x8(%R9,%RAX,1),%XMM19

  (110) 0x40f7a3 VFMADD213SD	-0x8(%R8,%RAX,1),%XMM18,%XMM19

  (110) 0x40f7ab VMOVSD	%XMM19,-0x8(%R8,%RAX,1)

  (110) 0x40f7b3 VMOVSD	(%R9,%RAX,1),%XMM19

  (110) 0x40f7ba VFMADD213SD	(%R8,%RAX,1),%XMM18,%XMM19

  (110) 0x40f7c1 VMOVSD	%XMM19,(%R8,%RAX,1)

  (110) 0x40f7c8 ADD	$0x18,%RAX

  (110) 0x40f7cc CMP	%ECX,%R12D

  (110) 0x40f7cf JNE	40f770

(107) 0x40f7d1 JMP	40f6d0

0x40f7d6 NOPW	%CS:(%RAX,%RAX,1)

(107) 0x40f7e0 MOV	-0x38(%RBP),%RBX

(107) 0x40f7e4 LEA	(%RAX,%RAX,2),%RDX

(107) 0x40f7e8 MOV	%R12D,%R14D

(107) 0x40f7eb AND	$0x7ffffff0,%R14D

(107) 0x40f7f2 JE	40fa53

(107) 0x40f7f8 XOR	%EAX,%EAX

(107) 0x40f7fa CMP	$0xa,%R12D

(107) 0x40f7fe JB	40fa7a

(107) 0x40f804 LEA	(%R15,%R13,1),%RCX

(107) 0x40f808 XOR	%EBX,%EBX

(107) 0x40f80a MOV	%RDX,-0x60(%RBP)

(107) 0x40f80e XCHG	%AX,%AX

  (109) 0x40f810 VPMOVSXDQ	0x20(%RCX,%RBX,4),%ZMM19

  (109) 0x40f818 VPMOVSXDQ	(%RCX,%RBX,4),%ZMM18

  (109) 0x40f81f VMOVUPD	0xc0(%R9,%RDX,1),%ZMM25

  (109) 0x40f827 VMOVUPD	0x100(%R9,%RDX,1),%ZMM20

  (109) 0x40f82f LEA	0x140(%R8,%RDX,1),%RAX

  (109) 0x40f837 VPCMPEQB	%XMM0,%XMM0,%K1

  (109) 0x40f83d VXORPD	%XMM22,%XMM22,%XMM22

  (109) 0x40f843 VMOVUPD	(%R9,%RDX,1),%ZMM21

  (109) 0x40f84a VMOVUPD	0x40(%R9,%RDX,1),%ZMM28

  (109) 0x40f852 VMOVUPD	0x80(%R9,%RDX,1),%ZMM31

  (109) 0x40f85a ADD	$0x10,%RBX

  (109) 0x40f85e VMOVUPD	-0x140(%RAX),%ZMM26

  (109) 0x40f865 VMOVAPD	%ZMM25,%ZMM24

  (109) 0x40f86b VMOVAPD	%ZMM25,%ZMM23

  (109) 0x40f871 VPERMT2PD	%ZMM20,%ZMM12,%ZMM24

  (109) 0x40f877 VPERMT2PD	%ZMM20,%ZMM14,%ZMM23

  (109) 0x40f87d VPERMT2PD	%ZMM25,%ZMM16,%ZMM20

  (109) 0x40f883 VXORPD	%XMM25,%XMM25,%XMM25

  (109) 0x40f889 VMOVAPD	%ZMM21,%ZMM29

  (109) 0x40f88f VMOVAPD	%ZMM21,%ZMM30

  (109) 0x40f895 VPERMT2PD	%ZMM28,%ZMM12,%ZMM29

  (109) 0x40f89b VPERMT2PD	%ZMM28,%ZMM14,%ZMM30

  (109) 0x40f8a1 VPERMT2PD	%ZMM21,%ZMM16,%ZMM28

  (109) 0x40f8a7 VMOVAPD	%ZMM26,%ZMM21

  (109) 0x40f8ad VPADDQ	%ZMM19,%ZMM19,%ZMM19

  (109) 0x40f8b3 VPADDQ	%ZMM18,%ZMM18,%ZMM27

  (109) 0x40f8b9 VMOVUPD	-0x100(%RAX),%ZMM18

  (109) 0x40f8c0 VGATHERQPD	0x8(%R11,%ZMM19,8),%ZMM22{%K1}

  (109) 0x40f8c8 VPCMPEQB	%XMM0,%XMM0,%K1

  (109) 0x40f8ce VMOVAPD	%ZMM26,%ZMM19

  (109) 0x40f8d4 VGATHERQPD	0x8(%R11,%ZMM27,8),%ZMM25{%K1}

  (109) 0x40f8dc VMOVUPD	-0xc0(%RAX),%ZMM27

  (109) 0x40f8e3 VPERMT2PD	%ZMM31,%ZMM13,%ZMM29

  (109) 0x40f8e9 VPERMT2PD	%ZMM31,%ZMM15,%ZMM30

  (109) 0x40f8ef VPERMT2PD	%ZMM31,%ZMM17,%ZMM28

  (109) 0x40f8f5 VMOVUPD	-0x80(%RAX),%ZMM31

  (109) 0x40f8fc VDIVPD	%ZMM22,%ZMM1,%ZMM22

  (109) 0x40f902 VDIVPD	%ZMM25,%ZMM1,%ZMM25

  (109) 0x40f908 VPERMT2PD	%ZMM18,%ZMM12,%ZMM21

  (109) 0x40f90e VPERMT2PD	%ZMM18,%ZMM14,%ZMM19

  (109) 0x40f914 VPERMT2PD	%ZMM26,%ZMM16,%ZMM18

  (109) 0x40f91a VPERMT2PD	%ZMM27,%ZMM13,%ZMM21

  (109) 0x40f920 VPERMT2PD	%ZMM27,%ZMM15,%ZMM19

  (109) 0x40f926 VPERMT2PD	%ZMM27,%ZMM17,%ZMM18

  (109) 0x40f92c VMOVUPD	-0x40(%RAX),%ZMM27

  (109) 0x40f933 VFMADD231PD	%ZMM29,%ZMM25,%ZMM21

  (109) 0x40f939 VMOVUPD	0x140(%R9,%RDX,1),%ZMM29

  (109) 0x40f941 VFMADD231PD	%ZMM30,%ZMM25,%ZMM19

  (109) 0x40f947 VMOVUPD	(%RAX),%ZMM30

  (109) 0x40f94d VFMADD231PD	%ZMM28,%ZMM25,%ZMM18

  (109) 0x40f953 VMOVAPD	%ZMM31,%ZMM25

  (109) 0x40f959 VMOVAPD	%ZMM31,%ZMM28

  (109) 0x40f95f ADD	$0x180,%RDX

  (109) 0x40f966 VPERMT2PD	%ZMM27,%ZMM12,%ZMM25

  (109) 0x40f96c VPERMT2PD	%ZMM27,%ZMM14,%ZMM28

  (109) 0x40f972 VPERMT2PD	%ZMM31,%ZMM16,%ZMM27

  (109) 0x40f978 VPERMT2PD	%ZMM29,%ZMM13,%ZMM24

  (109) 0x40f97e VPERMT2PD	%ZMM30,%ZMM13,%ZMM25

  (109) 0x40f984 VPERMT2PD	%ZMM29,%ZMM15,%ZMM23

  (109) 0x40f98a VPERMT2PD	%ZMM30,%ZMM15,%ZMM28

  (109) 0x40f990 VPERMT2PD	%ZMM29,%ZMM17,%ZMM20

  (109) 0x40f996 VPERMT2PD	%ZMM30,%ZMM17,%ZMM27

  (109) 0x40f99c VFMADD231PD	%ZMM23,%ZMM22,%ZMM28

  (109) 0x40f9a2 VFMADD231PD	%ZMM24,%ZMM22,%ZMM25

  (109) 0x40f9a8 VMOVAPD	%ZMM21,%ZMM23

  (109) 0x40f9ae VFMADD231PD	%ZMM20,%ZMM22,%ZMM27

  (109) 0x40f9b4 VMOVAPD	%ZMM21,%ZMM22

  (109) 0x40f9ba VPERMT2PD	%ZMM19,%ZMM6,%ZMM23

  (109) 0x40f9c0 VPERMT2PD	%ZMM19,%ZMM7,%ZMM22

  (109) 0x40f9c6 VPERMT2PD	%ZMM21,%ZMM5,%ZMM19

  (109) 0x40f9cc VMOVAPD	%ZMM25,%ZMM20

  (109) 0x40f9d2 VMOVAPD	%ZMM28,%ZMM21

  (109) 0x40f9d8 VPERMT2PD	%ZMM25,%ZMM5,%ZMM21

  (109) 0x40f9de VPERMT2PD	%ZMM28,%ZMM7,%ZMM20

  (109) 0x40f9e4 VPERMT2PD	%ZMM28,%ZMM6,%ZMM25

  (109) 0x40f9ea VPERMT2PD	%ZMM18,%ZMM10,%ZMM19

  (109) 0x40f9f0 VPERMT2PD	%ZMM18,%ZMM8,%ZMM22

  (109) 0x40f9f6 VPERMT2PD	%ZMM18,%ZMM9,%ZMM23

  (109) 0x40f9fc VPERMT2PD	%ZMM27,%ZMM9,%ZMM25

  (109) 0x40fa02 VPERMT2PD	%ZMM27,%ZMM10,%ZMM21

  (109) 0x40fa08 VPERMT2PD	%ZMM27,%ZMM8,%ZMM20

  (109) 0x40fa0e VMOVUPD	%ZMM23,-0x100(%RAX)

  (109) 0x40fa15 VMOVUPD	%ZMM22,-0x140(%RAX)

  (109) 0x40fa1c VMOVUPD	%ZMM19,-0xc0(%RAX)

  (109) 0x40fa23 VMOVUPD	%ZMM20,-0x80(%RAX)

  (109) 0x40fa2a VMOVUPD	%ZMM21,(%RAX)

  (109) 0x40fa30 VMOVUPD	%ZMM25,-0x40(%RAX)

  (109) 0x40fa37 CMP	%R14D,%EBX

  (109) 0x40fa3a JB	40f810

(107) 0x40fa40 MOV	-0x38(%RBP),%RBX

(107) 0x40fa44 MOV	-0x60(%RBP),%RDX

(107) 0x40fa48 CMP	%R14D,%R12D

(107) 0x40fa4b JE	40f6d0

(107) 0x40fa51 JMP	40fa56

(107) 0x40fa53 XOR	%R14D,%R14D

(107) 0x40fa56 VMOVD	%R12D,%XMM19

(107) 0x40fa5c VMOVD	%R14D,%XMM18

(107) 0x40fa62 VPSUBD	%ZMM18,%ZMM19,%ZMM19

(107) 0x40fa68 VMOVD	%XMM19,%EAX

(107) 0x40fa6e CMP	$0xa,%EAX

(107) 0x40fa71 JAE	40f42c

(107) 0x40fa77 MOV	%R14D,%EAX

(107) 0x40fa7a MOV	%EAX,%EAX

(107) 0x40fa7c LEA	(%RAX,%RAX,2),%RCX

(107) 0x40fa80 ADD	%R13,%R15

(107) 0x40fa83 LEA	(%RDX,%RCX,8),%RCX

(107) 0x40fa87 ADD	%RCX,%R8

(107) 0x40fa8a ADD	%RCX,%R9

(107) 0x40fa8d XOR	%ECX,%ECX

(107) 0x40fa8f NOP

  (108) 0x40fa90 MOVSXD	(%R15,%RAX,4),%RDX

  (108) 0x40fa94 VMOVSD	(%R9,%RCX,1),%XMM19

  (108) 0x40fa9b INC	%RAX

  (108) 0x40fa9e SAL	$0x4,%RDX

  (108) 0x40faa2 VDIVSD	0x8(%R11,%RDX,1),%XMM0,%XMM18

  (108) 0x40faaa VFMADD213SD	(%R8,%RCX,1),%XMM18,%XMM19

  (108) 0x40fab1 VMOVDDUP	%XMM18,%XMM18

  (108) 0x40fab7 VMOVSD	%XMM19,(%R8,%RCX,1)

  (108) 0x40fabe VMOVUPD	0x8(%R9,%RCX,1),%XMM19

  (108) 0x40fac9 VFMADD213PD	0x8(%R8,%RCX,1),%XMM19,%XMM18

  (108) 0x40fad4 VMOVUPD	%XMM18,0x8(%R8,%RCX,1)

  (108) 0x40fadf ADD	$0x18,%RCX

  (108) 0x40fae3 CMP	%EAX,%R12D

  (108) 0x40fae6 JNE	40fa90

(107) 0x40fae8 JMP	40f6d0

0x40faed NOPL	(%RAX)

Coverage (%)	Name	Source Location	Module
►98.72+	__kmp_invoke_microtask		libiomp5.so
○	__kmp_fork_call		libiomp5.so
○	__kmpc_fork_call		libiomp5.so
○	timestep	timestep.c:43	exec
○	main	CoMD.c:125	exec
►1.16+	__kmp_invoke_microtask		libiomp5.so
○	__kmp_fork_call		libiomp5.so
○	__kmpc_fork_call		libiomp5.so
○	timestep	timestep.c:43	exec
○	main	CoMD.c:125	exec
○	__libc_start_call_main		libc.so.6

Coverage (%)	Name	Source Location	Module
►100.00+	__kmp_invoke_microtask		libiomp5.so
○	__kmp_invoke_task_func		libiomp5.so

Coverage (%)	Name	Source Location	Module
►100.00+	__kmp_invoke_microtask		libiomp5.so
○	__kmp_invoke_task_func		libiomp5.so

Coverage (%)	Name	Source Location	Module
►100.00+	__kmp_invoke_microtask		libiomp5.so
○	__kmp_invoke_task_func		libiomp5.so

Coverage (%)	Name	Source Location	Module
►100.00+	__kmp_invoke_microtask		libiomp5.so
○	__kmp_invoke_task_func		libiomp5.so

Coverage (%)	Name	Source Location	Module
►100.00+	__kmp_invoke_microtask		libiomp5.so
○	__kmp_invoke_task_func		libiomp5.so

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.08% of application time for run 8x1

Source file and lines	timestep.c:85-96
Module	exec

The function is defined in /beegfs/hackathon/users/eoseret/qaas_runs_test/gmz12.benchmarkcenter.megware.com/177-374-1600/CoMD/build/CoMD/CoMD/src-openmp/timestep.c:85-96.

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 9.38 to 7.50 cycles (1.25x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is probably not vectorized. Only 13% of vector register length is used (average across all SSE/AVX instructions). By vectorizing your function, you can lower the cost of an iteration from 9.38 to 5.67 cycles (1.65x speedup).

Details

Store and arithmetical SSE/AVX instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

__kmpc_for_static_init_4@plt: 1 occurrences►
- /beegfs/hackathon/users/eoseret/qaas_runs_test/gmz12.benchmarkcenter.megware.com/177-374-1600/CoMD/build/CoMD/CoMD/src-openmp/timestep.c:85

Conversion instructions

Detected expensive conversion instructions.

Details

VPMOVSXBD: 2 occurrences►
- /beegfs/hackathon/users/eoseret/qaas_runs_test/gmz12.benchmarkcenter.megware.com/177-374-1600/CoMD/build/CoMD/CoMD/src-openmp/timestep.c:88
- /beegfs/hackathon/users/eoseret/qaas_runs_test/gmz12.benchmarkcenter.megware.com/177-374-1600/CoMD/build/CoMD/CoMD/src-openmp/timestep.c:88
VPMOVSXBQ: 12 occurrences►
- /beegfs/hackathon/users/eoseret/qaas_runs_test/gmz12.benchmarkcenter.megware.com/177-374-1600/CoMD/build/CoMD/CoMD/src-openmp/timestep.c:94
- /beegfs/hackathon/users/eoseret/qaas_runs_test/gmz12.benchmarkcenter.megware.com/177-374-1600/CoMD/build/CoMD/CoMD/src-openmp/timestep.c:94
- /beegfs/hackathon/users/eoseret/qaas_runs_test/gmz12.benchmarkcenter.megware.com/177-374-1600/CoMD/build/CoMD/CoMD/src-openmp/timestep.c:94
- /beegfs/hackathon/users/eoseret/qaas_runs_test/gmz12.benchmarkcenter.megware.com/177-374-1600/CoMD/build/CoMD/CoMD/src-openmp/timestep.c:94
- /beegfs/hackathon/users/eoseret/qaas_runs_test/gmz12.benchmarkcenter.megware.com/177-374-1600/CoMD/build/CoMD/CoMD/src-openmp/timestep.c:94
- /beegfs/hackathon/users/eoseret/qaas_runs_test/gmz12.benchmarkcenter.megware.com/177-374-1600/CoMD/build/CoMD/CoMD/src-openmp/timestep.c:94
- /beegfs/hackathon/users/eoseret/qaas_runs_test/gmz12.benchmarkcenter.megware.com/177-374-1600/CoMD/build/CoMD/CoMD/src-openmp/timestep.c:92
- /beegfs/hackathon/users/eoseret/qaas_runs_test/gmz12.benchmarkcenter.megware.com/177-374-1600/CoMD/build/CoMD/CoMD/src-openmp/timestep.c:92
- /beegfs/hackathon/users/eoseret/qaas_runs_test/gmz12.benchmarkcenter.megware.com/177-374-1600/CoMD/build/CoMD/CoMD/src-openmp/timestep.c:93
- /beegfs/hackathon/users/eoseret/qaas_runs_test/gmz12.benchmarkcenter.megware.com/177-374-1600/CoMD/build/CoMD/CoMD/src-openmp/timestep.c:93
- /beegfs/hackathon/users/eoseret/qaas_runs_test/gmz12.benchmarkcenter.megware.com/177-374-1600/CoMD/build/CoMD/CoMD/src-openmp/timestep.c:94
- /beegfs/hackathon/users/eoseret/qaas_runs_test/gmz12.benchmarkcenter.megware.com/177-374-1600/CoMD/build/CoMD/CoMD/src-openmp/timestep.c:94

Workaround

Avoid mixing data with different types. In particular, check if the type of constants is the same as array elements.

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 232 bytes. The binary function is storing 60 bytes.

General properties

nb instructions	76
nb uops	75
loop length	361
used x86 registers	14
used mmx registers	0
used xmm registers	2
used ymm registers	1
used zmm registers	15
nb stack references	9

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	9.38 cycles
front end	9.38 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	3.17	3.17	3.17	3.17	3.17	3.17	8.50	8.50	8.50	8.50	0.00	7.50	7.50	0.00	0.00	0.00
cycles	3.17	3.17	3.17	3.17	3.17	3.17	8.50	8.50	8.50	8.50	0.00	7.50	7.50	0.00	0.00	0.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	9.38
Dispatch	8.50
Overall L1	9.38

Vectorization ratios

all	42%
load	88%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	22%

Vector efficiency ratios

all	13%
load	17%
store	9%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	12%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 9.38 cycles. At this rate:

9% of peak load performance is reached (24.75 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
5% of peak store performance is reached (6.40 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Performance is limited by instruction throughput (loading/decoding program instructions to execution core) (front-end is a bottleneck). By removing all these bottlenecks, you can lower the cost of an iteration from 9.38 to 8.50 cycles (1.10x speedup).

ASM code

In the binary file, the address of the function is: 40f2d0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P11	P12	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB $0x48,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOVL $0,-0x4c(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (6.3%)
MOV %RCX,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
MOV %RDX,-0x58(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (12.5%)
MOV (%RDI),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	scal (6.3%)
MOVL $0,-0x30(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (6.3%)
MOV %R9D,-0x2c(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (6.3%)
MOVL $0x1,-0x48(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (6.3%)
SUB $0x8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (12.5%)
LEA -0x48(%RBP),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
LEA -0x4c(%RBP),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
LEA -0x30(%RBP),%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
LEA -0x2c(%RBP),%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
MOV $0x41c950,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
MOV %ESI,-0x44(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (6.3%)
MOV $0x22,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (6.3%)
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CALL 403250 <__kmpc_for_static_init_4@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0.50	N/A
ADD $0x20,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV -0x2c(%RBP),%EAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
MOV -0x30(%RBP),%EBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
MOV %RAX,-0x40(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (12.5%)
CMP %EBX,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (6.3%)
JAE 40f35e <advancePosition.extracted+0x8e>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0.33-1	N/A
MOV -0x44(%RBP),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	scal (6.3%)
MOV $0x41c970,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
ADD $0x48,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (12.5%)
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
VZEROUPPER	1	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
JMP 403310 <__kmpc_for_static_fini@plt>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0.50	N/A
MOV -0x58(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
VPMOVSXBD 0x6eb4(%RIP),%ZMM2	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	4	0.50	vect (25.0%)
VPMOVSXBD 0x621b(%RIP),%YMM3	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	2	0.50	vect (12.5%)
VPMOVSXBQ 0x4331(%RIP),%ZMM5	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	4	0.50	vect (12.5%)
VPMOVSXBQ 0x432f(%RIP),%ZMM6	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	4	0.50	vect (12.5%)
VPMOVSXBQ 0x432d(%RIP),%ZMM7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	4	0.50	vect (12.5%)
VPMOVSXBQ 0x432b(%RIP),%ZMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	4	0.50	vect (12.5%)
VPMOVSXBQ 0x4329(%RIP),%ZMM9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	4	0.50	vect (12.5%)
VPMOVSXBQ 0x4327(%RIP),%ZMM10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	4	0.50	vect (12.5%)
VMOVDQU64 0x6705(%RIP),%ZMM11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.50	vect (100.0%)
VPMOVSXBQ 0x431b(%RIP),%ZMM12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	4	0.50	vect (12.5%)
VPMOVSXBQ 0x4319(%RIP),%ZMM13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	4	0.50	vect (12.5%)
VPMOVSXBQ 0x4317(%RIP),%ZMM14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	4	0.50	vect (12.5%)
VPMOVSXBQ 0x4315(%RIP),%ZMM15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	4	0.50	vect (12.5%)
VPMOVSXBQ 0x4313(%RIP),%ZMM16	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	4	0.50	vect (12.5%)
VPMOVSXBQ 0x4311(%RIP),%ZMM17	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	4	0.50	vect (12.5%)
VMOVQ %R15,%XMM0	1	0	0	1	0	0	0	0	0	0	0	0	0	2	1	scal (12.5%)
MOV %EBX,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
SAL $0x6,%ESI	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.33	scal (6.3%)
XOR %EDI,%EDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VPXOR %XMM4,%XMM4,%XMM4	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
VPBROADCASTQ %XMM0,%ZMM1	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
MOV 0x18(%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
MOV 0x78(%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
MOV %RAX,-0x68(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (12.5%)
MOV -0x40(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
SUB %EBX,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
MOV %RAX,-0x40(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (12.5%)
MOV %RBX,-0x38(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (12.5%)
JMP 40f6e4 <advancePosition.extracted+0x414>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0.50	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.13	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.13	N/A

The code analyzed by CQA in that panel excludes loops and represents 0.08% of application time for run 8x1

Source file and lines	timestep.c:85-96
Module	exec

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 9.38 to 7.50 cycles (1.25x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

__kmpc_for_static_init_4@plt: 1 occurrences►
- /beegfs/hackathon/users/eoseret/qaas_runs_test/gmz12.benchmarkcenter.megware.com/177-374-1600/CoMD/build/CoMD/CoMD/src-openmp/timestep.c:85

Conversion instructions

Detected expensive conversion instructions.

Details

VPMOVSXBD: 2 occurrences►
- /beegfs/hackathon/users/eoseret/qaas_runs_test/gmz12.benchmarkcenter.megware.com/177-374-1600/CoMD/build/CoMD/CoMD/src-openmp/timestep.c:88
- /beegfs/hackathon/users/eoseret/qaas_runs_test/gmz12.benchmarkcenter.megware.com/177-374-1600/CoMD/build/CoMD/CoMD/src-openmp/timestep.c:88
VPMOVSXBQ: 12 occurrences►
- /beegfs/hackathon/users/eoseret/qaas_runs_test/gmz12.benchmarkcenter.megware.com/177-374-1600/CoMD/build/CoMD/CoMD/src-openmp/timestep.c:94
- /beegfs/hackathon/users/eoseret/qaas_runs_test/gmz12.benchmarkcenter.megware.com/177-374-1600/CoMD/build/CoMD/CoMD/src-openmp/timestep.c:94
- /beegfs/hackathon/users/eoseret/qaas_runs_test/gmz12.benchmarkcenter.megware.com/177-374-1600/CoMD/build/CoMD/CoMD/src-openmp/timestep.c:94
- /beegfs/hackathon/users/eoseret/qaas_runs_test/gmz12.benchmarkcenter.megware.com/177-374-1600/CoMD/build/CoMD/CoMD/src-openmp/timestep.c:94
- /beegfs/hackathon/users/eoseret/qaas_runs_test/gmz12.benchmarkcenter.megware.com/177-374-1600/CoMD/build/CoMD/CoMD/src-openmp/timestep.c:94
- /beegfs/hackathon/users/eoseret/qaas_runs_test/gmz12.benchmarkcenter.megware.com/177-374-1600/CoMD/build/CoMD/CoMD/src-openmp/timestep.c:94
- /beegfs/hackathon/users/eoseret/qaas_runs_test/gmz12.benchmarkcenter.megware.com/177-374-1600/CoMD/build/CoMD/CoMD/src-openmp/timestep.c:92
- /beegfs/hackathon/users/eoseret/qaas_runs_test/gmz12.benchmarkcenter.megware.com/177-374-1600/CoMD/build/CoMD/CoMD/src-openmp/timestep.c:92
- /beegfs/hackathon/users/eoseret/qaas_runs_test/gmz12.benchmarkcenter.megware.com/177-374-1600/CoMD/build/CoMD/CoMD/src-openmp/timestep.c:93
- /beegfs/hackathon/users/eoseret/qaas_runs_test/gmz12.benchmarkcenter.megware.com/177-374-1600/CoMD/build/CoMD/CoMD/src-openmp/timestep.c:93
- /beegfs/hackathon/users/eoseret/qaas_runs_test/gmz12.benchmarkcenter.megware.com/177-374-1600/CoMD/build/CoMD/CoMD/src-openmp/timestep.c:94
- /beegfs/hackathon/users/eoseret/qaas_runs_test/gmz12.benchmarkcenter.megware.com/177-374-1600/CoMD/build/CoMD/CoMD/src-openmp/timestep.c:94

Workaround

Avoid mixing data with different types. In particular, check if the type of constants is the same as array elements.

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 232 bytes. The binary function is storing 60 bytes.

General properties

nb instructions	76
nb uops	75
loop length	361
used x86 registers	14
used mmx registers	0
used xmm registers	2
used ymm registers	1
used zmm registers	15
nb stack references	9

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	9.38 cycles
front end	9.38 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	3.17	3.17	3.17	3.17	3.17	3.17	8.50	8.50	8.50	8.50	0.00	7.50	7.50	0.00	0.00	0.00
cycles	3.17	3.17	3.17	3.17	3.17	3.17	8.50	8.50	8.50	8.50	0.00	7.50	7.50	0.00	0.00	0.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	9.38
Dispatch	8.50
Overall L1	9.38

Vectorization ratios

all	42%
load	88%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	22%

Vector efficiency ratios

all	13%
load	17%
store	9%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	12%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 9.38 cycles. At this rate:

9% of peak load performance is reached (24.75 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
5% of peak store performance is reached (6.40 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

ASM code

In the binary file, the address of the function is: 40f2d0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P11	P12	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB $0x48,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOVL $0,-0x4c(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (6.3%)
MOV %RCX,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
MOV %RDX,-0x58(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (12.5%)
MOV (%RDI),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	scal (6.3%)
MOVL $0,-0x30(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (6.3%)
MOV %R9D,-0x2c(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (6.3%)
MOVL $0x1,-0x48(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (6.3%)
SUB $0x8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (12.5%)
LEA -0x48(%RBP),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
LEA -0x4c(%RBP),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
LEA -0x30(%RBP),%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
LEA -0x2c(%RBP),%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
MOV $0x41c950,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
MOV %ESI,-0x44(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (6.3%)
MOV $0x22,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (6.3%)
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CALL 403250 <__kmpc_for_static_init_4@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0.50	N/A
ADD $0x20,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV -0x2c(%RBP),%EAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
MOV -0x30(%RBP),%EBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
MOV %RAX,-0x40(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (12.5%)
CMP %EBX,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (6.3%)
JAE 40f35e <advancePosition.extracted+0x8e>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0.33-1	N/A
MOV -0x44(%RBP),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	scal (6.3%)
MOV $0x41c970,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
ADD $0x48,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (12.5%)
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
VZEROUPPER	1	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
JMP 403310 <__kmpc_for_static_fini@plt>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0.50	N/A
MOV -0x58(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
VPMOVSXBD 0x6eb4(%RIP),%ZMM2	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	4	0.50	vect (25.0%)
VPMOVSXBD 0x621b(%RIP),%YMM3	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	2	0.50	vect (12.5%)
VPMOVSXBQ 0x4331(%RIP),%ZMM5	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	4	0.50	vect (12.5%)
VPMOVSXBQ 0x432f(%RIP),%ZMM6	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	4	0.50	vect (12.5%)
VPMOVSXBQ 0x432d(%RIP),%ZMM7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	4	0.50	vect (12.5%)
VPMOVSXBQ 0x432b(%RIP),%ZMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	4	0.50	vect (12.5%)
VPMOVSXBQ 0x4329(%RIP),%ZMM9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	4	0.50	vect (12.5%)
VPMOVSXBQ 0x4327(%RIP),%ZMM10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	4	0.50	vect (12.5%)
VMOVDQU64 0x6705(%RIP),%ZMM11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.50	vect (100.0%)
VPMOVSXBQ 0x431b(%RIP),%ZMM12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	4	0.50	vect (12.5%)
VPMOVSXBQ 0x4319(%RIP),%ZMM13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	4	0.50	vect (12.5%)
VPMOVSXBQ 0x4317(%RIP),%ZMM14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	4	0.50	vect (12.5%)
VPMOVSXBQ 0x4315(%RIP),%ZMM15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	4	0.50	vect (12.5%)
VPMOVSXBQ 0x4313(%RIP),%ZMM16	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	4	0.50	vect (12.5%)
VPMOVSXBQ 0x4311(%RIP),%ZMM17	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	4	0.50	vect (12.5%)
VMOVQ %R15,%XMM0	1	0	0	1	0	0	0	0	0	0	0	0	0	2	1	scal (12.5%)
MOV %EBX,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
SAL $0x6,%ESI	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.33	scal (6.3%)
XOR %EDI,%EDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VPXOR %XMM4,%XMM4,%XMM4	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
VPBROADCASTQ %XMM0,%ZMM1	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
MOV 0x18(%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
MOV 0x78(%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
MOV %RAX,-0x68(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (12.5%)
MOV -0x40(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
SUB %EBX,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
MOV %RAX,-0x40(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (12.5%)
MOV %RBX,-0x38(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (12.5%)
JMP 40f6e4 <advancePosition.extracted+0x414>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0.50	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.13	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.13	N/A

▶Scalability Runs Description

Run 8x1	Number processes: 8Number nodes: NANumber processes per node: 8Run Command: <executable> -x 200 -y 200 -z 200 --xproc=2 --yproc=2 --zproc=2MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=24 --rank-by fill --report-bindings Dataset: Run Directory: /beegfs/hackathon/users/eoseret/qaas_runs_test/gmz12.benchmarkcenter.megware.com/177-374-1600/CoMD/run/oneview_runs/multicore/icx_1/oneview_run_1773746383OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threadsOMP_NUM_THREADS: 1
Run 8x8	Number processes: 8Number processes per node: 8Run Command: <executable> -x 200 -y 200 -z 200 --xproc=2 --yproc=2 --zproc=2MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=24 --rank-by fill --report-bindings Dataset: Run Directory: /beegfs/hackathon/users/eoseret/qaas_runs_test/gmz12.benchmarkcenter.megware.com/177-374-1600/CoMD/run/oneview_runs/multicore/icx_1/oneview_run_1773746383OMP_NUM_THREADS: 8OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads
Run 8x12	Number processes: 8Number processes per node: 8Run Command: <executable> -x 200 -y 200 -z 200 --xproc=2 --yproc=2 --zproc=2MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=24 --rank-by fill --report-bindings Dataset: Run Directory: /beegfs/hackathon/users/eoseret/qaas_runs_test/gmz12.benchmarkcenter.megware.com/177-374-1600/CoMD/run/oneview_runs/multicore/icx_1/oneview_run_1773746383OMP_NUM_THREADS: 12OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads
Run 8x16	Number processes: 8Number processes per node: 8Run Command: <executable> -x 200 -y 200 -z 200 --xproc=2 --yproc=2 --zproc=2MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=24 --rank-by fill --report-bindings Dataset: Run Directory: /beegfs/hackathon/users/eoseret/qaas_runs_test/gmz12.benchmarkcenter.megware.com/177-374-1600/CoMD/run/oneview_runs/multicore/icx_1/oneview_run_1773746383OMP_NUM_THREADS: 16OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads
Run 8x20	Number processes: 8Number processes per node: 8Run Command: <executable> -x 200 -y 200 -z 200 --xproc=2 --yproc=2 --zproc=2MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=24 --rank-by fill --report-bindings Dataset: Run Directory: /beegfs/hackathon/users/eoseret/qaas_runs_test/gmz12.benchmarkcenter.megware.com/177-374-1600/CoMD/run/oneview_runs/multicore/icx_1/oneview_run_1773746383OMP_NUM_THREADS: 20OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads
Run 8x24	Number processes: 8Number processes per node: 8Run Command: <executable> -x 200 -y 200 -z 200 --xproc=2 --yproc=2 --zproc=2MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=24 --rank-by fill --report-bindings Dataset: Run Directory: /beegfs/hackathon/users/eoseret/qaas_runs_test/gmz12.benchmarkcenter.megware.com/177-374-1600/CoMD/run/oneview_runs/multicore/icx_1/oneview_run_1773746383OMP_NUM_THREADS: 24OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads

(8x1) Efficiency	(8x1) Potential Speed-Up (%)	(8x8) Efficiency	(8x8) Potential Speed-Up (%)	(8x12) Efficiency	(8x12) Potential Speed-Up (%)	(8x16) Efficiency	(8x16) Potential Speed-Up (%)	(8x20) Efficiency	(8x20) Potential Speed-Up (%)	(8x24) Efficiency	(8x24) Potential Speed-Up (%)
1	0	1.13	0	0.74	0.22	0.57	0.41	0.48	0.48	0.39	0.62

Speed-Up and Efficiency

▶Detailed Speed-Up and Efficiency

Run	Number of threads	Efficiency (ideal is 1)	Speedup	Ideal Speedup	Time (s)	Coverage (%)
8x1	8	1	1	1	2.5599989891052	0.63235199451447
8x8	40	1.13	5.63	5	0.48500001430511	0.79184812307358
8x12	72	0.74	6.7	9	0.43500003218651	0.88013970851898
8x16	104	0.57	7.45	13	0.40499997138977	0.95180326700211
8x20	136	0.48	8.24	17	0.36499997973442	0.92482900619507
8x24	168	0.39	8.22	21	0.36500000953674	1.0119928121567

Name	Coverage (%)	Time (s)
▼advancePosition.extracted–	0.63	2.53
▼Loop 107 - timestep.c:85-96 - exec–	0.36	1.43
○Loop 109 - timestep.c:88-94 - exec	0.19	0.74
○Loop 108 - timestep.c:88-93 - exec	0.01	0.42
○Loop 110 - timestep.c:88-94 - exec	0.00	0.00

Report Configuration

Code clean check

Workaround

Vectorization

Details

Workaround

Execution units bottlenecks

CALL instructions

Details

Conversion instructions

Details

Workaround

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code

Code clean check

Workaround

Vectorization

Details

Workaround

Execution units bottlenecks

CALL instructions

Details

Conversion instructions

Details

Workaround

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code

▶Scalability Runs Description

▼Columns Filter

Speed-Up and Efficiency

▶Detailed Speed-Up and Efficiency