OV - exec - Function advanceVelocity.extracted

	Function: advanceVelocity.extracted	Module: exec	Source: timestep.c:71-80	Coverage (incl. loops): 1.90% \| (excl. loops): 0.02%

/beegfs/hackathon/users/eoseret/qaas_runs_test/gmz12.benchmarkcenter.megware.com/177-374-1600/CoMD/build/CoMD/CoMD/src-openmp/timestep.c: 71 - 80

--------------------------------------------------------------------------------

71:    #pragma omp parallel for

72:    for (int iBox=0; iBox<nBoxes; iBox++)

73:    {

74:       for (int iOff=MAXATOMS*iBox,ii=0; ii<s->boxes->nAtoms[iBox]; ii++,iOff++)

75:       {

76:          s->atoms->p[iOff][0] += dt*s->atoms->f[iOff][0];

77:          s->atoms->p[iOff][1] += dt*s->atoms->f[iOff][1];

78:          s->atoms->p[iOff][2] += dt*s->atoms->f[iOff][2];

79:       }

80:    }

0x40ee10 PUSH	%RBP

0x40ee11 MOV	%RSP,%RBP

0x40ee14 PUSH	%R15

0x40ee16 PUSH	%R14

0x40ee18 PUSH	%R13

0x40ee1a PUSH	%R12

0x40ee1c PUSH	%RBX

0x40ee1d SUB	$0x28,%RSP

0x40ee21 MOVL	$0,-0x3c(%RBP)

0x40ee28 MOV	%RCX,%R15

0x40ee2b MOV	%RDX,-0x48(%RBP)

0x40ee2f MOV	(%RDI),%ESI

0x40ee31 MOVL	$0,-0x30(%RBP)

0x40ee38 MOV	%R9D,-0x2c(%RBP)

0x40ee3c MOVL	$0x1,-0x38(%RBP)

0x40ee43 SUB	$0x8,%RSP

0x40ee47 LEA	-0x38(%RBP),%RAX

0x40ee4b LEA	-0x3c(%RBP),%RCX

0x40ee4f LEA	-0x30(%RBP),%R8

0x40ee53 LEA	-0x2c(%RBP),%R9

0x40ee57 MOV	$0x41c8f0,%EDI

0x40ee5c MOV	%ESI,-0x34(%RBP)

0x40ee5f MOV	$0x22,%EDX

0x40ee64 PUSH	$0x1

0x40ee66 PUSH	$0x1

0x40ee68 PUSH	%RAX

0x40ee69 CALL	403250 <__kmpc_for_static_init_4@plt>

0x40ee6e ADD	$0x20,%RSP

0x40ee72 MOV	-0x30(%RBP),%EAX

0x40ee75 MOV	-0x2c(%RBP),%ECX

0x40ee78 CMP	%EAX,%ECX

0x40ee7a JAE	40ee9a

0x40ee7c MOV	-0x34(%RBP),%ESI

0x40ee7f MOV	$0x41c910,%EDI

0x40ee84 ADD	$0x28,%RSP

0x40ee88 POP	%RBX

0x40ee89 POP	%R12

0x40ee8b POP	%R13

0x40ee8d POP	%R14

0x40ee8f POP	%R15

0x40ee91 POP	%RBP

0x40ee92 VZEROUPPER

0x40ee95 JMP	403310

0x40ee9a MOV	-0x48(%RBP),%RDX

0x40ee9e VPMOVSXBQ	0x4800(%RIP),%ZMM2

0x40eea8 VPMOVSXBQ	0x47fe(%RIP),%ZMM3

0x40eeb2 VPMOVSXBQ	0x47fc(%RIP),%ZMM4

0x40eebc VPMOVSXBQ	0x47fa(%RIP),%ZMM5

0x40eec6 VPMOVSXBQ	0x47f8(%RIP),%ZMM6

0x40eed0 VPMOVSXBQ	0x47f6(%RIP),%ZMM7

0x40eeda VPMOVSXBQ	0x47f4(%RIP),%ZMM8

0x40eee4 VMOVQ	%R15,%XMM0

0x40eee9 MOV	%EAX,%ESI

0x40eeeb SUB	%EAX,%ECX

0x40eeed SAL	$0x6,%ESI

0x40eef0 XOR	%EDI,%EDI

0x40eef2 VPBROADCASTQ	%XMM0,%ZMM1

0x40eef8 MOV	0x18(%RDX),%RDX

0x40eefc MOV	0x78(%RDX),%RDX

0x40ef00 MOV	%RDX,-0x50(%RBP)

0x40ef04 JMP	40ef23

0x40ef06 NOPW	%CS:(%RAX,%RAX,1)

(102) 0x40ef10 ADD	$0x40,%ESI

(102) 0x40ef13 LEA	0x1(%RDI),%RDX

(102) 0x40ef17 CMP	%RCX,%RDI

(102) 0x40ef1a MOV	%RDX,%RDI

(102) 0x40ef1d JE	40ee7c

(102) 0x40ef23 MOV	-0x50(%RBP),%R8

(102) 0x40ef27 LEA	(%RDI,%RAX,1),%RDX

(102) 0x40ef2b MOVSXD	(%R8,%RDX,4),%R8

(102) 0x40ef2f TEST	%R8,%R8

(102) 0x40ef32 JLE	40ef10

(102) 0x40ef34 MOV	-0x48(%RBP),%R9

(102) 0x40ef38 LEA	(%RDI,%RAX,1),%R12D

(102) 0x40ef3c MOV	%R8,%R11

(102) 0x40ef3f MOV	%ESI,%EDX

(102) 0x40ef41 SAL	$0x3,%RDX

(102) 0x40ef45 SAL	$0x6,%R12D

(102) 0x40ef49 ADD	%R12,%R11

(102) 0x40ef4c LEA	(,%R12,8),%RBX

(102) 0x40ef54 LEA	(%R11,%R11,2),%R11

(102) 0x40ef58 LEA	(%RBX,%RBX,2),%RBX

(102) 0x40ef5c MOV	0x20(%R9),%R10

(102) 0x40ef60 MOV	0x20(%R10),%R9

(102) 0x40ef64 MOV	0x28(%R10),%R10

(102) 0x40ef68 LEA	-0x8(%R10,%R11,8),%R14

(102) 0x40ef6d LEA	(%R9,%RBX,1),%R15

(102) 0x40ef71 CMP	%R15,%R14

(102) 0x40ef74 JB	40efe0

(102) 0x40ef76 LEA	-0x8(%R9,%R11,8),%R11

(102) 0x40ef7b ADD	%R10,%RBX

(102) 0x40ef7e CMP	%RBX,%R11

(102) 0x40ef81 JB	40efe0

(102) 0x40ef83 LEA	0x10(%RDX,%RDX,2),%RDX

(102) 0x40ef88 NOPL	(%RAX,%RAX,1)

  (106) 0x40ef90 VMOVSD	-0x10(%R10,%RDX,1),%XMM9

  (106) 0x40ef97 VFMADD213SD	-0x10(%R9,%RDX,1),%XMM0,%XMM9

  (106) 0x40ef9e VMOVSD	%XMM9,-0x10(%R9,%RDX,1)

  (106) 0x40efa5 VMOVSD	-0x8(%R10,%RDX,1),%XMM9

  (106) 0x40efac VFMADD213SD	-0x8(%R9,%RDX,1),%XMM0,%XMM9

  (106) 0x40efb3 VMOVSD	%XMM9,-0x8(%R9,%RDX,1)

  (106) 0x40efba VMOVSD	(%R10,%RDX,1),%XMM9

  (106) 0x40efc0 VFMADD213SD	(%R9,%RDX,1),%XMM0,%XMM9

  (106) 0x40efc6 VMOVSD	%XMM9,(%R9,%RDX,1)

  (106) 0x40efcc ADD	$0x18,%RDX

  (106) 0x40efd0 DEC	%R8D

  (106) 0x40efd3 JNE	40ef90

(102) 0x40efd5 JMP	40ef10

0x40efda NOPW	(%RAX,%RAX,1)

(102) 0x40efe0 LEA	(%RDX,%RDX,2),%R11

(102) 0x40efe4 MOV	%R8D,%R15D

(102) 0x40efe7 AND	$0x7ffffff8,%R15D

(102) 0x40efee JE	40f140

(102) 0x40eff4 MOV	%R8D,%R13D

(102) 0x40eff7 AND	$0x7fffffe0,%R13D

(102) 0x40effe JE	40f148

(102) 0x40f004 XOR	%R14D,%R14D

(102) 0x40f007 MOV	%R11,%RBX

(102) 0x40f00a NOPW	(%RAX,%RAX,1)

  (105) 0x40f010 LEA	0x200(%R10,%RBX,1),%RDX

  (105) 0x40f018 ADD	$0x20,%R14D

  (105) 0x40f01c VMOVUPD	(%RDX),%ZMM9

  (105) 0x40f022 VMOVUPD	0x40(%RDX),%ZMM10

  (105) 0x40f029 VMOVUPD	0x80(%RDX),%ZMM11

  (105) 0x40f030 VMOVUPD	0xc0(%RDX),%ZMM12

  (105) 0x40f037 VMOVUPD	-0x200(%RDX),%ZMM13

  (105) 0x40f03e VMOVUPD	-0x1c0(%RDX),%ZMM14

  (105) 0x40f045 VMOVUPD	-0x180(%RDX),%ZMM15

  (105) 0x40f04c VMOVUPD	-0x140(%RDX),%ZMM16

  (105) 0x40f053 VMOVUPD	-0x100(%RDX),%ZMM17

  (105) 0x40f05a VMOVUPD	-0xc0(%RDX),%ZMM18

  (105) 0x40f061 VMOVUPD	-0x80(%RDX),%ZMM19

  (105) 0x40f068 VMOVUPD	-0x40(%RDX),%ZMM20

  (105) 0x40f06f LEA	0x1c0(%R9,%RBX,1),%RDX

  (105) 0x40f077 ADD	$0x300,%RBX

  (105) 0x40f07e VFMADD213PD	(%RDX),%ZMM1,%ZMM20

  (105) 0x40f084 VFMADD213PD	-0x40(%RDX),%ZMM1,%ZMM19

  (105) 0x40f08b VFMADD213PD	-0x80(%RDX),%ZMM1,%ZMM18

  (105) 0x40f092 VFMADD213PD	-0xc0(%RDX),%ZMM1,%ZMM17

  (105) 0x40f099 VFMADD213PD	-0x100(%RDX),%ZMM1,%ZMM16

  (105) 0x40f0a0 VFMADD213PD	-0x140(%RDX),%ZMM1,%ZMM15

  (105) 0x40f0a7 VFMADD213PD	-0x180(%RDX),%ZMM1,%ZMM14

  (105) 0x40f0ae VFMADD213PD	-0x1c0(%RDX),%ZMM1,%ZMM13

  (105) 0x40f0b5 VFMADD213PD	0x100(%RDX),%ZMM1,%ZMM12

  (105) 0x40f0bc VFMADD213PD	0xc0(%RDX),%ZMM1,%ZMM11

  (105) 0x40f0c3 VFMADD213PD	0x80(%RDX),%ZMM1,%ZMM10

  (105) 0x40f0ca VFMADD213PD	0x40(%RDX),%ZMM1,%ZMM9

  (105) 0x40f0d1 VMOVUPD	%ZMM9,0x40(%RDX)

  (105) 0x40f0d8 VMOVUPD	%ZMM10,0x80(%RDX)

  (105) 0x40f0df VMOVUPD	%ZMM11,0xc0(%RDX)

  (105) 0x40f0e6 VMOVUPD	%ZMM12,0x100(%RDX)

  (105) 0x40f0ed VMOVUPD	%ZMM13,-0x1c0(%RDX)

  (105) 0x40f0f4 VMOVUPD	%ZMM14,-0x180(%RDX)

  (105) 0x40f0fb VMOVUPD	%ZMM15,-0x140(%RDX)

  (105) 0x40f102 VMOVUPD	%ZMM16,-0x100(%RDX)

  (105) 0x40f109 VMOVUPD	%ZMM17,-0xc0(%RDX)

  (105) 0x40f110 VMOVUPD	%ZMM18,-0x80(%RDX)

  (105) 0x40f117 VMOVUPD	%ZMM19,-0x40(%RDX)

  (105) 0x40f11e VMOVUPD	%ZMM20,(%RDX)

  (105) 0x40f124 CMP	%R13D,%R14D

  (105) 0x40f127 JB	40f010

(102) 0x40f12d CMP	%R13D,%R15D

(102) 0x40f130 JNE	40f14b

(102) 0x40f132 CMP	%R15D,%R8D

(102) 0x40f135 JE	40ef10

(102) 0x40f13b JMP	40f26e

(102) 0x40f140 XOR	%R13D,%R13D

(102) 0x40f143 JMP	40f26e

(102) 0x40f148 XOR	%R13D,%R13D

(102) 0x40f14b MOV	%R13D,%EBX

(102) 0x40f14e LEA	(%RBX,%RBX,2),%RDX

(102) 0x40f152 VPBROADCASTQ	%R12,%ZMM9

(102) 0x40f158 VPADDQ	%ZMM2,%ZMM9,%ZMM9

(102) 0x40f15e LEA	(%R11,%RDX,8),%R14

(102) 0x40f162 ADD	%R9,%R14

(102) 0x40f165 NOPW	%CS:(%RAX,%RAX,1)

  (104) 0x40f170 VPBROADCASTQ	%RBX,%ZMM10

  (104) 0x40f176 VPCMPEQB	%XMM0,%XMM0,%K1

  (104) 0x40f17c VXORPD	%XMM12,%XMM12,%XMM12

  (104) 0x40f181 VXORPD	%XMM13,%XMM13,%XMM13

  (104) 0x40f186 VXORPD	%XMM14,%XMM14,%XMM14

  (104) 0x40f18b ADD	$0x8,%RBX

  (104) 0x40f18f VPADDQ	%ZMM10,%ZMM9,%ZMM10

  (104) 0x40f195 VPADDQ	%ZMM10,%ZMM10,%ZMM11

  (104) 0x40f19b VPADDQ	%ZMM10,%ZMM11,%ZMM10

  (104) 0x40f1a1 VPXOR	%XMM11,%XMM11,%XMM11

  (104) 0x40f1a6 VGATHERQPD	(%R10,%ZMM10,8),%ZMM11{%K1}

  (104) 0x40f1ad VPCMPEQB	%XMM0,%XMM0,%K1

  (104) 0x40f1b3 VGATHERQPD	(%R9,%ZMM10,8),%ZMM12{%K1}

  (104) 0x40f1ba VPCMPEQB	%XMM0,%XMM0,%K1

  (104) 0x40f1c0 VFMADD231PD	%ZMM11,%ZMM1,%ZMM12

  (104) 0x40f1c6 VXORPD	%XMM11,%XMM11,%XMM11

  (104) 0x40f1cb VGATHERQPD	0x8(%R10,%ZMM10,8),%ZMM11{%K1}

  (104) 0x40f1d3 VPCMPEQB	%XMM0,%XMM0,%K1

  (104) 0x40f1d9 VGATHERQPD	0x8(%R9,%ZMM10,8),%ZMM13{%K1}

  (104) 0x40f1e1 VPCMPEQB	%XMM0,%XMM0,%K1

  (104) 0x40f1e7 VMOVAPD	%ZMM12,%ZMM15

  (104) 0x40f1ed VFMADD231PD	%ZMM11,%ZMM1,%ZMM13

  (104) 0x40f1f3 VXORPD	%XMM11,%XMM11,%XMM11

  (104) 0x40f1f8 VGATHERQPD	0x10(%R10,%ZMM10,8),%ZMM11{%K1}

  (104) 0x40f200 VPCMPEQB	%XMM0,%XMM0,%K1

  (104) 0x40f206 VGATHERQPD	0x10(%R9,%ZMM10,8),%ZMM14{%K1}

  (104) 0x40f20e VMOVAPD	%ZMM13,%ZMM10

  (104) 0x40f214 VPERMT2PD	%ZMM12,%ZMM3,%ZMM10

  (104) 0x40f21a VPERMT2PD	%ZMM13,%ZMM4,%ZMM15

  (104) 0x40f220 VPERMT2PD	%ZMM13,%ZMM5,%ZMM12

  (104) 0x40f226 VFMADD231PD	%ZMM11,%ZMM1,%ZMM14

  (104) 0x40f22c VPERMT2PD	%ZMM14,%ZMM6,%ZMM12

  (104) 0x40f232 VPERMT2PD	%ZMM14,%ZMM7,%ZMM15

  (104) 0x40f238 VPERMT2PD	%ZMM14,%ZMM8,%ZMM10

  (104) 0x40f23e VMOVUPD	%ZMM10,0x80(%R14)

  (104) 0x40f245 VMOVUPD	%ZMM15,0x40(%R14)

  (104) 0x40f24c VMOVUPD	%ZMM12,(%R14)

  (104) 0x40f252 ADD	$0xc0,%R14

  (104) 0x40f259 CMP	%R15D,%EBX

  (104) 0x40f25c JB	40f170

(102) 0x40f262 MOV	%R15D,%R13D

(102) 0x40f265 CMP	%R15D,%R8D

(102) 0x40f268 JE	40ef10

(102) 0x40f26e MOV	%R13D,%EDX

(102) 0x40f271 SAL	$0x3,%RDX

(102) 0x40f275 SUB	%R13D,%R8D

(102) 0x40f278 LEA	(%RDX,%RDX,2),%RDX

(102) 0x40f27c ADD	%RDX,%R9

(102) 0x40f27f ADD	%RDX,%R10

(102) 0x40f282 NOPW	%CS:(%RAX,%RAX,1)

  (103) 0x40f290 VMOVSD	(%R10,%R11,1),%XMM9

  (103) 0x40f296 VFMADD213SD	(%R9,%R11,1),%XMM0,%XMM9

  (103) 0x40f29c VMOVSD	%XMM9,(%R9,%R11,1)

  (103) 0x40f2a2 VMOVUPD	0x8(%R10,%R11,1),%XMM9

  (103) 0x40f2a9 VFMADD213PD	0x8(%R9,%R11,1),%XMM1,%XMM9

  (103) 0x40f2b0 VMOVUPD	%XMM9,0x8(%R9,%R11,1)

  (103) 0x40f2b7 ADD	$0x18,%R11

  (103) 0x40f2bb DEC	%R8D

  (103) 0x40f2be JNE	40f290

(102) 0x40f2c0 JMP	40ef10

0x40f2c5 NOPW	%CS:(%RAX,%RAX,1)

Coverage (%)	Name	Source Location	Module
►50.14+	__kmp_invoke_microtask		libiomp5.so
○	__kmp_fork_call		libiomp5.so
○	__kmpc_fork_call		libiomp5.so
○	timestep	timestep.c:71	exec
○	main	CoMD.c:125	exec
►49.34+	__kmp_invoke_microtask		libiomp5.so
○	__kmp_fork_call		libiomp5.so
○	__kmpc_fork_call		libiomp5.so
○	timestep	timestep.c:39	exec
○	main	CoMD.c:125	exec

Coverage (%)	Name	Source Location	Module
►100.00+	__kmp_invoke_microtask		libiomp5.so
○	__kmp_invoke_task_func		libiomp5.so

Coverage (%)	Name	Source Location	Module
►100.00+	__kmp_invoke_microtask		libiomp5.so
○	__kmp_invoke_task_func		libiomp5.so

Coverage (%)	Name	Source Location	Module
►99.99+	__kmp_invoke_microtask		libiomp5.so
○	__kmp_invoke_task_func		libiomp5.so

Coverage (%)	Name	Source Location	Module
►100.00+	__kmp_invoke_microtask		libiomp5.so
○	__kmp_invoke_task_func		libiomp5.so

Coverage (%)	Name	Source Location	Module
►100.00+	__kmp_invoke_microtask		libiomp5.so
○	__kmp_invoke_task_func		libiomp5.so

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.02% of application time for run 8x1

Source file and lines	timestep.c:71-80
Module	exec

The function is defined in /beegfs/hackathon/users/eoseret/qaas_runs_test/gmz12.benchmarkcenter.megware.com/177-374-1600/CoMD/build/CoMD/CoMD/src-openmp/timestep.c:71-80.

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 7.75 to 4.00 cycles (1.94x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is probably not vectorized. Only 10% of vector register length is used (average across all SSE/AVX instructions). By vectorizing your function, you can lower the cost of an iteration from 7.75 to 0.61 cycles (12.64x speedup).

Details

Store and arithmetical SSE/AVX instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

__kmpc_for_static_init_4@plt: 1 occurrences►
- /beegfs/hackathon/users/eoseret/qaas_runs_test/gmz12.benchmarkcenter.megware.com/177-374-1600/CoMD/build/CoMD/CoMD/src-openmp/timestep.c:71

Conversion instructions

Detected expensive conversion instructions.

Details

VPMOVSXBQ: 7 occurrences►
- /beegfs/hackathon/users/eoseret/qaas_runs_test/gmz12.benchmarkcenter.megware.com/177-374-1600/CoMD/build/CoMD/CoMD/src-openmp/timestep.c:71
- /beegfs/hackathon/users/eoseret/qaas_runs_test/gmz12.benchmarkcenter.megware.com/177-374-1600/CoMD/build/CoMD/CoMD/src-openmp/timestep.c:78
- /beegfs/hackathon/users/eoseret/qaas_runs_test/gmz12.benchmarkcenter.megware.com/177-374-1600/CoMD/build/CoMD/CoMD/src-openmp/timestep.c:78
- /beegfs/hackathon/users/eoseret/qaas_runs_test/gmz12.benchmarkcenter.megware.com/177-374-1600/CoMD/build/CoMD/CoMD/src-openmp/timestep.c:78
- /beegfs/hackathon/users/eoseret/qaas_runs_test/gmz12.benchmarkcenter.megware.com/177-374-1600/CoMD/build/CoMD/CoMD/src-openmp/timestep.c:78
- /beegfs/hackathon/users/eoseret/qaas_runs_test/gmz12.benchmarkcenter.megware.com/177-374-1600/CoMD/build/CoMD/CoMD/src-openmp/timestep.c:78
- /beegfs/hackathon/users/eoseret/qaas_runs_test/gmz12.benchmarkcenter.megware.com/177-374-1600/CoMD/build/CoMD/CoMD/src-openmp/timestep.c:78

Workaround

Avoid mixing data with different types. In particular, check if the type of constants is the same as array elements.

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 96 bytes. The binary function is storing 36 bytes.

General properties

nb instructions	64
nb uops	62
loop length	273
used x86 registers	14
used mmx registers	0
used xmm registers	1
used ymm registers	0
used zmm registers	8
nb stack references	7

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	7.75 cycles
front end	7.75 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	3.17	3.17	3.17	3.17	3.17	3.17	5.50	5.50	5.50	5.50	0.00	4.00	4.00	0.00	0.00	0.00
cycles	3.17	3.17	3.17	3.17	3.17	3.17	5.50	5.50	5.50	5.50	0.00	4.00	4.00	0.00	0.00	0.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	7.75
Dispatch	5.50
Overall L1	7.75

Vectorization ratios

all	29%
load	77%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	14%

Vector efficiency ratios

all	10%
load	11%
store	8%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	11%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 7.75 cycles. At this rate:

4% of peak load performance is reached (12.39 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
3% of peak store performance is reached (4.65 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Performance is limited by instruction throughput (loading/decoding program instructions to execution core) (front-end is a bottleneck). By removing all these bottlenecks, you can lower the cost of an iteration from 7.75 to 5.50 cycles (1.41x speedup).

ASM code

In the binary file, the address of the function is: 40ee10

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P11	P12	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB $0x28,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOVL $0,-0x3c(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (6.3%)
MOV %RCX,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
MOV %RDX,-0x48(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (12.5%)
MOV (%RDI),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	scal (6.3%)
MOVL $0,-0x30(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (6.3%)
MOV %R9D,-0x2c(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (6.3%)
MOVL $0x1,-0x38(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (6.3%)
SUB $0x8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (12.5%)
LEA -0x38(%RBP),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
LEA -0x3c(%RBP),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
LEA -0x30(%RBP),%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
LEA -0x2c(%RBP),%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
MOV $0x41c8f0,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
MOV %ESI,-0x34(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (6.3%)
MOV $0x22,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CALL 403250 <__kmpc_for_static_init_4@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0.50	N/A
ADD $0x20,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV -0x30(%RBP),%EAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
MOV -0x2c(%RBP),%ECX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
CMP %EAX,%ECX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (6.3%)
JAE 40ee9a <advanceVelocity.extracted+0x8a>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0.33-1	N/A
MOV -0x34(%RBP),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	scal (6.3%)
MOV $0x41c910,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
ADD $0x28,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (12.5%)
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
VZEROUPPER	1	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
JMP 403310 <__kmpc_for_static_fini@plt>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0.50	N/A
MOV -0x48(%RBP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
VPMOVSXBQ 0x4800(%RIP),%ZMM2	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	4	0.50	vect (12.5%)
VPMOVSXBQ 0x47fe(%RIP),%ZMM3	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	4	0.50	vect (12.5%)
VPMOVSXBQ 0x47fc(%RIP),%ZMM4	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	4	0.50	vect (12.5%)
VPMOVSXBQ 0x47fa(%RIP),%ZMM5	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	4	0.50	vect (12.5%)
VPMOVSXBQ 0x47f8(%RIP),%ZMM6	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	4	0.50	vect (12.5%)
VPMOVSXBQ 0x47f6(%RIP),%ZMM7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	4	0.50	vect (12.5%)
VPMOVSXBQ 0x47f4(%RIP),%ZMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	4	0.50	vect (12.5%)
VMOVQ %R15,%XMM0	1	0	0	1	0	0	0	0	0	0	0	0	0	2	1	scal (12.5%)
MOV %EAX,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
SUB %EAX,%ECX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
SAL $0x6,%ESI	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.33	scal (6.3%)
XOR %EDI,%EDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VPBROADCASTQ %XMM0,%ZMM1	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
MOV 0x18(%RDX),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
MOV 0x78(%RDX),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
MOV %RDX,-0x50(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (12.5%)
JMP 40ef23 <advanceVelocity.extracted+0x113>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0.50	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.13	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.13	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.13	N/A

The code analyzed by CQA in that panel excludes loops and represents 0.02% of application time for run 8x1

Source file and lines	timestep.c:71-80
Module	exec

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 7.75 to 4.00 cycles (1.94x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

__kmpc_for_static_init_4@plt: 1 occurrences►
- /beegfs/hackathon/users/eoseret/qaas_runs_test/gmz12.benchmarkcenter.megware.com/177-374-1600/CoMD/build/CoMD/CoMD/src-openmp/timestep.c:71

Conversion instructions

Detected expensive conversion instructions.

Details

VPMOVSXBQ: 7 occurrences►
- /beegfs/hackathon/users/eoseret/qaas_runs_test/gmz12.benchmarkcenter.megware.com/177-374-1600/CoMD/build/CoMD/CoMD/src-openmp/timestep.c:71
- /beegfs/hackathon/users/eoseret/qaas_runs_test/gmz12.benchmarkcenter.megware.com/177-374-1600/CoMD/build/CoMD/CoMD/src-openmp/timestep.c:78
- /beegfs/hackathon/users/eoseret/qaas_runs_test/gmz12.benchmarkcenter.megware.com/177-374-1600/CoMD/build/CoMD/CoMD/src-openmp/timestep.c:78
- /beegfs/hackathon/users/eoseret/qaas_runs_test/gmz12.benchmarkcenter.megware.com/177-374-1600/CoMD/build/CoMD/CoMD/src-openmp/timestep.c:78
- /beegfs/hackathon/users/eoseret/qaas_runs_test/gmz12.benchmarkcenter.megware.com/177-374-1600/CoMD/build/CoMD/CoMD/src-openmp/timestep.c:78
- /beegfs/hackathon/users/eoseret/qaas_runs_test/gmz12.benchmarkcenter.megware.com/177-374-1600/CoMD/build/CoMD/CoMD/src-openmp/timestep.c:78
- /beegfs/hackathon/users/eoseret/qaas_runs_test/gmz12.benchmarkcenter.megware.com/177-374-1600/CoMD/build/CoMD/CoMD/src-openmp/timestep.c:78

Workaround

Avoid mixing data with different types. In particular, check if the type of constants is the same as array elements.

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 96 bytes. The binary function is storing 36 bytes.

General properties

nb instructions	64
nb uops	62
loop length	273
used x86 registers	14
used mmx registers	0
used xmm registers	1
used ymm registers	0
used zmm registers	8
nb stack references	7

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	7.75 cycles
front end	7.75 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	3.17	3.17	3.17	3.17	3.17	3.17	5.50	5.50	5.50	5.50	0.00	4.00	4.00	0.00	0.00	0.00
cycles	3.17	3.17	3.17	3.17	3.17	3.17	5.50	5.50	5.50	5.50	0.00	4.00	4.00	0.00	0.00	0.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	7.75
Dispatch	5.50
Overall L1	7.75

Vectorization ratios

all	29%
load	77%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	14%

Vector efficiency ratios

all	10%
load	11%
store	8%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	11%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 7.75 cycles. At this rate:

4% of peak load performance is reached (12.39 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
3% of peak store performance is reached (4.65 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

ASM code

In the binary file, the address of the function is: 40ee10

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P11	P12	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB $0x28,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOVL $0,-0x3c(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (6.3%)
MOV %RCX,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
MOV %RDX,-0x48(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (12.5%)
MOV (%RDI),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	scal (6.3%)
MOVL $0,-0x30(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (6.3%)
MOV %R9D,-0x2c(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (6.3%)
MOVL $0x1,-0x38(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (6.3%)
SUB $0x8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (12.5%)
LEA -0x38(%RBP),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
LEA -0x3c(%RBP),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
LEA -0x30(%RBP),%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
LEA -0x2c(%RBP),%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
MOV $0x41c8f0,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
MOV %ESI,-0x34(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (6.3%)
MOV $0x22,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CALL 403250 <__kmpc_for_static_init_4@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0.50	N/A
ADD $0x20,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV -0x30(%RBP),%EAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
MOV -0x2c(%RBP),%ECX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
CMP %EAX,%ECX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (6.3%)
JAE 40ee9a <advanceVelocity.extracted+0x8a>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0.33-1	N/A
MOV -0x34(%RBP),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	scal (6.3%)
MOV $0x41c910,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
ADD $0x28,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	scal (12.5%)
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
VZEROUPPER	1	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
JMP 403310 <__kmpc_for_static_fini@plt>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0.50	N/A
MOV -0x48(%RBP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
VPMOVSXBQ 0x4800(%RIP),%ZMM2	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	4	0.50	vect (12.5%)
VPMOVSXBQ 0x47fe(%RIP),%ZMM3	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	4	0.50	vect (12.5%)
VPMOVSXBQ 0x47fc(%RIP),%ZMM4	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	4	0.50	vect (12.5%)
VPMOVSXBQ 0x47fa(%RIP),%ZMM5	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	4	0.50	vect (12.5%)
VPMOVSXBQ 0x47f8(%RIP),%ZMM6	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	4	0.50	vect (12.5%)
VPMOVSXBQ 0x47f6(%RIP),%ZMM7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	4	0.50	vect (12.5%)
VPMOVSXBQ 0x47f4(%RIP),%ZMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	4	0.50	vect (12.5%)
VMOVQ %R15,%XMM0	1	0	0	1	0	0	0	0	0	0	0	0	0	2	1	scal (12.5%)
MOV %EAX,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
SUB %EAX,%ECX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	1	0.17	N/A
SAL $0x6,%ESI	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.33	scal (6.3%)
XOR %EDI,%EDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VPBROADCASTQ %XMM0,%ZMM1	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
MOV 0x18(%RDX),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
MOV 0x78(%RDX),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	3	0.25	N/A
MOV %RDX,-0x50(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.50	scal (12.5%)
JMP 40ef23 <advanceVelocity.extracted+0x113>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0.50	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.13	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.13	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.13	N/A

▶Scalability Runs Description

Run 8x1	Number processes: 8Number nodes: NANumber processes per node: 8Run Command: <executable> -x 200 -y 200 -z 200 --xproc=2 --yproc=2 --zproc=2MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=24 --rank-by fill --report-bindings Dataset: Run Directory: /beegfs/hackathon/users/eoseret/qaas_runs_test/gmz12.benchmarkcenter.megware.com/177-374-1600/CoMD/run/oneview_runs/multicore/icx_1/oneview_run_1773746383OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threadsOMP_NUM_THREADS: 1
Run 8x8	Number processes: 8Number processes per node: 8Run Command: <executable> -x 200 -y 200 -z 200 --xproc=2 --yproc=2 --zproc=2MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=24 --rank-by fill --report-bindings Dataset: Run Directory: /beegfs/hackathon/users/eoseret/qaas_runs_test/gmz12.benchmarkcenter.megware.com/177-374-1600/CoMD/run/oneview_runs/multicore/icx_1/oneview_run_1773746383OMP_NUM_THREADS: 8OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads
Run 8x12	Number processes: 8Number processes per node: 8Run Command: <executable> -x 200 -y 200 -z 200 --xproc=2 --yproc=2 --zproc=2MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=24 --rank-by fill --report-bindings Dataset: Run Directory: /beegfs/hackathon/users/eoseret/qaas_runs_test/gmz12.benchmarkcenter.megware.com/177-374-1600/CoMD/run/oneview_runs/multicore/icx_1/oneview_run_1773746383OMP_NUM_THREADS: 12OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads
Run 8x16	Number processes: 8Number processes per node: 8Run Command: <executable> -x 200 -y 200 -z 200 --xproc=2 --yproc=2 --zproc=2MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=24 --rank-by fill --report-bindings Dataset: Run Directory: /beegfs/hackathon/users/eoseret/qaas_runs_test/gmz12.benchmarkcenter.megware.com/177-374-1600/CoMD/run/oneview_runs/multicore/icx_1/oneview_run_1773746383OMP_NUM_THREADS: 16OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads
Run 8x20	Number processes: 8Number processes per node: 8Run Command: <executable> -x 200 -y 200 -z 200 --xproc=2 --yproc=2 --zproc=2MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=24 --rank-by fill --report-bindings Dataset: Run Directory: /beegfs/hackathon/users/eoseret/qaas_runs_test/gmz12.benchmarkcenter.megware.com/177-374-1600/CoMD/run/oneview_runs/multicore/icx_1/oneview_run_1773746383OMP_NUM_THREADS: 20OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads
Run 8x24	Number processes: 8Number processes per node: 8Run Command: <executable> -x 200 -y 200 -z 200 --xproc=2 --yproc=2 --zproc=2MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=24 --rank-by fill --report-bindings Dataset: Run Directory: /beegfs/hackathon/users/eoseret/qaas_runs_test/gmz12.benchmarkcenter.megware.com/177-374-1600/CoMD/run/oneview_runs/multicore/icx_1/oneview_run_1773746383OMP_NUM_THREADS: 24OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads

(8x1) Efficiency	(8x1) Potential Speed-Up (%)	(8x8) Efficiency	(8x8) Potential Speed-Up (%)	(8x12) Efficiency	(8x12) Potential Speed-Up (%)	(8x16) Efficiency	(8x16) Potential Speed-Up (%)	(8x20) Efficiency	(8x20) Potential Speed-Up (%)	(8x24) Efficiency	(8x24) Potential Speed-Up (%)
1	0	1.3	0	0.93	0.16	0.73	0.59	0.62	0.84	0.57	0.91

Speed-Up and Efficiency

▶Detailed Speed-Up and Efficiency

Run	Number of threads	Efficiency (ideal is 1)	Speedup	Ideal Speedup	Time (s)	Coverage (%)
8x1	8	1	1	1	7.6750011444092	1.9039254188538
8x8	40	1.3	6.51	5	1.2099997997284	2.0607876777649
8x12	72	0.93	8.34	9	0.9549999833107	2.1315984725952
8x16	104	0.73	9.55	13	0.86000001430511	2.2372577190399
8x20	136	0.62	10.5	17	0.80500000715256	2.1854853630066
8x24	168	0.57	11.89	21	0.71499997377396	2.1068797111511

Name	Coverage (%)	Time (s)
▼advanceVelocity.extracted–	1.90	7.62
▼Loop 102 - timestep.c:71-80 - exec–	0.00	0.00
○Loop 104 - timestep.c:74-78 - exec	1.58	6.33
○Loop 103 - timestep.c:74-77 - exec	0.30	1.21
○Loop 105 - timestep.c:74-78 - exec	0.00	0.00
○Loop 106 - timestep.c:74-78 - exec	0.00	0.00

Report Configuration

Code clean check

Workaround

Vectorization

Details

Workaround

Execution units bottlenecks

CALL instructions

Details

Conversion instructions

Details

Workaround

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code

Code clean check

Workaround

Vectorization

Details

Workaround

Execution units bottlenecks

CALL instructions

Details

Conversion instructions

Details

Workaround

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code

▶Scalability Runs Description

▼Columns Filter

Speed-Up and Efficiency

▶Detailed Speed-Up and Efficiency