OV - exec - Function kineticEnergy.omp

	Function: kineticEnergy.omp_outlined	Module: exec	Source: timestep.c:107-116	Coverage (incl. loops): 0.07% \| (excl. loops): 0.00%

/home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/timestep.c: 107 - 116

--------------------------------------------------------------------------------

107:    #pragma omp parallel for reduction(+:kenergy)

108:    for (int iBox=0; iBox<s->boxes->nLocalBoxes; iBox++)

109:    {

110:       for (int iOff=MAXATOMS*iBox,ii=0; ii<s->boxes->nAtoms[iBox]; ii++,iOff++)

111:       {

112:          int iSpecies = s->atoms->iSpecies[iOff];

113:          real_t invMass = 0.5/s->species[iSpecies].mass;

114:          kenergy += ( s->atoms->p[iOff][0] * s->atoms->p[iOff][0] +

115:          s->atoms->p[iOff][1] * s->atoms->p[iOff][1] +

116:          s->atoms->p[iOff][2] * s->atoms->p[iOff][2] )*invMass;

0x212020 PUSH	%RBP

0x212021 MOV	%RSP,%RBP

0x212024 PUSH	%R15

0x212026 PUSH	%R14

0x212028 PUSH	%R13

0x21202a PUSH	%R12

0x21202c PUSH	%RBX

0x21202d SUB	$0x48,%RSP

0x212031 MOV	(%RDX),%RAX

0x212034 MOV	0x18(%RAX),%RAX

0x212038 MOV	0xc(%RAX),%EBX

0x21203b TEST	%EBX,%EBX

0x21203d JLE	21258a

0x212043 MOV	(%RDI),%ESI

0x212045 DEC	%EBX

0x212047 MOV	%RDX,%R14

0x21204a MOV	%RCX,-0x38(%RBP)

0x21204e MOVL	$0,-0x30(%RBP)

0x212055 MOVL	$0x1,-0x4c(%RBP)

0x21205c MOVL	$0,-0x48(%RBP)

0x212063 MOV	%EBX,-0x2c(%RBP)

0x212066 SUB	$0x8,%RSP

0x21206a LEA	-0x4c(%RBP),%RAX

0x21206e LEA	0x204b(%RIP),%RDI

0x212075 LEA	-0x48(%RBP),%RCX

0x212079 LEA	-0x30(%RBP),%R8

0x21207d LEA	-0x2c(%RBP),%R9

0x212081 MOV	%ESI,-0x44(%RBP)

0x212084 MOV	$0x22,%EDX

0x212089 PUSH	$0x1

0x21208b PUSH	$0x1

0x21208d PUSH	%RAX

0x21208e CALL	212b40 <@plt_start@+0x180>

0x212093 ADD	$0x20,%RSP

0x212097 MOV	-0x2c(%RBP),%EAX

0x21209a VPXOR	%XMM5,%XMM5,%XMM5

0x21209e CMP	%EBX,%EAX

0x2120a0 CMOVL	%EAX,%EBX

0x2120a3 MOVSXD	-0x30(%RBP),%RAX

0x2120a7 MOV	%EBX,-0x2c(%RBP)

0x2120aa CMP	%EBX,%EAX

0x2120ac JLE	212147

0x2120b2 MOV	-0x44(%RBP),%EBX

0x2120b5 LEA	0x201c(%RIP),%RDI

0x2120bc VMOVQ	%XMM5,-0x40(%RBP)

0x2120c1 MOV	%EBX,%ESI

0x2120c3 VZEROUPPER

0x2120c6 CALL	212b50 <@plt_start@+0x190>

0x2120cb LEA	-0x40(%RBP),%RAX

0x2120cf MOV	%RAX,-0x68(%RBP)

0x2120d3 SUB	$0x8,%RSP

0x2120d7 LEA	0x3492(%RIP),%RAX

0x2120de LEA	0x200b(%RIP),%RDI

0x2120e5 LEA	-0xec(%RIP),%R9

0x2120ec LEA	-0x68(%RBP),%R8

0x2120f0 MOV	$0x8,%ECX

0x2120f5 MOV	%EBX,%ESI

0x2120f7 MOV	$0x1,%EDX

0x2120fc PUSH	%RAX

0x2120fd CALL	212b60 <@plt_start@+0x1a0>

0x212102 ADD	$0x10,%RSP

0x212106 CMP	$0x2,%EAX

0x212109 JE	212553

0x21210f CMP	$0x1,%EAX

0x212112 JNE	21258a

0x212118 MOV	-0x38(%RBP),%RAX

0x21211c VMOVSD	-0x40(%RBP),%XMM0

0x212121 LEA	0x3448(%RIP),%RDX

0x212128 LEA	0x1fc1(%RIP),%RDI

0x21212f MOV	%EBX,%ESI

0x212131 VADDSD	(%RAX),%XMM0,%XMM0

0x212135 MOV	-0x38(%RBP),%RAX

0x212139 VMOVSD	%XMM0,(%RAX)

0x21213d CALL	212b70 <@plt_start@+0x1b0>

0x212142 JMP	21258a

0x212147 MOV	(%R14),%RCX

0x21214a VBROADCASTSD	-0xd91b(%RIP),%YMM4

0x212153 VMOVSD	-0xd923(%RIP),%XMM0

0x21215b VMOVAPD	-0xd863(%RIP),%YMM1

0x212163 VMOVAPD	-0xd82b(%RIP),%YMM2

0x21216b VMOVAPD	-0xd893(%RIP),%YMM3

0x212173 MOV	%EAX,%ESI

0x212175 MOVSXD	%EBX,%RBX

0x212178 SAL	$0x6,%ESI

0x21217b MOV	%RBX,-0x58(%RBP)

0x21217f MOV	0x18(%RCX),%RDX

0x212183 MOV	0x78(%RDX),%R14

0x212187 MOV	%R14,-0x60(%RBP)

0x21218b JMP	2121a3

0x21218d NOPL	(%RAX)

(114) 0x212190 ADD	$0x40,%ESI

(114) 0x212193 LEA	0x1(%RAX),%RDX

(114) 0x212197 CMP	%RBX,%RAX

(114) 0x21219a MOV	%RDX,%RAX

(114) 0x21219d JGE	2120b2

(114) 0x2121a3 MOV	(%R14,%RAX,4),%R8D

(114) 0x2121a7 TEST	%R8D,%R8D

(114) 0x2121aa JLE	212190

(114) 0x2121ac MOV	0x20(%RCX),%RDI

(114) 0x2121b0 MOV	0x28(%RCX),%R9

(114) 0x2121b4 MOVSXD	%ESI,%RDX

(114) 0x2121b7 XOR	%R15D,%R15D

(114) 0x2121ba MOV	0x10(%RDI),%R10

(114) 0x2121be MOV	0x20(%RDI),%R11

(114) 0x2121c2 CMP	$0x10,%R8D

(114) 0x2121c6 JAE	2121d0

(114) 0x2121c8 MOV	%RDX,%R12

(114) 0x2121cb JMP	2124f2

(114) 0x2121d0 LEA	(,%RDX,8),%RDI

(114) 0x2121d8 MOV	%R8D,%R15D

(114) 0x2121db AND	$-0x10,%R15D

(114) 0x2121df VMOVQ	%XMM5,%XMM5

(114) 0x2121e3 VXORPD	%XMM6,%XMM6,%XMM6

(114) 0x2121e7 VXORPD	%XMM7,%XMM7,%XMM7

(114) 0x2121eb VXORPD	%XMM8,%XMM8,%XMM8

(114) 0x2121f0 LEA	(%R15,%RDX,1),%R12

(114) 0x2121f4 SAL	$0x2,%RDX

(114) 0x2121f8 LEA	(%RDI,%RDI,2),%R13

(114) 0x2121fc MOV	%R8D,%EDI

(114) 0x2121ff SHR	$0x4,%EDI

(114) 0x212202 LEA	0x30(%R10,%RDX,1),%RDX

(114) 0x212207 SAL	$0x5,%RDI

(114) 0x21220b LEA	(%RDI,%RDI,2),%RBX

(114) 0x21220f ADD	%R11,%R13

(114) 0x212212 XOR	%EDI,%EDI

(114) 0x212214 NOPW	%CS:(%RAX,%RAX,1)

  (115) 0x212220 VPMOVSXDQ	-0x30(%RDX),%YMM10

  (115) 0x212226 VPMOVSXDQ	-0x20(%RDX),%YMM9

  (115) 0x21222c VMOVUPD	0x100(%R13,%RDI,4),%YMM19

  (115) 0x212234 VMOVUPD	0x160(%R13,%RDI,4),%YMM20

  (115) 0x21223c VEXTRACTI128	$0x1,%YMM10,%XMM11

  (115) 0x212242 VEXTRACTI128	$0x1,%YMM9,%XMM13

  (115) 0x212248 VMOVQ	%XMM11,%R14

  (115) 0x21224d SAL	$0x4,%R14

  (115) 0x212251 VMOVSD	0x8(%R9,%R14,1),%XMM12

  (115) 0x212258 VPEXTRQ	$0x1,%XMM11,%R14

  (115) 0x21225e SAL	$0x4,%R14

  (115) 0x212262 VMOVHPD	0x8(%R9,%R14,1),%XMM12,%XMM11

  (115) 0x212269 VMOVQ	%XMM10,%R14

  (115) 0x21226e SAL	$0x4,%R14

  (115) 0x212272 VMOVSD	0x8(%R9,%R14,1),%XMM12

  (115) 0x212279 VPEXTRQ	$0x1,%XMM10,%R14

  (115) 0x21227f VPMOVSXDQ	-0x10(%RDX),%YMM10

  (115) 0x212285 SAL	$0x4,%R14

  (115) 0x212289 VMOVHPD	0x8(%R9,%R14,1),%XMM12,%XMM12

  (115) 0x212290 VMOVQ	%XMM13,%R14

  (115) 0x212295 SAL	$0x4,%R14

  (115) 0x212299 VMOVSD	0x8(%R9,%R14,1),%XMM14

  (115) 0x2122a0 VPEXTRQ	$0x1,%XMM13,%R14

  (115) 0x2122a6 SAL	$0x4,%R14

  (115) 0x2122aa VMOVHPD	0x8(%R9,%R14,1),%XMM14,%XMM13

  (115) 0x2122b1 VMOVQ	%XMM9,%R14

  (115) 0x2122b6 SAL	$0x4,%R14

  (115) 0x2122ba VMOVSD	0x8(%R9,%R14,1),%XMM14

  (115) 0x2122c1 VPEXTRQ	$0x1,%XMM9,%R14

  (115) 0x2122c7 SAL	$0x4,%R14

  (115) 0x2122cb VMOVHPD	0x8(%R9,%R14,1),%XMM14,%XMM15

  (115) 0x2122d2 VEXTRACTI128	$0x1,%YMM10,%XMM9

  (115) 0x2122d8 VMOVQ	%XMM9,%R14

  (115) 0x2122dd SAL	$0x4,%R14

  (115) 0x2122e1 VMOVSD	0x8(%R9,%R14,1),%XMM14

  (115) 0x2122e8 VPEXTRQ	$0x1,%XMM9,%R14

  (115) 0x2122ee VPMOVSXDQ	(%RDX),%YMM9

  (115) 0x2122f3 ADD	$0x40,%RDX

  (115) 0x2122f7 SAL	$0x4,%R14

  (115) 0x2122fb VMOVHPD	0x8(%R9,%R14,1),%XMM14,%XMM16

  (115) 0x212303 VMOVQ	%XMM10,%R14

  (115) 0x212308 SAL	$0x4,%R14

  (115) 0x21230c VMOVSD	0x8(%R9,%R14,1),%XMM14

  (115) 0x212313 VPEXTRQ	$0x1,%XMM10,%R14

  (115) 0x212319 SAL	$0x4,%R14

  (115) 0x21231d VMOVHPD	0x8(%R9,%R14,1),%XMM14,%XMM17

  (115) 0x212325 VEXTRACTI128	$0x1,%YMM9,%XMM10

  (115) 0x21232b VMOVQ	%XMM10,%R14

  (115) 0x212330 SAL	$0x4,%R14

  (115) 0x212334 VMOVSD	0x8(%R9,%R14,1),%XMM14

  (115) 0x21233b VPEXTRQ	$0x1,%XMM10,%R14

  (115) 0x212341 SAL	$0x4,%R14

  (115) 0x212345 VMOVHPD	0x8(%R9,%R14,1),%XMM14,%XMM18

  (115) 0x21234d VMOVQ	%XMM9,%R14

  (115) 0x212352 VINSERTF128	$0x1,%XMM11,%YMM12,%YMM14

  (115) 0x212358 VINSERTF128	$0x1,%XMM13,%YMM15,%YMM11

  (115) 0x21235e VMOVUPD	(%R13,%RDI,4),%ZMM15

  (115) 0x212366 VMOVUPD	0xc0(%R13,%RDI,4),%ZMM13

  (115) 0x21236e VMOVUPD	0x120(%R13,%RDI,4),%ZMM12

  (115) 0x212379 SAL	$0x4,%R14

  (115) 0x21237d VMOVSD	0x8(%R9,%R14,1),%XMM10

  (115) 0x212384 VPEXTRQ	$0x1,%XMM9,%R14

  (115) 0x21238a SAL	$0x4,%R14

  (115) 0x21238e VMOVHPD	0x8(%R9,%R14,1),%XMM10,%XMM9

  (115) 0x212395 VINSERTF32X4	$0x1,%XMM16,%YMM17,%YMM10

  (115) 0x21239c VMOVUPD	0x40(%R13,%RDI,4),%YMM16

  (115) 0x2123a4 VMOVUPD	0x60(%R13,%RDI,4),%ZMM17

  (115) 0x2123af VMOVAPD	%ZMM15,%ZMM21

  (115) 0x2123b5 VMOVAPD	%ZMM15,%ZMM25

  (115) 0x2123bb VMOVAPD	%ZMM13,%ZMM23

  (115) 0x2123c1 VPERMT2PD	%ZMM19,%ZMM1,%ZMM23

  (115) 0x2123c7 VMOVAPD	%ZMM13,%ZMM27

  (115) 0x2123cd VMOVAPD	%ZMM12,%ZMM24

  (115) 0x2123d3 VPERMT2PD	%ZMM20,%ZMM1,%ZMM24

  (115) 0x2123d9 VPERMT2PD	%ZMM19,%ZMM2,%ZMM27

  (115) 0x2123df VMOVAPD	%ZMM12,%ZMM28

  (115) 0x2123e5 VPERMT2PD	%ZMM20,%ZMM2,%ZMM28

  (115) 0x2123eb VPERMT2PD	%ZMM19,%ZMM3,%ZMM13

  (115) 0x2123f1 VPERMT2PD	%ZMM20,%ZMM3,%ZMM12

  (115) 0x2123f7 VINSERTF32X4	$0x1,%XMM18,%YMM9,%YMM9

  (115) 0x2123fe VMOVUPD	0xa0(%R13,%RDI,4),%YMM18

  (115) 0x212406 VPERMT2PD	%ZMM16,%ZMM1,%ZMM21

  (115) 0x21240c VMOVAPD	%ZMM17,%ZMM22

  (115) 0x212412 VPERMT2PD	%ZMM16,%ZMM2,%ZMM25

  (115) 0x212418 VMOVAPD	%ZMM17,%ZMM26

  (115) 0x21241e VPERMT2PD	%ZMM16,%ZMM3,%ZMM15

  (115) 0x212424 ADD	$0x60,%RDI

  (115) 0x212428 VMULPD	%YMM23,%YMM23,%YMM23

  (115) 0x21242e VMULPD	%YMM24,%YMM24,%YMM24

  (115) 0x212434 VFMADD213PD	%YMM23,%YMM27,%YMM27

  (115) 0x21243a VFMADD213PD	%YMM24,%YMM28,%YMM28

  (115) 0x212440 VMULPD	%YMM21,%YMM21,%YMM21

  (115) 0x212446 VPERMT2PD	%ZMM18,%ZMM1,%ZMM22

  (115) 0x21244c VPERMT2PD	%ZMM18,%ZMM2,%ZMM26

  (115) 0x212452 VFMADD213PD	%YMM21,%YMM25,%YMM25

  (115) 0x212458 VPERMT2PD	%ZMM18,%ZMM3,%ZMM17

  (115) 0x21245e VFMADD213PD	%YMM27,%YMM13,%YMM13

  (115) 0x212464 VFMADD213PD	%YMM28,%YMM12,%YMM12

  (115) 0x21246a VFMADD213PD	%YMM25,%YMM15,%YMM15

  (115) 0x212470 VMULPD	%YMM22,%YMM22,%YMM22

  (115) 0x212476 VFMADD213PD	%YMM22,%YMM26,%YMM26

  (115) 0x21247c VMULPD	%YMM4,%YMM15,%YMM15

  (115) 0x212480 VDIVPD	%YMM14,%YMM15,%YMM14

  (115) 0x212485 VFMADD213PD	%YMM26,%YMM17,%YMM17

  (115) 0x21248b VMULPD	%YMM4,%YMM17,%YMM15

  (115) 0x212491 VDIVPD	%YMM11,%YMM15,%YMM11

  (115) 0x212496 VADDPD	%YMM5,%YMM14,%YMM5

  (115) 0x21249a VADDPD	%YMM6,%YMM11,%YMM6

  (115) 0x21249e VMULPD	%YMM4,%YMM13,%YMM11

  (115) 0x2124a2 VDIVPD	%YMM10,%YMM11,%YMM10

  (115) 0x2124a7 VMULPD	%YMM4,%YMM12,%YMM11

  (115) 0x2124ab VDIVPD	%YMM9,%YMM11,%YMM9

  (115) 0x2124b0 VADDPD	%YMM7,%YMM10,%YMM7

  (115) 0x2124b4 VADDPD	%YMM8,%YMM9,%YMM8

  (115) 0x2124b9 CMP	%RDI,%RBX

  (115) 0x2124bc JNE	212220

(114) 0x2124c2 VADDPD	%YMM5,%YMM6,%YMM5

(114) 0x2124c6 MOV	-0x60(%RBP),%R14

(114) 0x2124ca MOV	-0x58(%RBP),%RBX

(114) 0x2124ce VADDPD	%YMM5,%YMM7,%YMM5

(114) 0x2124d2 VADDPD	%YMM5,%YMM8,%YMM5

(114) 0x2124d6 VEXTRACTF128	$0x1,%YMM5,%XMM6

(114) 0x2124dc VADDPD	%XMM6,%XMM5,%XMM5

(114) 0x2124e0 VSHUFPD	$0x1,%XMM5,%XMM5,%XMM6

(114) 0x2124e5 VADDSD	%XMM6,%XMM5,%XMM5

(114) 0x2124e9 CMP	%R8,%R15

(114) 0x2124ec JE	212190

(114) 0x2124f2 LEA	(%R12,%R12,2),%RDX

(114) 0x2124f6 LEA	(%R10,%R12,4),%RDI

(114) 0x2124fa SUB	%R15D,%R8D

(114) 0x2124fd XOR	%R10D,%R10D

(114) 0x212500 LEA	0x8(%R11,%RDX,8),%RDX

(114) 0x212505 NOPW	%CS:(%RAX,%RAX,1)

  (116) 0x212510 VMOVUPD	(%RDX),%XMM7

  (116) 0x212514 VMOVSD	-0x8(%RDX),%XMM6

  (116) 0x212519 MOVSXD	(%RDI,%R10,4),%R11

  (116) 0x21251d ADD	$0x18,%RDX

  (116) 0x212521 INC	%R10

  (116) 0x212524 SAL	$0x4,%R11

  (116) 0x212528 VMULPD	%XMM7,%XMM7,%XMM7

  (116) 0x21252c VFMADD213SD	%XMM7,%XMM6,%XMM6

  (116) 0x212531 VSHUFPD	$0x1,%XMM7,%XMM7,%XMM7

  (116) 0x212536 VADDSD	%XMM7,%XMM6,%XMM6

  (116) 0x21253a VMULSD	%XMM0,%XMM6,%XMM6

  (116) 0x21253e VDIVSD	0x8(%R9,%R11,1),%XMM6,%XMM6

  (116) 0x212545 VADDSD	%XMM5,%XMM6,%XMM5

  (116) 0x212549 CMP	%R10D,%R8D

  (116) 0x21254c JNE	212510

(114) 0x21254e JMP	212190

0x212553 MOV	-0x38(%RBP),%RAX

0x212557 VMOVSD	-0x40(%RBP),%XMM0

0x21255c MOV	-0x38(%RBP),%RCX

0x212560 VMOVSD	(%RAX),%XMM1

0x212564 NOPW	%CS:(%RAX,%RAX,1)

(113) 0x212570 VADDSD	%XMM0,%XMM1,%XMM2

(113) 0x212574 VMOVQ	%XMM1,%RAX

(113) 0x212579 VMOVQ	%XMM2,%RDX

(113) 0x21257e LOCK CMPXCHG	%RDX,(%RCX)

(113) 0x212583 VMOVQ	%RAX,%XMM1

(113) 0x212588 JNE	212570

0x21258a ADD	$0x48,%RSP

0x21258e POP	%RBX

0x21258f POP	%R12

0x212591 POP	%R13

0x212593 POP	%R14

0x212595 POP	%R15

0x212597 POP	%RBP

0x212598 RET

0x212599 NOPL	(%RAX)

Coverage (%)	Name	Source Location	Module
►96.83+	__kmp_invoke_microtask		libomp.so
○	__kmp_invoke_task_func		libomp.so
○	__kmp_launch_thread		libomp.so
○	__kmp_launch_worker(void*)		libomp.so
○	start_thread		libc.so.6
○	__GI___clone3		libc.so.6
►2.21+	__kmp_invoke_microtask		libomp.so
○	__kmp_invoke_task_func		libomp.so
○	__kmp_fork_call		libomp.so
○	__kmpc_fork_call		libomp.so
○	timestep	timestep.c:120	exec
○	main	CoMD.c:125	exec

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run aocc_1

Source file and lines	timestep.c:107-116
Module	exec

The function is defined in /home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/timestep.c:107-116.

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 13.25 to 3.13 cycles (4.24x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is probably not vectorized. Only 12% of vector register length is used (average across all SSE/AVX instructions).

Details

Store and arithmetical SSE/AVX instructions are used in scalar version (process only one data element in vector registers).

Workaround

Read the "512-bits vectorization" report at "Potential" confidence level.

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

512-bits vectorization

On some x86 processors supporting 512-bits vectorization, compilers are often too conservative and limit vectorization to 256 bits. Performance can then be improved by enforcing 512-bits vectorization, especially with many vectorized and high trip count loops. 512-bits vectorization performance overhead (compared to 256-bits) is generally lower on newer processors.

Workaround

Recompile with -mprefer-vector-width=512

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

unknown: 4 occurrences►
- /home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/timestep.c:107
- /home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/timestep.c:107
- /home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/timestep.c:107
- /home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/timestep.c:107

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

CMOVL: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/timestep.c:108

Type of elements and instruction set

1 SSE or AVX instructions are processing arithmetic or math operations on double precision FP elements in scalar mode (one at a time).

Matching between your function (in the source code) and the binary function

The binary function is composed of 1 FP arithmetical operations:

1: addition or subtraction

The binary function is loading 236 bytes (29 double precision FP elements). The binary function is storing 72 bytes (9 double precision FP elements).

Arithmetic intensity

Arithmetic intensity is 0.00 FP operations per loaded or stored byte.

General properties

nb instructions	104
nb uops	106
loop length	419
used x86 registers	14
used mmx registers	0
used xmm registers	3
used ymm registers	4
used zmm registers	0
nb stack references	10

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	13.25 cycles
front end	13.25 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	7.33	7.33	7.33	7.33	7.33	7.33	9.75	9.75	9.75	9.75	0.00	0.00	0.50	0.50	1.00	1.00
cycles	7.33	7.33	7.33	7.33	7.33	7.33	9.75	9.75	9.75	9.75	0.00	0.00	0.50	0.50	1.00	1.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	13.25
Dispatch	9.75
Overall L1	13.25

Vectorization ratios

INT

all	6%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
other	14%

all	30%
load	33%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

INT+FP

all	12%
load	25%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	13%

Vector efficiency ratios

INT

all	8%
load	6%
store	9%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	6%
fma	NA (no fma vectorizable/vectorized instructions)
other	8%

all	23%
load	25%
store	12%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	12%

INT+FP

all	12%
load	20%
store	9%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	9%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	9%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 13.25 cycles. At this rate:

6% of peak load performance is reached (17.81 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
4% of peak store performance is reached (5.43 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Performance is limited by instruction throughput (loading/decoding program instructions to execution core) (front-end is a bottleneck). By removing all these bottlenecks, you can lower the cost of an iteration from 13.25 to 9.75 cycles (1.36x speedup).

ASM code

In the binary file, the address of the function is: 212020

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P12	P13	P14	P15	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB $0x48,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV (%RDX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	N/A
MOV 0x18(%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	N/A
MOV 0xc(%RAX),%EBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	scal (6.3%)
TEST %EBX,%EBX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
JLE 21258a <kineticEnergy.omp_outlined+0x56a>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV (%RDI),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	scal (6.3%)
DEC %EBX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
MOV %RDX,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RCX,-0x38(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	4	0.50	scal (12.5%)
MOVL $0,-0x30(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	4	0.50	scal (6.3%)
MOVL $0x1,-0x4c(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	4	0.50	scal (6.3%)
MOVL $0,-0x48(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	4	0.50	scal (6.3%)
MOV %EBX,-0x2c(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	4	0.50	scal (6.3%)
SUB $0x8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.17	N/A
LEA -0x4c(%RBP),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA 0x204b(%RIP),%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA -0x48(%RBP),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA -0x30(%RBP),%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA -0x2c(%RBP),%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %ESI,-0x44(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	4	0.50	scal (6.3%)
MOV $0x22,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.17	N/A
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CALL 212b40 <@plt_start@+0x180>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0.50	N/A
ADD $0x20,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV -0x2c(%RBP),%EAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	N/A
VPXOR %XMM5,%XMM5,%XMM5	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	vect (25.0%)
CMP %EBX,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
CMOVL %EAX,%EBX	2	0.33	0.33	0.33	0.33	0.33	0.33	0	0	0	0	0	0	0	0	1	0.33	scal (6.3%)
MOVSXD -0x30(%RBP),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	N/A
MOV %EBX,-0x2c(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	4	0.50	scal (6.3%)
CMP %EBX,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
JLE 212147 <kineticEnergy.omp_outlined+0x127>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV -0x44(%RBP),%EBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	scal (6.3%)
LEA 0x201c(%RIP),%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.25	N/A
VMOVQ %XMM5,-0x40(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0.50	0.50	1	0.50	scal (12.5%)
MOV %EBX,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
VZEROUPPER	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 212b50 <@plt_start@+0x190>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0.50	N/A
LEA -0x40(%RBP),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %RAX,-0x68(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	4	0.50	scal (12.5%)
SUB $0x8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.17	N/A
LEA 0x3492(%RIP),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA 0x200b(%RIP),%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA -0xec(%RIP),%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA -0x68(%RBP),%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV $0x8,%ECX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %EBX,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
MOV $0x1,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.17	N/A
PUSH %RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CALL 212b60 <@plt_start@+0x1a0>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0.50	N/A
ADD $0x10,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP $0x2,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
JE 212553 <kineticEnergy.omp_outlined+0x533>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	1	0.50-1	N/A
CMP $0x1,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
JNE 21258a <kineticEnergy.omp_outlined+0x56a>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV -0x38(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	N/A
VMOVSD -0x40(%RBP),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	1	0.50	scal (12.5%)
LEA 0x3448(%RIP),%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA 0x1fc1(%RIP),%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %EBX,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
VADDSD (%RAX),%XMM0,%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	2	0.50	scal (12.5%)
MOV -0x38(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	N/A
VMOVSD %XMM0,(%RAX)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0.50	0.50	1	0.50	scal (12.5%)
CALL 212b70 <@plt_start@+0x1b0>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0.50	N/A
JMP 21258a <kineticEnergy.omp_outlined+0x56a>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	1	N/A
MOV (%R14),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	N/A
VBROADCASTSD -0xd91b(%RIP),%YMM4	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	4	0.50	scal (12.5%)
VMOVSD -0xd923(%RIP),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	1	0.50	scal (12.5%)
VMOVAPD -0xd863(%RIP),%YMM1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.50	vect (50.0%)
VMOVAPD -0xd82b(%RIP),%YMM2	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.50	vect (50.0%)
VMOVAPD -0xd893(%RIP),%YMM3	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.50	vect (50.0%)
MOV %EAX,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
MOVSXD %EBX,%RBX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
SAL $0x6,%ESI	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	1	0.33	scal (6.3%)
MOV %RBX,-0x58(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x18(%RCX),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	N/A
MOV 0x78(%RDX),%R14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	N/A
MOV %R14,-0x60(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	4	0.50	scal (12.5%)
JMP 2121a3 <kineticEnergy.omp_outlined+0x183>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	1	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
MOV -0x38(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	N/A
VMOVSD -0x40(%RBP),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	1	0.50	scal (12.5%)
MOV -0x38(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	N/A
VMOVSD (%RAX),%XMM1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	1	0.50	scal (12.5%)
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
ADD $0x48,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
RET	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	1	0.50	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run aocc_1

Source file and lines	timestep.c:107-116
Module	exec

The function is defined in /home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/timestep.c:107-116.

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 13.25 to 3.13 cycles (4.24x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is probably not vectorized. Only 12% of vector register length is used (average across all SSE/AVX instructions).

Details

Store and arithmetical SSE/AVX instructions are used in scalar version (process only one data element in vector registers).

Workaround

Read the "512-bits vectorization" report at "Potential" confidence level.

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

512-bits vectorization

Workaround

Recompile with -mprefer-vector-width=512

CALL instructions

Detected function call instructions.

Details

unknown: 4 occurrences►
- /home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/timestep.c:107
- /home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/timestep.c:107
- /home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/timestep.c:107
- /home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/timestep.c:107

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

CMOVL: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/timestep.c:108

Type of elements and instruction set

1 SSE or AVX instructions are processing arithmetic or math operations on double precision FP elements in scalar mode (one at a time).

Matching between your function (in the source code) and the binary function

The binary function is composed of 1 FP arithmetical operations:

1: addition or subtraction

The binary function is loading 236 bytes (29 double precision FP elements). The binary function is storing 72 bytes (9 double precision FP elements).

Arithmetic intensity

Arithmetic intensity is 0.00 FP operations per loaded or stored byte.

General properties

nb instructions	104
nb uops	106
loop length	419
used x86 registers	14
used mmx registers	0
used xmm registers	3
used ymm registers	4
used zmm registers	0
nb stack references	10

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	13.25 cycles
front end	13.25 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	7.33	7.33	7.33	7.33	7.33	7.33	9.75	9.75	9.75	9.75	0.00	0.00	0.50	0.50	1.00	1.00
cycles	7.33	7.33	7.33	7.33	7.33	7.33	9.75	9.75	9.75	9.75	0.00	0.00	0.50	0.50	1.00	1.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	13.25
Dispatch	9.75
Overall L1	13.25

Vectorization ratios

INT

all	6%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
other	14%

all	30%
load	33%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

INT+FP

all	12%
load	25%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	13%

Vector efficiency ratios

INT

all	8%
load	6%
store	9%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	6%
fma	NA (no fma vectorizable/vectorized instructions)
other	8%

all	23%
load	25%
store	12%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	12%

INT+FP

all	12%
load	20%
store	9%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	9%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	9%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 13.25 cycles. At this rate:

6% of peak load performance is reached (17.81 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
4% of peak store performance is reached (5.43 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

ASM code

In the binary file, the address of the function is: 212020

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P12	P13	P14	P15	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB $0x48,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV (%RDX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	N/A
MOV 0x18(%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	N/A
MOV 0xc(%RAX),%EBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	scal (6.3%)
TEST %EBX,%EBX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
JLE 21258a <kineticEnergy.omp_outlined+0x56a>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV (%RDI),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	scal (6.3%)
DEC %EBX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
MOV %RDX,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RCX,-0x38(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	4	0.50	scal (12.5%)
MOVL $0,-0x30(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	4	0.50	scal (6.3%)
MOVL $0x1,-0x4c(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	4	0.50	scal (6.3%)
MOVL $0,-0x48(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	4	0.50	scal (6.3%)
MOV %EBX,-0x2c(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	4	0.50	scal (6.3%)
SUB $0x8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.17	N/A
LEA -0x4c(%RBP),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA 0x204b(%RIP),%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA -0x48(%RBP),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA -0x30(%RBP),%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA -0x2c(%RBP),%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %ESI,-0x44(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	4	0.50	scal (6.3%)
MOV $0x22,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.17	N/A
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CALL 212b40 <@plt_start@+0x180>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0.50	N/A
ADD $0x20,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV -0x2c(%RBP),%EAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	N/A
VPXOR %XMM5,%XMM5,%XMM5	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	vect (25.0%)
CMP %EBX,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
CMOVL %EAX,%EBX	2	0.33	0.33	0.33	0.33	0.33	0.33	0	0	0	0	0	0	0	0	1	0.33	scal (6.3%)
MOVSXD -0x30(%RBP),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	N/A
MOV %EBX,-0x2c(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	4	0.50	scal (6.3%)
CMP %EBX,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
JLE 212147 <kineticEnergy.omp_outlined+0x127>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV -0x44(%RBP),%EBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	scal (6.3%)
LEA 0x201c(%RIP),%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.25	N/A
VMOVQ %XMM5,-0x40(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0.50	0.50	1	0.50	scal (12.5%)
MOV %EBX,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
VZEROUPPER	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 212b50 <@plt_start@+0x190>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0.50	N/A
LEA -0x40(%RBP),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %RAX,-0x68(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	4	0.50	scal (12.5%)
SUB $0x8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.17	N/A
LEA 0x3492(%RIP),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA 0x200b(%RIP),%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA -0xec(%RIP),%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA -0x68(%RBP),%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV $0x8,%ECX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %EBX,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
MOV $0x1,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.17	N/A
PUSH %RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CALL 212b60 <@plt_start@+0x1a0>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0.50	N/A
ADD $0x10,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP $0x2,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
JE 212553 <kineticEnergy.omp_outlined+0x533>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	1	0.50-1	N/A
CMP $0x1,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
JNE 21258a <kineticEnergy.omp_outlined+0x56a>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV -0x38(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	N/A
VMOVSD -0x40(%RBP),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	1	0.50	scal (12.5%)
LEA 0x3448(%RIP),%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA 0x1fc1(%RIP),%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %EBX,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
VADDSD (%RAX),%XMM0,%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	2	0.50	scal (12.5%)
MOV -0x38(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	N/A
VMOVSD %XMM0,(%RAX)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0.50	0.50	1	0.50	scal (12.5%)
CALL 212b70 <@plt_start@+0x1b0>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0.50	N/A
JMP 21258a <kineticEnergy.omp_outlined+0x56a>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	1	N/A
MOV (%R14),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	N/A
VBROADCASTSD -0xd91b(%RIP),%YMM4	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	4	0.50	scal (12.5%)
VMOVSD -0xd923(%RIP),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	1	0.50	scal (12.5%)
VMOVAPD -0xd863(%RIP),%YMM1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.50	vect (50.0%)
VMOVAPD -0xd82b(%RIP),%YMM2	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.50	vect (50.0%)
VMOVAPD -0xd893(%RIP),%YMM3	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.50	vect (50.0%)
MOV %EAX,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
MOVSXD %EBX,%RBX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
SAL $0x6,%ESI	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	1	0.33	scal (6.3%)
MOV %RBX,-0x58(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x18(%RCX),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	N/A
MOV 0x78(%RDX),%R14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	N/A
MOV %R14,-0x60(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	4	0.50	scal (12.5%)
JMP 2121a3 <kineticEnergy.omp_outlined+0x183>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	1	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
MOV -0x38(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	N/A
VMOVSD -0x40(%RBP),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	1	0.50	scal (12.5%)
MOV -0x38(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.25	N/A
VMOVSD (%RAX),%XMM1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	1	0.50	scal (12.5%)
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
ADD $0x48,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
RET	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	1	0.50	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A

Name	Coverage (%)	Time (s)
▼kineticEnergy.omp_outlined–	0.07	0.02
▼Loop 114 - timestep.c:108-116 - exec–	0.00	0.01
○Loop 116 - timestep.c:110-116 - exec	0.04	0.01
○Loop 115 - timestep.c:110-116 - exec	0.03	0.01
○Loop 113 - timestep.c:107-107 - exec	0.00	0.00

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Vectorization

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Execution units bottlenecks

512-bits vectorization

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CALL instructions

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Complex instructions

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Type of elements and instruction set

Matching between your function (in the source code) and the binary function

Arithmetic intensity

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Front-end

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Vector efficiency ratios

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Front-end bottlenecks

ASM code

Code clean check

Workaround

Vectorization

Details

Workaround

Execution units bottlenecks

512-bits vectorization

Workaround

CALL instructions

Details

Complex instructions

Details

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

Arithmetic intensity

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code