OV - exec - Loop 61

	Loop Id: 61	Module: exec	Source: haloExchange.c:621-628	Coverage: 0.35%

0x409960 MOV	-0x60(%RBP),%RAX    [4]

0x409964 MOV	-0x58(%RBP),%RBX    [4]

0x409968 ADD	$0x180,%R11

0x40996f ADD	$0x380,%R15

0x409976 ADD	$0x180,%R14

0x40997d ADD	%R12,%RAX

0x409980 LEA	(%RBX,%R12,1),%RDX

0x409984 ADD	$0x40,%R12

0x409988 MOV	0x30(%RAX),%R9D    [3]

0x40998c MOV	0x28(%RAX),%EDI    [3]

0x40998f MOV	0x24(%RAX),%ECX    [3]

0x409992 MOV	0x20(%RAX),%ESI    [3]

0x409995 MOV	0x2c(%RAX),%R8D    [3]

0x409999 MOV	0x3c(%RAX),%R10D    [3]

0x40999d MOV	0x38(%RAX),%EBX    [3]

0x4099a0 MOV	0x34(%RAX),%R13D    [3]

0x4099a4 VMOVD	0x34(%RDX),%XMM4    [6]

0x4099a9 VMOVD	0x30(%RDX),%XMM5    [6]

0x4099ae VMOVD	0x2c(%RDX),%XMM6    [6]

0x4099b3 VMOVD	0x28(%RDX),%XMM7    [6]

0x4099b8 VMOVD	0x24(%RDX),%XMM8    [6]

0x4099bd VMOVD	0x20(%RDX),%XMM9    [6]

0x4099c2 MOV	%R9D,-0x4c(%RBP)    [4]

0x4099c6 MOV	0x1c(%RAX),%R9D    [3]

0x4099ca VMOVD	0x1c(%RDX),%XMM10    [6]

0x4099cf VMOVD	0x18(%RDX),%XMM11    [6]

0x4099d4 VMOVD	0x14(%RDX),%XMM12    [6]

0x4099d9 VMOVD	0x10(%RDX),%XMM0    [6]

0x4099de MOV	%EDI,-0x44(%RBP)    [4]

0x4099e1 MOV	%ECX,-0x40(%RBP)    [4]

0x4099e4 VMOVD	0xc(%RDX),%XMM1    [6]

0x4099e9 VMOVD	0x8(%RDX),%XMM13    [6]

0x4099ee MOV	%ESI,-0x3c(%RBP)    [4]

0x4099f1 MOV	%R8D,-0x48(%RBP)    [4]

0x4099f5 VMOVD	0x4(%RDX),%XMM14    [6]

0x4099fa VMOVD	0x3c(%RDX),%XMM2    [6]

0x4099ff VPINSRD	$0x1,%R13D,%XMM4,%XMM4

0x409a05 VMOVD	0x38(%RDX),%XMM3    [6]

0x409a0a MOV	%R9D,-0x38(%RBP)    [4]

0x409a0e MOV	0x18(%RAX),%R8D    [3]

0x409a12 MOV	0x14(%RAX),%ECX    [3]

0x409a15 MOV	0x10(%RAX),%ESI    [3]

0x409a18 MOV	0xc(%RAX),%EDI    [3]

0x409a1b MOV	0x4(%RAX),%R9D    [3]

0x409a1f VMOVD	(%RDX),%XMM15    [6]

0x409a23 VPINSRD	$0x1,-0x38(%RBP),%XMM10,%XMM10    [4]

0x409a2a VPINSRD	$0x1,(%RAX),%XMM15,%XMM15    [3]

0x409a30 VPINSRD	$0x1,-0x3c(%RBP),%XMM9,%XMM9    [4]

0x409a37 VPINSRD	$0x1,-0x40(%RBP),%XMM8,%XMM8    [4]

0x409a3e VPINSRD	$0x1,-0x44(%RBP),%XMM7,%XMM7    [4]

0x409a45 VPINSRD	$0x1,-0x48(%RBP),%XMM6,%XMM6    [4]

0x409a4c VPINSRD	$0x1,-0x4c(%RBP),%XMM5,%XMM5    [4]

0x409a53 VPINSRD	$0x1,%R10D,%XMM2,%XMM2

0x409a59 MOV	%R8D,-0x34(%RBP)    [4]

0x409a5d MOV	0x8(%RAX),%R8D    [3]

0x409a61 VPINSRD	$0x1,-0x34(%RBP),%XMM11,%XMM11    [4]

0x409a68 VPINSRD	$0x1,%ESI,%XMM0,%XMM0

0x409a6e VPINSRD	$0x1,%R9D,%XMM14,%XMM14

0x409a74 VPINSRD	$0x1,%EDI,%XMM1,%XMM1

0x409a7a VPINSRD	$0x1,%ECX,%XMM12,%XMM12

0x409a80 VPINSRD	$0x1,%EBX,%XMM3,%XMM3

0x409a86 VMOVQ	%XMM14,-0x350(%R15)    [2]

0x409a8f VMOVQ	%XMM1,-0x2e0(%R15)    [2]

0x409a98 VMOVQ	%XMM15,-0x388(%R15)    [2]

0x409aa1 VMOVQ	%XMM0,-0x2a8(%R15)    [2]

0x409aaa VMOVQ	%XMM12,-0x270(%R15)    [2]

0x409ab3 VMOVQ	%XMM10,-0x200(%R15)    [2]

0x409abc VPINSRD	$0x1,%R8D,%XMM13,%XMM13

0x409ac2 VMOVQ	%XMM9,-0x1c8(%R15)    [2]

0x409acb VMOVQ	%XMM8,-0x190(%R15)    [2]

0x409ad4 VMOVQ	%XMM13,-0x318(%R15)    [2]

0x409add VMOVQ	%XMM11,-0x238(%R15)    [2]

0x409ae6 VMOVQ	%XMM7,-0x158(%R15)    [2]

0x409aef VMOVQ	%XMM6,-0x120(%R15)    [2]

0x409af8 VMOVQ	%XMM5,-0xe8(%R15)    [2]

0x409b01 VMOVQ	%XMM4,-0xb0(%R15)    [2]

0x409b0a VMOVQ	%XMM3,-0x78(%R15)    [2]

0x409b10 VMOVQ	%XMM2,-0x40(%R15)    [2]

0x409b16 VMOVUPD	-0x150(%R11),%XMM30    [5]

0x409b1d MOV	-0x158(%R11),%RAX    [5]

0x409b24 MOV	-0x168(%R11),%R13    [5]

0x409b2b MOV	-0x170(%R11),%RDI    [5]

0x409b32 VMOVUPD	-0x120(%R11),%XMM29    [5]

0x409b39 VMOVSD	-0x108(%R11),%XMM31    [5]

0x409b40 MOV	-0x110(%R11),%R10    [5]

0x409b47 MOV	-0x128(%R11),%RDX    [5]

0x409b4e MOV	-0x130(%R11),%RCX    [5]

0x409b55 MOV	-0x140(%R11),%RSI    [5]

0x409b5c VMOVUPD	-0xf0(%R11),%XMM27    [5]

0x409b63 VMOVSD	-0xc8(%R11),%XMM24    [5]

0x409b6a VMOVSD	-0xd8(%R11),%XMM25    [5]

0x409b71 VMOVSD	-0xe0(%R11),%XMM26    [5]

0x409b78 VMOVSD	-0xf8(%R11),%XMM28    [5]

0x409b7f VMOVUPD	-0x90(%R11),%XMM19    [5]

0x409b86 VMOVUPD	-0xc0(%R11),%XMM23    [5]

0x409b8d VMOVSD	-0x98(%R11),%XMM20    [5]

0x409b94 VMOVSD	-0xa8(%R11),%XMM21    [5]

0x409b9b VMOVSD	-0xb0(%R11),%XMM22    [5]

0x409ba2 VMOVUPD	-0x60(%R11),%XMM15    [5]

0x409ba8 VMOVSD	-0x48(%R11),%XMM13    [5]

0x409bae VMOVSD	-0x50(%R11),%XMM14    [5]

0x409bb4 VMOVSD	-0x68(%R11),%XMM16    [5]

0x409bbb VMOVSD	-0x70(%R11),%XMM17    [5]

0x409bc2 VMOVSD	-0x80(%R11),%XMM18    [5]

0x409bc9 VMOVSD	-0x160(%R11),%XMM7    [5]

0x409bd2 VMOVSD	-0x138(%R11),%XMM6    [5]

0x409bdb VMOVSD	-0xd0(%R11),%XMM4    [5]

0x409be4 VMOVSD	-0x100(%R11),%XMM5    [5]

0x409bed VMOVSD	-0xa0(%R11),%XMM3    [5]

0x409bf6 VMOVSD	-0x78(%R11),%XMM2    [5]

0x409bfc VMOVUPD	-0x30(%R11),%XMM11    [5]

0x409c02 VMOVUPD	-0x180(%R11),%XMM0    [5]

0x409c0b MOV	-0x10(%R11),%RBX    [5]

0x409c0f VMOVSD	-0x8(%R11),%XMM8    [5]

0x409c15 VMOVSD	-0x18(%R11),%XMM9    [5]

0x409c1b VMOVSD	-0x20(%R11),%XMM10    [5]

0x409c21 VMOVSD	-0x38(%R11),%XMM12    [5]

0x409c27 VMOVSD	-0x40(%R11),%XMM1    [5]

0x409c2d VUNPCKLPD	%XMM5,%XMM31,%XMM5

0x409c33 VUNPCKLPD	%XMM4,%XMM25,%XMM4

0x409c39 VUNPCKLPD	%XMM3,%XMM21,%XMM3

0x409c3f VUNPCKLPD	%XMM17,%XMM2,%XMM2

0x409c45 MOV	%RDI,-0x370(%R15)    [2]

0x409c4c MOV	%RAX,-0x338(%R15)    [2]

0x409c53 VMOVUPD	%XMM30,-0x310(%R15)    [2]

0x409c5a MOV	%RSI,-0x300(%R15)    [2]

0x409c61 MOV	%RDX,-0x2c8(%R15)    [2]

0x409c68 VMOVUPD	%XMM29,-0x2a0(%R15)    [2]

0x409c6f MOV	%R10,-0x290(%R15)    [2]

0x409c76 VMOVUPD	%XMM5,-0x268(%R15)    [2]

0x409c7f VMOVSD	%XMM28,-0x258(%R15)    [2]

0x409c86 VMOVUPD	%XMM27,-0x230(%R15)    [2]

0x409c8d VMOVUPD	%XMM0,-0x380(%R15)    [2]

0x409c96 VMOVQ	%R13,%XMM0

0x409c9b VMOVSD	%XMM26,-0x220(%R15)    [2]

0x409ca2 VMOVUPD	%XMM4,-0x1f8(%R15)    [2]

0x409cab VUNPCKLPD	%XMM7,%XMM0,%XMM7

0x409caf VMOVQ	%RCX,%XMM0

0x409cb4 VMOVSD	%XMM24,-0x1e8(%R15)    [2]

0x409cbb VMOVUPD	%XMM23,-0x1c0(%R15)    [2]

0x409cc2 VUNPCKLPD	%XMM0,%XMM6,%XMM6

0x409cc6 VMOVUPD	%XMM7,-0x348(%R15)    [2]

0x409ccf VMOVSD	%XMM22,-0x1b0(%R15)    [2]

0x409cd6 VMOVUPD	%XMM3,-0x188(%R15)    [2]

0x409cdf VMOVUPD	%XMM6,-0x2d8(%R15)    [2]

0x409ce8 VMOVSD	%XMM20,-0x178(%R15)    [2]

0x409cef VMOVUPD	%XMM19,-0x150(%R15)    [2]

0x409cf6 VMOVSD	%XMM18,-0x140(%R15)    [2]

0x409cfd VMOVUPD	%XMM2,-0x118(%R15)    [2]

0x409d06 VMOVSD	%XMM16,-0x108(%R15)    [2]

0x409d0d VMOVUPD	%XMM15,-0xe0(%R15)    [2]

0x409d16 VUNPCKLPD	%XMM1,%XMM13,%XMM15

0x409d1a VMOVQ	%RBX,%XMM13

0x409d1f VMOVSD	%XMM14,-0xd0(%R15)    [2]

0x409d28 VMOVSD	%XMM12,-0x98(%R15)    [2]

0x409d31 VMOVUPD	%XMM11,-0x70(%R15)    [2]

0x409d37 VUNPCKLPD	%XMM13,%XMM9,%XMM14

0x409d3c VMOVSD	%XMM10,-0x60(%R15)    [2]

0x409d42 VMOVSD	%XMM8,-0x28(%R15)    [2]

0x409d48 VMOVUPD	%XMM15,-0xa8(%R15)    [2]

0x409d51 VMOVUPD	%XMM14,-0x38(%R15)    [2]

0x409d57 VMOVUPD	-0x150(%R14),%XMM30    [1]

0x409d5e MOV	-0x158(%R14),%RAX    [1]

0x409d65 VMOVSD	-0x160(%R14),%XMM7    [1]

0x409d6e MOV	-0x168(%R14),%R8    [1]

0x409d75 MOV	-0x170(%R14),%R9    [1]

0x409d7c VMOVUPD	-0x120(%R14),%XMM29    [1]

0x409d83 VMOVSD	-0x108(%R14),%XMM31    [1]

0x409d8a MOV	-0x110(%R14),%R13    [1]

0x409d91 MOV	-0x128(%R14),%RDI    [1]

0x409d98 MOV	-0x130(%R14),%R10    [1]

0x409d9f VMOVSD	-0x138(%R14),%XMM6    [1]

0x409da8 MOV	-0x140(%R14),%RDX    [1]

0x409daf VMOVUPD	-0xf0(%R14),%XMM27    [1]

0x409db6 VMOVSD	-0xc8(%R14),%XMM24    [1]

0x409dbd VMOVSD	-0xd0(%R14),%XMM4    [1]

0x409dc6 VMOVSD	-0xd8(%R14),%XMM25    [1]

0x409dcd VMOVSD	-0xe0(%R14),%XMM26    [1]

0x409dd4 VMOVSD	-0xf8(%R14),%XMM28    [1]

0x409ddb VMOVSD	-0x100(%R14),%XMM5    [1]

0x409de4 VMOVUPD	-0x90(%R14),%XMM19    [1]

0x409deb VMOVUPD	-0xc0(%R14),%XMM23    [1]

0x409df2 VMOVSD	-0x98(%R14),%XMM20    [1]

0x409df9 VMOVSD	-0xa0(%R14),%XMM3    [1]

0x409e02 VMOVSD	-0xa8(%R14),%XMM21    [1]

0x409e09 VMOVSD	-0xb0(%R14),%XMM22    [1]

0x409e10 VMOVUPD	-0x60(%R14),%XMM15    [1]

0x409e16 VMOVUPD	-0x180(%R14),%XMM0    [1]

0x409e1f VMOVSD	-0x48(%R14),%XMM13    [1]

0x409e25 VMOVSD	-0x50(%R14),%XMM14    [1]

0x409e2b VMOVSD	-0x68(%R14),%XMM16    [1]

0x409e32 VMOVSD	-0x70(%R14),%XMM17    [1]

0x409e39 VMOVSD	-0x78(%R14),%XMM2    [1]

0x409e3f VMOVSD	-0x80(%R14),%XMM18    [1]

0x409e46 VMOVUPD	-0x30(%R14),%XMM11    [1]

0x409e4c VMOVSD	-0x8(%R14),%XMM8    [1]

0x409e52 MOV	-0x10(%R14),%RCX    [1]

0x409e56 VMOVSD	-0x18(%R14),%XMM9    [1]

0x409e5c VMOVSD	-0x20(%R14),%XMM10    [1]

0x409e62 VMOVSD	-0x38(%R14),%XMM12    [1]

0x409e68 VMOVSD	-0x40(%R14),%XMM1    [1]

0x409e6e VUNPCKLPD	%XMM5,%XMM31,%XMM5

0x409e74 VUNPCKLPD	%XMM4,%XMM25,%XMM4

0x409e7a MOV	%R9,-0x358(%R15)    [2]

0x409e81 MOV	%RAX,-0x320(%R15)    [2]

0x409e88 VMOVUPD	%XMM30,-0x2f8(%R15)    [2]

0x409e92 MOV	%RDX,-0x2e8(%R15)    [2]

0x409e99 MOV	%RDI,-0x2b0(%R15)    [2]

0x409ea0 VMOVUPD	%XMM0,-0x368(%R15)    [2]

0x409ea9 VMOVQ	%R8,%XMM0

0x409eae VMOVUPD	%XMM29,-0x288(%R15)    [2]

0x409eb8 MOV	%R13,-0x278(%R15)    [2]

0x409ebf VUNPCKLPD	%XMM7,%XMM0,%XMM7

0x409ec3 VMOVQ	%R10,%XMM0

0x409ec8 VMOVUPD	%XMM5,-0x250(%R15)    [2]

0x409ed1 VMOVSD	%XMM28,-0x240(%R15)    [2]

0x409ed8 VUNPCKLPD	%XMM0,%XMM6,%XMM6

0x409edc VMOVUPD	%XMM7,-0x330(%R15)    [2]

0x409ee5 VMOVUPD	%XMM27,-0x218(%R15)    [2]

0x409eef VMOVSD	%XMM26,-0x208(%R15)    [2]

0x409ef6 VMOVUPD	%XMM6,-0x2c0(%R15)    [2]

0x409eff VMOVUPD	%XMM4,-0x1e0(%R15)    [2]

0x409f08 VMOVSD	%XMM24,-0x1d0(%R15)    [2]

0x409f0f VUNPCKLPD	%XMM3,%XMM21,%XMM3

0x409f15 VMOVUPD	%XMM23,-0x1a8(%R15)    [2]

0x409f1f VMOVSD	%XMM22,-0x198(%R15)    [2]

0x409f26 MOV	-0x68(%RBP),%RSI    [4]

0x409f2a VMOVUPD	%XMM15,-0xc8(%R15)    [2]

0x409f33 VUNPCKLPD	%XMM1,%XMM13,%XMM15

0x409f37 VMOVQ	%RCX,%XMM13

0x409f3c VMOVSD	%XMM14,-0xb8(%R15)    [2]

0x409f45 VUNPCKLPD	%XMM17,%XMM2,%XMM2

0x409f4b VUNPCKLPD	%XMM13,%XMM9,%XMM14

0x409f50 VMOVUPD	%XMM3,-0x170(%R15)    [2]

0x409f59 VMOVSD	%XMM20,-0x160(%R15)    [2]

0x409f60 VMOVUPD	%XMM19,-0x138(%R15)    [2]

0x409f6a VMOVSD	%XMM18,-0x128(%R15)    [2]

0x409f71 VMOVUPD	%XMM2,-0x100(%R15)    [2]

0x409f7a VMOVSD	%XMM16,-0xf0(%R15)    [2]

0x409f81 VMOVUPD	%XMM15,-0x90(%R15)    [2]

0x409f8a VMOVSD	%XMM12,-0x80(%R15)    [2]

0x409f90 VMOVUPD	%XMM11,-0x58(%R15)    [2]

0x409f96 VMOVSD	%XMM10,-0x48(%R15)    [2]

0x409f9c VMOVUPD	%XMM14,-0x20(%R15)    [2]

0x409fa2 VMOVSD	%XMM8,-0x10(%R15)    [2]

0x409fa8 CMP	%RSI,%R12

0x409fab JNE	409960

/home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/haloExchange.c: 621 - 628

--------------------------------------------------------------------------------

621:    for (int ii=begin, iTmp=0; ii<end; ++ii, ++iTmp)

622:    {

623:       tmp[iTmp].gid  = atoms->gid[ii];

624:       tmp[iTmp].type = atoms->iSpecies[ii];

625:       tmp[iTmp].rx =   atoms->r[ii][0];

626:       tmp[iTmp].ry =   atoms->r[ii][1];

627:       tmp[iTmp].rz =   atoms->r[ii][2];

628:       tmp[iTmp].px =   atoms->p[ii][0];

Coverage (%)	Name	Source Location	Module
►13.53+	redistributeAtoms._omp_fn.0	timestep.c:154	exec
○	gomp_thread_start	team.c:130	libgomp.so.1.0.0
○	start_thread		libc.so.6
○	__GI___clone3		libc.so.6
►12.44+	redistributeAtoms._omp_fn.0	timestep.c:154	exec
○	gomp_thread_start	team.c:130	libgomp.so.1.0.0
○	start_thread		libc.so.6
○	__GI___clone3		libc.so.6
►12.39+	redistributeAtoms._omp_fn.0	timestep.c:154	exec
○	gomp_thread_start	team.c:130	libgomp.so.1.0.0
○	start_thread		libc.so.6
○	__GI___clone3		libc.so.6
►12.21+	redistributeAtoms._omp_fn.0	timestep.c:154	exec
○	gomp_thread_start	team.c:130	libgomp.so.1.0.0
○	start_thread		libc.so.6
○	__GI___clone3		libc.so.6
►12.07+	redistributeAtoms._omp_fn.0	timestep.c:154	exec
○	gomp_thread_start	team.c:130	libgomp.so.1.0.0
○	start_thread		libc.so.6
○	__GI___clone3		libc.so.6
►12.07+	redistributeAtoms._omp_fn.0	timestep.c:154	exec
○	gomp_thread_start	team.c:130	libgomp.so.1.0.0
○	start_thread		libc.so.6
○	__GI___clone3		libc.so.6
►11.25+	redistributeAtoms._omp_fn.0	timestep.c:154	exec
○	gomp_thread_start	team.c:130	libgomp.so.1.0.0
○	start_thread		libc.so.6
○	__GI___clone3		libc.so.6
►10.01+	redistributeAtoms._omp_fn.0	timestep.c:154	exec
○	gomp_thread_start	team.c:130	libgomp.so.1.0.0
○	start_thread		libc.so.6
○	__GI___clone3		libc.so.6

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Metric	Value
CQA speedup if no scalar integer	1.31
CQA speedup if FP arith vectorized	1.00
CQA speedup if fully vectorized	7.29
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.49
Bottlenecks	P6, P7, P8, P9,
Function	sortAtomsInCell
Source	haloExchange.c:621-628
Source loop unroll info	unrolled by 8
Source loop unroll confidence level	max
Unroll/vectorization loop type	main
Unroll factor	8
CQA cycles	52.25
CQA cycles if no scalar integer	40.00
CQA cycles if FP arith vectorized	52.25
CQA cycles if fully vectorized	7.17
Front-end cycles	31.75
P0 cycles	1.50
P1 cycles	1.50
P2 cycles	6.00
P3 cycles	1.33
P4 cycles	1.33
P5 cycles	1.33
P6 cycles	52.25
P7 cycles	52.25
P8 cycles	52.25
P9 cycles	52.25
P10 cycles	8.00
P11 cycles	8.00
P12 cycles	8.00
P13 cycles	8.00
P14 cycles	35.00
P15 cycles	35.00
DIV/SQRT cycles	0.00
Inter-iter dependencies cycles	1
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	247.00
Nb uops	254.00
Nb loads	128.00
Nb stores	87.00
Nb stack references	10.00
FLOP/cycle	0.00
Nb FLOP add-sub	0.00
Nb FLOP mul	0.00
Nb FLOP fma	0.00
Nb FLOP div	0.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	0.00
Nb FLOP rsqrt	0.00
Bytes/cycle	35.83
Bytes prefetched	0.00
Bytes loaded	948.00
Bytes stored	924.00
Stride 0	1.00
Stride 1	4.00
Stride n	0.00
Stride unknown	1.00
Stride indirect	0.00
Vectorization ratio all	21.15
Vectorization ratio load	14.55
Vectorization ratio store	36.78
Vectorization ratio mul	NA
Vectorization ratio add_sub	NA
Vectorization ratio fma	NA
Vectorization ratio div_sqrt	NA
Vectorization ratio other	0.00
Vector-efficiency ratio all	13.74
Vector-efficiency ratio load	12.27
Vector-efficiency ratio store	16.59
Vector-efficiency ratio mul	NA
Vector-efficiency ratio add_sub	NA
Vector-efficiency ratio fma	NA
Vector-efficiency ratio div_sqrt	NA
Vector-efficiency ratio other	9.87

Metric	Value
CQA speedup if no scalar integer	1.31
CQA speedup if FP arith vectorized	1.00
CQA speedup if fully vectorized	7.29
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.49
Bottlenecks	P6, P7, P8, P9,
Function	sortAtomsInCell
Source	haloExchange.c:621-628
Source loop unroll info	unrolled by 8
Source loop unroll confidence level	max
Unroll/vectorization loop type	main
Unroll factor	8
CQA cycles	52.25
CQA cycles if no scalar integer	40.00
CQA cycles if FP arith vectorized	52.25
CQA cycles if fully vectorized	7.17
Front-end cycles	31.75
P0 cycles	1.50
P1 cycles	1.50
P2 cycles	6.00
P3 cycles	1.33
P4 cycles	1.33
P5 cycles	1.33
P6 cycles	52.25
P7 cycles	52.25
P8 cycles	52.25
P9 cycles	52.25
P10 cycles	8.00
P11 cycles	8.00
P12 cycles	8.00
P13 cycles	8.00
P14 cycles	35.00
P15 cycles	35.00
DIV/SQRT cycles	0.00
Inter-iter dependencies cycles	1
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	247.00
Nb uops	254.00
Nb loads	128.00
Nb stores	87.00
Nb stack references	10.00
FLOP/cycle	0.00
Nb FLOP add-sub	0.00
Nb FLOP mul	0.00
Nb FLOP fma	0.00
Nb FLOP div	0.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	0.00
Nb FLOP rsqrt	0.00
Bytes/cycle	35.83
Bytes prefetched	0.00
Bytes loaded	948.00
Bytes stored	924.00
Stride 0	1.00
Stride 1	4.00
Stride n	0.00
Stride unknown	1.00
Stride indirect	0.00
Vectorization ratio all	21.15
Vectorization ratio load	14.55
Vectorization ratio store	36.78
Vectorization ratio mul	NA
Vectorization ratio add_sub	NA
Vectorization ratio fma	NA
Vectorization ratio div_sqrt	NA
Vectorization ratio other	0.00
Vector-efficiency ratio all	13.74
Vector-efficiency ratio load	12.27
Vector-efficiency ratio store	16.59
Vector-efficiency ratio mul	NA
Vector-efficiency ratio add_sub	NA
Vector-efficiency ratio fma	NA
Vector-efficiency ratio div_sqrt	NA
Vector-efficiency ratio other	9.87

Path /

Average path: Display a virtual path defined by average values of all real paths

Function	sortAtomsInCell
Source file and lines	haloExchange.c:621-628
Module	exec

The loop is defined in /home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/haloExchange.c:621-628.

It is main loop of related source loop which is unrolled by 8 (including vectorization).

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 52.25 to 40.00 cycles (1.31x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your loop is poorly vectorized. Only 13% of vector register length is used (average across all SSE/AVX instructions). By fully vectorizing your loop, you can lower the cost of an iteration from 52.25 to 7.17 cycles (7.29x speedup).

Details

21% of SSE/AVX instructions are used in vector version (process two or more data elements in vector registers):

14% of SSE/AVX loads are used in vector version.
36% of SSE/AVX stores are used in vector version.
0% of SSE/AVX instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized loop can use their full power.

Workaround

Try another compiler or update/tune your current one:
- recompile with fassociative-math (included in Ofast or ffast-math) to extend loop vectorization to FP reductions.
Remove inter-iterations dependences from your loop and make it unit-stride:
- If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly: C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)
- If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Performance is limited by:

reading data from caches/RAM (load units are a bottleneck)
writing data to caches/RAM (the store unit is a bottleneck)

By removing all these bottlenecks, you can lower the cost of an iteration from 52.25 to 35.00 cycles (1.49x speedup).

Workaround

Read less array elements
Write less array elements
Provide more information to your compiler:
- hardcode the bounds of the corresponding 'for' loop
- use the 'restrict' C99 keyword

No data for this section

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

VPINSRD: 8 occurrences►
- /home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/haloExchange.c:624
- /home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/haloExchange.c:624
- /home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/haloExchange.c:624
- /home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/haloExchange.c:624
- /home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/haloExchange.c:624
- /home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/haloExchange.c:624
- /home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/haloExchange.c:624
- /home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/haloExchange.c:624

Slow data structures access

Detected data structures (typically arrays) that cannot be efficiently read/written

Details

Constant unknown stride: 1 occurrence(s)

Non-unit stride (uncontiguous) accesses are not efficiently using data caches

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This loop is probably writing/copying data or processing integer elements.

Matching between your loop (in the source code) and the binary loop

The binary loop does not contain any FP arithmetical operations. The binary loop is loading 948 bytes. The binary loop is storing 924 bytes.

General properties

nb instructions	247
nb uops	254
loop length	1617
used x86 registers	15
used mmx registers	0
used xmm registers	32
used ymm registers	0
used zmm registers	0
nb stack references	10

Front-end

ASSUMED MACRO FUSION FIT IN UOP CACHE

micro-operation queue	31.75 cycles
front end	31.75 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	1.50	1.50	6.00	1.33	1.33	1.33	52.25	52.25	52.25	52.25	8.00	8.00	8.00	8.00	35.00	35.00
cycles	1.50	1.50	6.00	1.33	1.33	1.33	52.25	52.25	52.25	52.25	8.00	8.00	8.00	8.00	35.00	35.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions	NA
Longest recurrence chain latency (RecMII)	1.00

Cycles summary

Front-end	31.75
Dispatch	52.25
Data deps.	1.00
Overall L1	52.25

Vectorization ratios

INT

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
other	0%

all	35%
load	25%
store	59%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

INT+FP

all	21%
load	14%
store	36%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Vector efficiency ratios

INT

all	9%
load	7%
store	11%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
other	7%

all	16%
load	15%
store	19%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	12%

INT+FP

all	13%
load	12%
store	16%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	9%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 52.25 cycles. At this rate:

7% of peak load performance is reached (18.14 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
13% of peak store performance is reached (17.68 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Found no such bottlenecks.

ASM code

In the binary file, the address of the loop is: 409960

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	Latency	Recip. throughput	Vectorization
MOV -0x60(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x58(%RBP),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
ADD $0x180,%R11	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD $0x380,%R15	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD $0x180,%R14	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD %R12,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LEA (%RBX,%R12,1),%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ADD $0x40,%R12	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x30(%RAX),%R9D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (6.3%)
MOV 0x28(%RAX),%EDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (6.3%)
MOV 0x24(%RAX),%ECX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (6.3%)
MOV 0x20(%RAX),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x2c(%RAX),%R8D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (6.3%)
MOV 0x3c(%RAX),%R10D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (6.3%)
MOV 0x38(%RAX),%EBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x34(%RAX),%R13D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (6.3%)
VMOVD 0x34(%RDX),%XMM4	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	8	0.50	scal (6.3%)
VMOVD 0x30(%RDX),%XMM5	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	8	0.50	scal (6.3%)
VMOVD 0x2c(%RDX),%XMM6	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	8	0.50	scal (6.3%)
VMOVD 0x28(%RDX),%XMM7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	8	0.50	scal (6.3%)
VMOVD 0x24(%RDX),%XMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	8	0.50	scal (6.3%)
VMOVD 0x20(%RDX),%XMM9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	8	0.50	scal (6.3%)
MOV %R9D,-0x4c(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV 0x1c(%RAX),%R9D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (6.3%)
VMOVD 0x1c(%RDX),%XMM10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	8	0.50	scal (6.3%)
VMOVD 0x18(%RDX),%XMM11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	8	0.50	scal (6.3%)
VMOVD 0x14(%RDX),%XMM12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	8	0.50	scal (6.3%)
VMOVD 0x10(%RDX),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	8	0.50	scal (6.3%)
MOV %EDI,-0x44(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV %ECX,-0x40(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
VMOVD 0xc(%RDX),%XMM1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	8	0.50	scal (6.3%)
VMOVD 0x8(%RDX),%XMM13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	8	0.50	scal (6.3%)
MOV %ESI,-0x3c(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV %R8D,-0x48(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
VMOVD 0x4(%RDX),%XMM14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	8	0.50	scal (6.3%)
VMOVD 0x3c(%RDX),%XMM2	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	8	0.50	scal (6.3%)
VPINSRD $0x1,%R13D,%XMM4,%XMM4	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	1	scal (6.3%)
VMOVD 0x38(%RDX),%XMM3	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	8	0.50	scal (6.3%)
MOV %R9D,-0x38(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV 0x18(%RAX),%R8D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (6.3%)
MOV 0x14(%RAX),%ECX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (6.3%)
MOV 0x10(%RAX),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0xc(%RAX),%EDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (6.3%)
MOV 0x4(%RAX),%R9D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (6.3%)
VMOVD (%RDX),%XMM15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	8	0.50	scal (6.3%)
VPINSRD $0x1,-0x38(%RBP),%XMM10,%XMM10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (6.3%)
VPINSRD $0x1,(%RAX),%XMM15,%XMM15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (6.3%)
VPINSRD $0x1,-0x3c(%RBP),%XMM9,%XMM9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (6.3%)
VPINSRD $0x1,-0x40(%RBP),%XMM8,%XMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (6.3%)
VPINSRD $0x1,-0x44(%RBP),%XMM7,%XMM7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (6.3%)
VPINSRD $0x1,-0x48(%RBP),%XMM6,%XMM6	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (6.3%)
VPINSRD $0x1,-0x4c(%RBP),%XMM5,%XMM5	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (6.3%)
VPINSRD $0x1,%R10D,%XMM2,%XMM2	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	1	scal (6.3%)
MOV %R8D,-0x34(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV 0x8(%RAX),%R8D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (6.3%)
VPINSRD $0x1,-0x34(%RBP),%XMM11,%XMM11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (6.3%)
VPINSRD $0x1,%ESI,%XMM0,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	1	scal (6.3%)
VPINSRD $0x1,%R9D,%XMM14,%XMM14	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	1	scal (6.3%)
VPINSRD $0x1,%EDI,%XMM1,%XMM1	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	1	scal (6.3%)
VPINSRD $0x1,%ECX,%XMM12,%XMM12	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	1	scal (6.3%)
VPINSRD $0x1,%EBX,%XMM3,%XMM3	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	1	scal (6.3%)
VMOVQ %XMM14,-0x350(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVQ %XMM1,-0x2e0(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVQ %XMM15,-0x388(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVQ %XMM0,-0x2a8(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVQ %XMM12,-0x270(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVQ %XMM10,-0x200(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VPINSRD $0x1,%R8D,%XMM13,%XMM13	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	1	scal (6.3%)
VMOVQ %XMM9,-0x1c8(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVQ %XMM8,-0x190(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVQ %XMM13,-0x318(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVQ %XMM11,-0x238(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVQ %XMM7,-0x158(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVQ %XMM6,-0x120(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVQ %XMM5,-0xe8(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVQ %XMM4,-0xb0(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVQ %XMM3,-0x78(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVQ %XMM2,-0x40(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVUPD -0x150(%R11),%XMM30	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (25.0%)
MOV -0x158(%R11),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x168(%R11),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV -0x170(%R11),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
VMOVUPD -0x120(%R11),%XMM29	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (25.0%)
VMOVSD -0x108(%R11),%XMM31	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MOV -0x110(%R11),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV -0x128(%R11),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x130(%R11),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV -0x140(%R11),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
VMOVUPD -0xf0(%R11),%XMM27	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (25.0%)
VMOVSD -0xc8(%R11),%XMM24	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD -0xd8(%R11),%XMM25	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD -0xe0(%R11),%XMM26	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD -0xf8(%R11),%XMM28	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVUPD -0x90(%R11),%XMM19	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (25.0%)
VMOVUPD -0xc0(%R11),%XMM23	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (25.0%)
VMOVSD -0x98(%R11),%XMM20	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD -0xa8(%R11),%XMM21	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD -0xb0(%R11),%XMM22	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVUPD -0x60(%R11),%XMM15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (25.0%)
VMOVSD -0x48(%R11),%XMM13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD -0x50(%R11),%XMM14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD -0x68(%R11),%XMM16	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD -0x70(%R11),%XMM17	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD -0x80(%R11),%XMM18	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD -0x160(%R11),%XMM7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD -0x138(%R11),%XMM6	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD -0xd0(%R11),%XMM4	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD -0x100(%R11),%XMM5	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD -0xa0(%R11),%XMM3	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD -0x78(%R11),%XMM2	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVUPD -0x30(%R11),%XMM11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (25.0%)
VMOVUPD -0x180(%R11),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (25.0%)
MOV -0x10(%R11),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
VMOVSD -0x8(%R11),%XMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD -0x18(%R11),%XMM9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD -0x20(%R11),%XMM10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD -0x38(%R11),%XMM12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD -0x40(%R11),%XMM1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VUNPCKLPD %XMM5,%XMM31,%XMM5	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
VUNPCKLPD %XMM4,%XMM25,%XMM4	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
VUNPCKLPD %XMM3,%XMM21,%XMM3	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
VUNPCKLPD %XMM17,%XMM2,%XMM2	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
MOV %RDI,-0x370(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RAX,-0x338(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMOVUPD %XMM30,-0x310(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOV %RSI,-0x300(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RDX,-0x2c8(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMOVUPD %XMM29,-0x2a0(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOV %R10,-0x290(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMOVUPD %XMM5,-0x268(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
VMOVSD %XMM28,-0x258(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVUPD %XMM27,-0x230(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
VMOVUPD %XMM0,-0x380(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
VMOVQ %R13,%XMM0	1	0	0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2	1	scal (12.5%)
VMOVSD %XMM26,-0x220(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVUPD %XMM4,-0x1f8(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
VUNPCKLPD %XMM7,%XMM0,%XMM7	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
VMOVQ %RCX,%XMM0	1	0	0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2	1	scal (12.5%)
VMOVSD %XMM24,-0x1e8(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVUPD %XMM23,-0x1c0(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
VUNPCKLPD %XMM0,%XMM6,%XMM6	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
VMOVUPD %XMM7,-0x348(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
VMOVSD %XMM22,-0x1b0(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVUPD %XMM3,-0x188(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
VMOVUPD %XMM6,-0x2d8(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
VMOVSD %XMM20,-0x178(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVUPD %XMM19,-0x150(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
VMOVSD %XMM18,-0x140(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVUPD %XMM2,-0x118(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
VMOVSD %XMM16,-0x108(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVUPD %XMM15,-0xe0(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
VUNPCKLPD %XMM1,%XMM13,%XMM15	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
VMOVQ %RBX,%XMM13	1	0	0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2	1	scal (12.5%)
VMOVSD %XMM14,-0xd0(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVSD %XMM12,-0x98(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVUPD %XMM11,-0x70(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
VUNPCKLPD %XMM13,%XMM9,%XMM14	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
VMOVSD %XMM10,-0x60(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVSD %XMM8,-0x28(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVUPD %XMM15,-0xa8(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
VMOVUPD %XMM14,-0x38(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
VMOVUPD -0x150(%R14),%XMM30	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (25.0%)
MOV -0x158(%R14),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
VMOVSD -0x160(%R14),%XMM7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MOV -0x168(%R14),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV -0x170(%R14),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
VMOVUPD -0x120(%R14),%XMM29	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (25.0%)
VMOVSD -0x108(%R14),%XMM31	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MOV -0x110(%R14),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV -0x128(%R14),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV -0x130(%R14),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
VMOVSD -0x138(%R14),%XMM6	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MOV -0x140(%R14),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
VMOVUPD -0xf0(%R14),%XMM27	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (25.0%)
VMOVSD -0xc8(%R14),%XMM24	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD -0xd0(%R14),%XMM4	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD -0xd8(%R14),%XMM25	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD -0xe0(%R14),%XMM26	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD -0xf8(%R14),%XMM28	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD -0x100(%R14),%XMM5	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVUPD -0x90(%R14),%XMM19	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (25.0%)
VMOVUPD -0xc0(%R14),%XMM23	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (25.0%)
VMOVSD -0x98(%R14),%XMM20	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD -0xa0(%R14),%XMM3	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD -0xa8(%R14),%XMM21	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD -0xb0(%R14),%XMM22	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVUPD -0x60(%R14),%XMM15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (25.0%)
VMOVUPD -0x180(%R14),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (25.0%)
VMOVSD -0x48(%R14),%XMM13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD -0x50(%R14),%XMM14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD -0x68(%R14),%XMM16	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD -0x70(%R14),%XMM17	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD -0x78(%R14),%XMM2	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD -0x80(%R14),%XMM18	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVUPD -0x30(%R14),%XMM11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (25.0%)
VMOVSD -0x8(%R14),%XMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MOV -0x10(%R14),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
VMOVSD -0x18(%R14),%XMM9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD -0x20(%R14),%XMM10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD -0x38(%R14),%XMM12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD -0x40(%R14),%XMM1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VUNPCKLPD %XMM5,%XMM31,%XMM5	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
VUNPCKLPD %XMM4,%XMM25,%XMM4	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
MOV %R9,-0x358(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RAX,-0x320(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMOVUPD %XMM30,-0x2f8(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOV %RDX,-0x2e8(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RDI,-0x2b0(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMOVUPD %XMM0,-0x368(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
VMOVQ %R8,%XMM0	1	0	0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2	1	scal (12.5%)
VMOVUPD %XMM29,-0x288(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOV %R13,-0x278(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
VUNPCKLPD %XMM7,%XMM0,%XMM7	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
VMOVQ %R10,%XMM0	1	0	0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2	1	scal (12.5%)
VMOVUPD %XMM5,-0x250(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
VMOVSD %XMM28,-0x240(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VUNPCKLPD %XMM0,%XMM6,%XMM6	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
VMOVUPD %XMM7,-0x330(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
VMOVUPD %XMM27,-0x218(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
VMOVSD %XMM26,-0x208(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVUPD %XMM6,-0x2c0(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
VMOVUPD %XMM4,-0x1e0(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
VMOVSD %XMM24,-0x1d0(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VUNPCKLPD %XMM3,%XMM21,%XMM3	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
VMOVUPD %XMM23,-0x1a8(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
VMOVSD %XMM22,-0x198(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
MOV -0x68(%RBP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
VMOVUPD %XMM15,-0xc8(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
VUNPCKLPD %XMM1,%XMM13,%XMM15	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
VMOVQ %RCX,%XMM13	1	0	0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2	1	scal (12.5%)
VMOVSD %XMM14,-0xb8(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VUNPCKLPD %XMM17,%XMM2,%XMM2	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
VUNPCKLPD %XMM13,%XMM9,%XMM14	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
VMOVUPD %XMM3,-0x170(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
VMOVSD %XMM20,-0x160(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVUPD %XMM19,-0x138(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
VMOVSD %XMM18,-0x128(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVUPD %XMM2,-0x100(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
VMOVSD %XMM16,-0xf0(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVUPD %XMM15,-0x90(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
VMOVSD %XMM12,-0x80(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVUPD %XMM11,-0x58(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
VMOVSD %XMM10,-0x48(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVUPD %XMM14,-0x20(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
VMOVSD %XMM8,-0x10(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
CMP %RSI,%R12	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JNE 409960 <sortAtomsInCell+0x1b0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A

Function	sortAtomsInCell
Source file and lines	haloExchange.c:621-628
Module	exec

gain
potential
hint
expert

Code clean check

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

21% of SSE/AVX instructions are used in vector version (process two or more data elements in vector registers):

14% of SSE/AVX loads are used in vector version.
36% of SSE/AVX stores are used in vector version.
0% of SSE/AVX instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized loop can use their full power.

Workaround

Try another compiler or update/tune your current one:
- recompile with fassociative-math (included in Ofast or ffast-math) to extend loop vectorization to FP reductions.
Remove inter-iterations dependences from your loop and make it unit-stride:
- If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly: C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)
- If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Performance is limited by:

reading data from caches/RAM (load units are a bottleneck)
writing data to caches/RAM (the store unit is a bottleneck)

By removing all these bottlenecks, you can lower the cost of an iteration from 52.25 to 35.00 cycles (1.49x speedup).

Workaround

Read less array elements
Write less array elements
Provide more information to your compiler:
- hardcode the bounds of the corresponding 'for' loop
- use the 'restrict' C99 keyword

No data for this section

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

VPINSRD: 8 occurrences►
- /home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/haloExchange.c:624
- /home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/haloExchange.c:624
- /home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/haloExchange.c:624
- /home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/haloExchange.c:624
- /home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/haloExchange.c:624
- /home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/haloExchange.c:624
- /home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/haloExchange.c:624
- /home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/haloExchange.c:624

Slow data structures access

Detected data structures (typically arrays) that cannot be efficiently read/written

Details

Constant unknown stride: 1 occurrence(s)

Non-unit stride (uncontiguous) accesses are not efficiently using data caches

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This loop is probably writing/copying data or processing integer elements.

Matching between your loop (in the source code) and the binary loop

The binary loop does not contain any FP arithmetical operations. The binary loop is loading 948 bytes. The binary loop is storing 924 bytes.

General properties

nb instructions	247
nb uops	254
loop length	1617
used x86 registers	15
used mmx registers	0
used xmm registers	32
used ymm registers	0
used zmm registers	0
nb stack references	10

Front-end

ASSUMED MACRO FUSION FIT IN UOP CACHE

micro-operation queue	31.75 cycles
front end	31.75 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	1.50	1.50	6.00	1.33	1.33	1.33	52.25	52.25	52.25	52.25	8.00	8.00	8.00	8.00	35.00	35.00
cycles	1.50	1.50	6.00	1.33	1.33	1.33	52.25	52.25	52.25	52.25	8.00	8.00	8.00	8.00	35.00	35.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions	NA
Longest recurrence chain latency (RecMII)	1.00

Cycles summary

Front-end	31.75
Dispatch	52.25
Data deps.	1.00
Overall L1	52.25

Vectorization ratios

INT

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
other	0%

all	35%
load	25%
store	59%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

INT+FP

all	21%
load	14%
store	36%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Vector efficiency ratios

INT

all	9%
load	7%
store	11%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
other	7%

all	16%
load	15%
store	19%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	12%

INT+FP

all	13%
load	12%
store	16%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	9%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 52.25 cycles. At this rate:

7% of peak load performance is reached (18.14 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
13% of peak store performance is reached (17.68 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Found no such bottlenecks.

ASM code

In the binary file, the address of the loop is: 409960

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	Latency	Recip. throughput	Vectorization
MOV -0x60(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x58(%RBP),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
ADD $0x180,%R11	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD $0x380,%R15	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD $0x180,%R14	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD %R12,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LEA (%RBX,%R12,1),%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ADD $0x40,%R12	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x30(%RAX),%R9D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (6.3%)
MOV 0x28(%RAX),%EDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (6.3%)
MOV 0x24(%RAX),%ECX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (6.3%)
MOV 0x20(%RAX),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x2c(%RAX),%R8D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (6.3%)
MOV 0x3c(%RAX),%R10D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (6.3%)
MOV 0x38(%RAX),%EBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x34(%RAX),%R13D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (6.3%)
VMOVD 0x34(%RDX),%XMM4	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	8	0.50	scal (6.3%)
VMOVD 0x30(%RDX),%XMM5	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	8	0.50	scal (6.3%)
VMOVD 0x2c(%RDX),%XMM6	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	8	0.50	scal (6.3%)
VMOVD 0x28(%RDX),%XMM7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	8	0.50	scal (6.3%)
VMOVD 0x24(%RDX),%XMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	8	0.50	scal (6.3%)
VMOVD 0x20(%RDX),%XMM9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	8	0.50	scal (6.3%)
MOV %R9D,-0x4c(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV 0x1c(%RAX),%R9D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (6.3%)
VMOVD 0x1c(%RDX),%XMM10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	8	0.50	scal (6.3%)
VMOVD 0x18(%RDX),%XMM11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	8	0.50	scal (6.3%)
VMOVD 0x14(%RDX),%XMM12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	8	0.50	scal (6.3%)
VMOVD 0x10(%RDX),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	8	0.50	scal (6.3%)
MOV %EDI,-0x44(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV %ECX,-0x40(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
VMOVD 0xc(%RDX),%XMM1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	8	0.50	scal (6.3%)
VMOVD 0x8(%RDX),%XMM13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	8	0.50	scal (6.3%)
MOV %ESI,-0x3c(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV %R8D,-0x48(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
VMOVD 0x4(%RDX),%XMM14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	8	0.50	scal (6.3%)
VMOVD 0x3c(%RDX),%XMM2	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	8	0.50	scal (6.3%)
VPINSRD $0x1,%R13D,%XMM4,%XMM4	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	1	scal (6.3%)
VMOVD 0x38(%RDX),%XMM3	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	8	0.50	scal (6.3%)
MOV %R9D,-0x38(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV 0x18(%RAX),%R8D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (6.3%)
MOV 0x14(%RAX),%ECX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (6.3%)
MOV 0x10(%RAX),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0xc(%RAX),%EDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (6.3%)
MOV 0x4(%RAX),%R9D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (6.3%)
VMOVD (%RDX),%XMM15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	8	0.50	scal (6.3%)
VPINSRD $0x1,-0x38(%RBP),%XMM10,%XMM10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (6.3%)
VPINSRD $0x1,(%RAX),%XMM15,%XMM15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (6.3%)
VPINSRD $0x1,-0x3c(%RBP),%XMM9,%XMM9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (6.3%)
VPINSRD $0x1,-0x40(%RBP),%XMM8,%XMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (6.3%)
VPINSRD $0x1,-0x44(%RBP),%XMM7,%XMM7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (6.3%)
VPINSRD $0x1,-0x48(%RBP),%XMM6,%XMM6	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (6.3%)
VPINSRD $0x1,-0x4c(%RBP),%XMM5,%XMM5	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (6.3%)
VPINSRD $0x1,%R10D,%XMM2,%XMM2	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	1	scal (6.3%)
MOV %R8D,-0x34(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV 0x8(%RAX),%R8D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (6.3%)
VPINSRD $0x1,-0x34(%RBP),%XMM11,%XMM11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0	0	1	0.50	scal (6.3%)
VPINSRD $0x1,%ESI,%XMM0,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	1	scal (6.3%)
VPINSRD $0x1,%R9D,%XMM14,%XMM14	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	1	scal (6.3%)
VPINSRD $0x1,%EDI,%XMM1,%XMM1	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	1	scal (6.3%)
VPINSRD $0x1,%ECX,%XMM12,%XMM12	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	1	scal (6.3%)
VPINSRD $0x1,%EBX,%XMM3,%XMM3	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	1	scal (6.3%)
VMOVQ %XMM14,-0x350(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVQ %XMM1,-0x2e0(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVQ %XMM15,-0x388(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVQ %XMM0,-0x2a8(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVQ %XMM12,-0x270(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVQ %XMM10,-0x200(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VPINSRD $0x1,%R8D,%XMM13,%XMM13	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	1	scal (6.3%)
VMOVQ %XMM9,-0x1c8(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVQ %XMM8,-0x190(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVQ %XMM13,-0x318(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVQ %XMM11,-0x238(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVQ %XMM7,-0x158(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVQ %XMM6,-0x120(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVQ %XMM5,-0xe8(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVQ %XMM4,-0xb0(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVQ %XMM3,-0x78(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVQ %XMM2,-0x40(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVUPD -0x150(%R11),%XMM30	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (25.0%)
MOV -0x158(%R11),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x168(%R11),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV -0x170(%R11),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
VMOVUPD -0x120(%R11),%XMM29	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (25.0%)
VMOVSD -0x108(%R11),%XMM31	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MOV -0x110(%R11),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV -0x128(%R11),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV -0x130(%R11),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV -0x140(%R11),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
VMOVUPD -0xf0(%R11),%XMM27	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (25.0%)
VMOVSD -0xc8(%R11),%XMM24	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD -0xd8(%R11),%XMM25	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD -0xe0(%R11),%XMM26	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD -0xf8(%R11),%XMM28	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVUPD -0x90(%R11),%XMM19	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (25.0%)
VMOVUPD -0xc0(%R11),%XMM23	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (25.0%)
VMOVSD -0x98(%R11),%XMM20	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD -0xa8(%R11),%XMM21	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD -0xb0(%R11),%XMM22	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVUPD -0x60(%R11),%XMM15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (25.0%)
VMOVSD -0x48(%R11),%XMM13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD -0x50(%R11),%XMM14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD -0x68(%R11),%XMM16	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD -0x70(%R11),%XMM17	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD -0x80(%R11),%XMM18	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD -0x160(%R11),%XMM7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD -0x138(%R11),%XMM6	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD -0xd0(%R11),%XMM4	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD -0x100(%R11),%XMM5	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD -0xa0(%R11),%XMM3	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD -0x78(%R11),%XMM2	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVUPD -0x30(%R11),%XMM11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (25.0%)
VMOVUPD -0x180(%R11),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (25.0%)
MOV -0x10(%R11),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
VMOVSD -0x8(%R11),%XMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD -0x18(%R11),%XMM9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD -0x20(%R11),%XMM10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD -0x38(%R11),%XMM12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD -0x40(%R11),%XMM1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VUNPCKLPD %XMM5,%XMM31,%XMM5	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
VUNPCKLPD %XMM4,%XMM25,%XMM4	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
VUNPCKLPD %XMM3,%XMM21,%XMM3	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
VUNPCKLPD %XMM17,%XMM2,%XMM2	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
MOV %RDI,-0x370(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RAX,-0x338(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMOVUPD %XMM30,-0x310(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOV %RSI,-0x300(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RDX,-0x2c8(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMOVUPD %XMM29,-0x2a0(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOV %R10,-0x290(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMOVUPD %XMM5,-0x268(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
VMOVSD %XMM28,-0x258(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVUPD %XMM27,-0x230(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
VMOVUPD %XMM0,-0x380(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
VMOVQ %R13,%XMM0	1	0	0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2	1	scal (12.5%)
VMOVSD %XMM26,-0x220(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVUPD %XMM4,-0x1f8(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
VUNPCKLPD %XMM7,%XMM0,%XMM7	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
VMOVQ %RCX,%XMM0	1	0	0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2	1	scal (12.5%)
VMOVSD %XMM24,-0x1e8(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVUPD %XMM23,-0x1c0(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
VUNPCKLPD %XMM0,%XMM6,%XMM6	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
VMOVUPD %XMM7,-0x348(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
VMOVSD %XMM22,-0x1b0(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVUPD %XMM3,-0x188(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
VMOVUPD %XMM6,-0x2d8(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
VMOVSD %XMM20,-0x178(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVUPD %XMM19,-0x150(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
VMOVSD %XMM18,-0x140(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVUPD %XMM2,-0x118(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
VMOVSD %XMM16,-0x108(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVUPD %XMM15,-0xe0(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
VUNPCKLPD %XMM1,%XMM13,%XMM15	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
VMOVQ %RBX,%XMM13	1	0	0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2	1	scal (12.5%)
VMOVSD %XMM14,-0xd0(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVSD %XMM12,-0x98(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVUPD %XMM11,-0x70(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
VUNPCKLPD %XMM13,%XMM9,%XMM14	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
VMOVSD %XMM10,-0x60(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVSD %XMM8,-0x28(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVUPD %XMM15,-0xa8(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
VMOVUPD %XMM14,-0x38(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
VMOVUPD -0x150(%R14),%XMM30	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (25.0%)
MOV -0x158(%R14),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
VMOVSD -0x160(%R14),%XMM7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MOV -0x168(%R14),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV -0x170(%R14),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
VMOVUPD -0x120(%R14),%XMM29	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (25.0%)
VMOVSD -0x108(%R14),%XMM31	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MOV -0x110(%R14),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV -0x128(%R14),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV -0x130(%R14),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
VMOVSD -0x138(%R14),%XMM6	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MOV -0x140(%R14),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
VMOVUPD -0xf0(%R14),%XMM27	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (25.0%)
VMOVSD -0xc8(%R14),%XMM24	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD -0xd0(%R14),%XMM4	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD -0xd8(%R14),%XMM25	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD -0xe0(%R14),%XMM26	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD -0xf8(%R14),%XMM28	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD -0x100(%R14),%XMM5	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVUPD -0x90(%R14),%XMM19	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (25.0%)
VMOVUPD -0xc0(%R14),%XMM23	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (25.0%)
VMOVSD -0x98(%R14),%XMM20	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD -0xa0(%R14),%XMM3	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD -0xa8(%R14),%XMM21	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD -0xb0(%R14),%XMM22	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVUPD -0x60(%R14),%XMM15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (25.0%)
VMOVUPD -0x180(%R14),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (25.0%)
VMOVSD -0x48(%R14),%XMM13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD -0x50(%R14),%XMM14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD -0x68(%R14),%XMM16	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD -0x70(%R14),%XMM17	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD -0x78(%R14),%XMM2	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD -0x80(%R14),%XMM18	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVUPD -0x30(%R14),%XMM11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (25.0%)
VMOVSD -0x8(%R14),%XMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MOV -0x10(%R14),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
VMOVSD -0x18(%R14),%XMM9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD -0x20(%R14),%XMM10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD -0x38(%R14),%XMM12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD -0x40(%R14),%XMM1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VUNPCKLPD %XMM5,%XMM31,%XMM5	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
VUNPCKLPD %XMM4,%XMM25,%XMM4	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
MOV %R9,-0x358(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RAX,-0x320(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMOVUPD %XMM30,-0x2f8(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOV %RDX,-0x2e8(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RDI,-0x2b0(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMOVUPD %XMM0,-0x368(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
VMOVQ %R8,%XMM0	1	0	0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2	1	scal (12.5%)
VMOVUPD %XMM29,-0x288(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOV %R13,-0x278(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
VUNPCKLPD %XMM7,%XMM0,%XMM7	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
VMOVQ %R10,%XMM0	1	0	0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2	1	scal (12.5%)
VMOVUPD %XMM5,-0x250(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
VMOVSD %XMM28,-0x240(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VUNPCKLPD %XMM0,%XMM6,%XMM6	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
VMOVUPD %XMM7,-0x330(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
VMOVUPD %XMM27,-0x218(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
VMOVSD %XMM26,-0x208(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVUPD %XMM6,-0x2c0(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
VMOVUPD %XMM4,-0x1e0(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
VMOVSD %XMM24,-0x1d0(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VUNPCKLPD %XMM3,%XMM21,%XMM3	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
VMOVUPD %XMM23,-0x1a8(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
VMOVSD %XMM22,-0x198(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
MOV -0x68(%RBP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
VMOVUPD %XMM15,-0xc8(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
VUNPCKLPD %XMM1,%XMM13,%XMM15	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
VMOVQ %RCX,%XMM13	1	0	0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2	1	scal (12.5%)
VMOVSD %XMM14,-0xb8(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VUNPCKLPD %XMM17,%XMM2,%XMM2	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
VUNPCKLPD %XMM13,%XMM9,%XMM14	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
VMOVUPD %XMM3,-0x170(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
VMOVSD %XMM20,-0x160(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVUPD %XMM19,-0x138(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
VMOVSD %XMM18,-0x128(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVUPD %XMM2,-0x100(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
VMOVSD %XMM16,-0xf0(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVUPD %XMM15,-0x90(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
VMOVSD %XMM12,-0x80(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVUPD %XMM11,-0x58(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
VMOVSD %XMM10,-0x48(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVUPD %XMM14,-0x20(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
VMOVSD %XMM8,-0x10(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
CMP %RSI,%R12	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JNE 409960 <sortAtomsInCell+0x1b0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A

Report Configuration

Code clean check

Workaround

Vectorization

Details

Workaround

Execution units bottlenecks

Workaround

Complex instructions

Details

Slow data structures access

Details

Workaround

Type of elements and instruction set

Matching between your loop (in the source code) and the binary loop

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code

Code clean check

Workaround

Vectorization

Details

Workaround

Execution units bottlenecks

Workaround

Complex instructions

Details

Slow data structures access

Details

Workaround

Type of elements and instruction set

Matching between your loop (in the source code) and the binary loop

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code