| Loop Id: 61 | Module: exec | Source: haloExchange.c:633-642 | Coverage: 0.01% |
|---|
| Loop Id: 61 | Module: exec | Source: haloExchange.c:633-642 | Coverage: 0.01% |
|---|
0x20bde0 VMOVD (%RBX),%XMM11 [1] |
0x20bde4 VMOVD 0xe0(%RBX),%XMM12 [1] |
0x20bdec VPINSRD $0x1,0x38(%RBX),%XMM11,%XMM11 [1] |
0x20bdf3 VPINSRD $0x1,0x118(%RBX),%XMM12,%XMM12 [1] |
0x20bdfd VPINSRD $0x2,0x70(%RBX),%XMM11,%XMM11 [1] |
0x20be04 VPINSRD $0x2,0x150(%RBX),%XMM12,%XMM12 [1] |
0x20be0e VPINSRD $0x3,0xa8(%RBX),%XMM11,%XMM11 [1] |
0x20be18 VPINSRD $0x3,0x188(%RBX),%XMM12,%XMM12 [1] |
0x20be22 VMOVDQU %XMM12,0x10(%RAX,%R13,4) [3] |
0x20be29 VMOVDQU %XMM11,(%RAX,%R13,4) [3] |
0x20be2f VMOVD 0x4(%RBX),%XMM11 [1] |
0x20be34 VMOVD 0xe4(%RBX),%XMM12 [1] |
0x20be3c VPINSRD $0x1,0x3c(%RBX),%XMM11,%XMM11 [1] |
0x20be43 VPINSRD $0x1,0x11c(%RBX),%XMM12,%XMM12 [1] |
0x20be4d VPINSRD $0x2,0x74(%RBX),%XMM11,%XMM11 [1] |
0x20be54 VPINSRD $0x2,0x154(%RBX),%XMM12,%XMM12 [1] |
0x20be5e VPINSRD $0x3,0xac(%RBX),%XMM11,%XMM11 [1] |
0x20be68 VPINSRD $0x3,0x18c(%RBX),%XMM12,%XMM12 [1] |
0x20be72 VMOVDQU %XMM12,0x10(%RCX,%R13,4) [4] |
0x20be79 VMOVDQU %XMM11,(%RCX,%R13,4) [4] |
0x20be7f ADD $0x8,%R13 |
0x20be83 VMOVUPD 0x8(%RBX),%ZMM11 [1] |
0x20be8d VMOVUPD 0x88(%RBX),%ZMM13 [1] |
0x20be97 VMOVUPD 0x148(%RBX),%ZMM17 [1] |
0x20bea1 VMOVUPD 0x48(%RBX),%ZMM12 [1] |
0x20beab VMOVUPD 0xc8(%RBX),%ZMM14 [1] |
0x20beb5 VMOVUPD 0x108(%RBX),%ZMM16 [1] |
0x20bebf VMOVUPD 0x188(%RBX),%ZMM15 [1] |
0x20bec9 ADD $0x1c0,%RBX |
0x20bed0 VMOVAPD %ZMM17,%ZMM18 |
0x20bed6 VMOVAPD %ZMM11,%ZMM20 |
0x20bedc VPERMT2PD %ZMM16,%ZMM0,%ZMM18 |
0x20bee2 VMOVAPD %ZMM13,%ZMM19 |
0x20bee8 VPERMT2PD %ZMM14,%ZMM2,%ZMM19 |
0x20beee VPERMT2PD %ZMM16,%ZMM5,%ZMM17 |
0x20bef4 VPERMT2PD %ZMM12,%ZMM7,%ZMM11 |
0x20befa VPERMT2PD %ZMM13,%ZMM9,%ZMM14 |
0x20bf00 VPERMT2PD %ZMM12,%ZMM4,%ZMM20 |
0x20bf06 VPERMT2PD %ZMM15,%ZMM1,%ZMM18 |
0x20bf0c VPERMT2PD %ZMM16,%ZMM3,%ZMM19 |
0x20bf12 VPERMT2PD %ZMM15,%ZMM6,%ZMM17 |
0x20bf18 VPERMT2PD %ZMM13,%ZMM8,%ZMM11 |
0x20bf1e VPERMT2PD %ZMM16,%ZMM10,%ZMM14 |
0x20bf24 VMOVUPD %ZMM20,(%RDX,%R10,1) [5] |
0x20bf2b VMOVUPD %ZMM18,0x80(%RDX,%R10,1) [5] |
0x20bf33 VMOVUPD %ZMM19,0x40(%RDX,%R10,1) [5] |
0x20bf3b VMOVUPD %ZMM17,0x80(%RSI,%R10,1) [2] |
0x20bf43 VMOVUPD %ZMM14,0x40(%RSI,%R10,1) [2] |
0x20bf4b VMOVUPD %ZMM11,(%RSI,%R10,1) [2] |
0x20bf52 ADD $0xc0,%R10 |
0x20bf59 CMP %R13,%R11 |
0x20bf5c JNE 20bde0 |
/home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/haloExchange.c: 633 - 642 |
-------------------------------------------------------------------------------- |
633: for (int ii=begin, iTmp=0; ii<end; ++ii, ++iTmp) |
634: { |
635: atoms->gid[ii] = tmp[iTmp].gid; |
636: atoms->iSpecies[ii] = tmp[iTmp].type; |
637: atoms->r[ii][0] = tmp[iTmp].rx; |
638: atoms->r[ii][1] = tmp[iTmp].ry; |
639: atoms->r[ii][2] = tmp[iTmp].rz; |
640: atoms->p[ii][0] = tmp[iTmp].px; |
641: atoms->p[ii][1] = tmp[iTmp].py; |
642: atoms->p[ii][2] = tmp[iTmp].pz; |
| Coverage (%) | Name | Source Location | Module |
|---|
| min | med | avg | max |
|---|---|---|---|
| Percentile Index | 10 | 20 | 30 | 40 | 50 | 60 | 70 | 80 | 90 | 100 |
|---|---|---|---|---|---|---|---|---|---|---|
| Value |
| min | med | avg | max |
|---|---|---|---|
| Percentile Index | 10 | 20 | 30 | 40 | 50 | 60 | 70 | 80 | 90 | 100 |
|---|---|---|---|---|---|---|---|---|---|---|
| Value |
| Path / |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.00 |
| CQA speedup if FP arith vectorized | 1.00 |
| CQA speedup if fully vectorized | 1.50 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.29 |
| Bottlenecks | P6, P7, P8, P9, |
| Function | sortAtomsInCell |
| Source | haloExchange.c:633-642 |
| Source loop unroll info | unrolled by 8 |
| Source loop unroll confidence level | high |
| Unroll/vectorization loop type | main |
| Unroll factor | 8 |
| CQA cycles | 8.25 |
| CQA cycles if no scalar integer | 8.25 |
| CQA cycles if FP arith vectorized | 8.25 |
| CQA cycles if fully vectorized | 5.50 |
| Front-end cycles | 6.38 |
| P0 cycles | 0.67 |
| P1 cycles | 0.67 |
| P2 cycles | 0.67 |
| P3 cycles | 0.67 |
| P4 cycles | 0.67 |
| P5 cycles | 0.67 |
| P6 cycles | 8.25 |
| P7 cycles | 8.25 |
| P8 cycles | 8.25 |
| P9 cycles | 8.25 |
| P10 cycles | 5.75 |
| P11 cycles | 5.75 |
| P12 cycles | 5.75 |
| P13 cycles | 5.75 |
| P14 cycles | 5.00 |
| P15 cycles | 5.00 |
| DIV/SQRT cycles | 0.00 |
| Inter-iter dependencies cycles | 1 |
| FE+BE cycles (UFS) | NA |
| Stall cycles (UFS) | NA |
| Nb insns | 52.00 |
| Nb uops | 51.00 |
| Nb loads | 23.00 |
| Nb stores | 10.00 |
| Nb stack references | 0.00 |
| FLOP/cycle | 0.00 |
| Nb FLOP add-sub | 0.00 |
| Nb FLOP mul | 0.00 |
| Nb FLOP fma | 0.00 |
| Nb FLOP div | 0.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 116.36 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 512.00 |
| Bytes stored | 448.00 |
| Stride 0 | 0.00 |
| Stride 1 | 4.00 |
| Stride n | 0.00 |
| Stride unknown | 0.00 |
| Stride indirect | 0.00 |
| Vectorization ratio all | 65.96 |
| Vectorization ratio load | 30.43 |
| Vectorization ratio store | 100.00 |
| Vectorization ratio mul | NA |
| Vectorization ratio add_sub | NA |
| Vectorization ratio fma | NA |
| Vectorization ratio div_sqrt | NA |
| Vectorization ratio other | 53.85 |
| Vector-efficiency ratio all | 61.70 |
| Vector-efficiency ratio load | 34.78 |
| Vector-efficiency ratio store | 70.00 |
| Vector-efficiency ratio mul | NA |
| Vector-efficiency ratio add_sub | NA |
| Vector-efficiency ratio fma | NA |
| Vector-efficiency ratio div_sqrt | NA |
| Vector-efficiency ratio other | 56.73 |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.00 |
| CQA speedup if FP arith vectorized | 1.00 |
| CQA speedup if fully vectorized | 1.50 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.29 |
| Bottlenecks | P6, P7, P8, P9, |
| Function | sortAtomsInCell |
| Source | haloExchange.c:633-642 |
| Source loop unroll info | unrolled by 8 |
| Source loop unroll confidence level | high |
| Unroll/vectorization loop type | main |
| Unroll factor | 8 |
| CQA cycles | 8.25 |
| CQA cycles if no scalar integer | 8.25 |
| CQA cycles if FP arith vectorized | 8.25 |
| CQA cycles if fully vectorized | 5.50 |
| Front-end cycles | 6.38 |
| P0 cycles | 0.67 |
| P1 cycles | 0.67 |
| P2 cycles | 0.67 |
| P3 cycles | 0.67 |
| P4 cycles | 0.67 |
| P5 cycles | 0.67 |
| P6 cycles | 8.25 |
| P7 cycles | 8.25 |
| P8 cycles | 8.25 |
| P9 cycles | 8.25 |
| P10 cycles | 5.75 |
| P11 cycles | 5.75 |
| P12 cycles | 5.75 |
| P13 cycles | 5.75 |
| P14 cycles | 5.00 |
| P15 cycles | 5.00 |
| DIV/SQRT cycles | 0.00 |
| Inter-iter dependencies cycles | 1 |
| FE+BE cycles (UFS) | NA |
| Stall cycles (UFS) | NA |
| Nb insns | 52.00 |
| Nb uops | 51.00 |
| Nb loads | 23.00 |
| Nb stores | 10.00 |
| Nb stack references | 0.00 |
| FLOP/cycle | 0.00 |
| Nb FLOP add-sub | 0.00 |
| Nb FLOP mul | 0.00 |
| Nb FLOP fma | 0.00 |
| Nb FLOP div | 0.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 116.36 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 512.00 |
| Bytes stored | 448.00 |
| Stride 0 | 0.00 |
| Stride 1 | 4.00 |
| Stride n | 0.00 |
| Stride unknown | 0.00 |
| Stride indirect | 0.00 |
| Vectorization ratio all | 65.96 |
| Vectorization ratio load | 30.43 |
| Vectorization ratio store | 100.00 |
| Vectorization ratio mul | NA |
| Vectorization ratio add_sub | NA |
| Vectorization ratio fma | NA |
| Vectorization ratio div_sqrt | NA |
| Vectorization ratio other | 53.85 |
| Vector-efficiency ratio all | 61.70 |
| Vector-efficiency ratio load | 34.78 |
| Vector-efficiency ratio store | 70.00 |
| Vector-efficiency ratio mul | NA |
| Vector-efficiency ratio add_sub | NA |
| Vector-efficiency ratio fma | NA |
| Vector-efficiency ratio div_sqrt | NA |
| Vector-efficiency ratio other | 56.73 |
| Path / |
| Function | sortAtomsInCell |
| Source file and lines | haloExchange.c:633-642 |
| Module | exec |
 |
 |
| nb instructions | 52 |
| nb uops | 51 |
| loop length | 386 |
| used x86 registers | 8 |
| used mmx registers | 0 |
| used xmm registers | 2 |
| used ymm registers | 0 |
| used zmm registers | 21 |
| nb stack references | 0 |
| micro-operation queue | 6.38 cycles |
| front end | 6.38 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | P15 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 0.67 | 0.67 | 0.67 | 0.67 | 0.67 | 0.67 | 8.25 | 8.25 | 8.25 | 8.25 | 5.75 | 5.75 | 5.75 | 5.75 | 5.00 | 5.00 |
| cycles | 0.67 | 0.67 | 0.67 | 0.67 | 0.67 | 0.67 | 8.25 | 8.25 | 8.25 | 8.25 | 5.75 | 5.75 | 5.75 | 5.75 | 5.00 | 5.00 |
| Cycles executing div or sqrt instructions | NA |
| Longest recurrence chain latency (RecMII) | 1.00 |
| Front-end | 6.38 |
| Dispatch | 8.25 |
| Data deps. | 1.00 |
| Overall L1 | 8.25 |
| all | 20% |
| load | 0% |
| store | 100% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 0% |
| all | 100% |
| load | 100% |
| store | 100% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 100% |
| all | 65% |
| load | 30% |
| store | 100% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 53% |
| all | 10% |
| load | 6% |
| store | 25% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 6% |
| all | 100% |
| load | 100% |
| store | 100% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 100% |
| all | 61% |
| load | 34% |
| store | 70% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 56% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | P15 | Latency | Recip. throughput | Vectorization |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| VMOVD (%RBX),%XMM11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 8 | 0.50 | scal (6.3%) |
| VMOVD 0xe0(%RBX),%XMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 8 | 0.50 | scal (6.3%) |
| VPINSRD $0x1,0x38(%RBX),%XMM11,%XMM11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| VPINSRD $0x1,0x118(%RBX),%XMM12,%XMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| VPINSRD $0x2,0x70(%RBX),%XMM11,%XMM11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| VPINSRD $0x2,0x150(%RBX),%XMM12,%XMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| VPINSRD $0x3,0xa8(%RBX),%XMM11,%XMM11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| VPINSRD $0x3,0x188(%RBX),%XMM12,%XMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| VMOVDQU %XMM12,0x10(%RAX,%R13,4) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 0.50 | vect (25.0%) |
| VMOVDQU %XMM11,(%RAX,%R13,4) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 0.50 | vect (25.0%) |
| VMOVD 0x4(%RBX),%XMM11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 8 | 0.50 | scal (6.3%) |
| VMOVD 0xe4(%RBX),%XMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 8 | 0.50 | scal (6.3%) |
| VPINSRD $0x1,0x3c(%RBX),%XMM11,%XMM11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| VPINSRD $0x1,0x11c(%RBX),%XMM12,%XMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| VPINSRD $0x2,0x74(%RBX),%XMM11,%XMM11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| VPINSRD $0x2,0x154(%RBX),%XMM12,%XMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| VPINSRD $0x3,0xac(%RBX),%XMM11,%XMM11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| VPINSRD $0x3,0x18c(%RBX),%XMM12,%XMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| VMOVDQU %XMM12,0x10(%RCX,%R13,4) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 0.50 | vect (25.0%) |
| VMOVDQU %XMM11,(%RCX,%R13,4) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 0.50 | vect (25.0%) |
| ADD $0x8,%R13 | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| VMOVUPD 0x8(%RBX),%ZMM11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMOVUPD 0x88(%RBX),%ZMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMOVUPD 0x148(%RBX),%ZMM17 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMOVUPD 0x48(%RBX),%ZMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMOVUPD 0xc8(%RBX),%ZMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMOVUPD 0x108(%RBX),%ZMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMOVUPD 0x188(%RBX),%ZMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| ADD $0x1c0,%RBX | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| VMOVAPD %ZMM17,%ZMM18 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (100.0%) |
| VMOVAPD %ZMM11,%ZMM20 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (100.0%) |
| VPERMT2PD %ZMM16,%ZMM0,%ZMM18 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 5 | 0.50 | vect (100.0%) |
| VMOVAPD %ZMM13,%ZMM19 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (100.0%) |
| VPERMT2PD %ZMM14,%ZMM2,%ZMM19 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 5 | 0.50 | vect (100.0%) |
| VPERMT2PD %ZMM16,%ZMM5,%ZMM17 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 5 | 0.50 | vect (100.0%) |
| VPERMT2PD %ZMM12,%ZMM7,%ZMM11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 5 | 0.50 | vect (100.0%) |
| VPERMT2PD %ZMM13,%ZMM9,%ZMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 5 | 0.50 | vect (100.0%) |
| VPERMT2PD %ZMM12,%ZMM4,%ZMM20 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 5 | 0.50 | vect (100.0%) |
| VPERMT2PD %ZMM15,%ZMM1,%ZMM18 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 5 | 0.50 | vect (100.0%) |
| VPERMT2PD %ZMM16,%ZMM3,%ZMM19 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 5 | 0.50 | vect (100.0%) |
| VPERMT2PD %ZMM15,%ZMM6,%ZMM17 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 5 | 0.50 | vect (100.0%) |
| VPERMT2PD %ZMM13,%ZMM8,%ZMM11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 5 | 0.50 | vect (100.0%) |
| VPERMT2PD %ZMM16,%ZMM10,%ZMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 5 | 0.50 | vect (100.0%) |
| VMOVUPD %ZMM20,(%RDX,%R10,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 | vect (100.0%) |
| VMOVUPD %ZMM18,0x80(%RDX,%R10,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 | vect (100.0%) |
| VMOVUPD %ZMM19,0x40(%RDX,%R10,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 | vect (100.0%) |
| VMOVUPD %ZMM17,0x80(%RSI,%R10,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 | vect (100.0%) |
| VMOVUPD %ZMM14,0x40(%RSI,%R10,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 | vect (100.0%) |
| VMOVUPD %ZMM11,(%RSI,%R10,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 | vect (100.0%) |
| ADD $0xc0,%R10 | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| CMP %R13,%R11 | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| JNE 20bde0 <sortAtomsInCell+0x300> | 1 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
| Function | sortAtomsInCell |
| Source file and lines | haloExchange.c:633-642 |
| Module | exec |
|
|
| nb instructions | 52 |
| nb uops | 51 |
| loop length | 386 |
| used x86 registers | 8 |
| used mmx registers | 0 |
| used xmm registers | 2 |
| used ymm registers | 0 |
| used zmm registers | 21 |
| nb stack references | 0 |
| micro-operation queue | 6.38 cycles |
| front end | 6.38 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | P15 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 0.67 | 0.67 | 0.67 | 0.67 | 0.67 | 0.67 | 8.25 | 8.25 | 8.25 | 8.25 | 5.75 | 5.75 | 5.75 | 5.75 | 5.00 | 5.00 |
| cycles | 0.67 | 0.67 | 0.67 | 0.67 | 0.67 | 0.67 | 8.25 | 8.25 | 8.25 | 8.25 | 5.75 | 5.75 | 5.75 | 5.75 | 5.00 | 5.00 |
| Cycles executing div or sqrt instructions | NA |
| Longest recurrence chain latency (RecMII) | 1.00 |
| Front-end | 6.38 |
| Dispatch | 8.25 |
| Data deps. | 1.00 |
| Overall L1 | 8.25 |
| all | 20% |
| load | 0% |
| store | 100% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 0% |
| all | 100% |
| load | 100% |
| store | 100% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 100% |
| all | 65% |
| load | 30% |
| store | 100% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 53% |
| all | 10% |
| load | 6% |
| store | 25% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 6% |
| all | 100% |
| load | 100% |
| store | 100% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 100% |
| all | 61% |
| load | 34% |
| store | 70% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 56% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | P15 | Latency | Recip. throughput | Vectorization |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| VMOVD (%RBX),%XMM11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 8 | 0.50 | scal (6.3%) |
| VMOVD 0xe0(%RBX),%XMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 8 | 0.50 | scal (6.3%) |
| VPINSRD $0x1,0x38(%RBX),%XMM11,%XMM11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| VPINSRD $0x1,0x118(%RBX),%XMM12,%XMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| VPINSRD $0x2,0x70(%RBX),%XMM11,%XMM11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| VPINSRD $0x2,0x150(%RBX),%XMM12,%XMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| VPINSRD $0x3,0xa8(%RBX),%XMM11,%XMM11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| VPINSRD $0x3,0x188(%RBX),%XMM12,%XMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| VMOVDQU %XMM12,0x10(%RAX,%R13,4) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 0.50 | vect (25.0%) |
| VMOVDQU %XMM11,(%RAX,%R13,4) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 0.50 | vect (25.0%) |
| VMOVD 0x4(%RBX),%XMM11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 8 | 0.50 | scal (6.3%) |
| VMOVD 0xe4(%RBX),%XMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 8 | 0.50 | scal (6.3%) |
| VPINSRD $0x1,0x3c(%RBX),%XMM11,%XMM11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| VPINSRD $0x1,0x11c(%RBX),%XMM12,%XMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| VPINSRD $0x2,0x74(%RBX),%XMM11,%XMM11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| VPINSRD $0x2,0x154(%RBX),%XMM12,%XMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| VPINSRD $0x3,0xac(%RBX),%XMM11,%XMM11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| VPINSRD $0x3,0x18c(%RBX),%XMM12,%XMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| VMOVDQU %XMM12,0x10(%RCX,%R13,4) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 0.50 | vect (25.0%) |
| VMOVDQU %XMM11,(%RCX,%R13,4) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 0.50 | vect (25.0%) |
| ADD $0x8,%R13 | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| VMOVUPD 0x8(%RBX),%ZMM11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMOVUPD 0x88(%RBX),%ZMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMOVUPD 0x148(%RBX),%ZMM17 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMOVUPD 0x48(%RBX),%ZMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMOVUPD 0xc8(%RBX),%ZMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMOVUPD 0x108(%RBX),%ZMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMOVUPD 0x188(%RBX),%ZMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| ADD $0x1c0,%RBX | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| VMOVAPD %ZMM17,%ZMM18 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (100.0%) |
| VMOVAPD %ZMM11,%ZMM20 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (100.0%) |
| VPERMT2PD %ZMM16,%ZMM0,%ZMM18 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 5 | 0.50 | vect (100.0%) |
| VMOVAPD %ZMM13,%ZMM19 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (100.0%) |
| VPERMT2PD %ZMM14,%ZMM2,%ZMM19 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 5 | 0.50 | vect (100.0%) |
| VPERMT2PD %ZMM16,%ZMM5,%ZMM17 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 5 | 0.50 | vect (100.0%) |
| VPERMT2PD %ZMM12,%ZMM7,%ZMM11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 5 | 0.50 | vect (100.0%) |
| VPERMT2PD %ZMM13,%ZMM9,%ZMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 5 | 0.50 | vect (100.0%) |
| VPERMT2PD %ZMM12,%ZMM4,%ZMM20 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 5 | 0.50 | vect (100.0%) |
| VPERMT2PD %ZMM15,%ZMM1,%ZMM18 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 5 | 0.50 | vect (100.0%) |
| VPERMT2PD %ZMM16,%ZMM3,%ZMM19 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 5 | 0.50 | vect (100.0%) |
| VPERMT2PD %ZMM15,%ZMM6,%ZMM17 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 5 | 0.50 | vect (100.0%) |
| VPERMT2PD %ZMM13,%ZMM8,%ZMM11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 5 | 0.50 | vect (100.0%) |
| VPERMT2PD %ZMM16,%ZMM10,%ZMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 5 | 0.50 | vect (100.0%) |
| VMOVUPD %ZMM20,(%RDX,%R10,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 | vect (100.0%) |
| VMOVUPD %ZMM18,0x80(%RDX,%R10,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 | vect (100.0%) |
| VMOVUPD %ZMM19,0x40(%RDX,%R10,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 | vect (100.0%) |
| VMOVUPD %ZMM17,0x80(%RSI,%R10,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 | vect (100.0%) |
| VMOVUPD %ZMM14,0x40(%RSI,%R10,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 | vect (100.0%) |
| VMOVUPD %ZMM11,(%RSI,%R10,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 | vect (100.0%) |
| ADD $0xc0,%R10 | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| CMP %R13,%R11 | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| JNE 20bde0 <sortAtomsInCell+0x300> | 1 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |