Loop Id: 69 | Module: exec | Source: haloExchange.c:380-389 | Coverage: 0.04% |
---|
Loop Id: 69 | Module: exec | Source: haloExchange.c:380-389 | Coverage: 0.04% |
---|
0x40b230 MOV (%R11,%R12,4),%ESI [6] |
0x40b234 MOV %ESI,(%R13) [4] |
0x40b238 MOV (%RBX,%R12,4),%ESI [5] |
0x40b23c MOV %ESI,0x4(%R13) [4] |
0x40b240 MOVUPD -0x10(%R14,%RDX,4),%XMM2 [2] |
0x40b247 ADDPD %XMM0,%XMM2 |
0x40b24b MOVUPD %XMM2,0x8(%R13) [4] |
0x40b251 MOVSD (%R14,%RDX,4),%XMM2 [2] |
0x40b257 ADDSD %XMM1,%XMM2 |
0x40b25b MOVSD %XMM2,0x18(%R13) [4] |
0x40b261 MOVUPS -0x10(%R15,%RDX,4),%XMM2 [1] |
0x40b267 MOVUPS %XMM2,0x20(%R13) [4] |
0x40b26c MOVSD (%R15,%RDX,4),%XMM2 [1] |
0x40b272 MOVSD %XMM2,0x30(%R13) [4] |
0x40b278 INC %R12 |
0x40b27b MOVSXD (%R8,%R10,4),%RSI [3] |
0x40b27f ADD %RCX,%RSI |
0x40b282 ADD $0x38,%R13 |
0x40b286 INC %EDI |
0x40b288 ADD $0x6,%RDX |
0x40b28c CMP %RSI,%R12 |
0x40b28f JL 40b230 |
/beegfs/hackathon/users/eoseret/qaas_runs/170-850-7424/intel/CoMD/build/CoMD/CoMD/src-openmp/haloExchange.c: 380 - 389 |
-------------------------------------------------------------------------------- |
380: for (int ii=iOff; ii<iOff+s->boxes->nAtoms[iBox]; ++ii) |
381: { |
382: buf[nBuf].gid = s->atoms->gid[ii]; |
383: buf[nBuf].type = s->atoms->iSpecies[ii]; |
384: buf[nBuf].rx = s->atoms->r[ii][0] + shift[0]; |
385: buf[nBuf].ry = s->atoms->r[ii][1] + shift[1]; |
386: buf[nBuf].rz = s->atoms->r[ii][2] + shift[2]; |
387: buf[nBuf].px = s->atoms->p[ii][0]; |
388: buf[nBuf].py = s->atoms->p[ii][1]; |
389: buf[nBuf].pz = s->atoms->p[ii][2]; |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.44 |
CQA speedup if FP arith vectorized | 1.24 |
CQA speedup if fully vectorized | 4.52 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.24 |
Bottlenecks | P5, P6, P7, |
Function | loadAtomsBuffer.A |
Source | haloExchange.c:380-389 |
Source loop unroll info | not unrolled or unrolled with no peel/tail loop |
Source loop unroll confidence level | max |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 4.33 |
CQA cycles if no scalar integer | 3.00 |
CQA cycles if FP arith vectorized | 3.50 |
CQA cycles if fully vectorized | 0.96 |
Front-end cycles | 3.50 |
DIV/SQRT cycles | 1.75 |
P0 cycles | 1.75 |
P1 cycles | 1.50 |
P2 cycles | 1.50 |
P3 cycles | 0.50 |
P4 cycles | 4.33 |
P5 cycles | 4.33 |
P6 cycles | 4.33 |
P7 cycles | 0.00 |
P8 cycles | 0.00 |
P9 cycles | 1.00 |
P10 cycles | 1.00 |
P11 cycles | 2.00 |
P12 cycles | 2.00 |
P13 cycles | 0.00 |
Inter-iter dependencies cycles | 1 |
FE+BE cycles (UFS) | NA |
Stall cycles (UFS) | NA |
Nb insns | 22.00 |
Nb uops | 21.00 |
Nb loads | 7.00 |
Nb stores | 6.00 |
Nb stack references | 0.00 |
FLOP/cycle | 0.69 |
Nb FLOP add-sub | 3.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 26.77 |
Bytes prefetched | 0.00 |
Bytes loaded | 60.00 |
Bytes stored | 56.00 |
Stride 0 | 1.00 |
Stride 1 | 2.00 |
Stride n | 3.00 |
Stride unknown | 0.00 |
Stride indirect | 0.00 |
Vectorization ratio all | 38.46 |
Vectorization ratio load | 50.00 |
Vectorization ratio store | 33.33 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | 33.33 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | NA |
Vector-efficiency ratio all | 15.87 |
Vector-efficiency ratio load | 18.75 |
Vector-efficiency ratio store | 14.58 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | 14.58 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | NA |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.44 |
CQA speedup if FP arith vectorized | 1.24 |
CQA speedup if fully vectorized | 4.52 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.24 |
Bottlenecks | P5, P6, P7, |
Function | loadAtomsBuffer.A |
Source | haloExchange.c:380-389 |
Source loop unroll info | not unrolled or unrolled with no peel/tail loop |
Source loop unroll confidence level | max |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 4.33 |
CQA cycles if no scalar integer | 3.00 |
CQA cycles if FP arith vectorized | 3.50 |
CQA cycles if fully vectorized | 0.96 |
Front-end cycles | 3.50 |
DIV/SQRT cycles | 1.75 |
P0 cycles | 1.75 |
P1 cycles | 1.50 |
P2 cycles | 1.50 |
P3 cycles | 0.50 |
P4 cycles | 4.33 |
P5 cycles | 4.33 |
P6 cycles | 4.33 |
P7 cycles | 0.00 |
P8 cycles | 0.00 |
P9 cycles | 1.00 |
P10 cycles | 1.00 |
P11 cycles | 2.00 |
P12 cycles | 2.00 |
P13 cycles | 0.00 |
Inter-iter dependencies cycles | 1 |
FE+BE cycles (UFS) | NA |
Stall cycles (UFS) | NA |
Nb insns | 22.00 |
Nb uops | 21.00 |
Nb loads | 7.00 |
Nb stores | 6.00 |
Nb stack references | 0.00 |
FLOP/cycle | 0.69 |
Nb FLOP add-sub | 3.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 26.77 |
Bytes prefetched | 0.00 |
Bytes loaded | 60.00 |
Bytes stored | 56.00 |
Stride 0 | 1.00 |
Stride 1 | 2.00 |
Stride n | 3.00 |
Stride unknown | 0.00 |
Stride indirect | 0.00 |
Vectorization ratio all | 38.46 |
Vectorization ratio load | 50.00 |
Vectorization ratio store | 33.33 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | 33.33 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | NA |
Vector-efficiency ratio all | 15.87 |
Vector-efficiency ratio load | 18.75 |
Vector-efficiency ratio store | 14.58 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | 14.58 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | NA |
Path / |
Function | loadAtomsBuffer.A |
Source file and lines | haloExchange.c:380-389 |
Module | exec |
nb instructions | 22 |
nb uops | 21 |
loop length | 97 |
used x86 registers | 12 |
used mmx registers | 0 |
used xmm registers | 3 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 0 |
micro-operation queue | 3.50 cycles |
front end | 3.50 cycles |
ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 1.75 | 1.75 | 1.50 | 1.50 | 0.50 | 4.33 | 4.33 | 4.33 | 0.00 | 0.00 | 1.00 | 1.00 | 2.00 | 2.00 |
cycles | 1.75 | 1.75 | 1.50 | 1.50 | 0.50 | 4.33 | 4.33 | 4.33 | 0.00 | 0.00 | 1.00 | 1.00 | 2.00 | 2.00 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 1.00 |
Front-end | 3.50 |
Dispatch | 4.33 |
Data deps. | 1.00 |
Overall L1 | 4.33 |
all | 0% |
load | NA (no load vectorizable/vectorized instructions) |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 50% |
load | 50% |
store | 50% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 50% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 38% |
load | 50% |
store | 33% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 33% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 6% |
load | NA (no load vectorizable/vectorized instructions) |
store | 6% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 6% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 18% |
load | 18% |
store | 18% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 18% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 15% |
load | 18% |
store | 14% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 14% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
Instruction | Nb FU | ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV (%R11,%R12,4),%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %ESI,(%R13) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV (%RBX,%R12,4),%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %ESI,0x4(%R13) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOVUPD -0x10(%R14,%RDX,4),%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
ADDPD %XMM0,%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 |
MOVUPD %XMM2,0x8(%R13) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 |
MOVSD (%R14,%RDX,4),%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ADDSD %XMM1,%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 |
MOVSD %XMM2,0x18(%R13) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
MOVUPS -0x10(%R15,%RDX,4),%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
MOVUPS %XMM2,0x20(%R13) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 |
MOVSD (%R15,%RDX,4),%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOVSD %XMM2,0x30(%R13) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
INC %R12 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVSXD (%R8,%R10,4),%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
ADD %RCX,%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD $0x38,%R13 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
INC %EDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD $0x6,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP %RSI,%R12 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JL 40b230 <loadAtomsBuffer.A+0xc0> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
Function | loadAtomsBuffer.A |
Source file and lines | haloExchange.c:380-389 |
Module | exec |
nb instructions | 22 |
nb uops | 21 |
loop length | 97 |
used x86 registers | 12 |
used mmx registers | 0 |
used xmm registers | 3 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 0 |
micro-operation queue | 3.50 cycles |
front end | 3.50 cycles |
ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 1.75 | 1.75 | 1.50 | 1.50 | 0.50 | 4.33 | 4.33 | 4.33 | 0.00 | 0.00 | 1.00 | 1.00 | 2.00 | 2.00 |
cycles | 1.75 | 1.75 | 1.50 | 1.50 | 0.50 | 4.33 | 4.33 | 4.33 | 0.00 | 0.00 | 1.00 | 1.00 | 2.00 | 2.00 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 1.00 |
Front-end | 3.50 |
Dispatch | 4.33 |
Data deps. | 1.00 |
Overall L1 | 4.33 |
all | 0% |
load | NA (no load vectorizable/vectorized instructions) |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 50% |
load | 50% |
store | 50% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 50% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 38% |
load | 50% |
store | 33% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 33% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 6% |
load | NA (no load vectorizable/vectorized instructions) |
store | 6% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 6% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 18% |
load | 18% |
store | 18% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 18% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 15% |
load | 18% |
store | 14% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 14% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
Instruction | Nb FU | ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV (%R11,%R12,4),%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %ESI,(%R13) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV (%RBX,%R12,4),%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %ESI,0x4(%R13) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOVUPD -0x10(%R14,%RDX,4),%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
ADDPD %XMM0,%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 |
MOVUPD %XMM2,0x8(%R13) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 |
MOVSD (%R14,%RDX,4),%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ADDSD %XMM1,%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 |
MOVSD %XMM2,0x18(%R13) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
MOVUPS -0x10(%R15,%RDX,4),%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
MOVUPS %XMM2,0x20(%R13) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 |
MOVSD (%R15,%RDX,4),%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOVSD %XMM2,0x30(%R13) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
INC %R12 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVSXD (%R8,%R10,4),%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
ADD %RCX,%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD $0x38,%R13 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
INC %EDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD $0x6,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP %RSI,%R12 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JL 40b230 <loadAtomsBuffer.A+0xc0> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |