OV - - Function getBoxFromTuple.A

	Function: getBoxFromTuple.A	Module: exec	Source: linkCells.c:204-249 [...]	Coverage: 0.16%

/beegfs/hackathon/users/eoseret/qaas_runs/170-850-7424/intel/CoMD/build/CoMD/CoMD/src-openmp/linkCells.c: 204 - 249

--------------------------------------------------------------------------------

204: {

205:    int iBox = 0;

206:    const int* gridSize = boxes->gridSize; // alias

207:

208:    // Halo in Z+

209:    if (iz == gridSize[2])

210:    {

211:       iBox = boxes->nLocalBoxes + 2*gridSize[2]*gridSize[1] + 2*gridSize[2]*(gridSize[0]+2) +

212:          (gridSize[0]+2)*(gridSize[1]+2) + (gridSize[0]+2)*(iy+1) + (ix+1);

213:    }

214:    // Halo in Z-

215:    else if (iz == -1)

216:    {

217:       iBox = boxes->nLocalBoxes + 2*gridSize[2]*gridSize[1] + 2*gridSize[2]*(gridSize[0]+2) +

218:          (gridSize[0]+2)*(iy+1) + (ix+1);

219:    }

220:    // Halo in Y+

221:    else if (iy == gridSize[1])

222:    {

223:       iBox = boxes->nLocalBoxes + 2*gridSize[2]*gridSize[1] + gridSize[2]*(gridSize[0]+2) +

224:          (gridSize[0]+2)*iz + (ix+1);

225:    }

226:    // Halo in Y-

227:    else if (iy == -1)

228:    {

229:       iBox = boxes->nLocalBoxes + 2*gridSize[2]*gridSize[1] + iz*(gridSize[0]+2) + (ix+1);

230:    }

231:    // Halo in X+

232:    else if (ix == gridSize[0])

233:    {

234:       iBox = boxes->nLocalBoxes + gridSize[1]*gridSize[2] + iz*gridSize[1] + iy;

235:    }

236:    // Halo in X-

237:    else if (ix == -1)

[...]

244:       iBox = ix + gridSize[0]*iy + gridSize[0]*gridSize[1]*iz;

245:    }

246:    assert(iBox >= 0);

247:    assert(iBox < boxes->nTotalBoxes);

248:

249:    return iBox;

0x40f540 PUSH	%RBP

0x40f541 MOV	%RSP,%RBP

0x40f544 MOV	0x8(%RDI),%R8D

0x40f548 CMP	%ECX,%R8D

0x40f54b JNE	40f57b

0x40f54d LEA	(%RCX,%RCX,1),%EAX

0x40f550 MOV	(%RDI),%R8D

0x40f553 MOV	0x4(%RDI),%R9D

0x40f557 IMUL	%R9D,%EAX

0x40f55b ADD	$0x2,%R8D

0x40f55f LEA	(%RDX,%RCX,2),%ECX

0x40f562 ADD	%R9D,%ECX

0x40f565 ADD	$0x3,%ECX

0x40f568 IMUL	%R8D,%ECX

0x40f56c ADD	0xc(%RDI),%ESI

0x40f56f ADD	%EAX,%ESI

0x40f571 LEA	(%RCX,%RSI,1),%EAX

0x40f574 INC	%EAX

0x40f576 JMP	40f60a

0x40f57b CMP	$-0x1,%ECX

0x40f57e JE	40f5a2

0x40f580 MOV	0x4(%RDI),%EAX

0x40f583 CMP	%EDX,%EAX

0x40f585 JNE	40f5c4

0x40f587 IMUL	%R8D,%EDX

0x40f58b MOV	(%RDI),%EAX

0x40f58d ADD	$0x2,%EAX

0x40f590 ADD	%R8D,%ECX

0x40f593 IMUL	%EAX,%ECX

0x40f596 LEA	(%RSI,%RDX,2),%EAX

0x40f599 ADD	0xc(%RDI),%EAX

0x40f59c ADD	%ECX,%EAX

0x40f59e INC	%EAX

0x40f5a0 JMP	40f60a

0x40f5a2 LEA	(%R8,%R8,1),%EAX

0x40f5a6 IMUL	0x4(%RDI),%EAX

0x40f5aa MOV	(%RDI),%ECX

0x40f5ac ADD	$0x2,%ECX

0x40f5af LEA	(%RDX,%R8,2),%EDX

0x40f5b3 INC	%EDX

0x40f5b5 IMUL	%ECX,%EDX

0x40f5b8 ADD	0xc(%RDI),%ESI

0x40f5bb ADD	%EAX,%ESI

0x40f5bd LEA	(%RDX,%RSI,1),%EAX

0x40f5c0 INC	%EAX

0x40f5c2 JMP	40f60a

0x40f5c4 CMP	$-0x1,%EDX

0x40f5c7 JE	40f5da

0x40f5c9 MOV	(%RDI),%R9D

0x40f5cc CMP	%ESI,%R9D

0x40f5cf JNE	40f5f3

0x40f5d1 ADD	%ECX,%R8D

0x40f5d4 IMUL	%R8D,%EAX

0x40f5d8 JMP	40f605

0x40f5da IMUL	%EAX,%R8D

0x40f5de MOV	(%RDI),%EAX

0x40f5e0 ADD	$0x2,%EAX

0x40f5e3 IMUL	%ECX,%EAX

0x40f5e6 LEA	(%RSI,%R8,2),%ECX

0x40f5ea ADD	0xc(%RDI),%ECX

0x40f5ed ADD	%ECX,%EAX

0x40f5ef INC	%EAX

0x40f5f1 JMP	40f60a

0x40f5f3 IMUL	%ECX,%EAX

0x40f5f6 CMP	$-0x1,%ESI

0x40f5f9 JE	40f605

0x40f5fb ADD	%EDX,%EAX

0x40f5fd IMUL	%R9D,%EAX

0x40f601 ADD	%ESI,%EAX

0x40f603 JMP	40f60a

0x40f605 ADD	%EDX,%EAX

0x40f607 ADD	0xc(%RDI),%EAX

0x40f60a TEST	%EAX,%EAX

0x40f60c JS	40f615

0x40f60e CMP	0x14(%RDI),%EAX

0x40f611 JGE	40f62e

0x40f613 POP	%RBP

0x40f614 RET

0x40f615 MOV	$0x42cf6b,%EDI

0x40f61a MOV	$0x42ce87,%ESI

0x40f61f MOV	$0x42cf75,%ECX

0x40f624 MOV	$0xf6,%EDX

0x40f629 CALL	405100 <__assert_fail@plt>

0x40f62e MOV	$0x42cfa4,%EDI

0x40f633 MOV	$0x42ce87,%ESI

0x40f638 MOV	$0x42cf75,%ECX

0x40f63d MOV	$0xf7,%EDX

0x40f642 CALL	405100 <__assert_fail@plt>

0x40f647 NOPW	(%RAX,%RAX,1)

Path /

Average path: Display a virtual path defined by average values of all real paths

Source file and lines	linkCells.c:204-249
Module	exec

The function is defined in /beegfs/hackathon/users/eoseret/qaas_runs/170-850-7424/intel/CoMD/build/CoMD/CoMD/src-openmp/linkCells.c:204-237,244-249.

Warnings:

Ignoring paths for analysis
Too many paths. Rerun with max-paths=21

Try to simplify control and/or increase the maximum number of paths per function/loop through the 'max-paths-nb' option.

This function has 21 execution paths.

The presence of multiple execution paths is typically the main/first bottleneck.
Try to simplify control inside function: ideally, try to remove all conditional expressions, for example by (if applicable):

hoisting them (moving them outside the function)
turning them into conditional moves, MIN or MAX

Ex: if (x<0) x=0 => x = (x<0 ? 0 : x) (or MAX(0,x) after defining the corresponding macro)

gain
potential
hint
expert

Vectorization

Your function is not vectorized. Only 6% of vector register length is used (average across all SSE/AVX instructions). By vectorizing your function, you can lower the cost of an iteration from 17.25 to 1.08 cycles (16.00x speedup).

Details

All SSE/AVX instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

__assert_fail@plt: 2 occurrences

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 60 bytes.

General properties

nb instructions	89
nb uops	90
loop length	272
used x86 registers	9
used mmx registers	0
used xmm registers	0
used ymm registers	0
used zmm registers	0
nb stack references	0

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	15.00 cycles
front end	15.00 cycles

Back-end

	ALU0/BRU0	ALU1	ALU2	ALU3	BRU1	AGU0	AGU1	AGU2	FP0	FP1	FP2	FP3	FP4	FP5
uops	17.25	17.25	17.00	17.00	8.50	5.67	5.67	5.67	0.00	0.00	0.00	0.00	0.00	0.00
cycles	17.25	17.25	17.00	17.00	8.50	5.67	5.67	5.67	0.00	0.00	0.00	0.00	0.00	0.00

Execution ports to units layout:

ALU0/BRU0: ALU
ALU1: ALU
ALU2: ALU
ALU3: ALU
BRU1:
AGU0 (256 bits): store address, load
AGU1 (256 bits): store address, load
AGU2 (256 bits): store address, load
FP0 (256 bits): VPU, DIV/SQRT
FP1 (256 bits): VPU, DIV/SQRT
FP2 (256 bits): VPU
FP3 (256 bits): VPU
FP4 (256 bits): FP store data
FP5 (256 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	15.00
Dispatch	17.25
Overall L1	17.25

Vectorization ratios

all	0%
load	0%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Vector efficiency ratios

all	6%
load	6%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	7%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 17.25 cycles. At this rate:

3% of peak load performance is reached (3.48 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Found no such bottlenecks.

ASM code

In the binary file, the address of the function is: 40f540

Instruction	Nb FU	ALU0/BRU0	ALU1	ALU2	ALU3	BRU1	AGU0	AGU1	AGU2	Latency	Recip. throughput
PUSH %RBP	1	0	0	0	0	0	0	0	0	1	0.50
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0.17
MOV 0x8(%RDI),%R8D	1	0	0	0	0	0	0.33	0.33	0.33	3	0.33
CMP %ECX,%R8D	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
JNE 40f57b <getBoxFromTuple.A+0x3b>	1	0.50	0	0	0	0.50	0	0	0	1	0.50-1
LEA (%RCX,%RCX,1),%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
MOV (%RDI),%R8D	1	0	0	0	0	0	0.33	0.33	0.33	3	0.33
MOV 0x4(%RDI),%R9D	1	0	0	0	0	0	0.33	0.33	0.33	3	0.33
IMUL %R9D,%EAX	1	0	1	0	0	0	0	0	0	3	1
ADD $0x2,%R8D	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
LEA (%RDX,%RCX,2),%ECX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
ADD %R9D,%ECX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
ADD $0x3,%ECX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
IMUL %R8D,%ECX	1	0	1	0	0	0	0	0	0	3	1
ADD 0xc(%RDI),%ESI	1	0.25	0.25	0.25	0.25	0	0.33	0.33	0.33	1	0.33
ADD %EAX,%ESI	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
LEA (%RCX,%RSI,1),%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
INC %EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
JMP 40f60a <getBoxFromTuple.A+0xca>	1	0.50	0	0	0	0.50	0	0	0	0	1
CMP $-0x1,%ECX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
JE 40f5a2 <getBoxFromTuple.A+0x62>	1	0.50	0	0	0	0.50	0	0	0	1	0.50-1
MOV 0x4(%RDI),%EAX	1	0	0	0	0	0	0.33	0.33	0.33	3	0.33
CMP %EDX,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
JNE 40f5c4 <getBoxFromTuple.A+0x84>	1	0.50	0	0	0	0.50	0	0	0	1	0.50-1
IMUL %R8D,%EDX	1	0	1	0	0	0	0	0	0	3	1
MOV (%RDI),%EAX	1	0	0	0	0	0	0.33	0.33	0.33	3	0.33
ADD $0x2,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
ADD %R8D,%ECX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
IMUL %EAX,%ECX	1	0	1	0	0	0	0	0	0	3	1
LEA (%RSI,%RDX,2),%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
ADD 0xc(%RDI),%EAX	1	0.25	0.25	0.25	0.25	0	0.33	0.33	0.33	1	0.33
ADD %ECX,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
INC %EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
JMP 40f60a <getBoxFromTuple.A+0xca>	1	0.50	0	0	0	0.50	0	0	0	0	1
LEA (%R8,%R8,1),%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
IMUL 0x4(%RDI),%EAX	1	0	1	0	0	0	0.33	0.33	0.33	3	1
MOV (%RDI),%ECX	1	0	0	0	0	0	0.33	0.33	0.33	3	0.33
ADD $0x2,%ECX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
LEA (%RDX,%R8,2),%EDX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
INC %EDX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
IMUL %ECX,%EDX	1	0	1	0	0	0	0	0	0	3	1
ADD 0xc(%RDI),%ESI	1	0.25	0.25	0.25	0.25	0	0.33	0.33	0.33	1	0.33
ADD %EAX,%ESI	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
LEA (%RDX,%RSI,1),%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
INC %EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
JMP 40f60a <getBoxFromTuple.A+0xca>	1	0.50	0	0	0	0.50	0	0	0	0	1
CMP $-0x1,%EDX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
JE 40f5da <getBoxFromTuple.A+0x9a>	1	0.50	0	0	0	0.50	0	0	0	1	0.50-1
MOV (%RDI),%R9D	1	0	0	0	0	0	0.33	0.33	0.33	3	0.33
CMP %ESI,%R9D	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
JNE 40f5f3 <getBoxFromTuple.A+0xb3>	1	0.50	0	0	0	0.50	0	0	0	1	0.50-1
ADD %ECX,%R8D	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
IMUL %R8D,%EAX	1	0	1	0	0	0	0	0	0	3	1
JMP 40f605 <getBoxFromTuple.A+0xc5>	1	0.50	0	0	0	0.50	0	0	0	0	1
IMUL %EAX,%R8D	1	0	1	0	0	0	0	0	0	3	1
MOV (%RDI),%EAX	1	0	0	0	0	0	0.33	0.33	0.33	3	0.33
ADD $0x2,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
IMUL %ECX,%EAX	1	0	1	0	0	0	0	0	0	3	1
LEA (%RSI,%R8,2),%ECX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
ADD 0xc(%RDI),%ECX	1	0.25	0.25	0.25	0.25	0	0.33	0.33	0.33	1	0.33
ADD %ECX,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
INC %EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
JMP 40f60a <getBoxFromTuple.A+0xca>	1	0.50	0	0	0	0.50	0	0	0	0	1
IMUL %ECX,%EAX	1	0	1	0	0	0	0	0	0	3	1
CMP $-0x1,%ESI	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
JE 40f605 <getBoxFromTuple.A+0xc5>	1	0.50	0	0	0	0.50	0	0	0	1	0.50-1
ADD %EDX,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
IMUL %R9D,%EAX	1	0	1	0	0	0	0	0	0	3	1
ADD %ESI,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
JMP 40f60a <getBoxFromTuple.A+0xca>	1	0.50	0	0	0	0.50	0	0	0	0	1
ADD %EDX,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
ADD 0xc(%RDI),%EAX	1	0.25	0.25	0.25	0.25	0	0.33	0.33	0.33	1	0.33
TEST %EAX,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
JS 40f615 <getBoxFromTuple.A+0xd5>	1	0.50	0	0	0	0.50	0	0	0	1	0.50-1
CMP 0x14(%RDI),%EAX	1	0.25	0.25	0.25	0.25	0	0.33	0.33	0.33	1	0.33
JGE 40f62e <getBoxFromTuple.A+0xee>	1	0.50	0	0	0	0.50	0	0	0	1	0.50-1
POP %RBP	1	0	0	0	0	0	0	0	0	1	0.33
RET	1	0.50	0	0	0	0.50	0	0	0	1	0.50
MOV $0x42cf6b,%EDI	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
MOV $0x42ce87,%ESI	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
MOV $0x42cf75,%ECX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
MOV $0xf6,%EDX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
CALL 405100 <__assert_fail@plt>	2	0.50	0	0	0	0.50	0.33	0.33	0.33	0	0.50
MOV $0x42cfa4,%EDI	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
MOV $0x42ce87,%ESI	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
MOV $0x42cf75,%ECX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
MOV $0xf7,%EDX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
CALL 405100 <__assert_fail@plt>	2	0.50	0	0	0	0.50	0.33	0.33	0.33	0	0.50
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0.09

Source file and lines	linkCells.c:204-249
Module	exec

The function is defined in /beegfs/hackathon/users/eoseret/qaas_runs/170-850-7424/intel/CoMD/build/CoMD/CoMD/src-openmp/linkCells.c:204-237,244-249.

Warnings:

Ignoring paths for analysis
Too many paths. Rerun with max-paths=21

hoisting them (moving them outside the function)
turning them into conditional moves, MIN or MAX

Ex: if (x<0) x=0 => x = (x<0 ? 0 : x) (or MAX(0,x) after defining the corresponding macro)

gain
potential
hint
expert

Vectorization

Details

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

__assert_fail@plt: 2 occurrences

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 60 bytes.

General properties

nb instructions	89
nb uops	90
loop length	272
used x86 registers	9
used mmx registers	0
used xmm registers	0
used ymm registers	0
used zmm registers	0
nb stack references	0

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	15.00 cycles
front end	15.00 cycles

Back-end

	ALU0/BRU0	ALU1	ALU2	ALU3	BRU1	AGU0	AGU1	AGU2	FP0	FP1	FP2	FP3	FP4	FP5
uops	17.25	17.25	17.00	17.00	8.50	5.67	5.67	5.67	0.00	0.00	0.00	0.00	0.00	0.00
cycles	17.25	17.25	17.00	17.00	8.50	5.67	5.67	5.67	0.00	0.00	0.00	0.00	0.00	0.00

Execution ports to units layout:

ALU0/BRU0: ALU
ALU1: ALU
ALU2: ALU
ALU3: ALU
BRU1:
AGU0 (256 bits): store address, load
AGU1 (256 bits): store address, load
AGU2 (256 bits): store address, load
FP0 (256 bits): VPU, DIV/SQRT
FP1 (256 bits): VPU, DIV/SQRT
FP2 (256 bits): VPU
FP3 (256 bits): VPU
FP4 (256 bits): FP store data
FP5 (256 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	15.00
Dispatch	17.25
Overall L1	17.25

Vectorization ratios

all	0%
load	0%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Vector efficiency ratios

all	6%
load	6%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	7%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 17.25 cycles. At this rate:

3% of peak load performance is reached (3.48 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Found no such bottlenecks.

ASM code

In the binary file, the address of the function is: 40f540

Instruction	Nb FU	ALU0/BRU0	ALU1	ALU2	ALU3	BRU1	AGU0	AGU1	AGU2	Latency	Recip. throughput
PUSH %RBP	1	0	0	0	0	0	0	0	0	1	0.50
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0.17
MOV 0x8(%RDI),%R8D	1	0	0	0	0	0	0.33	0.33	0.33	3	0.33
CMP %ECX,%R8D	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
JNE 40f57b <getBoxFromTuple.A+0x3b>	1	0.50	0	0	0	0.50	0	0	0	1	0.50-1
LEA (%RCX,%RCX,1),%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
MOV (%RDI),%R8D	1	0	0	0	0	0	0.33	0.33	0.33	3	0.33
MOV 0x4(%RDI),%R9D	1	0	0	0	0	0	0.33	0.33	0.33	3	0.33
IMUL %R9D,%EAX	1	0	1	0	0	0	0	0	0	3	1
ADD $0x2,%R8D	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
LEA (%RDX,%RCX,2),%ECX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
ADD %R9D,%ECX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
ADD $0x3,%ECX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
IMUL %R8D,%ECX	1	0	1	0	0	0	0	0	0	3	1
ADD 0xc(%RDI),%ESI	1	0.25	0.25	0.25	0.25	0	0.33	0.33	0.33	1	0.33
ADD %EAX,%ESI	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
LEA (%RCX,%RSI,1),%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
INC %EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
JMP 40f60a <getBoxFromTuple.A+0xca>	1	0.50	0	0	0	0.50	0	0	0	0	1
CMP $-0x1,%ECX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
JE 40f5a2 <getBoxFromTuple.A+0x62>	1	0.50	0	0	0	0.50	0	0	0	1	0.50-1
MOV 0x4(%RDI),%EAX	1	0	0	0	0	0	0.33	0.33	0.33	3	0.33
CMP %EDX,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
JNE 40f5c4 <getBoxFromTuple.A+0x84>	1	0.50	0	0	0	0.50	0	0	0	1	0.50-1
IMUL %R8D,%EDX	1	0	1	0	0	0	0	0	0	3	1
MOV (%RDI),%EAX	1	0	0	0	0	0	0.33	0.33	0.33	3	0.33
ADD $0x2,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
ADD %R8D,%ECX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
IMUL %EAX,%ECX	1	0	1	0	0	0	0	0	0	3	1
LEA (%RSI,%RDX,2),%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
ADD 0xc(%RDI),%EAX	1	0.25	0.25	0.25	0.25	0	0.33	0.33	0.33	1	0.33
ADD %ECX,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
INC %EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
JMP 40f60a <getBoxFromTuple.A+0xca>	1	0.50	0	0	0	0.50	0	0	0	0	1
LEA (%R8,%R8,1),%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
IMUL 0x4(%RDI),%EAX	1	0	1	0	0	0	0.33	0.33	0.33	3	1
MOV (%RDI),%ECX	1	0	0	0	0	0	0.33	0.33	0.33	3	0.33
ADD $0x2,%ECX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
LEA (%RDX,%R8,2),%EDX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
INC %EDX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
IMUL %ECX,%EDX	1	0	1	0	0	0	0	0	0	3	1
ADD 0xc(%RDI),%ESI	1	0.25	0.25	0.25	0.25	0	0.33	0.33	0.33	1	0.33
ADD %EAX,%ESI	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
LEA (%RDX,%RSI,1),%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
INC %EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
JMP 40f60a <getBoxFromTuple.A+0xca>	1	0.50	0	0	0	0.50	0	0	0	0	1
CMP $-0x1,%EDX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
JE 40f5da <getBoxFromTuple.A+0x9a>	1	0.50	0	0	0	0.50	0	0	0	1	0.50-1
MOV (%RDI),%R9D	1	0	0	0	0	0	0.33	0.33	0.33	3	0.33
CMP %ESI,%R9D	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
JNE 40f5f3 <getBoxFromTuple.A+0xb3>	1	0.50	0	0	0	0.50	0	0	0	1	0.50-1
ADD %ECX,%R8D	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
IMUL %R8D,%EAX	1	0	1	0	0	0	0	0	0	3	1
JMP 40f605 <getBoxFromTuple.A+0xc5>	1	0.50	0	0	0	0.50	0	0	0	0	1
IMUL %EAX,%R8D	1	0	1	0	0	0	0	0	0	3	1
MOV (%RDI),%EAX	1	0	0	0	0	0	0.33	0.33	0.33	3	0.33
ADD $0x2,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
IMUL %ECX,%EAX	1	0	1	0	0	0	0	0	0	3	1
LEA (%RSI,%R8,2),%ECX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
ADD 0xc(%RDI),%ECX	1	0.25	0.25	0.25	0.25	0	0.33	0.33	0.33	1	0.33
ADD %ECX,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
INC %EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
JMP 40f60a <getBoxFromTuple.A+0xca>	1	0.50	0	0	0	0.50	0	0	0	0	1
IMUL %ECX,%EAX	1	0	1	0	0	0	0	0	0	3	1
CMP $-0x1,%ESI	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
JE 40f605 <getBoxFromTuple.A+0xc5>	1	0.50	0	0	0	0.50	0	0	0	1	0.50-1
ADD %EDX,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
IMUL %R9D,%EAX	1	0	1	0	0	0	0	0	0	3	1
ADD %ESI,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
JMP 40f60a <getBoxFromTuple.A+0xca>	1	0.50	0	0	0	0.50	0	0	0	0	1
ADD %EDX,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
ADD 0xc(%RDI),%EAX	1	0.25	0.25	0.25	0.25	0	0.33	0.33	0.33	1	0.33
TEST %EAX,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
JS 40f615 <getBoxFromTuple.A+0xd5>	1	0.50	0	0	0	0.50	0	0	0	1	0.50-1
CMP 0x14(%RDI),%EAX	1	0.25	0.25	0.25	0.25	0	0.33	0.33	0.33	1	0.33
JGE 40f62e <getBoxFromTuple.A+0xee>	1	0.50	0	0	0	0.50	0	0	0	1	0.50-1
POP %RBP	1	0	0	0	0	0	0	0	0	1	0.33
RET	1	0.50	0	0	0	0.50	0	0	0	1	0.50
MOV $0x42cf6b,%EDI	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
MOV $0x42ce87,%ESI	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
MOV $0x42cf75,%ECX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
MOV $0xf6,%EDX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
CALL 405100 <__assert_fail@plt>	2	0.50	0	0	0	0.50	0.33	0.33	0.33	0	0.50
MOV $0x42cfa4,%EDI	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
MOV $0x42ce87,%ESI	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
MOV $0x42cf75,%ECX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
MOV $0xf7,%EDX	1	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25
CALL 405100 <__assert_fail@plt>	2	0.50	0	0	0	0.50	0.33	0.33	0.33	0	0.50
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0.09

▶Scalability Runs Description

Run 2x1	Number processes: 1Number nodes: 1Run Command: <executable> -x 100 -y 100 -z 100 --xproc=2 --yproc=1 --zproc=1MPI Command: mpirun -np 2Dataset: Run Directory: /beegfs/hackathon/users/eoseret/qaas_runs/170-850-7424/intel/CoMD/run/oneview_runs/compilers/icx_6/oneview_run_1708509234I_MPI_PIN_DOMAIN: auto:scatterOMP_PLACES: threadsOMP_PROC_BIND: spreadOMP_NUM_THREADS: 1
Run 2x2	OMP_NUM_THREADS: 2I_MPI_PIN_DOMAIN: auto:scatterOMP_PLACES: threadsOMP_PROC_BIND: spread
Run 2x4	OMP_NUM_THREADS: 4I_MPI_PIN_DOMAIN: auto:scatterOMP_PLACES: threadsOMP_PROC_BIND: spread
Run 2x8	OMP_NUM_THREADS: 8I_MPI_PIN_DOMAIN: auto:scatterOMP_PLACES: threadsOMP_PROC_BIND: spread
Run 2x16	OMP_NUM_THREADS: 16I_MPI_PIN_DOMAIN: auto:scatterOMP_PLACES: threadsOMP_PROC_BIND: spread
Run 2x32	OMP_NUM_THREADS: 32I_MPI_PIN_DOMAIN: auto:scatterOMP_PLACES: threadsOMP_PROC_BIND: spread
Run 2x64	OMP_NUM_THREADS: 64I_MPI_PIN_DOMAIN: auto:scatterOMP_PLACES: threadsOMP_PROC_BIND: spread
Run 2x96	OMP_NUM_THREADS: 96I_MPI_PIN_DOMAIN: auto:scatterOMP_PLACES: threadsOMP_PROC_BIND: spread

(2x1) Efficiency	(2x1) Potential Speed-Up (%)	(2x2) Efficiency	(2x2) Potential Speed-Up (%)	(2x4) Efficiency	(2x4) Potential Speed-Up (%)	(2x8) Efficiency	(2x8) Potential Speed-Up (%)	(2x16) Efficiency	(2x16) Potential Speed-Up (%)	(2x32) Efficiency	(2x32) Potential Speed-Up (%)	(2x64) Efficiency	(2x64) Potential Speed-Up (%)	(2x96) Efficiency	(2x96) Potential Speed-Up (%)
1	0	1.05	0	1.05	0	0.96	0.01	0.96	0	1.44	0	0.72	0.02	0.48	0.03

Speed-Up and Efficiency

▶Detailed Speed-Up and Efficiency

Run	Number of threads	Efficiency (ideal is 1)	Speedup	Ideal Speedup	Time (s)	Coverage (%)
2x1	2	1	1	1	0.47	0.16
2x2	2	1.05	2.09	2	0.44	0.14
2x4	2	1.05	4.18	4	0.49	0.14
2x8	2	0.96	7.67	8	0.45	0.13
2x16	2	0.96	15.33	16	0.48	0.11
2x32	2	1.44	46	32	0.41	0.07
2x64	2	0.72	46	64	0.49	0.06
2x96	2	0.48	46	96	0.49	0.05

Name	Coverage (%)	Time (s)
○getBoxFromTuple.A	0.16	0.46

Report Configuration

Vectorization

Details

Workaround

Execution units bottlenecks

CALL instructions

Details

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code

Vectorization

Details

Workaround

Execution units bottlenecks

CALL instructions

Details

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code

▶Scalability Runs Description

▼Colums Filter

Speed-Up and Efficiency

▶Detailed Speed-Up and Efficiency