OV - exec - Function getBoxFromTuple

	Function: getBoxFromTuple	Module: exec	Source: linkCells.c:204-249 [...]	Coverage: 0.05%

/beegfs/hackathon/users/eoseret/qaas_runs/170-850-7424/intel/CoMD/build/CoMD/CoMD/src-openmp/linkCells.c: 204 - 249

--------------------------------------------------------------------------------

204: {

205:    int iBox = 0;

206:    const int* gridSize = boxes->gridSize; // alias

207:

208:    // Halo in Z+

209:    if (iz == gridSize[2])

210:    {

211:       iBox = boxes->nLocalBoxes + 2*gridSize[2]*gridSize[1] + 2*gridSize[2]*(gridSize[0]+2) +

212:          (gridSize[0]+2)*(gridSize[1]+2) + (gridSize[0]+2)*(iy+1) + (ix+1);

213:    }

214:    // Halo in Z-

215:    else if (iz == -1)

216:    {

217:       iBox = boxes->nLocalBoxes + 2*gridSize[2]*gridSize[1] + 2*gridSize[2]*(gridSize[0]+2) +

218:          (gridSize[0]+2)*(iy+1) + (ix+1);

219:    }

220:    // Halo in Y+

221:    else if (iy == gridSize[1])

222:    {

223:       iBox = boxes->nLocalBoxes + 2*gridSize[2]*gridSize[1] + gridSize[2]*(gridSize[0]+2) +

224:          (gridSize[0]+2)*iz + (ix+1);

225:    }

226:    // Halo in Y-

227:    else if (iy == -1)

228:    {

229:       iBox = boxes->nLocalBoxes + 2*gridSize[2]*gridSize[1] + iz*(gridSize[0]+2) + (ix+1);

230:    }

231:    // Halo in X+

232:    else if (ix == gridSize[0])

233:    {

234:       iBox = boxes->nLocalBoxes + gridSize[1]*gridSize[2] + iz*gridSize[1] + iy;

235:    }

236:    // Halo in X-

237:    else if (ix == -1)

[...]

244:       iBox = ix + gridSize[0]*iy + gridSize[0]*gridSize[1]*iz;

245:    }

246:    assert(iBox >= 0);

247:    assert(iBox < boxes->nTotalBoxes);

248:

249:    return iBox;

0x20f6b0 PUSH	%RBP

0x20f6b1 MOV	%RSP,%RBP

0x20f6b4 MOV	0x8(%RDI),%R8D

0x20f6b8 CMP	%ECX,%R8D

0x20f6bb JNE	20f6e9

0x20f6bd MOV	0x4(%RDI),%R9D

0x20f6c1 MOV	(%RDI),%R8D

0x20f6c4 LEA	(%RCX,%RCX,1),%EAX

0x20f6c7 LEA	(%RDX,%RCX,2),%ECX

0x20f6ca ADD	0xc(%RDI),%ESI

0x20f6cd LEA	0x3(%R9,%RCX,1),%ECX

0x20f6d2 IMUL	%R9D,%EAX

0x20f6d6 ADD	$0x2,%R8D

0x20f6da IMUL	%R8D,%ECX

0x20f6de ADD	%EAX,%ESI

0x20f6e0 LEA	0x1(%RCX,%RSI,1),%EAX

0x20f6e4 JMP	20f776

0x20f6e9 CMP	$-0x1,%ECX

0x20f6ec JE	20f710

0x20f6ee MOV	0x4(%RDI),%EAX

0x20f6f1 CMP	%EDX,%EAX

0x20f6f3 JNE	20f730

0x20f6f5 MOV	(%RDI),%EAX

0x20f6f7 IMUL	%R8D,%EDX

0x20f6fb ADD	%R8D,%ECX

0x20f6fe ADD	$0x2,%EAX

0x20f701 IMUL	%EAX,%ECX

0x20f704 LEA	(%RSI,%RDX,2),%EAX

0x20f707 ADD	0xc(%RDI),%EAX

0x20f70a LEA	0x1(%RCX,%RAX,1),%EAX

0x20f70e JMP	20f776

0x20f710 MOV	(%RDI),%ECX

0x20f712 LEA	(%R8,%R8,1),%EAX

0x20f716 IMUL	0x4(%RDI),%EAX

0x20f71a ADD	0xc(%RDI),%ESI

0x20f71d LEA	0x1(%RDX,%R8,2),%EDX

0x20f722 ADD	$0x2,%ECX

0x20f725 IMUL	%ECX,%EDX

0x20f728 ADD	%EAX,%ESI

0x20f72a LEA	0x1(%RDX,%RSI,1),%EAX

0x20f72e JMP	20f776

0x20f730 CMP	$-0x1,%EDX

0x20f733 JE	20f746

0x20f735 MOV	(%RDI),%R9D

0x20f738 CMP	%ESI,%R9D

0x20f73b JNE	20f75f

0x20f73d ADD	%ECX,%R8D

0x20f740 IMUL	%R8D,%EAX

0x20f744 JMP	20f771

0x20f746 IMUL	%EAX,%R8D

0x20f74a MOV	(%RDI),%EAX

0x20f74c ADD	$0x2,%EAX

0x20f74f IMUL	%ECX,%EAX

0x20f752 LEA	(%RSI,%R8,2),%ECX

0x20f756 ADD	0xc(%RDI),%ECX

0x20f759 LEA	0x1(%RAX,%RCX,1),%EAX

0x20f75d JMP	20f776

0x20f75f IMUL	%ECX,%EAX

0x20f762 CMP	$-0x1,%ESI

0x20f765 JE	20f771

0x20f767 ADD	%EDX,%EAX

0x20f769 IMUL	%R9D,%EAX

0x20f76d ADD	%ESI,%EAX

0x20f76f JMP	20f776

0x20f771 ADD	%EDX,%EAX

0x20f773 ADD	0xc(%RDI),%EAX

0x20f776 TEST	%EAX,%EAX

0x20f778 JS	20f781

0x20f77a CMP	0x14(%RDI),%EAX

0x20f77d JGE	20f79a

0x20f77f POP	%RBP

0x20f780 RET

0x20f781 MOV	$0x203efb,%EDI

0x20f786 MOV	$0x204b86,%ESI

0x20f78b MOV	$0x20555e,%ECX

0x20f790 MOV	$0xf6,%EDX

0x20f795 CALL	2134d0 <@plt_start@+0xd0>

0x20f79a MOV	$0x203ce0,%EDI

0x20f79f MOV	$0x204b86,%ESI

0x20f7a4 MOV	$0x20555e,%ECX

0x20f7a9 MOV	$0xf7,%EDX

0x20f7ae CALL	2134d0 <@plt_start@+0xd0>

0x20f7b3 INT	$0x3

0x20f7b4 INT	$0x3

0x20f7b5 INT	$0x3

0x20f7b6 INT	$0x3

0x20f7b7 INT	$0x3

0x20f7b8 INT	$0x3

0x20f7b9 INT	$0x3

0x20f7ba INT	$0x3

0x20f7bb INT	$0x3

0x20f7bc INT	$0x3

0x20f7bd INT	$0x3

0x20f7be INT	$0x3

0x20f7bf INT	$0x3

Path /

Average path: Display a virtual path defined by average values of all real paths

Source file and lines	linkCells.c:204-249
Module	exec

The function is defined in /beegfs/hackathon/users/eoseret/qaas_runs/170-850-7424/intel/CoMD/build/CoMD/CoMD/src-openmp/linkCells.c:204-237,244-249.

Warnings:

Ignoring paths for analysis
Too many paths. Rerun with max-paths=21

Try to simplify control and/or increase the maximum number of paths per function/loop through the 'max-paths-nb' option.

This function has 21 execution paths.

The presence of multiple execution paths is typically the main/first bottleneck.
Try to simplify control inside function: ideally, try to remove all conditional expressions, for example by (if applicable):

hoisting them (moving them outside the function)
turning them into conditional moves, MIN or MAX

Ex: if (x<0) x=0 => x = (x<0 ? 0 : x) (or MAX(0,x) after defining the corresponding macro)

gain
potential
hint
expert

Vectorization

Your function is not vectorized. Only 7% of vector register length is used (average across all SSE/AVX instructions). By vectorizing your function, you can lower the cost of an iteration from 15.75 to 0.98 cycles (16.00x speedup).

Details

All SSE/AVX instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

unknown: 2 occurrences

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

LEA: 6 occurrences

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 60 bytes.

General properties

nb instructions	95
nb uops	90
loop length	272
used x86 registers	9
used mmx registers	0
used xmm registers	0
used ymm registers	0
used zmm registers	0
nb stack references	0

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	15.00 cycles
front end	15.00 cycles

Back-end

	ALU0/BRU0	ALU1	ALU2	ALU3	BRU1	AGU0	AGU1	AGU2	FP0	FP1	FP2	FP3	FP4	FP5
uops	15.75	15.75	15.50	15.50	8.50	7.67	7.67	7.67	0.00	0.00	0.00	0.00	0.00	0.00
cycles	15.75	15.75	15.50	15.50	8.50	7.67	7.67	7.67	0.00	0.00	0.00	0.00	0.00	0.00

Execution ports to units layout:

ALU0/BRU0: ALU
ALU1: ALU
ALU2: ALU
ALU3: ALU
BRU1:
AGU0 (256 bits): store address, load
AGU1 (256 bits): store address, load
AGU2 (256 bits): store address, load
FP0 (256 bits): VPU, DIV/SQRT
FP1 (256 bits): VPU, DIV/SQRT
FP2 (256 bits): VPU
FP3 (256 bits): VPU
FP4 (256 bits): FP store data
FP5 (256 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	15.00
Dispatch	15.75
Overall L1	15.75

Vectorization ratios

all	0%
load	NA (no load vectorizable/vectorized instructions)
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Vector efficiency ratios

all	7%
load	NA (no load vectorizable/vectorized instructions)
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	7%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 15.75 cycles. At this rate:

3% of peak load performance is reached (3.81 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Found no such bottlenecks.

ASM code

In the binary file, the address of the function is: 20f6b0

Instruction	Nb FU	ALU0/BRU0	ALU1	ALU2	ALU3	BRU1	AGU0	AGU1	AGU2	FP0	FP1	FP2	FP3	FP4	FP5	Latency	Recip. throughput
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV 0x8(%RDI),%R8D	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
CMP %ECX,%R8D	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JNE 20f6e9 <getBoxFromTuple+0x39>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
MOV 0x4(%RDI),%R9D	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV (%RDI),%R8D	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
LEA (%RCX,%RCX,1),%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
LEA (%RDX,%RCX,2),%ECX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
ADD 0xc(%RDI),%ESI	1	0.25	0.25	0.25	0.25	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.33
LEA 0x3(%R9,%RCX,1),%ECX	2	0	0	0.50	0.50	0	0.33	0.33	0.33	0	0	0	0	0	0	2	0.50
IMUL %R9D,%EAX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
ADD $0x2,%R8D	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
IMUL %R8D,%ECX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
ADD %EAX,%ESI	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
LEA 0x1(%RCX,%RSI,1),%EAX	2	0	0	0.50	0.50	0	0.33	0.33	0.33	0	0	0	0	0	0	2	0.50
JMP 20f776 <getBoxFromTuple+0xc6>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	0	1
CMP $-0x1,%ECX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JE 20f710 <getBoxFromTuple+0x60>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
MOV 0x4(%RDI),%EAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
CMP %EDX,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JNE 20f730 <getBoxFromTuple+0x80>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
MOV (%RDI),%EAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
IMUL %R8D,%EDX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
ADD %R8D,%ECX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
ADD $0x2,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
IMUL %EAX,%ECX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
LEA (%RSI,%RDX,2),%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
ADD 0xc(%RDI),%EAX	1	0.25	0.25	0.25	0.25	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.33
LEA 0x1(%RCX,%RAX,1),%EAX	2	0	0	0.50	0.50	0	0.33	0.33	0.33	0	0	0	0	0	0	2	0.50
JMP 20f776 <getBoxFromTuple+0xc6>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	0	1
MOV (%RDI),%ECX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
LEA (%R8,%R8,1),%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
IMUL 0x4(%RDI),%EAX	1	0	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	1
ADD 0xc(%RDI),%ESI	1	0.25	0.25	0.25	0.25	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.33
LEA 0x1(%RDX,%R8,2),%EDX	2	0	0	0.50	0.50	0	0.33	0.33	0.33	0	0	0	0	0	0	2	0.50
ADD $0x2,%ECX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
IMUL %ECX,%EDX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
ADD %EAX,%ESI	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
LEA 0x1(%RDX,%RSI,1),%EAX	2	0	0	0.50	0.50	0	0.33	0.33	0.33	0	0	0	0	0	0	2	0.50
JMP 20f776 <getBoxFromTuple+0xc6>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	0	1
CMP $-0x1,%EDX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JE 20f746 <getBoxFromTuple+0x96>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
MOV (%RDI),%R9D	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
CMP %ESI,%R9D	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JNE 20f75f <getBoxFromTuple+0xaf>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
ADD %ECX,%R8D	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
IMUL %R8D,%EAX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
JMP 20f771 <getBoxFromTuple+0xc1>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	0	1
IMUL %EAX,%R8D	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
MOV (%RDI),%EAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
ADD $0x2,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
IMUL %ECX,%EAX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
LEA (%RSI,%R8,2),%ECX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
ADD 0xc(%RDI),%ECX	1	0.25	0.25	0.25	0.25	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.33
LEA 0x1(%RAX,%RCX,1),%EAX	2	0	0	0.50	0.50	0	0.33	0.33	0.33	0	0	0	0	0	0	2	0.50
JMP 20f776 <getBoxFromTuple+0xc6>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	0	1
IMUL %ECX,%EAX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
CMP $-0x1,%ESI	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JE 20f771 <getBoxFromTuple+0xc1>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
ADD %EDX,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
IMUL %R9D,%EAX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
ADD %ESI,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JMP 20f776 <getBoxFromTuple+0xc6>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	0	1
ADD %EDX,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
ADD 0xc(%RDI),%EAX	1	0.25	0.25	0.25	0.25	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.33
TEST %EAX,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JS 20f781 <getBoxFromTuple+0xd1>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
CMP 0x14(%RDI),%EAX	1	0.25	0.25	0.25	0.25	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.33
JGE 20f79a <getBoxFromTuple+0xea>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33
RET	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50
MOV $0x203efb,%EDI	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV $0x204b86,%ESI	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV $0x20555e,%ECX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV $0xf6,%EDX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
CALL 2134d0 <@plt_start@+0xd0>	2	0.50	0	0	0	0.50	0.33	0.33	0.33	0	0	0	0	0	0	0	0.50
MOV $0x203ce0,%EDI	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV $0x204b86,%ESI	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV $0x20555e,%ECX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV $0xf7,%EDX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
CALL 2134d0 <@plt_start@+0xd0>	2	0.50	0	0	0	0.50	0.33	0.33	0.33	0	0	0	0	0	0	0	0.50
INT $0x3
INT $0x3
INT $0x3
INT $0x3
INT $0x3
INT $0x3
INT $0x3
INT $0x3
INT $0x3
INT $0x3
INT $0x3
INT $0x3
INT $0x3

Source file and lines	linkCells.c:204-249
Module	exec

The function is defined in /beegfs/hackathon/users/eoseret/qaas_runs/170-850-7424/intel/CoMD/build/CoMD/CoMD/src-openmp/linkCells.c:204-237,244-249.

Warnings:

Ignoring paths for analysis
Too many paths. Rerun with max-paths=21

hoisting them (moving them outside the function)
turning them into conditional moves, MIN or MAX

Ex: if (x<0) x=0 => x = (x<0 ? 0 : x) (or MAX(0,x) after defining the corresponding macro)

gain
potential
hint
expert

Vectorization

Details

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

unknown: 2 occurrences

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

LEA: 6 occurrences

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 60 bytes.

General properties

nb instructions	95
nb uops	90
loop length	272
used x86 registers	9
used mmx registers	0
used xmm registers	0
used ymm registers	0
used zmm registers	0
nb stack references	0

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	15.00 cycles
front end	15.00 cycles

Back-end

	ALU0/BRU0	ALU1	ALU2	ALU3	BRU1	AGU0	AGU1	AGU2	FP0	FP1	FP2	FP3	FP4	FP5
uops	15.75	15.75	15.50	15.50	8.50	7.67	7.67	7.67	0.00	0.00	0.00	0.00	0.00	0.00
cycles	15.75	15.75	15.50	15.50	8.50	7.67	7.67	7.67	0.00	0.00	0.00	0.00	0.00	0.00

Execution ports to units layout:

ALU0/BRU0: ALU
ALU1: ALU
ALU2: ALU
ALU3: ALU
BRU1:
AGU0 (256 bits): store address, load
AGU1 (256 bits): store address, load
AGU2 (256 bits): store address, load
FP0 (256 bits): VPU, DIV/SQRT
FP1 (256 bits): VPU, DIV/SQRT
FP2 (256 bits): VPU
FP3 (256 bits): VPU
FP4 (256 bits): FP store data
FP5 (256 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	15.00
Dispatch	15.75
Overall L1	15.75

Vectorization ratios

all	0%
load	NA (no load vectorizable/vectorized instructions)
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Vector efficiency ratios

all	7%
load	NA (no load vectorizable/vectorized instructions)
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	7%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 15.75 cycles. At this rate:

3% of peak load performance is reached (3.81 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Found no such bottlenecks.

ASM code

In the binary file, the address of the function is: 20f6b0

Instruction	Nb FU	ALU0/BRU0	ALU1	ALU2	ALU3	BRU1	AGU0	AGU1	AGU2	FP0	FP1	FP2	FP3	FP4	FP5	Latency	Recip. throughput
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV 0x8(%RDI),%R8D	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
CMP %ECX,%R8D	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JNE 20f6e9 <getBoxFromTuple+0x39>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
MOV 0x4(%RDI),%R9D	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV (%RDI),%R8D	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
LEA (%RCX,%RCX,1),%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
LEA (%RDX,%RCX,2),%ECX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
ADD 0xc(%RDI),%ESI	1	0.25	0.25	0.25	0.25	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.33
LEA 0x3(%R9,%RCX,1),%ECX	2	0	0	0.50	0.50	0	0.33	0.33	0.33	0	0	0	0	0	0	2	0.50
IMUL %R9D,%EAX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
ADD $0x2,%R8D	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
IMUL %R8D,%ECX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
ADD %EAX,%ESI	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
LEA 0x1(%RCX,%RSI,1),%EAX	2	0	0	0.50	0.50	0	0.33	0.33	0.33	0	0	0	0	0	0	2	0.50
JMP 20f776 <getBoxFromTuple+0xc6>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	0	1
CMP $-0x1,%ECX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JE 20f710 <getBoxFromTuple+0x60>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
MOV 0x4(%RDI),%EAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
CMP %EDX,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JNE 20f730 <getBoxFromTuple+0x80>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
MOV (%RDI),%EAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
IMUL %R8D,%EDX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
ADD %R8D,%ECX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
ADD $0x2,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
IMUL %EAX,%ECX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
LEA (%RSI,%RDX,2),%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
ADD 0xc(%RDI),%EAX	1	0.25	0.25	0.25	0.25	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.33
LEA 0x1(%RCX,%RAX,1),%EAX	2	0	0	0.50	0.50	0	0.33	0.33	0.33	0	0	0	0	0	0	2	0.50
JMP 20f776 <getBoxFromTuple+0xc6>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	0	1
MOV (%RDI),%ECX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
LEA (%R8,%R8,1),%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
IMUL 0x4(%RDI),%EAX	1	0	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	1
ADD 0xc(%RDI),%ESI	1	0.25	0.25	0.25	0.25	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.33
LEA 0x1(%RDX,%R8,2),%EDX	2	0	0	0.50	0.50	0	0.33	0.33	0.33	0	0	0	0	0	0	2	0.50
ADD $0x2,%ECX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
IMUL %ECX,%EDX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
ADD %EAX,%ESI	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
LEA 0x1(%RDX,%RSI,1),%EAX	2	0	0	0.50	0.50	0	0.33	0.33	0.33	0	0	0	0	0	0	2	0.50
JMP 20f776 <getBoxFromTuple+0xc6>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	0	1
CMP $-0x1,%EDX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JE 20f746 <getBoxFromTuple+0x96>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
MOV (%RDI),%R9D	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
CMP %ESI,%R9D	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JNE 20f75f <getBoxFromTuple+0xaf>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
ADD %ECX,%R8D	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
IMUL %R8D,%EAX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
JMP 20f771 <getBoxFromTuple+0xc1>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	0	1
IMUL %EAX,%R8D	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
MOV (%RDI),%EAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
ADD $0x2,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
IMUL %ECX,%EAX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
LEA (%RSI,%R8,2),%ECX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
ADD 0xc(%RDI),%ECX	1	0.25	0.25	0.25	0.25	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.33
LEA 0x1(%RAX,%RCX,1),%EAX	2	0	0	0.50	0.50	0	0.33	0.33	0.33	0	0	0	0	0	0	2	0.50
JMP 20f776 <getBoxFromTuple+0xc6>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	0	1
IMUL %ECX,%EAX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
CMP $-0x1,%ESI	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JE 20f771 <getBoxFromTuple+0xc1>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
ADD %EDX,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
IMUL %R9D,%EAX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
ADD %ESI,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JMP 20f776 <getBoxFromTuple+0xc6>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	0	1
ADD %EDX,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
ADD 0xc(%RDI),%EAX	1	0.25	0.25	0.25	0.25	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.33
TEST %EAX,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JS 20f781 <getBoxFromTuple+0xd1>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
CMP 0x14(%RDI),%EAX	1	0.25	0.25	0.25	0.25	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.33
JGE 20f79a <getBoxFromTuple+0xea>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33
RET	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50
MOV $0x203efb,%EDI	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV $0x204b86,%ESI	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV $0x20555e,%ECX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV $0xf6,%EDX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
CALL 2134d0 <@plt_start@+0xd0>	2	0.50	0	0	0	0.50	0.33	0.33	0.33	0	0	0	0	0	0	0	0.50
MOV $0x203ce0,%EDI	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV $0x204b86,%ESI	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV $0x20555e,%ECX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV $0xf7,%EDX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
CALL 2134d0 <@plt_start@+0xd0>	2	0.50	0	0	0	0.50	0.33	0.33	0.33	0	0	0	0	0	0	0	0.50
INT $0x3
INT $0x3
INT $0x3
INT $0x3
INT $0x3
INT $0x3
INT $0x3
INT $0x3
INT $0x3
INT $0x3
INT $0x3
INT $0x3
INT $0x3

Name	Coverage (%)	Time (s)
○getBoxFromTuple	0.05	0.01

Report Configuration

Vectorization

Details

Workaround

Execution units bottlenecks

CALL instructions

Details

Complex instructions

Details

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code

Vectorization

Details

Workaround

Execution units bottlenecks

CALL instructions

Details

Complex instructions

Details

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code