OV - exec - Function updateLinkCells

	Function: updateLinkCells	Module: exec	Source: linkCells.c:211-385 [...]	Coverage (incl. loops): 0.30% \| (excl. loops): 0.00%

/home/hbollore/qaas/qaas-runs/174-108-7908/intel/CoMD/build/CoMD/CoMD/src-openmp/linkCells.c: 211 - 385

--------------------------------------------------------------------------------

211:       iBox = boxes->nLocalBoxes + 2*gridSize[2]*gridSize[1] + 2*gridSize[2]*(gridSize[0]+2) +

212:          (gridSize[0]+2)*(gridSize[1]+2) + (gridSize[0]+2)*(iy+1) + (ix+1);

213:    }

214:    // Halo in Z-

215:    else if (iz == -1)

216:    {

217:       iBox = boxes->nLocalBoxes + 2*gridSize[2]*gridSize[1] + 2*gridSize[2]*(gridSize[0]+2) +

218:          (gridSize[0]+2)*(iy+1) + (ix+1);

219:    }

220:    // Halo in Y+

221:    else if (iy == gridSize[1])

222:    {

223:       iBox = boxes->nLocalBoxes + 2*gridSize[2]*gridSize[1] + gridSize[2]*(gridSize[0]+2) +

224:          (gridSize[0]+2)*iz + (ix+1);

225:    }

226:    // Halo in Y-

227:    else if (iy == -1)

228:    {

229:       iBox = boxes->nLocalBoxes + 2*gridSize[2]*gridSize[1] + iz*(gridSize[0]+2) + (ix+1);

230:    }

231:    // Halo in X+

232:    else if (ix == gridSize[0])

233:    {

234:       iBox = boxes->nLocalBoxes + gridSize[1]*gridSize[2] + iz*gridSize[1] + iy;

235:    }

236:    // Halo in X-

237:    else if (ix == -1)

238:    {

239:       iBox = boxes->nLocalBoxes + iz*gridSize[1] + iy;

240:    }

241:    // local link celll.

242:    else

243:    {

244:       iBox = ix + gridSize[0]*iy + gridSize[0]*gridSize[1]*iz;

245:    }

246:    assert(iBox >= 0);

247:    assert(iBox < boxes->nTotalBoxes);

[...]

288: {

289:    emptyHaloCells(boxes);

290:

291:    for (int iBox=0; iBox<boxes->nLocalBoxes; ++iBox)

292:    {

293:       int iOff = iBox*MAXATOMS;

294:       int ii=0;

295:       while (ii < boxes->nAtoms[iBox])

296:       {

297:          int jBox = getBoxFromCoord(boxes, atoms->r[iOff+ii]);

298:          if (jBox != iBox)

299:             moveAtom(boxes, atoms, ii, iBox, jBox);

300:          else

301:             ++ii;

302:       }

303:    }

304: }

[...]

352:    int ix = (int)(floor((rr[0] - localMin[0])*boxes->invBoxSize[0]));

353:    int iy = (int)(floor((rr[1] - localMin[1])*boxes->invBoxSize[1]));

354:    int iz = (int)(floor((rr[2] - localMin[2])*boxes->invBoxSize[2]));

355:

356:

357:    // For each axis, if we are inside the local domain, make sure we get

358:    // a local link cell.  Otherwise, make sure we get a halo link cell.

359:    if (rr[0] < localMax[0])

360:    {

361:       if (ix == gridSize[0]) ix = gridSize[0] - 1;

362:    }

363:    else

364:       ix = gridSize[0]; // assign to halo cell

365:    if (rr[1] < localMax[1])

366:    {

367:       if (iy == gridSize[1]) iy = gridSize[1] - 1;

368:    }

369:    else

370:       iy = gridSize[1];

371:    if (rr[2] < localMax[2])

372:    {

373:       if (iz == gridSize[2]) iz = gridSize[2] - 1;

[...]

384:    for (int ii=boxes->nLocalBoxes; ii<boxes->nTotalBoxes; ++ii)

385:       boxes->nAtoms[ii] = 0;

0x40a5c0 STP	X29, X30, [SP, #928]!

0x40a5c4 ADD	X29, SP, #0

0x40a5c8 STP	X21, X22, [SP, #32]

0x40a5cc ORR	X21, XZR, X0

0x40a5d0 LDR	W2, [X0, #12]

0x40a5d4 STR	X27, [SP, #80]

0x40a5d8 ORR	X27, XZR, X1

0x40a5dc LDR	W1, [X0, #20]

0x40a5e0 CMP	W2, W1

0x40a5e4 B.GE	40a608

0x40a5e8 SBFM	X0, X2, #0, #31

0x40a5ec LDR	X2, [X21, #120]

(122) 0x40a5f0 STR	WZR, [X2, X0,LSL #2]

(122) 0x40a5f4 ADD	X0, X0, #1

(122) 0x40a5f8 LDR	W3, [X21, #20]

(122) 0x40a5fc CMP	W3, W0

(122) 0x40a600 B.GT	40a5f0

0x40a604 LDR	W2, [X21, #12]

0x40a608 CMP	W2, #0

0x40a60c B.LE	40a830

0x40a610 STP	X19, X20, [SP, #16]

0x40a614 STP	X23, X24, [SP, #48]

0x40a618 MOVZ	X23, #0

0x40a61c STP	X25, X26, [SP, #64]

0x40a620 MOVZ	W26, #24

0x40a624 LDR	X5, [X21, #120]

      (118) 0x40a628 UBFM	X25, X23, #62, #31

      (118) 0x40a62c ORR	W20, WZR, W23

      (118) 0x40a630 LDR	W4, [X5, X25]

      (118) 0x40a634 UBFM	W19, W23, #26, #25

      (118) 0x40a638 CMP	W4, #0

      (118) 0x40a63c B.LE	40a818

    (119) 0x40a640 LDR	D29, [X21, #64]

    (119) 0x40a644 MOVZ	W22, #0

    (119) 0x40a648 ORR	W24, WZR, W19

    (119) 0x40a64c LDP	D31, D30, [X21, #48]

    (119) 0x40a650 LDR	X3, [X27, #24]

    (119) 0x40a654 LDP	W2, W0, [X21]

    (119) 0x40a658 LDR	W1, [X21, #8]

    (119) 0x40a65c HINT	#0

    (119) 0x40a660 UMADDL	X6, W24, W26, XZR

    (119) 0x40a664 ORR	W11, WZR, W2

    (119) 0x40a668 LDR	D4, [X3, X6]

    (119) 0x40a66c ADD	X7, X3, X6

    (119) 0x40a670 LDP	D27, D26, [X7, #8]

    (119) 0x40a674 FCMPE	D4, D31

    (119) 0x40a678 B.GE	40a69c

    (119) 0x40a67c LDR	D3, [X21, #24]

    (119) 0x40a680 LDR	D2, [X21, #96]

    (119) 0x40a684 FSUB	D0, D4, S3

    (119) 0x40a688 FMUL	D1, D0, D2

    (119) 0x40a68c FCVTMS	W8, D1

    (119) 0x40a690 CMP	W8, W2

    (119) 0x40a694 CSINC	W9, WZR, WZR, #1

    (119) 0x40a698 SUB	W11, W8, W9

    (119) 0x40a69c FCMPE	D27, D30

    (119) 0x40a6a0 ORR	W13, WZR, W0

    (119) 0x40a6a4 B.GE	40a6c8

    (119) 0x40a6a8 LDR	D5, [X21, #32]

    (119) 0x40a6ac LDR	D6, [X21, #104]

    (119) 0x40a6b0 FSUB	D7, D27, S5

    (119) 0x40a6b4 FMUL	D16, D7, D6

    (119) 0x40a6b8 FCVTMS	W10, D16

    (119) 0x40a6bc CMP	W10, W0

    (119) 0x40a6c0 CSINC	W12, WZR, WZR, #1

    (119) 0x40a6c4 SUB	W13, W10, W12

    (119) 0x40a6c8 FCMPE	D26, D29

    (119) 0x40a6cc B.GE	40a790

    (119) 0x40a6d0 LDR	D25, [X21, #40]

    (119) 0x40a6d4 LDR	D28, [X21, #112]

    (119) 0x40a6d8 FSUB	D17, D26, S25

    (119) 0x40a6dc FMUL	D18, D17, D28

    (119) 0x40a6e0 FCVTMS	W10, D18

    (119) 0x40a6e4 CMP	W10, W1

    (119) 0x40a6e8 CSINC	W12, WZR, WZR, #1

    (119) 0x40a6ec SUB	W14, W10, W12

    (119) 0x40a6f0 CMN	W14, #1

    (119) 0x40a6f4 B.EQ	40a7c4

    (119) 0x40a6f8 CMP	W13, W0

    (119) 0x40a6fc B.EQ	40a7f0

    (119) 0x40a700 CMN	W13, #1

    (119) 0x40a704 B.EQ	40a840

    (119) 0x40a708 CMP	W11, W2

    (119) 0x40a70c B.EQ	40a860

    (119) 0x40a710 CMN	W11, #1

    (119) 0x40a714 B.EQ	40a874

    (119) 0x40a718 MADD	W11, W13, W2, W11

    (119) 0x40a71c MADD	W13, W0, W2, WZR

    (119) 0x40a720 MADD	W4, W13, W14, W11

    (119) 0x40a724 TBNZ	W4, #31, 40a884

    (119) 0x40a728 LDR	W13, [X21, #20]

    (119) 0x40a72c CMP	W4, W13

    (119) 0x40a730 B.GE	40a8a4

    (119) 0x40a734 CMP	W4, W23

    (119) 0x40a738 B.EQ	40a778

    (119) 0x40a73c ORR	X1, XZR, X27

    (119) 0x40a740 ORR	W3, WZR, W20

    (119) 0x40a744 ORR	W2, WZR, W22

    (119) 0x40a748 ORR	X0, XZR, X21

    (119) 0x40a74c BL	40a420

    (119) 0x40a750 LDR	X5, [X21, #120]

    (119) 0x40a754 LDR	W1, [X5, X25]

    (119) 0x40a758 CMP	W1, W22

    (119) 0x40a75c B.LE	40a814

    (119) 0x40a760 LDR	X3, [X27, #24]

    (119) 0x40a764 LDR	D29, [X21, #64]

    (119) 0x40a768 LDP	D31, D30, [X21, #48]

    (119) 0x40a76c LDP	W2, W0, [X21]

    (119) 0x40a770 LDR	W1, [X21, #8]

    (119) 0x40a774 B	40a660

    (119) 0x40a778 LDR	W11, [X5, X25]

    (119) 0x40a77c ADD	W22, W22, #1

    (119) 0x40a780 CMP	W11, W22

    (119) 0x40a784 B.LE	40a814

    (119) 0x40a788 ADD	W24, W19, W22

    (119) 0x40a78c B	40a660

    (119) 0x40a790 LDR	W4, [X21, #12]

    (119) 0x40a794 ADD	W15, W2, #2

    (119) 0x40a798 MADD	W14, W1, W0, WZR

    (119) 0x40a79c ADD	W16, W0, #2

    (119) 0x40a7a0 ADD	W17, W11, #1

    (119) 0x40a7a4 MADD	W18, W15, W1, WZR

    (119) 0x40a7a8 MADD	W30, W13, W15, W15

    (119) 0x40a7ac ADD	W6, W4, W14,LSL #1

    (119) 0x40a7b0 ADD	W7, W6, W18,LSL #1

    (119) 0x40a7b4 MADD	W8, W16, W15, W7

    (119) 0x40a7b8 ADD	W9, W8, W30

    (119) 0x40a7bc ADD	W4, W9, W17

    (119) 0x40a7c0 B	40a724

    (119) 0x40a7c4 LDR	W8, [X21, #12]

    (119) 0x40a7c8 ADD	W30, W2, #2

    (119) 0x40a7cc MADD	W18, W1, W0, WZR

    (119) 0x40a7d0 ADD	W6, W11, #1

    (119) 0x40a7d4 MADD	W4, W30, W1, WZR

    (119) 0x40a7d8 MADD	W7, W13, W30, W30

    (119) 0x40a7dc ADD	W9, W8, W18,LSL #1

    (119) 0x40a7e0 ADD	W10, W9, W4,LSL #1

    (119) 0x40a7e4 ADD	W12, W10, W7

    (119) 0x40a7e8 ADD	W4, W12, W6

    (119) 0x40a7ec B	40a724

    (119) 0x40a7f0 LDR	W15, [X21, #12]

    (119) 0x40a7f4 MADD	W12, W1, W0, WZR

    (119) 0x40a7f8 ADD	W13, W2, #2

    (119) 0x40a7fc ADD	W11, W11, #1

    (119) 0x40a800 ADD	W16, W15, W12,LSL #1

    (119) 0x40a804 MADD	W17, W13, W1, W16

    (119) 0x40a808 MADD	W14, W14, W13, W17

    (119) 0x40a80c ADD	W4, W14, W11

    (119) 0x40a810 B	40a724

    (119) 0x40a814 LDR	W2, [X21, #12]

      (118) 0x40a818 ADD	X23, X23, #1

      (118) 0x40a81c CMP	W2, W23

      (118) 0x40a820 B.GT	40a628

(121) 0x40a824 LDP	X19, X20, [SP, #16]

(121) 0x40a828 LDP	X23, X24, [SP, #48]

(121) 0x40a82c LDP	X25, X26, [SP, #64]

(121) 0x40a830 LDP	X21, X22, [SP, #32]

(121) 0x40a834 LDR	X27, [SP, #80]

(121) 0x40a838 LDP	X29, X30, [SP], #96

(121) 0x40a83c RET

  (120) 0x40a840 LDR	W8, [X21, #12]

  (120) 0x40a844 MADD	W7, W1, W0, WZR

  (120) 0x40a848 ADD	W4, W2, #2

  (120) 0x40a84c ADD	W6, W11, #1

  (120) 0x40a850 ADD	W9, W8, W7,LSL #1

  (120) 0x40a854 MADD	W10, W4, W14, W9

  (120) 0x40a858 ADD	W4, W10, W6

  (120) 0x40a85c B	40a724

    (119) 0x40a860 LDR	W17, [X21, #12]

    (119) 0x40a864 MADD	W18, W1, W0, W17

    (119) 0x40a868 MADD	W30, W14, W0, W18

    (119) 0x40a86c ADD	W4, W30, W13

    (119) 0x40a870 B	40a724

    (119) 0x40a874 LDR	W15, [X21, #12]

    (119) 0x40a878 MADD	W16, W14, W0, W15

    (119) 0x40a87c ADD	W4, W16, W13

    (119) 0x40a880 B	40a724

0x40a884 ADRP	X5,

0x40a888 ADRP	X22,

0x40a88c ADRP	X23,

0x40a890 ADD	X3, X5, #1360

0x40a894 ADD	X1, X22, #992

0x40a898 ADD	X0, X23, #1088

0x40a89c MOVZ	W2, #246

0x40a8a0 BL	402700

0x40a8a4 ADRP	X24,

0x40a8a8 ADRP	X21,

0x40a8ac ADRP	X27,

0x40a8b0 ADD	X3, X24, #1360

0x40a8b4 ADD	X1, X21, #992

0x40a8b8 ADD	X0, X27, #1104

0x40a8bc MOVZ	W2, #247

0x40a8c0 BL	402700

Coverage (%)	Name	Source Location	Module
►99.07+	timestep	timestep.c:148	exec
○	main	CoMD.c:125	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	CoMD.c:266	exec

Coverage (%)	Name	Source Location	Module
►98.98+	timestep	timestep.c:148	exec
○	main	CoMD.c:125	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	CoMD.c:266	exec
►1.02+	redistributeAtoms	timestep.c:148	exec
○	main	CoMD.c:207	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	CoMD.c:266	exec

Coverage (%)	Name	Source Location	Module
►99.08+	timestep	timestep.c:148	exec
○	main	CoMD.c:125	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	CoMD.c:266	exec

Coverage (%)	Name	Source Location	Module
►99.38+	timestep	timestep.c:148	exec
○	main	CoMD.c:125	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	CoMD.c:266	exec

Coverage (%)	Name	Source Location	Module
►98.97+	timestep	timestep.c:148	exec
○	main	CoMD.c:125	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	CoMD.c:266	exec
►1.03+	redistributeAtoms	timestep.c:148	exec
○	main	CoMD.c:207	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	CoMD.c:266	exec

Coverage (%)	Name	Source Location	Module
►99.35+	timestep	timestep.c:148	exec
○	main	CoMD.c:125	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	CoMD.c:266	exec

Coverage (%)	Name	Source Location	Module
►98.98+	timestep	timestep.c:148	exec
○	main	CoMD.c:125	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	CoMD.c:266	exec
►1.02+	redistributeAtoms	timestep.c:148	exec
○	main	CoMD.c:207	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	CoMD.c:266	exec

Coverage (%)	Name	Source Location	Module
►98.97+	timestep	timestep.c:148	exec
○	main	CoMD.c:125	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	CoMD.c:266	exec
►1.03+	redistributeAtoms	timestep.c:148	exec
○	main	CoMD.c:207	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	CoMD.c:266	exec

Coverage (%)	Name	Source Location	Module
►99.03+	timestep	timestep.c:148	exec
○	main	CoMD.c:125	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	CoMD.c:266	exec

Coverage (%)	Name	Source Location	Module
►99.06+	timestep	timestep.c:148	exec
○	main	CoMD.c:125	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	CoMD.c:266	exec

Coverage (%)	Name	Source Location	Module
►99.30+	timestep	timestep.c:148	exec
○	main	CoMD.c:125	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	CoMD.c:266	exec

Coverage (%)	Name	Source Location	Module
►99.31+	timestep	timestep.c:148	exec
○	main	CoMD.c:125	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	CoMD.c:266	exec

Coverage (%)	Name	Source Location	Module
►99.34+	timestep	timestep.c:148	exec
○	main	CoMD.c:125	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	CoMD.c:266	exec

Coverage (%)	Name	Source Location	Module
►99.03+	timestep	timestep.c:148	exec
○	main	CoMD.c:125	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	CoMD.c:266	exec

Coverage (%)	Name	Source Location	Module
►98.91+	timestep	timestep.c:148	exec
○	main	CoMD.c:125	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	CoMD.c:266	exec
►1.09+	redistributeAtoms	timestep.c:148	exec
○	main	CoMD.c:207	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	CoMD.c:266	exec

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run 1x1

Source file and lines	linkCells.c:211-385
Module	exec

The function is defined in /home/hbollore/qaas/qaas-runs/174-108-7908/intel/CoMD/build/CoMD/CoMD/src-openmp/linkCells.c:211-247,288-304,352-373,384-385.

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Vectorization

Your function is not vectorized. Only 51% of vector register length is used (average across all VPU instructions). By vectorizing your function, you can lower the cost of an iteration from 4.63 to 3.41 cycles (1.36x speedup).

Details

All VPU instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 4.63 to 1.00 cycles (4.62x speedup).

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 28 bytes. The binary function is storing 88 bytes.

General properties

nb instructions	37
loop length	148
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

4.63 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	P16
uops	2.00	2.00	4.17	4.17	4.17	4.17	4.17	4.17	0.00	0.00	0.00	0.00	3.67	3.67	3.67	3.00	3.00
cycles	2.00	2.00	4.17	4.17	4.17	4.17	4.17	4.17	0.00	0.00	0.00	0.00	3.67	3.67	3.67	3.00	3.00

Execution ports to units layout:

P0: BRU
P1: BRU
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6: ALU
P7: ALU
P8 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P9 (128 bits): VPU, ALU, FP store data
P10 (128 bits): VPU, ALU, DIV/SQRT
P11 (128 bits): ALU, VPU
P12 (256 bits): store address, load
P13 (256 bits): store address, load
P14 (256 bits): load
P15 (64 bits): store data
P16 (64 bits): store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	4.63
Overall L1	4.63

Vectorization ratios

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 4.63 cycles. At this rate:

6% of peak load performance is reached (6.05 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
39% of peak store performance is reached (19.03 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the function is: 40a5c0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P12	P13	P14	P15	P16	Latency	Recip. throughput	Vectorization
STP X29, X30, [SP, #928]!	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
ADD X29, SP, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	scal (50.0%)
STP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
ORR X21, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
LDR W2, [X0, #12]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
STR X27, [SP, #80]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ORR X27, XZR, X1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
LDR W1, [X0, #20]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
CMP W2, W1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.GE 40a608 <updateLinkCells+0x48>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SBFM X0, X2, #0, #31	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
LDR X2, [X21, #120]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
LDR W2, [X21, #12]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
CMP W2, #0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.LE 40a830 <updateLinkCells+0x270>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
STP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STP X23, X24, [SP, #48]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
MOVZ X23, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	scal (50.0%)
STP X25, X26, [SP, #64]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
MOVZ W26, #24	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	scal (25.0%)
LDR X5, [X21, #120]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
ADRP X5, <410884>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.25	scal (50.0%)
ADRP X22, <40f888>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.25	scal (50.0%)
ADRP X23, <40f88c>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.25	scal (50.0%)
ADD X3, X5, #1360	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	scal (50.0%)
ADD X1, X22, #992	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	scal (50.0%)
ADD X0, X23, #1088	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
MOVZ W2, #246	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	scal (25.0%)
BL 402700 <@plt_start@+0x1c0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADRP X24, <4108a4>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.25	scal (50.0%)
ADRP X21, <40f8a8>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.25	N/A
ADRP X27, <40f8ac>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.25	N/A
ADD X3, X24, #1360	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	scal (50.0%)
ADD X1, X21, #992	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	scal (50.0%)
ADD X0, X27, #1104	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
MOVZ W2, #247	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	scal (25.0%)
BL 402700 <@plt_start@+0x1c0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run 1x1

Source file and lines	linkCells.c:211-385
Module	exec

The function is defined in /home/hbollore/qaas/qaas-runs/174-108-7908/intel/CoMD/build/CoMD/CoMD/src-openmp/linkCells.c:211-247,288-304,352-373,384-385.

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Vectorization

Details

All VPU instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 4.63 to 1.00 cycles (4.62x speedup).

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 28 bytes. The binary function is storing 88 bytes.

General properties

nb instructions	37
loop length	148
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

4.63 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	P16
uops	2.00	2.00	4.17	4.17	4.17	4.17	4.17	4.17	0.00	0.00	0.00	0.00	3.67	3.67	3.67	3.00	3.00
cycles	2.00	2.00	4.17	4.17	4.17	4.17	4.17	4.17	0.00	0.00	0.00	0.00	3.67	3.67	3.67	3.00	3.00

Execution ports to units layout:

P0: BRU
P1: BRU
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6: ALU
P7: ALU
P8 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P9 (128 bits): VPU, ALU, FP store data
P10 (128 bits): VPU, ALU, DIV/SQRT
P11 (128 bits): ALU, VPU
P12 (256 bits): store address, load
P13 (256 bits): store address, load
P14 (256 bits): load
P15 (64 bits): store data
P16 (64 bits): store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	4.63
Overall L1	4.63

Vectorization ratios

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 4.63 cycles. At this rate:

6% of peak load performance is reached (6.05 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
39% of peak store performance is reached (19.03 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the function is: 40a5c0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P12	P13	P14	P15	P16	Latency	Recip. throughput	Vectorization
STP X29, X30, [SP, #928]!	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
ADD X29, SP, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	scal (50.0%)
STP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
ORR X21, XZR, X0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
LDR W2, [X0, #12]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
STR X27, [SP, #80]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ORR X27, XZR, X1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
LDR W1, [X0, #20]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
CMP W2, W1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.GE 40a608 <updateLinkCells+0x48>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SBFM X0, X2, #0, #31	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
LDR X2, [X21, #120]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
LDR W2, [X21, #12]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
CMP W2, #0	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.LE 40a830 <updateLinkCells+0x270>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
STP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STP X23, X24, [SP, #48]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
MOVZ X23, #0	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	scal (50.0%)
STP X25, X26, [SP, #64]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
MOVZ W26, #24	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	scal (25.0%)
LDR X5, [X21, #120]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
ADRP X5, <410884>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.25	scal (50.0%)
ADRP X22, <40f888>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.25	scal (50.0%)
ADRP X23, <40f88c>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.25	scal (50.0%)
ADD X3, X5, #1360	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	scal (50.0%)
ADD X1, X22, #992	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	scal (50.0%)
ADD X0, X23, #1088	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
MOVZ W2, #246	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	scal (25.0%)
BL 402700 <@plt_start@+0x1c0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADRP X24, <4108a4>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.25	scal (50.0%)
ADRP X21, <40f8a8>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.25	N/A
ADRP X27, <40f8ac>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	1	0.25	N/A
ADD X3, X24, #1360	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	scal (50.0%)
ADD X1, X21, #992	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	scal (50.0%)
ADD X0, X27, #1104	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	N/A
MOVZ W2, #247	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	1	0.17	scal (25.0%)
BL 402700 <@plt_start@+0x1c0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A

▶Scalability Runs Description

Run 1x1	Number processes: 1Number nodes: 1Run Command: <executable> -x 100 -y 100 -z 100MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=96 --rank-by fill --report-bindings Dataset: Run Directory: /home/hbollore/qaas/qaas-runs/174-108-7908/intel/CoMD/run/oneview_runs/multicore/gcc_1/oneview_run_1741097920OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_NUM_THREADS: 1OMP_PLACES: threads
Run 1x2	Number processes: 1Number nodes: 1Run Command: <executable> -x 100 -y 100 -z 100MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=96 --rank-by fill --report-bindings Dataset: Run Directory: /home/hbollore/qaas/qaas-runs/174-108-7908/intel/CoMD/run/oneview_runs/multicore/gcc_1/oneview_run_1741097920OMP_NUM_THREADS: 2OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads
Run 1x4	Number processes: 1Number nodes: 1Run Command: <executable> -x 100 -y 100 -z 100MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=96 --rank-by fill --report-bindings Dataset: Run Directory: /home/hbollore/qaas/qaas-runs/174-108-7908/intel/CoMD/run/oneview_runs/multicore/gcc_1/oneview_run_1741097920OMP_NUM_THREADS: 4OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads
Run 1x8	Number processes: 1Number nodes: 1Run Command: <executable> -x 100 -y 100 -z 100MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=96 --rank-by fill --report-bindings Dataset: Run Directory: /home/hbollore/qaas/qaas-runs/174-108-7908/intel/CoMD/run/oneview_runs/multicore/gcc_1/oneview_run_1741097920OMP_NUM_THREADS: 8OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads
Run 1x16	Number processes: 1Number nodes: 1Run Command: <executable> -x 100 -y 100 -z 100MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=96 --rank-by fill --report-bindings Dataset: Run Directory: /home/hbollore/qaas/qaas-runs/174-108-7908/intel/CoMD/run/oneview_runs/multicore/gcc_1/oneview_run_1741097920OMP_NUM_THREADS: 16OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads
Run 1x24	Number processes: 1Number nodes: 1Run Command: <executable> -x 100 -y 100 -z 100MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=96 --rank-by fill --report-bindings Dataset: Run Directory: /home/hbollore/qaas/qaas-runs/174-108-7908/intel/CoMD/run/oneview_runs/multicore/gcc_1/oneview_run_1741097920OMP_NUM_THREADS: 24OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads
Run 1x32	Number processes: 1Number nodes: 1Run Command: <executable> -x 100 -y 100 -z 100MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=96 --rank-by fill --report-bindings Dataset: Run Directory: /home/hbollore/qaas/qaas-runs/174-108-7908/intel/CoMD/run/oneview_runs/multicore/gcc_1/oneview_run_1741097920OMP_NUM_THREADS: 32OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads
Run 1x40	Number processes: 1Number nodes: 1Run Command: <executable> -x 100 -y 100 -z 100MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=96 --rank-by fill --report-bindings Dataset: Run Directory: /home/hbollore/qaas/qaas-runs/174-108-7908/intel/CoMD/run/oneview_runs/multicore/gcc_1/oneview_run_1741097920OMP_NUM_THREADS: 40OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads
Run 1x48	Number processes: 1Number nodes: 1Run Command: <executable> -x 100 -y 100 -z 100MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=96 --rank-by fill --report-bindings Dataset: Run Directory: /home/hbollore/qaas/qaas-runs/174-108-7908/intel/CoMD/run/oneview_runs/multicore/gcc_1/oneview_run_1741097920OMP_NUM_THREADS: 48OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads
Run 1x56	Number processes: 1Number nodes: 1Run Command: <executable> -x 100 -y 100 -z 100MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=96 --rank-by fill --report-bindings Dataset: Run Directory: /home/hbollore/qaas/qaas-runs/174-108-7908/intel/CoMD/run/oneview_runs/multicore/gcc_1/oneview_run_1741097920OMP_NUM_THREADS: 56OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads
Run 1x64	Number processes: 1Number nodes: 1Run Command: <executable> -x 100 -y 100 -z 100MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=96 --rank-by fill --report-bindings Dataset: Run Directory: /home/hbollore/qaas/qaas-runs/174-108-7908/intel/CoMD/run/oneview_runs/multicore/gcc_1/oneview_run_1741097920OMP_NUM_THREADS: 64OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads
Run 1x72	Number processes: 1Number nodes: 1Run Command: <executable> -x 100 -y 100 -z 100MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=96 --rank-by fill --report-bindings Dataset: Run Directory: /home/hbollore/qaas/qaas-runs/174-108-7908/intel/CoMD/run/oneview_runs/multicore/gcc_1/oneview_run_1741097920OMP_NUM_THREADS: 72OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads
Run 1x80	Number processes: 1Number nodes: 1Run Command: <executable> -x 100 -y 100 -z 100MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=96 --rank-by fill --report-bindings Dataset: Run Directory: /home/hbollore/qaas/qaas-runs/174-108-7908/intel/CoMD/run/oneview_runs/multicore/gcc_1/oneview_run_1741097920OMP_NUM_THREADS: 80OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads
Run 1x88	Number processes: 1Number nodes: 1Run Command: <executable> -x 100 -y 100 -z 100MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=96 --rank-by fill --report-bindings Dataset: Run Directory: /home/hbollore/qaas/qaas-runs/174-108-7908/intel/CoMD/run/oneview_runs/multicore/gcc_1/oneview_run_1741097920OMP_NUM_THREADS: 88OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads
Run 1x96	Number processes: 1Number nodes: 1Run Command: <executable> -x 100 -y 100 -z 100MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=96 --rank-by fill --report-bindings Dataset: Run Directory: /home/hbollore/qaas/qaas-runs/174-108-7908/intel/CoMD/run/oneview_runs/multicore/gcc_1/oneview_run_1741097920OMP_NUM_THREADS: 96OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads

(1x1) Efficiency	(1x1) Potential Speed-Up (%)	(1x2) Efficiency	(1x2) Potential Speed-Up (%)	(1x4) Efficiency	(1x4) Potential Speed-Up (%)	(1x8) Efficiency	(1x8) Potential Speed-Up (%)	(1x16) Efficiency	(1x16) Potential Speed-Up (%)	(1x24) Efficiency	(1x24) Potential Speed-Up (%)	(1x32) Efficiency	(1x32) Potential Speed-Up (%)	(1x40) Efficiency	(1x40) Potential Speed-Up (%)	(1x48) Efficiency	(1x48) Potential Speed-Up (%)	(1x56) Efficiency	(1x56) Potential Speed-Up (%)	(1x64) Efficiency	(1x64) Potential Speed-Up (%)	(1x72) Efficiency	(1x72) Potential Speed-Up (%)	(1x80) Efficiency	(1x80) Potential Speed-Up (%)	(1x88) Efficiency	(1x88) Potential Speed-Up (%)	(1x96) Efficiency	(1x96) Potential Speed-Up (%)
1	0	1.1	0	0.98	0.01	0.96	0.01	1.03	0	0.94	0.02	1	0	0.98	0.01	0.92	0.02	0.86	0.04	0.94	0.02	0.92	0.02	0.84	0.04	0.8	0.05	0.9	0.02

Speed-Up and Efficiency

▶Detailed Speed-Up and Efficiency

Run	Number of threads	Efficiency (ideal is 1)	Speedup	Ideal Speedup	Time (s)	Coverage (%)
1x1	1	1	1	1	1.6149998903275	0.30093249678612
1x2	1	1.1	2.19	2	1.4649999141693	0.27384451031685
1x4	1	0.98	3.9	4	1.6299998760223	0.30410739779472
1x8	1	0.96	7.71	8	1.6049997806549	0.29870474338531
1x16	1	1.03	16.44	16	1.4499999284744	0.26817592978477
1x24	1	0.94	22.62	24	1.5299998521805	0.28003287315369
1x32	1	1	32.03	32	1.4750000238419	0.26787260174751
1x40	1	0.98	39.1	40	1.460000038147	0.26351407170296
1x48	1	0.92	44.14	48	1.5400000810623	0.27590894699097
1x56	1	0.86	48.34	56	1.5999999046326	0.28484457731247
1x64	1	0.94	59.94	64	1.4299997091293	0.25251194834709
1x72	1	0.92	66.01	72	1.4500000476837	0.25393816828728
1x80	1	0.84	67.17	80	1.5249996185303	0.2661058306694
1x88	1	0.8	70.69	88	1.549999833107	0.26911136507988
1x96	1	0.9	86.72	96	1.3700001239777	0.23722524940968

Name	Coverage (%)	Time (s)
▼updateLinkCells–	0.30	1.61
▼Loop 121 - linkCells.c:211-385 - exec–	0.00	0.00
▼Loop 120 - linkCells.c:211-385 - exec–	0.00	0.00
▼Loop 119 - linkCells.c:211-385 - exec–	0.30	1.61
○Loop 118 - linkCells.c:291-385 - exec	0.00	0.01
○Loop 122 - linkCells.c:384-385 - exec	0.00	0.00

Report Configuration

Vectorization

Details

Workaround

Expensive FP math instructions/calls

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code

Vectorization

Details

Workaround

Expensive FP math instructions/calls

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code

▶Scalability Runs Description

▼Columns Filter

Speed-Up and Efficiency

▶Detailed Speed-Up and Efficiency