| Loop Id: 107 | Module: exec | Source: timestep.c:74-78 | Coverage: 0.31% |
|---|
| Loop Id: 107 | Module: exec | Source: timestep.c:74-78 | Coverage: 0.31% |
|---|
0x4107b7 VMOVUPD (%RDX),%YMM12 [4] |
0x4107bb VMOVUPD 0x20(%RDX),%YMM7 [4] |
0x4107c0 VMOVUPD 0x40(%RDX),%YMM13 [4] |
0x4107c5 VFMADD213PD 0x20(%RAX),%YMM0,%YMM7 [2] |
0x4107cb VFMADD213PD (%RAX),%YMM0,%YMM12 [2] |
0x4107d0 VFMADD213PD 0x40(%RAX),%YMM0,%YMM13 [2] |
0x4107d6 ADD $0x180,%RAX |
0x4107dc ADD $0x180,%RDX |
0x4107e3 VMOVUPD %YMM7,-0x160(%RAX) [1] |
0x4107eb VMOVUPD %YMM12,-0x180(%RAX) [1] |
0x4107f3 VMOVUPD %YMM13,-0x140(%RAX) [1] |
0x4107fb VMOVUPD -0x120(%RDX),%YMM14 [3] |
0x410803 VMOVUPD -0x100(%RDX),%YMM15 [3] |
0x41080b VMOVUPD -0xe0(%RDX),%YMM5 [3] |
0x410813 VFMADD213PD -0x120(%RAX),%YMM0,%YMM14 [1] |
0x41081c VFMADD213PD -0x100(%RAX),%YMM0,%YMM15 [1] |
0x410825 VFMADD213PD -0xe0(%RAX),%YMM0,%YMM5 [1] |
0x41082e VMOVUPD %YMM14,-0x120(%RAX) [1] |
0x410836 VMOVUPD %YMM15,-0x100(%RAX) [1] |
0x41083e VMOVUPD %YMM5,-0xe0(%RAX) [1] |
0x410846 VMOVUPD -0xc0(%RDX),%YMM4 [3] |
0x41084e VMOVUPD -0xa0(%RDX),%YMM6 [3] |
0x410856 VMOVUPD -0x80(%RDX),%YMM2 [3] |
0x41085b VFMADD213PD -0xc0(%RAX),%YMM0,%YMM4 [1] |
0x410864 VFMADD213PD -0xa0(%RAX),%YMM0,%YMM6 [1] |
0x41086d VFMADD213PD -0x80(%RAX),%YMM0,%YMM2 [1] |
0x410873 VMOVUPD %YMM4,-0xc0(%RAX) [1] |
0x41087b VMOVUPD %YMM6,-0xa0(%RAX) [1] |
0x410883 VMOVUPD %YMM2,-0x80(%RAX) [1] |
0x410888 VMOVUPD -0x60(%RDX),%YMM8 [3] |
0x41088d VMOVUPD -0x40(%RDX),%YMM7 [3] |
0x410892 VMOVUPD -0x20(%RDX),%YMM9 [3] |
0x410897 VFMADD213PD -0x60(%RAX),%YMM0,%YMM8 [1] |
0x41089d VFMADD213PD -0x40(%RAX),%YMM0,%YMM7 [1] |
0x4108a3 VFMADD213PD -0x20(%RAX),%YMM0,%YMM9 [1] |
0x4108a9 VMOVUPD %YMM8,-0x60(%RAX) [1] |
0x4108ae VMOVUPD %YMM7,-0x40(%RAX) [1] |
0x4108b3 VMOVUPD %YMM9,-0x20(%RAX) [1] |
0x4108b8 CMP %RAX,%R13 |
0x4108bb JNE 4107b7 |
/home/eoseret/qaas_runs_GNR/173-814-1858/intel/CoMD/build/CoMD/CoMD/src-openmp/timestep.c: 74 - 78 |
-------------------------------------------------------------------------------- |
74: for (int iOff=MAXATOMS*iBox,ii=0; ii<s->boxes->nAtoms[iBox]; ii++,iOff++) |
75: { |
76: s->atoms->p[iOff][0] += dt*s->atoms->f[iOff][0]; |
77: s->atoms->p[iOff][1] += dt*s->atoms->f[iOff][1]; |
78: s->atoms->p[iOff][2] += dt*s->atoms->f[iOff][2]; |
| Coverage (%) | Name | Source Location | Module |
|---|---|---|---|
| ○96.75 | gomp_thread_start | team.c:130 | libgomp.so.1.0.0 |
| ○3.25 | GOMP_parallel | libgomp.h:982 | libgomp.so.1.0.0 |
| Path / |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.00 |
| CQA speedup if FP arith vectorized | 1.00 |
| CQA speedup if fully vectorized | 2.00 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.23 |
| Bottlenecks | P2, P3, P11, |
| Function | advanceVelocity._omp_fn.0 |
| Source | timestep.c:74-78 |
| Source loop unroll info | unrolled by 2 |
| Source loop unroll confidence level | max |
| Unroll/vectorization loop type | main |
| Unroll factor | 2 |
| CQA cycles | 8.00 |
| CQA cycles if no scalar integer | 8.00 |
| CQA cycles if FP arith vectorized | 8.00 |
| CQA cycles if fully vectorized | 4.00 |
| Front-end cycles | 6.50 |
| P0 cycles | 6.00 |
| P1 cycles | 6.00 |
| P2 cycles | 8.00 |
| P3 cycles | 8.00 |
| P4 cycles | 6.00 |
| P5 cycles | 1.00 |
| P6 cycles | 1.00 |
| P7 cycles | 6.00 |
| P8 cycles | 6.00 |
| P9 cycles | 6.00 |
| P10 cycles | 1.00 |
| P11 cycles | 8.00 |
| DIV/SQRT cycles | 0.00 |
| Inter-iter dependencies cycles | 1 |
| FE+BE cycles (UFS) | NA |
| Stall cycles (UFS) | NA |
| Nb insns | 40.00 |
| Nb uops | 39.00 |
| Nb loads | 24.00 |
| Nb stores | 12.00 |
| Nb stack references | 0.00 |
| FLOP/cycle | 12.00 |
| Nb FLOP add-sub | 0.00 |
| Nb FLOP mul | 0.00 |
| Nb FLOP fma | 48.00 |
| Nb FLOP div | 0.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 144.00 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 768.00 |
| Bytes stored | 384.00 |
| Stride 0 | 0.00 |
| Stride 1 | 1.00 |
| Stride n | 3.00 |
| Stride unknown | 0.00 |
| Stride indirect | 0.00 |
| Vectorization ratio all | 100.00 |
| Vectorization ratio load | 100.00 |
| Vectorization ratio store | 100.00 |
| Vectorization ratio mul | NA |
| Vectorization ratio add_sub | NA |
| Vectorization ratio fma | 100.00 |
| Vectorization ratio div_sqrt | NA |
| Vectorization ratio other | NA |
| Vector-efficiency ratio all | 50.00 |
| Vector-efficiency ratio load | 50.00 |
| Vector-efficiency ratio store | 50.00 |
| Vector-efficiency ratio mul | NA |
| Vector-efficiency ratio add_sub | NA |
| Vector-efficiency ratio fma | 50.00 |
| Vector-efficiency ratio div_sqrt | NA |
| Vector-efficiency ratio other | NA |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.00 |
| CQA speedup if FP arith vectorized | 1.00 |
| CQA speedup if fully vectorized | 2.00 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.23 |
| Bottlenecks | P2, P3, P11, |
| Function | advanceVelocity._omp_fn.0 |
| Source | timestep.c:74-78 |
| Source loop unroll info | unrolled by 2 |
| Source loop unroll confidence level | max |
| Unroll/vectorization loop type | main |
| Unroll factor | 2 |
| CQA cycles | 8.00 |
| CQA cycles if no scalar integer | 8.00 |
| CQA cycles if FP arith vectorized | 8.00 |
| CQA cycles if fully vectorized | 4.00 |
| Front-end cycles | 6.50 |
| P0 cycles | 6.00 |
| P1 cycles | 6.00 |
| P2 cycles | 8.00 |
| P3 cycles | 8.00 |
| P4 cycles | 6.00 |
| P5 cycles | 1.00 |
| P6 cycles | 1.00 |
| P7 cycles | 6.00 |
| P8 cycles | 6.00 |
| P9 cycles | 6.00 |
| P10 cycles | 1.00 |
| P11 cycles | 8.00 |
| DIV/SQRT cycles | 0.00 |
| Inter-iter dependencies cycles | 1 |
| FE+BE cycles (UFS) | NA |
| Stall cycles (UFS) | NA |
| Nb insns | 40.00 |
| Nb uops | 39.00 |
| Nb loads | 24.00 |
| Nb stores | 12.00 |
| Nb stack references | 0.00 |
| FLOP/cycle | 12.00 |
| Nb FLOP add-sub | 0.00 |
| Nb FLOP mul | 0.00 |
| Nb FLOP fma | 48.00 |
| Nb FLOP div | 0.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 144.00 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 768.00 |
| Bytes stored | 384.00 |
| Stride 0 | 0.00 |
| Stride 1 | 1.00 |
| Stride n | 3.00 |
| Stride unknown | 0.00 |
| Stride indirect | 0.00 |
| Vectorization ratio all | 100.00 |
| Vectorization ratio load | 100.00 |
| Vectorization ratio store | 100.00 |
| Vectorization ratio mul | NA |
| Vectorization ratio add_sub | NA |
| Vectorization ratio fma | 100.00 |
| Vectorization ratio div_sqrt | NA |
| Vectorization ratio other | NA |
| Vector-efficiency ratio all | 50.00 |
| Vector-efficiency ratio load | 50.00 |
| Vector-efficiency ratio store | 50.00 |
| Vector-efficiency ratio mul | NA |
| Vector-efficiency ratio add_sub | NA |
| Vector-efficiency ratio fma | 50.00 |
| Vector-efficiency ratio div_sqrt | NA |
| Vector-efficiency ratio other | NA |
| Path / |
| Function | advanceVelocity._omp_fn.0 |
| Source file and lines | timestep.c:74-78 |
| Module | exec |
| nb instructions | 40 |
| nb uops | 39 |
| loop length | 266 |
| used x86 registers | 3 |
| used mmx registers | 0 |
| used xmm registers | 0 |
| used ymm registers | 12 |
| used zmm registers | 0 |
| nb stack references | 0 |
| micro-operation queue | 6.50 cycles |
| front end | 6.50 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 6.00 | 6.00 | 8.00 | 8.00 | 6.00 | 1.00 | 1.00 | 6.00 | 6.00 | 6.00 | 1.00 | 8.00 |
| cycles | 6.00 | 6.00 | 8.00 | 8.00 | 6.00 | 1.00 | 1.00 | 6.00 | 6.00 | 6.00 | 1.00 | 8.00 |
| Cycles executing div or sqrt instructions | NA |
| Longest recurrence chain latency (RecMII) | 1.00 |
| Front-end | 6.50 |
| Dispatch | 8.00 |
| Data deps. | 1.00 |
| Overall L1 | 8.00 |
| all | 100% |
| load | 100% |
| store | 100% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | 100% |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | NA (no other vectorizable/vectorized instructions) |
| all | 50% |
| load | 50% |
| store | 50% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | 50% |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | NA (no other vectorizable/vectorized instructions) |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput | Vectorization |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| VMOVUPD (%RDX),%YMM12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 | vect (50.0%) |
| VMOVUPD 0x20(%RDX),%YMM7 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 | vect (50.0%) |
| VMOVUPD 0x40(%RDX),%YMM13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 | vect (50.0%) |
| VFMADD213PD 0x20(%RAX),%YMM0,%YMM7 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 | vect (50.0%) |
| VFMADD213PD (%RAX),%YMM0,%YMM12 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 | vect (50.0%) |
| VFMADD213PD 0x40(%RAX),%YMM0,%YMM13 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 | vect (50.0%) |
| ADD $0x180,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| ADD $0x180,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| VMOVUPD %YMM7,-0x160(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 | vect (50.0%) |
| VMOVUPD %YMM12,-0x180(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 | vect (50.0%) |
| VMOVUPD %YMM13,-0x140(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 | vect (50.0%) |
| VMOVUPD -0x120(%RDX),%YMM14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 | vect (50.0%) |
| VMOVUPD -0x100(%RDX),%YMM15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 | vect (50.0%) |
| VMOVUPD -0xe0(%RDX),%YMM5 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 | vect (50.0%) |
| VFMADD213PD -0x120(%RAX),%YMM0,%YMM14 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 | vect (50.0%) |
| VFMADD213PD -0x100(%RAX),%YMM0,%YMM15 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 | vect (50.0%) |
| VFMADD213PD -0xe0(%RAX),%YMM0,%YMM5 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 | vect (50.0%) |
| VMOVUPD %YMM14,-0x120(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 | vect (50.0%) |
| VMOVUPD %YMM15,-0x100(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 | vect (50.0%) |
| VMOVUPD %YMM5,-0xe0(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 | vect (50.0%) |
| VMOVUPD -0xc0(%RDX),%YMM4 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 | vect (50.0%) |
| VMOVUPD -0xa0(%RDX),%YMM6 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 | vect (50.0%) |
| VMOVUPD -0x80(%RDX),%YMM2 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 | vect (50.0%) |
| VFMADD213PD -0xc0(%RAX),%YMM0,%YMM4 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 | vect (50.0%) |
| VFMADD213PD -0xa0(%RAX),%YMM0,%YMM6 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 | vect (50.0%) |
| VFMADD213PD -0x80(%RAX),%YMM0,%YMM2 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 | vect (50.0%) |
| VMOVUPD %YMM4,-0xc0(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 | vect (50.0%) |
| VMOVUPD %YMM6,-0xa0(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 | vect (50.0%) |
| VMOVUPD %YMM2,-0x80(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 | vect (50.0%) |
| VMOVUPD -0x60(%RDX),%YMM8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 | vect (50.0%) |
| VMOVUPD -0x40(%RDX),%YMM7 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 | vect (50.0%) |
| VMOVUPD -0x20(%RDX),%YMM9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 | vect (50.0%) |
| VFMADD213PD -0x60(%RAX),%YMM0,%YMM8 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 | vect (50.0%) |
| VFMADD213PD -0x40(%RAX),%YMM0,%YMM7 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 | vect (50.0%) |
| VFMADD213PD -0x20(%RAX),%YMM0,%YMM9 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 | vect (50.0%) |
| VMOVUPD %YMM8,-0x60(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 | vect (50.0%) |
| VMOVUPD %YMM7,-0x40(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 | vect (50.0%) |
| VMOVUPD %YMM9,-0x20(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 | vect (50.0%) |
| CMP %RAX,%R13 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| JNE 4107b7 <advanceVelocity._omp_fn.0+0x1d7> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| Function | advanceVelocity._omp_fn.0 |
| Source file and lines | timestep.c:74-78 |
| Module | exec |
| nb instructions | 40 |
| nb uops | 39 |
| loop length | 266 |
| used x86 registers | 3 |
| used mmx registers | 0 |
| used xmm registers | 0 |
| used ymm registers | 12 |
| used zmm registers | 0 |
| nb stack references | 0 |
| micro-operation queue | 6.50 cycles |
| front end | 6.50 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 6.00 | 6.00 | 8.00 | 8.00 | 6.00 | 1.00 | 1.00 | 6.00 | 6.00 | 6.00 | 1.00 | 8.00 |
| cycles | 6.00 | 6.00 | 8.00 | 8.00 | 6.00 | 1.00 | 1.00 | 6.00 | 6.00 | 6.00 | 1.00 | 8.00 |
| Cycles executing div or sqrt instructions | NA |
| Longest recurrence chain latency (RecMII) | 1.00 |
| Front-end | 6.50 |
| Dispatch | 8.00 |
| Data deps. | 1.00 |
| Overall L1 | 8.00 |
| all | 100% |
| load | 100% |
| store | 100% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | 100% |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | NA (no other vectorizable/vectorized instructions) |
| all | 50% |
| load | 50% |
| store | 50% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | 50% |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | NA (no other vectorizable/vectorized instructions) |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput | Vectorization |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| VMOVUPD (%RDX),%YMM12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 | vect (50.0%) |
| VMOVUPD 0x20(%RDX),%YMM7 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 | vect (50.0%) |
| VMOVUPD 0x40(%RDX),%YMM13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 | vect (50.0%) |
| VFMADD213PD 0x20(%RAX),%YMM0,%YMM7 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 | vect (50.0%) |
| VFMADD213PD (%RAX),%YMM0,%YMM12 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 | vect (50.0%) |
| VFMADD213PD 0x40(%RAX),%YMM0,%YMM13 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 | vect (50.0%) |
| ADD $0x180,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| ADD $0x180,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| VMOVUPD %YMM7,-0x160(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 | vect (50.0%) |
| VMOVUPD %YMM12,-0x180(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 | vect (50.0%) |
| VMOVUPD %YMM13,-0x140(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 | vect (50.0%) |
| VMOVUPD -0x120(%RDX),%YMM14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 | vect (50.0%) |
| VMOVUPD -0x100(%RDX),%YMM15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 | vect (50.0%) |
| VMOVUPD -0xe0(%RDX),%YMM5 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 | vect (50.0%) |
| VFMADD213PD -0x120(%RAX),%YMM0,%YMM14 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 | vect (50.0%) |
| VFMADD213PD -0x100(%RAX),%YMM0,%YMM15 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 | vect (50.0%) |
| VFMADD213PD -0xe0(%RAX),%YMM0,%YMM5 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 | vect (50.0%) |
| VMOVUPD %YMM14,-0x120(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 | vect (50.0%) |
| VMOVUPD %YMM15,-0x100(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 | vect (50.0%) |
| VMOVUPD %YMM5,-0xe0(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 | vect (50.0%) |
| VMOVUPD -0xc0(%RDX),%YMM4 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 | vect (50.0%) |
| VMOVUPD -0xa0(%RDX),%YMM6 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 | vect (50.0%) |
| VMOVUPD -0x80(%RDX),%YMM2 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 | vect (50.0%) |
| VFMADD213PD -0xc0(%RAX),%YMM0,%YMM4 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 | vect (50.0%) |
| VFMADD213PD -0xa0(%RAX),%YMM0,%YMM6 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 | vect (50.0%) |
| VFMADD213PD -0x80(%RAX),%YMM0,%YMM2 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 | vect (50.0%) |
| VMOVUPD %YMM4,-0xc0(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 | vect (50.0%) |
| VMOVUPD %YMM6,-0xa0(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 | vect (50.0%) |
| VMOVUPD %YMM2,-0x80(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 | vect (50.0%) |
| VMOVUPD -0x60(%RDX),%YMM8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 | vect (50.0%) |
| VMOVUPD -0x40(%RDX),%YMM7 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 | vect (50.0%) |
| VMOVUPD -0x20(%RDX),%YMM9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 | vect (50.0%) |
| VFMADD213PD -0x60(%RAX),%YMM0,%YMM8 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 | vect (50.0%) |
| VFMADD213PD -0x40(%RAX),%YMM0,%YMM7 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 | vect (50.0%) |
| VFMADD213PD -0x20(%RAX),%YMM0,%YMM9 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 | vect (50.0%) |
| VMOVUPD %YMM8,-0x60(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 | vect (50.0%) |
| VMOVUPD %YMM7,-0x40(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 | vect (50.0%) |
| VMOVUPD %YMM9,-0x20(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 | vect (50.0%) |
| CMP %RAX,%R13 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| JNE 4107b7 <advanceVelocity._omp_fn.0+0x1d7> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
