OV - exec - Loop 213

	Loop Id: 213	Module: exec	Source: ideal_gas_kernel.f90:50-55	Coverage: 3.79%

0x430605 VMOVUPD	(%R11,%RAX,1),%ZMM20    [4]

0x43060c VMULPD	(%R13,%RAX,1),%ZMM20,%ZMM21    [2]

0x430614 VDIVPD	%ZMM20,%ZMM4,%ZMM19

0x43061a VMULPD	%ZMM3,%ZMM21,%ZMM22

0x430620 VMOVUPD	%ZMM22,(%R12,%RAX,1)    [1]

0x430627 VMULPD	(%R11,%RAX,1),%ZMM2,%ZMM0    [4]

0x43062e VMULPD	%ZMM19,%ZMM19,%ZMM23

0x430634 VMULPD	%ZMM22,%ZMM0,%ZMM1

0x43063a VMULPD	%ZMM23,%ZMM1,%ZMM6

0x430640 VSQRTPD	%ZMM6,%ZMM7

0x430646 VMOVUPD	%ZMM7,(%RBX,%RAX,1)    [3]

0x43064d VMOVUPD	0x40(%R11,%RAX,1),%ZMM24    [4]

0x430655 VMULPD	0x40(%R13,%RAX,1),%ZMM24,%ZMM26    [2]

0x43065d VDIVPD	%ZMM24,%ZMM4,%ZMM25

0x430663 VMULPD	%ZMM3,%ZMM26,%ZMM27

0x430669 VMOVUPD	%ZMM27,0x40(%R12,%RAX,1)    [1]

0x430671 VMULPD	0x40(%R11,%RAX,1),%ZMM2,%ZMM0    [4]

0x430679 VMULPD	%ZMM25,%ZMM25,%ZMM28

0x43067f VMULPD	%ZMM27,%ZMM0,%ZMM1

0x430685 VMULPD	%ZMM28,%ZMM1,%ZMM6

0x43068b VSQRTPD	%ZMM6,%ZMM7

0x430691 VMOVUPD	%ZMM7,0x40(%RBX,%RAX,1)    [3]

0x430699 VMOVUPD	0x80(%R11,%RAX,1),%ZMM29    [4]

0x4306a1 VMULPD	0x80(%R13,%RAX,1),%ZMM29,%ZMM31    [2]

0x4306a9 VDIVPD	%ZMM29,%ZMM4,%ZMM30

0x4306af VMULPD	%ZMM3,%ZMM31,%ZMM18

0x4306b5 VMOVUPD	%ZMM18,0x80(%R12,%RAX,1)    [1]

0x4306bd VMULPD	0x80(%R11,%RAX,1),%ZMM2,%ZMM0    [4]

0x4306c5 VMULPD	%ZMM30,%ZMM30,%ZMM20

0x4306cb VMULPD	%ZMM18,%ZMM0,%ZMM1

0x4306d1 VMULPD	%ZMM20,%ZMM1,%ZMM6

0x4306d7 VSQRTPD	%ZMM6,%ZMM7

0x4306dd VMOVUPD	%ZMM7,0x80(%RBX,%RAX,1)    [3]

0x4306e5 VMOVUPD	0xc0(%R11,%RAX,1),%ZMM0    [4]

0x4306ed VMULPD	0xc0(%R13,%RAX,1),%ZMM0,%ZMM1    [2]

0x4306f5 VDIVPD	%ZMM0,%ZMM4,%ZMM19

0x4306fb VMULPD	%ZMM3,%ZMM1,%ZMM6

0x430701 VMOVUPD	%ZMM6,0xc0(%R12,%RAX,1)    [1]

0x430709 VMULPD	0xc0(%R11,%RAX,1),%ZMM2,%ZMM7    [4]

0x430711 VMULPD	%ZMM19,%ZMM19,%ZMM21

0x430717 VMULPD	%ZMM6,%ZMM7,%ZMM0

0x43071d VMULPD	%ZMM21,%ZMM0,%ZMM1

0x430723 VSQRTPD	%ZMM1,%ZMM6

0x430729 VMOVUPD	%ZMM6,0xc0(%RBX,%RAX,1)    [3]

0x430731 ADD	$0x100,%RAX

0x430737 CMP	%RAX,0x30(%RSP)    [5]

0x43073c JNE	430605

/home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/ideal_gas_kernel.f90: 50 - 55

--------------------------------------------------------------------------------

50:         v=1.0_8/density(j,k)

51:         pressure(j,k)=(1.4_8-1.0_8)*density(j,k)*energy(j,k)

52:         pressurebyenergy=(1.4_8-1.0_8)*density(j,k)

53:         pressurebyvolume=-density(j,k)*pressure(j,k)

54:         sound_speed_squared=v*v*(pressure(j,k)*pressurebyenergy-pressurebyvolume)

55:         soundspeed(j,k)=SQRT(sound_speed_squared)

Coverage (%)	Name	Source Location	Module
►47.15+	GOMP_parallel	libgomp.h:982	libgomp.so.1.0.0
○	ideal_gas_kernel	ideal_gas_kernel.f90:61	exec
○	ideal_gas	ideal_gas.f90:58	exec
○	timestep	timestep.f90:60	exec
○	hydro	hydro.f90:54	exec
○	main	clover_leaf.f90:41	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	clover_leaf.f90:41	exec
►46.78+	GOMP_parallel	libgomp.h:982	libgomp.so.1.0.0
○	ideal_gas_kernel	ideal_gas_kernel.f90:61	exec
○	ideal_gas	ideal_gas.f90:58	exec
○	pdv	PdV.f90:124	exec
○	hydro	hydro.f90:56	exec
○	main	clover_leaf.f90:41	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	clover_leaf.f90:41	exec
►4.33+	GOMP_parallel	libgomp.h:982	libgomp.so.1.0.0
○	ideal_gas_kernel	ideal_gas_kernel.f90:61	exec
○	ideal_gas	ideal_gas.f90:58	exec
○	field_summary	field_summary.f90:53	exec
○	hydro	hydro.f90:74	exec
○	main	clover_leaf.f90:41	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	clover_leaf.f90:41	exec

Coverage (%)	Name	Source Location	Module
►86.57+	gomp_thread_start	team.c:130	libgomp.so.1.0.0
○	start_thread		libc.so.6
○	__GI___clone3		libc.so.6
►5.71+	GOMP_parallel	libgomp.h:982	libgomp.so.1.0.0
○	ideal_gas_kernel	ideal_gas_kernel.f90:61	exec
○	ideal_gas	ideal_gas.f90:58	exec
○	timestep	timestep.f90:60	exec
○	hydro	hydro.f90:54	exec
○	main	clover_leaf.f90:41	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	clover_leaf.f90:41	exec
►5.62+	GOMP_parallel	libgomp.h:982	libgomp.so.1.0.0
○	ideal_gas_kernel	ideal_gas_kernel.f90:61	exec
○	ideal_gas	ideal_gas.f90:58	exec
○	pdv	PdV.f90:124	exec
○	hydro	hydro.f90:56	exec
○	main	clover_leaf.f90:41	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	clover_leaf.f90:41	exec

Coverage (%)	Name	Source Location	Module
►91.67+	gomp_thread_start	team.c:130	libgomp.so.1.0.0
○	start_thread		libc.so.6
○	__GI___clone3		libc.so.6
►3.57+	GOMP_parallel	libgomp.h:982	libgomp.so.1.0.0
○	ideal_gas_kernel	ideal_gas_kernel.f90:61	exec
○	ideal_gas	ideal_gas.f90:58	exec
○	timestep	timestep.f90:60	exec
○	hydro	hydro.f90:54	exec
○	main	clover_leaf.f90:41	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	clover_leaf.f90:41	exec
►3.52+	GOMP_parallel	libgomp.h:982	libgomp.so.1.0.0
○	ideal_gas_kernel	ideal_gas_kernel.f90:61	exec
○	ideal_gas	ideal_gas.f90:58	exec
○	pdv	PdV.f90:124	exec
○	hydro	hydro.f90:56	exec
○	main	clover_leaf.f90:41	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	clover_leaf.f90:41	exec

Coverage (%)	Name	Source Location	Module
►93.31+	gomp_thread_start	team.c:130	libgomp.so.1.0.0
○	start_thread		libc.so.6
○	__GI___clone3		libc.so.6
►3.15+	GOMP_parallel	libgomp.h:982	libgomp.so.1.0.0
○	ideal_gas_kernel	ideal_gas_kernel.f90:61	exec
○	ideal_gas	ideal_gas.f90:58	exec
○	pdv	PdV.f90:124	exec
○	hydro	hydro.f90:56	exec
○	main	clover_leaf.f90:41	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	clover_leaf.f90:41	exec
►3.11+	GOMP_parallel	libgomp.h:982	libgomp.so.1.0.0
○	ideal_gas_kernel	ideal_gas_kernel.f90:61	exec
○	ideal_gas	ideal_gas.f90:58	exec
○	timestep	timestep.f90:60	exec
○	hydro	hydro.f90:54	exec
○	main	clover_leaf.f90:41	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	clover_leaf.f90:41	exec

Coverage (%)	Name	Source Location	Module
►95.32+	gomp_thread_start	team.c:130	libgomp.so.1.0.0
○	start_thread		libc.so.6
○	__GI___clone3		libc.so.6
►1.95+	GOMP_parallel	libgomp.h:982	libgomp.so.1.0.0
○	ideal_gas_kernel	ideal_gas_kernel.f90:61	exec
○	ideal_gas	ideal_gas.f90:58	exec
○	timestep	timestep.f90:60	exec
○	hydro	hydro.f90:54	exec
○	main	clover_leaf.f90:41	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	clover_leaf.f90:41	exec
►1.91+	GOMP_parallel	libgomp.h:982	libgomp.so.1.0.0
○	ideal_gas_kernel	ideal_gas_kernel.f90:61	exec
○	ideal_gas	ideal_gas.f90:58	exec
○	pdv	PdV.f90:124	exec
○	hydro	hydro.f90:56	exec
○	main	clover_leaf.f90:41	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	clover_leaf.f90:41	exec

Coverage (%)	Name	Source Location	Module
►95.57+	gomp_thread_start	team.c:130	libgomp.so.1.0.0
○	start_thread		libc.so.6
○	__GI___clone3		libc.so.6
►1.57+	GOMP_parallel	libgomp.h:982	libgomp.so.1.0.0
○	ideal_gas_kernel	ideal_gas_kernel.f90:61	exec
○	ideal_gas	ideal_gas.f90:58	exec
○	pdv	PdV.f90:124	exec
○	hydro	hydro.f90:56	exec
○	main	clover_leaf.f90:41	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	clover_leaf.f90:41	exec
►1.57+	GOMP_parallel	libgomp.h:982	libgomp.so.1.0.0
○	ideal_gas_kernel	ideal_gas_kernel.f90:61	exec
○	ideal_gas	ideal_gas.f90:58	exec
○	timestep	timestep.f90:60	exec
○	hydro	hydro.f90:54	exec
○	main	clover_leaf.f90:41	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	clover_leaf.f90:41	exec

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Metric	Value
CQA speedup if no scalar integer	1.00
CQA speedup if FP arith vectorized	1.00
CQA speedup if fully vectorized	1.00
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	3.13
Bottlenecks	P10, P11,
Function	__ideal_gas_kernel_module_MOD_ideal_gas_kernel._omp_fn.0
Source	ideal_gas_kernel.f90:50-55
Source loop unroll info	not unrolled or unrolled with no peel/tail loop
Source loop unroll confidence level	max
Unroll/vectorization loop type	NA
Unroll factor	NA
CQA cycles	50.00
CQA cycles if no scalar integer	50.00
CQA cycles if FP arith vectorized	50.00
CQA cycles if fully vectorized	50.00
Front-end cycles	5.75
P0 cycles	0.33
P1 cycles	0.33
P2 cycles	0.33
P3 cycles	0.33
P4 cycles	0.33
P5 cycles	0.33
P6 cycles	5.25
P7 cycles	5.25
P8 cycles	5.25
P9 cycles	5.25
P10 cycles	16.00
P11 cycles	16.00
P12 cycles	0.00
P13 cycles	0.00
P14 cycles	4.00
P15 cycles	4.00
DIV/SQRT cycles	50.00
Inter-iter dependencies cycles	1
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	47.00
Nb uops	46.00
Nb loads	13.00
Nb stores	8.00
Nb stack references	1.00
FLOP/cycle	5.12
Nb FLOP add-sub	0.00
Nb FLOP mul	192.00
Nb FLOP fma	0.00
Nb FLOP div	32.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	32.00
Nb FLOP rsqrt	0.00
Bytes/cycle	25.76
Bytes prefetched	0.00
Bytes loaded	776.00
Bytes stored	512.00
Stride 0	1.00
Stride 1	4.00
Stride n	0.00
Stride unknown	0.00
Stride indirect	0.00
Vectorization ratio all	100.00
Vectorization ratio load	100.00
Vectorization ratio store	100.00
Vectorization ratio mul	100.00
Vectorization ratio add_sub	NA
Vectorization ratio fma	NA
Vectorization ratio div_sqrt	100.00
Vectorization ratio other	NA
Vector-efficiency ratio all	100.00
Vector-efficiency ratio load	100.00
Vector-efficiency ratio store	100.00
Vector-efficiency ratio mul	100.00
Vector-efficiency ratio add_sub	NA
Vector-efficiency ratio fma	NA
Vector-efficiency ratio div_sqrt	100.00
Vector-efficiency ratio other	NA

Metric	Value
CQA speedup if no scalar integer	1.00
CQA speedup if FP arith vectorized	1.00
CQA speedup if fully vectorized	1.00
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	3.13
Bottlenecks	P10, P11,
Function	__ideal_gas_kernel_module_MOD_ideal_gas_kernel._omp_fn.0
Source	ideal_gas_kernel.f90:50-55
Source loop unroll info	not unrolled or unrolled with no peel/tail loop
Source loop unroll confidence level	max
Unroll/vectorization loop type	NA
Unroll factor	NA
CQA cycles	50.00
CQA cycles if no scalar integer	50.00
CQA cycles if FP arith vectorized	50.00
CQA cycles if fully vectorized	50.00
Front-end cycles	5.75
P0 cycles	0.33
P1 cycles	0.33
P2 cycles	0.33
P3 cycles	0.33
P4 cycles	0.33
P5 cycles	0.33
P6 cycles	5.25
P7 cycles	5.25
P8 cycles	5.25
P9 cycles	5.25
P10 cycles	16.00
P11 cycles	16.00
P12 cycles	0.00
P13 cycles	0.00
P14 cycles	4.00
P15 cycles	4.00
DIV/SQRT cycles	50.00
Inter-iter dependencies cycles	1
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	47.00
Nb uops	46.00
Nb loads	13.00
Nb stores	8.00
Nb stack references	1.00
FLOP/cycle	5.12
Nb FLOP add-sub	0.00
Nb FLOP mul	192.00
Nb FLOP fma	0.00
Nb FLOP div	32.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	32.00
Nb FLOP rsqrt	0.00
Bytes/cycle	25.76
Bytes prefetched	0.00
Bytes loaded	776.00
Bytes stored	512.00
Stride 0	1.00
Stride 1	4.00
Stride n	0.00
Stride unknown	0.00
Stride indirect	0.00
Vectorization ratio all	100.00
Vectorization ratio load	100.00
Vectorization ratio store	100.00
Vectorization ratio mul	100.00
Vectorization ratio add_sub	NA
Vectorization ratio fma	NA
Vectorization ratio div_sqrt	100.00
Vectorization ratio other	NA
Vector-efficiency ratio all	100.00
Vector-efficiency ratio load	100.00
Vector-efficiency ratio store	100.00
Vector-efficiency ratio mul	100.00
Vector-efficiency ratio add_sub	NA
Vector-efficiency ratio fma	NA
Vector-efficiency ratio div_sqrt	100.00
Vector-efficiency ratio other	NA

Path /

Average path: Display a virtual path defined by average values of all real paths

Function	__ideal_gas_kernel_module_MOD_ideal_gas_kernel._omp_fn.0
Source file and lines	ideal_gas_kernel.f90:50-55
Module	exec

The loop is defined in /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/ideal_gas_kernel.f90:50-55.

The related source loop is not unrolled or unrolled with no peel/tail loop.

gain
potential
hint
expert

Vectorization

Your loop is fully vectorized, using full register length.

Details

All SSE/AVX instructions are used in vector version (process two or more data elements in vector registers).

Execution units bottlenecks

Performance is limited by execution of divide and square root operations (the divide/square root unit is a bottleneck). By removing all these bottlenecks, you can lower the cost of an iteration from 50.00 to 16.00 cycles (3.13x speedup).

Workaround

Reduce the number of division or square root instructions:
- If denominator is constant over iterations, use reciprocal (replace x/y with x*(1/y)). Check precision impact. This will be done by your compiler with ffast-math or Ofast
Check whether you really need double precision. If not, switch to single precision to speedup execution

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 50.00 to 12.00 cycles (4.17x speedup).

Vector unaligned load/store instructions

Detected 12 optimal vector unaligned load/store instructions.

Details

VMOVUPD: 12 occurrences►
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/ideal_gas_kernel.f90:50
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/ideal_gas_kernel.f90:51
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/ideal_gas_kernel.f90:55
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/ideal_gas_kernel.f90:50
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/ideal_gas_kernel.f90:51
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/ideal_gas_kernel.f90:55
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/ideal_gas_kernel.f90:50
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/ideal_gas_kernel.f90:51
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/ideal_gas_kernel.f90:55
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/ideal_gas_kernel.f90:50
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/ideal_gas_kernel.f90:51
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/ideal_gas_kernel.f90:55

Workaround

Use vector aligned instructions:

The GNU Fortran compiler does not support allocation alignment and does not feature directives to benefit from aligned data.
Use another compiler or locally use C code (for instance via libraries)

Type of elements and instruction set

32 AVX-512 instructions are processing arithmetic or math operations on double precision FP elements in vector mode (eight at a time).

Matching between your loop (in the source code) and the binary loop

The binary loop is composed of 256 FP arithmetical operations:

192: multiply
32: divide
32: square root

The binary loop is loading 776 bytes (97 double precision FP elements). The binary loop is storing 512 bytes (64 double precision FP elements).

Arithmetic intensity

Arithmetic intensity is 0.20 FP operations per loaded or stored byte.

General properties

nb instructions	47
nb uops	46
loop length	317
used x86 registers	6
used mmx registers	0
used xmm registers	0
used ymm registers	0
used zmm registers	21
nb stack references	1

Front-end

ASSUMED MACRO FUSION FIT IN UOP CACHE

micro-operation queue	5.75 cycles
front end	5.75 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	0.33	0.33	0.33	0.33	0.33	0.33	5.25	5.25	5.25	5.25	16.00	16.00	0.00	0.00	4.00	4.00
cycles	0.33	0.33	0.33	0.33	0.33	0.33	5.25	5.25	5.25	5.25	16.00	16.00	0.00	0.00	4.00	4.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions	50.00
Longest recurrence chain latency (RecMII)	1.00

Cycles summary

Front-end	5.75
Dispatch	16.00
DIV/SQRT	50.00
Data deps.	1.00
Overall L1	50.00

Vectorization ratios

all	100%
load	100%
store	100%
mul	100%
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	100%
other	NA (no other vectorizable/vectorized instructions)

Vector efficiency ratios

all	100%
load	100%
store	100%
mul	100%
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	100%
other	NA (no other vectorizable/vectorized instructions)

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 50.00 cycles. At this rate:

6% of peak load performance is reached (15.52 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
8% of peak store performance is reached (10.24 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Found no such bottlenecks.

ASM code

In the binary file, the address of the loop is: 430605

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P14	P15	Latency	Recip. throughput	Vectorization
VMOVUPD (%R11,%RAX,1),%ZMM20	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.50	vect (100.0%)
VMULPD (%R13,%RAX,1),%ZMM20,%ZMM21	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	3	0.50	vect (100.0%)
VDIVPD %ZMM20,%ZMM4,%ZMM19	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	13	4	vect (100.0%)
VMULPD %ZMM3,%ZMM21,%ZMM22	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	3	0.50	vect (100.0%)
VMOVUPD %ZMM22,(%R12,%RAX,1)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0.50	0.50	4	1	vect (100.0%)
VMULPD (%R11,%RAX,1),%ZMM2,%ZMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	3	0.50	vect (100.0%)
VMULPD %ZMM19,%ZMM19,%ZMM23	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	3	0.50	vect (100.0%)
VMULPD %ZMM22,%ZMM0,%ZMM1	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	3	0.50	vect (100.0%)
VMULPD %ZMM23,%ZMM1,%ZMM6	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	3	0.50	vect (100.0%)
VSQRTPD %ZMM6,%ZMM7	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	21	8.50	vect (100.0%)
VMOVUPD %ZMM7,(%RBX,%RAX,1)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0.50	0.50	4	1	vect (100.0%)
VMOVUPD 0x40(%R11,%RAX,1),%ZMM24	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.50	vect (100.0%)
VMULPD 0x40(%R13,%RAX,1),%ZMM24,%ZMM26	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	3	0.50	vect (100.0%)
VDIVPD %ZMM24,%ZMM4,%ZMM25	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	13	4	vect (100.0%)
VMULPD %ZMM3,%ZMM26,%ZMM27	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	3	0.50	vect (100.0%)
VMOVUPD %ZMM27,0x40(%R12,%RAX,1)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0.50	0.50	4	1	vect (100.0%)
VMULPD 0x40(%R11,%RAX,1),%ZMM2,%ZMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	3	0.50	vect (100.0%)
VMULPD %ZMM25,%ZMM25,%ZMM28	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	3	0.50	vect (100.0%)
VMULPD %ZMM27,%ZMM0,%ZMM1	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	3	0.50	vect (100.0%)
VMULPD %ZMM28,%ZMM1,%ZMM6	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	3	0.50	vect (100.0%)
VSQRTPD %ZMM6,%ZMM7	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	21	8.50	vect (100.0%)
VMOVUPD %ZMM7,0x40(%RBX,%RAX,1)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0.50	0.50	4	1	vect (100.0%)
VMOVUPD 0x80(%R11,%RAX,1),%ZMM29	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.50	vect (100.0%)
VMULPD 0x80(%R13,%RAX,1),%ZMM29,%ZMM31	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	3	0.50	vect (100.0%)
VDIVPD %ZMM29,%ZMM4,%ZMM30	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	13	4	vect (100.0%)
VMULPD %ZMM3,%ZMM31,%ZMM18	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	3	0.50	vect (100.0%)
VMOVUPD %ZMM18,0x80(%R12,%RAX,1)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0.50	0.50	4	1	vect (100.0%)
VMULPD 0x80(%R11,%RAX,1),%ZMM2,%ZMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	3	0.50	vect (100.0%)
VMULPD %ZMM30,%ZMM30,%ZMM20	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	3	0.50	vect (100.0%)
VMULPD %ZMM18,%ZMM0,%ZMM1	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	3	0.50	vect (100.0%)
VMULPD %ZMM20,%ZMM1,%ZMM6	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	3	0.50	vect (100.0%)
VSQRTPD %ZMM6,%ZMM7	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	21	8.50	vect (100.0%)
VMOVUPD %ZMM7,0x80(%RBX,%RAX,1)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0.50	0.50	4	1	vect (100.0%)
VMOVUPD 0xc0(%R11,%RAX,1),%ZMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.50	vect (100.0%)
VMULPD 0xc0(%R13,%RAX,1),%ZMM0,%ZMM1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	3	0.50	vect (100.0%)
VDIVPD %ZMM0,%ZMM4,%ZMM19	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	13	4	vect (100.0%)
VMULPD %ZMM3,%ZMM1,%ZMM6	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	3	0.50	vect (100.0%)
VMOVUPD %ZMM6,0xc0(%R12,%RAX,1)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0.50	0.50	4	1	vect (100.0%)
VMULPD 0xc0(%R11,%RAX,1),%ZMM2,%ZMM7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	3	0.50	vect (100.0%)
VMULPD %ZMM19,%ZMM19,%ZMM21	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	3	0.50	vect (100.0%)
VMULPD %ZMM6,%ZMM7,%ZMM0	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	3	0.50	vect (100.0%)
VMULPD %ZMM21,%ZMM0,%ZMM1	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	3	0.50	vect (100.0%)
VSQRTPD %ZMM1,%ZMM6	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	21	8.50	vect (100.0%)
VMOVUPD %ZMM6,0xc0(%RBX,%RAX,1)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0.50	0.50	4	1	vect (100.0%)
ADD $0x100,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP %RAX,0x30(%RSP)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	N/A
JNE 430605 <__ideal_gas_kernel_module_MOD_ideal_gas_kernel._omp_fn.0+0x2c5>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	1	0.50-1	N/A

Function	__ideal_gas_kernel_module_MOD_ideal_gas_kernel._omp_fn.0
Source file and lines	ideal_gas_kernel.f90:50-55
Module	exec

gain
potential
hint
expert

Vectorization

Your loop is fully vectorized, using full register length.

Details

All SSE/AVX instructions are used in vector version (process two or more data elements in vector registers).

Execution units bottlenecks

Workaround

Reduce the number of division or square root instructions:
- If denominator is constant over iterations, use reciprocal (replace x/y with x*(1/y)). Check precision impact. This will be done by your compiler with ffast-math or Ofast
Check whether you really need double precision. If not, switch to single precision to speedup execution

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 50.00 to 12.00 cycles (4.17x speedup).

Vector unaligned load/store instructions

Detected 12 optimal vector unaligned load/store instructions.

Details

VMOVUPD: 12 occurrences►
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/ideal_gas_kernel.f90:50
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/ideal_gas_kernel.f90:51
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/ideal_gas_kernel.f90:55
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/ideal_gas_kernel.f90:50
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/ideal_gas_kernel.f90:51
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/ideal_gas_kernel.f90:55
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/ideal_gas_kernel.f90:50
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/ideal_gas_kernel.f90:51
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/ideal_gas_kernel.f90:55
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/ideal_gas_kernel.f90:50
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/ideal_gas_kernel.f90:51
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/ideal_gas_kernel.f90:55

Workaround

Use vector aligned instructions:

The GNU Fortran compiler does not support allocation alignment and does not feature directives to benefit from aligned data.
Use another compiler or locally use C code (for instance via libraries)

Type of elements and instruction set

32 AVX-512 instructions are processing arithmetic or math operations on double precision FP elements in vector mode (eight at a time).

Matching between your loop (in the source code) and the binary loop

The binary loop is composed of 256 FP arithmetical operations:

192: multiply
32: divide
32: square root

The binary loop is loading 776 bytes (97 double precision FP elements). The binary loop is storing 512 bytes (64 double precision FP elements).

Arithmetic intensity

Arithmetic intensity is 0.20 FP operations per loaded or stored byte.

General properties

nb instructions	47
nb uops	46
loop length	317
used x86 registers	6
used mmx registers	0
used xmm registers	0
used ymm registers	0
used zmm registers	21
nb stack references	1

Front-end

ASSUMED MACRO FUSION FIT IN UOP CACHE

micro-operation queue	5.75 cycles
front end	5.75 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	0.33	0.33	0.33	0.33	0.33	0.33	5.25	5.25	5.25	5.25	16.00	16.00	0.00	0.00	4.00	4.00
cycles	0.33	0.33	0.33	0.33	0.33	0.33	5.25	5.25	5.25	5.25	16.00	16.00	0.00	0.00	4.00	4.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions	50.00
Longest recurrence chain latency (RecMII)	1.00

Cycles summary

Front-end	5.75
Dispatch	16.00
DIV/SQRT	50.00
Data deps.	1.00
Overall L1	50.00

Vectorization ratios

all	100%
load	100%
store	100%
mul	100%
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	100%
other	NA (no other vectorizable/vectorized instructions)

Vector efficiency ratios

all	100%
load	100%
store	100%
mul	100%
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	100%
other	NA (no other vectorizable/vectorized instructions)

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 50.00 cycles. At this rate:

6% of peak load performance is reached (15.52 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
8% of peak store performance is reached (10.24 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Found no such bottlenecks.

ASM code

In the binary file, the address of the loop is: 430605

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P14	P15	Latency	Recip. throughput	Vectorization
VMOVUPD (%R11,%RAX,1),%ZMM20	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.50	vect (100.0%)
VMULPD (%R13,%RAX,1),%ZMM20,%ZMM21	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	3	0.50	vect (100.0%)
VDIVPD %ZMM20,%ZMM4,%ZMM19	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	13	4	vect (100.0%)
VMULPD %ZMM3,%ZMM21,%ZMM22	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	3	0.50	vect (100.0%)
VMOVUPD %ZMM22,(%R12,%RAX,1)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0.50	0.50	4	1	vect (100.0%)
VMULPD (%R11,%RAX,1),%ZMM2,%ZMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	3	0.50	vect (100.0%)
VMULPD %ZMM19,%ZMM19,%ZMM23	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	3	0.50	vect (100.0%)
VMULPD %ZMM22,%ZMM0,%ZMM1	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	3	0.50	vect (100.0%)
VMULPD %ZMM23,%ZMM1,%ZMM6	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	3	0.50	vect (100.0%)
VSQRTPD %ZMM6,%ZMM7	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	21	8.50	vect (100.0%)
VMOVUPD %ZMM7,(%RBX,%RAX,1)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0.50	0.50	4	1	vect (100.0%)
VMOVUPD 0x40(%R11,%RAX,1),%ZMM24	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.50	vect (100.0%)
VMULPD 0x40(%R13,%RAX,1),%ZMM24,%ZMM26	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	3	0.50	vect (100.0%)
VDIVPD %ZMM24,%ZMM4,%ZMM25	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	13	4	vect (100.0%)
VMULPD %ZMM3,%ZMM26,%ZMM27	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	3	0.50	vect (100.0%)
VMOVUPD %ZMM27,0x40(%R12,%RAX,1)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0.50	0.50	4	1	vect (100.0%)
VMULPD 0x40(%R11,%RAX,1),%ZMM2,%ZMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	3	0.50	vect (100.0%)
VMULPD %ZMM25,%ZMM25,%ZMM28	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	3	0.50	vect (100.0%)
VMULPD %ZMM27,%ZMM0,%ZMM1	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	3	0.50	vect (100.0%)
VMULPD %ZMM28,%ZMM1,%ZMM6	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	3	0.50	vect (100.0%)
VSQRTPD %ZMM6,%ZMM7	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	21	8.50	vect (100.0%)
VMOVUPD %ZMM7,0x40(%RBX,%RAX,1)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0.50	0.50	4	1	vect (100.0%)
VMOVUPD 0x80(%R11,%RAX,1),%ZMM29	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.50	vect (100.0%)
VMULPD 0x80(%R13,%RAX,1),%ZMM29,%ZMM31	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	3	0.50	vect (100.0%)
VDIVPD %ZMM29,%ZMM4,%ZMM30	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	13	4	vect (100.0%)
VMULPD %ZMM3,%ZMM31,%ZMM18	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	3	0.50	vect (100.0%)
VMOVUPD %ZMM18,0x80(%R12,%RAX,1)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0.50	0.50	4	1	vect (100.0%)
VMULPD 0x80(%R11,%RAX,1),%ZMM2,%ZMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	3	0.50	vect (100.0%)
VMULPD %ZMM30,%ZMM30,%ZMM20	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	3	0.50	vect (100.0%)
VMULPD %ZMM18,%ZMM0,%ZMM1	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	3	0.50	vect (100.0%)
VMULPD %ZMM20,%ZMM1,%ZMM6	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	3	0.50	vect (100.0%)
VSQRTPD %ZMM6,%ZMM7	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	21	8.50	vect (100.0%)
VMOVUPD %ZMM7,0x80(%RBX,%RAX,1)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0.50	0.50	4	1	vect (100.0%)
VMOVUPD 0xc0(%R11,%RAX,1),%ZMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	3	0.50	vect (100.0%)
VMULPD 0xc0(%R13,%RAX,1),%ZMM0,%ZMM1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	3	0.50	vect (100.0%)
VDIVPD %ZMM0,%ZMM4,%ZMM19	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	13	4	vect (100.0%)
VMULPD %ZMM3,%ZMM1,%ZMM6	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	3	0.50	vect (100.0%)
VMOVUPD %ZMM6,0xc0(%R12,%RAX,1)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0.50	0.50	4	1	vect (100.0%)
VMULPD 0xc0(%R11,%RAX,1),%ZMM2,%ZMM7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	3	0.50	vect (100.0%)
VMULPD %ZMM19,%ZMM19,%ZMM21	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	3	0.50	vect (100.0%)
VMULPD %ZMM6,%ZMM7,%ZMM0	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	3	0.50	vect (100.0%)
VMULPD %ZMM21,%ZMM0,%ZMM1	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	3	0.50	vect (100.0%)
VSQRTPD %ZMM1,%ZMM6	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	21	8.50	vect (100.0%)
VMOVUPD %ZMM6,0xc0(%RBX,%RAX,1)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0.50	0.50	4	1	vect (100.0%)
ADD $0x100,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP %RAX,0x30(%RSP)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	1	0.25	N/A
JNE 430605 <__ideal_gas_kernel_module_MOD_ideal_gas_kernel._omp_fn.0+0x2c5>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	1	0.50-1	N/A

▶Scalability Runs Description

Run 8x1	Number processes: 8Number nodes: 1Run Command: <executable>MPI Command: mpirun -n <number_processes> Dataset: Run Directory: /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/run/oneview_runs/multicore/gcc_7/oneview_run_1740498538OMP_NUM_THREADS: 1I_MPI_PIN_ORDER: bunchOMP_DISPLAY_AFFINITY: TRUEOMP_PROC_BIND: spreadOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEI_MPI_PIN_DOMAIN: autoI_MPI_DEBUG: 4OMP_PLACES: threads
Run 8x8	Number processes: 8Number nodes: 1Run Command: <executable>MPI Command: mpirun -n <number_processes> Dataset: Run Directory: /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/run/oneview_runs/multicore/gcc_7/oneview_run_1740498538OMP_NUM_THREADS: 8I_MPI_PIN_ORDER: bunchOMP_DISPLAY_AFFINITY: TRUEOMP_PROC_BIND: spreadOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEI_MPI_PIN_DOMAIN: autoI_MPI_DEBUG: 4OMP_PLACES: threads
Run 8x12	Number processes: 8Number nodes: 1Run Command: <executable>MPI Command: mpirun -n <number_processes> Dataset: Run Directory: /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/run/oneview_runs/multicore/gcc_7/oneview_run_1740498538OMP_NUM_THREADS: 12I_MPI_PIN_ORDER: bunchOMP_DISPLAY_AFFINITY: TRUEOMP_PROC_BIND: spreadOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEI_MPI_PIN_DOMAIN: autoI_MPI_DEBUG: 4OMP_PLACES: threads
Run 8x16	Number processes: 8Number nodes: 1Run Command: <executable>MPI Command: mpirun -n <number_processes> Dataset: Run Directory: /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/run/oneview_runs/multicore/gcc_7/oneview_run_1740498538OMP_NUM_THREADS: 16I_MPI_PIN_ORDER: bunchOMP_DISPLAY_AFFINITY: TRUEOMP_PROC_BIND: spreadOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEI_MPI_PIN_DOMAIN: autoI_MPI_DEBUG: 4OMP_PLACES: threads
Run 8x20	Number processes: 8Number nodes: 1Run Command: <executable>MPI Command: mpirun -n <number_processes> Dataset: Run Directory: /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/run/oneview_runs/multicore/gcc_7/oneview_run_1740498538OMP_NUM_THREADS: 20I_MPI_PIN_ORDER: bunchOMP_DISPLAY_AFFINITY: TRUEOMP_PROC_BIND: spreadOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEI_MPI_PIN_DOMAIN: autoI_MPI_DEBUG: 4OMP_PLACES: threads
Run 8x24	Number processes: 8Number nodes: 1Run Command: <executable>MPI Command: mpirun -n <number_processes> Dataset: Run Directory: /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/run/oneview_runs/multicore/gcc_7/oneview_run_1740498538OMP_NUM_THREADS: 24I_MPI_PIN_ORDER: bunchOMP_DISPLAY_AFFINITY: TRUEOMP_PROC_BIND: spreadOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEI_MPI_PIN_DOMAIN: autoI_MPI_DEBUG: 4OMP_PLACES: threads

(8x1) Efficiency	(8x1) Potential Speed-Up (%)	(8x8) Efficiency	(8x8) Potential Speed-Up (%)	(8x12) Efficiency	(8x12) Potential Speed-Up (%)	(8x16) Efficiency	(8x16) Potential Speed-Up (%)	(8x20) Efficiency	(8x20) Potential Speed-Up (%)	(8x24) Efficiency	(8x24) Potential Speed-Up (%)
1	0	0.25	3.87	0.16	4.66	0.12	4.56	0.1	4.5	0.08	5.07

Speed-Up and Efficiency

▶Detailed Speed-Up and Efficiency

Run	Number of threads	Efficiency (ideal is 1)	Speedup	Ideal Speedup	Time (s)	Coverage (%)
8x1	8	1	1	1	3.8949997425079	3.7877128124237
8x8	64	0.25	1.96	8	2.190000295639	5.1280298233032
8x12	96	0.16	1.89	12	2.1250002384186	5.5366702079773
8x16	128	0.12	1.93	16	2.2249999046326	5.1817722320557
8x20	160	0.1	1.95	20	2.2799999713898	4.9836144447327
8x24	192	0.08	1.9	24	2.1449999809265	5.5094079971313

Report Configuration

Vectorization

Details

Execution units bottlenecks

Workaround

Expensive FP math instructions/calls

Vector unaligned load/store instructions

Details

Workaround

Type of elements and instruction set

Matching between your loop (in the source code) and the binary loop

Arithmetic intensity

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code

Vectorization

Details

Execution units bottlenecks

Workaround

Expensive FP math instructions/calls

Vector unaligned load/store instructions

Details

Workaround

Type of elements and instruction set

Matching between your loop (in the source code) and the binary loop

Arithmetic intensity

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code

▶Scalability Runs Description

▼Columns Filter

Speed-Up and Efficiency

▶Detailed Speed-Up and Efficiency