OV - exec - Function __reset_field_kernel_module_MOD_reset_field_kernel._omp

	Function: __reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0	Module: exec	Source: reset_field_kernel.f90:47-63	Coverage (incl. loops): 3.58% \| (excl. loops): 0.00%

/home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/reset_field_kernel.f90: 47 - 63

--------------------------------------------------------------------------------

47:     !$OMP PARALLEL

48:     !$OMP DO

49:     DO k=y_min,y_max

50:     !$OMP SIMD

51:       DO j=x_min,x_max

52:         density0(j,k)=density1(j,k)

53:         energy0(j,k)=energy1(j,k)

54:       ENDDO

55:     ENDDO

56:     !$OMP END DO

57:

58:     !$OMP DO

59:     DO k=y_min,y_max+1

60:     !$OMP SIMD

61:       DO j=x_min,x_max+1

62:         xvel0(j,k)=xvel1(j,k)

63:         yvel0(j,k)=yvel1(j,k)

0x43b1b0 PUSH	%RBP

0x43b1b1 MOV	%RSP,%RBP

0x43b1b4 PUSH	%R15

0x43b1b6 PUSH	%R14

0x43b1b8 PUSH	%R13

0x43b1ba PUSH	%R12

0x43b1bc PUSH	%RBX

0x43b1bd MOV	%RDI,%RBX

0x43b1c0 AND	$-0x40,%RSP

0x43b1c4 SUB	$0xc0,%RSP

0x43b1cb MOV	0xd0(%RDI),%RDX

0x43b1d2 MOV	0xc8(%RDI),%RCX

0x43b1d9 MOV	0xc0(%RDI),%RSI

0x43b1e0 MOV	0xb8(%RDI),%R8

0x43b1e7 MOV	0xb0(%RDI),%R9

0x43b1ee MOV	0xa8(%RDI),%R10

0x43b1f5 MOV	0xa0(%RDI),%R11

0x43b1fc MOV	0xd8(%RDI),%RAX

0x43b203 MOV	0x10(%RDI),%RDI

0x43b207 MOV	%RDX,0x90(%RSP)

0x43b20f MOV	%RCX,0x58(%RSP)

0x43b214 MOV	%RSI,0x88(%RSP)

0x43b21c MOV	%R8,0x48(%RSP)

0x43b221 MOV	%R9,0x80(%RSP)

0x43b229 MOV	%R10,0x40(%RSP)

0x43b22e MOV	%R11,0x78(%RSP)

0x43b233 MOV	%RAX,0x60(%RSP)

0x43b238 MOV	(%RDI),%R15D

0x43b23b CALL	402370 <@plt_start@+0x350>

0x43b240 MOV	%EAX,%R13D

0x43b243 MOV	%EAX,0x68(%RSP)

0x43b247 CALL	4022e0 <@plt_start@+0x2c0>

0x43b24c MOV	%EAX,%R12D

0x43b24f MOV	0x18(%RBX),%RAX

0x43b253 MOV	(%RAX),%EAX

0x43b255 INC	%EAX

0x43b257 SUB	%R15D,%EAX

0x43b25a CLTD

0x43b25b IDIV	%R13D

0x43b25e CMP	%EDX,%R12D

0x43b261 JL	43bdb8

0x43b267 MOV	%EAX,%ECX

0x43b269 IMUL	%R12D,%ECX

0x43b26d ADD	%ECX,%EDX

0x43b26f ADD	%EDX,%EAX

0x43b271 CMP	%EAX,%EDX

0x43b273 JGE	43b7ab

0x43b279 MOV	(%RBX),%RSI

0x43b27c VMOVQ	0x70(%RBX),%XMM6

0x43b281 MOV	0x78(%RBX),%R9

0x43b285 ADD	%R15D,%EDX

0x43b288 MOV	0x8(%RBX),%R8

0x43b28c MOVSXD	%EDX,%RCX

0x43b28f VMOVQ	0x60(%RBX),%XMM7

0x43b294 VMOVQ	0x90(%RBX),%XMM8

0x43b29c ADD	%R15D,%EAX

0x43b29f VMOVQ	0x80(%RBX),%XMM9

0x43b2a7 VMOVQ	0x38(%RBX),%XMM0

0x43b2ac MOV	0x28(%RBX),%R15

0x43b2b0 MOV	%EAX,0xa4(%RSP)

0x43b2b7 VMOVQ	0x30(%RBX),%XMM4

0x43b2bc MOV	0x20(%RBX),%R13

0x43b2c0 MOVSXD	(%RSI),%R10

0x43b2c3 VMOVQ	%XMM6,%RDI

0x43b2c8 MOV	(%R8),%EAX

0x43b2cb MOV	0x98(%RBX),%R8

0x43b2d2 VMOVQ	%XMM7,%RSI

0x43b2d7 IMUL	%RCX,%RDI

0x43b2db IMUL	%RCX,%RSI

0x43b2df ADD	%R10,%R9

0x43b2e2 MOV	%R10D,0x74(%RSP)

0x43b2e7 ADD	%RDI,%R9

0x43b2ea MOV	0x68(%RBX),%RDI

0x43b2ee ADD	%R10,%R8

0x43b2f1 MOV	%EAX,0x98(%RSP)

0x43b2f8 MOV	%R9,0xb8(%RSP)

0x43b300 VMOVQ	%XMM8,%R9

0x43b305 INC	%EAX

0x43b307 IMUL	%RCX,%R9

0x43b30b ADD	%R10,%RDI

0x43b30e ADD	%R9,%R8

0x43b311 MOV	0x88(%RBX),%R9

0x43b318 ADD	%RSI,%RDI

0x43b31b VMOVQ	%XMM9,%RSI

0x43b320 IMUL	%RSI,%RCX

0x43b324 MOV	0x98(%RSP),%ESI

0x43b32b ADD	%R10,%R9

0x43b32e ADD	%RCX,%R9

0x43b331 MOV	%R10D,%ECX

0x43b334 CMP	%ESI,%R10D

0x43b337 CMOVLE	%EAX,%ECX

0x43b33a JG	43bdd3

0x43b340 SUB	%R10D,%ESI

0x43b343 MOV	%R12D,0x54(%RSP)

0x43b348 MOV	%R13,%R12

0x43b34b VMOVQ	%R10,%XMM3

0x43b350 MOV	%ESI,0xa8(%RSP)

0x43b357 INC	%ESI

0x43b359 MOV	%R15,%R13

0x43b35c VMOVQ	%XMM0,%R10

0x43b361 MOV	%ESI,%R14D

0x43b364 MOV	%ESI,%R11D

0x43b367 AND	$0x7,%ESI

0x43b36a MOV	%R12,%R15

0x43b36d MOV	%ESI,0x6c(%RSP)

0x43b371 MOV	0xb8(%RSP),%RSI

0x43b379 AND	$-0x8,%R11D

0x43b37d MOV	%ECX,0x50(%RSP)

0x43b381 MOV	%R11D,0x70(%RSP)

0x43b386 MOV	%RBX,0x38(%RSP)

0x43b38b SHR	$0x3,%R14D

0x43b38f SAL	$0x6,%R14

0x43b393 MOV	%R14,0xb0(%RSP)

0x43b39b NOPL	(%RAX,%RAX,1)

(299) 0x43b3a0 CMPL	$0x6,0xa8(%RSP)

(299) 0x43b3a8 JBE	43bd80

(299) 0x43b3ae MOV	0xb0(%RSP),%RCX

(299) 0x43b3b6 VMOVQ	%XMM4,%RAX

(299) 0x43b3bb LEA	(%R13,%RSI,8),%R14

(299) 0x43b3c0 LEA	(%R15,%RDI,8),%R12

(299) 0x43b3c4 LEA	(%RAX,%R9,8),%R11

(299) 0x43b3c8 XOR	%EAX,%EAX

(299) 0x43b3ca LEA	(%R10,%R8,8),%RBX

(299) 0x43b3ce SUB	$0x40,%RCX

(299) 0x43b3d2 SHR	$0x6,%RCX

(299) 0x43b3d6 INC	%RCX

(299) 0x43b3d9 AND	$0x7,%ECX

(299) 0x43b3dc JE	43b501

(299) 0x43b3e2 CMP	$0x1,%RCX

(299) 0x43b3e6 JE	43b4d0

(299) 0x43b3ec CMP	$0x2,%RCX

(299) 0x43b3f0 JE	43b4b0

(299) 0x43b3f6 CMP	$0x3,%RCX

(299) 0x43b3fa JE	43b490

(299) 0x43b400 CMP	$0x4,%RCX

(299) 0x43b404 JE	43b470

(299) 0x43b406 CMP	$0x5,%RCX

(299) 0x43b40a JE	43b450

(299) 0x43b40c CMP	$0x6,%RCX

(299) 0x43b410 JE	43b430

(299) 0x43b412 VMOVUPD	(%R14),%ZMM5

(299) 0x43b418 MOV	$0x40,%EAX

(299) 0x43b41d VMOVUPD	%ZMM5,(%R12)

(299) 0x43b424 VMOVUPD	(%RBX),%ZMM1

(299) 0x43b42a VMOVUPD	%ZMM1,(%R11)

(299) 0x43b430 VMOVUPD	(%R14,%RAX,1),%ZMM2

(299) 0x43b437 VMOVUPD	%ZMM2,(%R12,%RAX,1)

(299) 0x43b43e VMOVUPD	(%RBX,%RAX,1),%ZMM10

(299) 0x43b445 VMOVUPD	%ZMM10,(%R11,%RAX,1)

(299) 0x43b44c ADD	$0x40,%RAX

(299) 0x43b450 VMOVUPD	(%R14,%RAX,1),%ZMM11

(299) 0x43b457 VMOVUPD	%ZMM11,(%R12,%RAX,1)

(299) 0x43b45e VMOVUPD	(%RBX,%RAX,1),%ZMM12

(299) 0x43b465 VMOVUPD	%ZMM12,(%R11,%RAX,1)

(299) 0x43b46c ADD	$0x40,%RAX

(299) 0x43b470 VMOVUPD	(%R14,%RAX,1),%ZMM13

(299) 0x43b477 VMOVUPD	%ZMM13,(%R12,%RAX,1)

(299) 0x43b47e VMOVUPD	(%RBX,%RAX,1),%ZMM14

(299) 0x43b485 VMOVUPD	%ZMM14,(%R11,%RAX,1)

(299) 0x43b48c ADD	$0x40,%RAX

(299) 0x43b490 VMOVUPD	(%R14,%RAX,1),%ZMM15

(299) 0x43b497 VMOVUPD	%ZMM15,(%R12,%RAX,1)

(299) 0x43b49e VMOVUPD	(%RBX,%RAX,1),%ZMM0

(299) 0x43b4a5 VMOVUPD	%ZMM0,(%R11,%RAX,1)

(299) 0x43b4ac ADD	$0x40,%RAX

(299) 0x43b4b0 VMOVUPD	(%R14,%RAX,1),%ZMM5

(299) 0x43b4b7 VMOVUPD	%ZMM5,(%R12,%RAX,1)

(299) 0x43b4be VMOVUPD	(%RBX,%RAX,1),%ZMM1

(299) 0x43b4c5 VMOVUPD	%ZMM1,(%R11,%RAX,1)

(299) 0x43b4cc ADD	$0x40,%RAX

(299) 0x43b4d0 VMOVUPD	(%R14,%RAX,1),%ZMM2

(299) 0x43b4d7 MOV	0xb0(%RSP),%RCX

(299) 0x43b4df VMOVUPD	%ZMM2,(%R12,%RAX,1)

(299) 0x43b4e6 VMOVUPD	(%RBX,%RAX,1),%ZMM10

(299) 0x43b4ed VMOVUPD	%ZMM10,(%R11,%RAX,1)

(299) 0x43b4f4 ADD	$0x40,%RAX

(299) 0x43b4f8 CMP	%RCX,%RAX

(299) 0x43b4fb JE	43b614

  (300) 0x43b501 VMOVUPD	(%R14,%RAX,1),%ZMM11

  (300) 0x43b508 VMOVUPD	%ZMM11,(%R12,%RAX,1)

  (300) 0x43b50f VMOVUPD	(%RBX,%RAX,1),%ZMM12

  (300) 0x43b516 VMOVUPD	%ZMM12,(%R11,%RAX,1)

  (300) 0x43b51d VMOVUPD	0x40(%R14,%RAX,1),%ZMM13

  (300) 0x43b525 VMOVUPD	%ZMM13,0x40(%R12,%RAX,1)

  (300) 0x43b52d VMOVUPD	0x40(%RBX,%RAX,1),%ZMM14

  (300) 0x43b535 VMOVUPD	%ZMM14,0x40(%R11,%RAX,1)

  (300) 0x43b53d VMOVUPD	0x80(%R14,%RAX,1),%ZMM15

  (300) 0x43b545 VMOVUPD	%ZMM15,0x80(%R12,%RAX,1)

  (300) 0x43b54d VMOVUPD	0x80(%RBX,%RAX,1),%ZMM0

  (300) 0x43b555 VMOVUPD	%ZMM0,0x80(%R11,%RAX,1)

  (300) 0x43b55d VMOVUPD	0xc0(%R14,%RAX,1),%ZMM5

  (300) 0x43b565 VMOVUPD	%ZMM5,0xc0(%R12,%RAX,1)

  (300) 0x43b56d VMOVUPD	0xc0(%RBX,%RAX,1),%ZMM1

  (300) 0x43b575 VMOVUPD	%ZMM1,0xc0(%R11,%RAX,1)

  (300) 0x43b57d VMOVUPD	0x100(%R14,%RAX,1),%ZMM2

  (300) 0x43b585 VMOVUPD	%ZMM2,0x100(%R12,%RAX,1)

  (300) 0x43b58d VMOVUPD	0x100(%RBX,%RAX,1),%ZMM10

  (300) 0x43b595 VMOVUPD	%ZMM10,0x100(%R11,%RAX,1)

  (300) 0x43b59d VMOVUPD	0x140(%R14,%RAX,1),%ZMM11

  (300) 0x43b5a5 VMOVUPD	%ZMM11,0x140(%R12,%RAX,1)

  (300) 0x43b5ad VMOVUPD	0x140(%RBX,%RAX,1),%ZMM12

  (300) 0x43b5b5 VMOVUPD	%ZMM12,0x140(%R11,%RAX,1)

  (300) 0x43b5bd VMOVUPD	0x180(%R14,%RAX,1),%ZMM13

  (300) 0x43b5c5 VMOVUPD	%ZMM13,0x180(%R12,%RAX,1)

  (300) 0x43b5cd VMOVUPD	0x180(%RBX,%RAX,1),%ZMM14

  (300) 0x43b5d5 VMOVUPD	%ZMM14,0x180(%R11,%RAX,1)

  (300) 0x43b5dd VMOVUPD	0x1c0(%R14,%RAX,1),%ZMM15

  (300) 0x43b5e5 VMOVUPD	%ZMM15,0x1c0(%R12,%RAX,1)

  (300) 0x43b5ed VMOVUPD	0x1c0(%RBX,%RAX,1),%ZMM0

  (300) 0x43b5f5 VMOVUPD	%ZMM0,0x1c0(%R11,%RAX,1)

  (300) 0x43b5fd MOV	0xb0(%RSP),%RCX

  (300) 0x43b605 ADD	$0x200,%RAX

  (300) 0x43b60b CMP	%RCX,%RAX

  (300) 0x43b60e JNE	43b501

(299) 0x43b614 MOV	0x70(%RSP),%R14D

(299) 0x43b619 MOV	0x74(%RSP),%R12D

(299) 0x43b61e MOV	0x6c(%RSP),%EBX

(299) 0x43b622 MOV	%R14D,%ECX

(299) 0x43b625 ADD	%R12D,%R14D

(299) 0x43b628 MOV	%R14D,0xb8(%RSP)

(299) 0x43b630 TEST	%EBX,%EBX

(299) 0x43b632 JE	43b761

(299) 0x43b638 MOV	0xa8(%RSP),%R11D

(299) 0x43b640 SUB	%ECX,%R11D

(299) 0x43b643 LEA	0x1(%R11),%EAX

(299) 0x43b647 CMP	$0x2,%R11D

(299) 0x43b64b JBE	43b68f

(299) 0x43b64d LEA	(%RSI,%RCX,1),%R14

(299) 0x43b651 LEA	(%RDI,%RCX,1),%R12

(299) 0x43b655 LEA	(%R8,%RCX,1),%RBX

(299) 0x43b659 VMOVQ	%XMM4,%R11

(299) 0x43b65e VMOVUPD	(%R13,%R14,8),%YMM5

(299) 0x43b665 ADD	%R9,%RCX

(299) 0x43b668 VMOVUPD	%YMM5,(%R15,%R12,8)

(299) 0x43b66e VMOVUPD	(%R10,%RBX,8),%YMM1

(299) 0x43b674 VMOVUPD	%YMM1,(%R11,%RCX,8)

(299) 0x43b67a MOV	%EAX,%ECX

(299) 0x43b67c AND	$-0x4,%ECX

(299) 0x43b67f ADD	%ECX,0xb8(%RSP)

(299) 0x43b686 AND	$0x3,%EAX

(299) 0x43b689 JE	43b761

(299) 0x43b68f MOVSXD	0xb8(%RSP),%RCX

(299) 0x43b697 VMOVQ	%XMM3,%RAX

(299) 0x43b69c MOV	%RSI,%R14

(299) 0x43b69f MOV	%RDI,%R12

(299) 0x43b6a2 SUB	%RAX,%R14

(299) 0x43b6a5 MOV	%R8,%RBX

(299) 0x43b6a8 MOV	%R9,%R11

(299) 0x43b6ab SUB	%RAX,%R12

(299) 0x43b6ae SUB	%RAX,%RBX

(299) 0x43b6b1 SUB	%RAX,%R11

(299) 0x43b6b4 LEA	(%R14,%RCX,1),%RAX

(299) 0x43b6b8 VMOVSD	(%R13,%RAX,8),%XMM2

(299) 0x43b6bf LEA	(%R12,%RCX,1),%RAX

(299) 0x43b6c3 VMOVSD	%XMM2,(%R15,%RAX,8)

(299) 0x43b6c9 LEA	(%RBX,%RCX,1),%RAX

(299) 0x43b6cd ADD	%R11,%RCX

(299) 0x43b6d0 VMOVSD	(%R10,%RAX,8),%XMM10

(299) 0x43b6d6 VMOVQ	%XMM4,%RAX

(299) 0x43b6db VMOVSD	%XMM10,(%RAX,%RCX,8)

(299) 0x43b6e0 MOV	0xb8(%RSP),%ECX

(299) 0x43b6e7 LEA	0x1(%RCX),%EAX

(299) 0x43b6ea CMP	%EAX,0x98(%RSP)

(299) 0x43b6f1 JL	43b761

(299) 0x43b6f3 MOVSXD	%EAX,%RCX

(299) 0x43b6f6 LEA	(%R14,%RCX,1),%RAX

(299) 0x43b6fa VMOVSD	(%R13,%RAX,8),%XMM11

(299) 0x43b701 LEA	(%R12,%RCX,1),%RAX

(299) 0x43b705 VMOVSD	%XMM11,(%R15,%RAX,8)

(299) 0x43b70b LEA	(%RBX,%RCX,1),%RAX

(299) 0x43b70f ADD	%R11,%RCX

(299) 0x43b712 VMOVSD	(%R10,%RAX,8),%XMM12

(299) 0x43b718 VMOVQ	%XMM4,%RAX

(299) 0x43b71d VMOVSD	%XMM12,(%RAX,%RCX,8)

(299) 0x43b722 MOV	0xb8(%RSP),%EAX

(299) 0x43b729 ADD	$0x2,%EAX

(299) 0x43b72c CMP	%EAX,0x98(%RSP)

(299) 0x43b733 JL	43b761

(299) 0x43b735 CLTQ

(299) 0x43b737 ADD	%RAX,%R14

(299) 0x43b73a ADD	%RAX,%R12

(299) 0x43b73d ADD	%RAX,%RBX

(299) 0x43b740 ADD	%RAX,%R11

(299) 0x43b743 VMOVSD	(%R13,%R14,8),%XMM13

(299) 0x43b74a VMOVQ	%XMM4,%R14

(299) 0x43b74f VMOVSD	%XMM13,(%R15,%R12,8)

(299) 0x43b755 VMOVSD	(%R10,%RBX,8),%XMM14

(299) 0x43b75b VMOVSD	%XMM14,(%R14,%R11,8)

(299) 0x43b761 VMOVQ	%XMM6,%R12

(299) 0x43b766 VMOVQ	%XMM7,%RBX

(299) 0x43b76b INC	%EDX

(299) 0x43b76d VMOVQ	%XMM8,%R11

(299) 0x43b772 VMOVQ	%XMM9,%RCX

(299) 0x43b777 ADD	%R12,%RSI

(299) 0x43b77a ADD	%RBX,%RDI

(299) 0x43b77d ADD	%R11,%R8

(299) 0x43b780 ADD	%RCX,%R9

(299) 0x43b783 CMP	%EDX,0xa4(%RSP)

(299) 0x43b78a JG	43b3a0

0x43b790 MOV	0x54(%RSP),%R12D

0x43b795 MOV	0x50(%RSP),%ECX

0x43b799 MOV	0x38(%RSP),%RBX

0x43b79e VZEROUPPER

0x43b7a1 MOV	%ECX,%R14D

0x43b7a4 MOV	%R14D,0xe0(%RBX)

0x43b7ab CALL	402360 <@plt_start@+0x340>

0x43b7b0 MOV	0x18(%RBX),%R8

0x43b7b4 MOV	0x10(%RBX),%RDX

0x43b7b8 MOV	(%R8),%EAX

0x43b7bb MOV	(%RDX),%EDI

0x43b7bd ADD	$0x2,%EAX

0x43b7c0 SUB	%EDI,%EAX

0x43b7c2 CLTD

0x43b7c3 IDIVL	0x68(%RSP)

0x43b7c7 CMP	%EDX,%R12D

0x43b7ca JL	43bdaf

0x43b7d0 MOV	%R12D,%R9D

0x43b7d3 IMUL	%EAX,%R9D

0x43b7d7 ADD	%EDX,%R9D

0x43b7da ADD	%R9D,%EAX

0x43b7dd CMP	%EAX,%R9D

0x43b7e0 JGE	43bd40

0x43b7e6 MOV	(%RBX),%R13

0x43b7e9 MOV	0x80(%RSP),%RCX

0x43b7f1 MOV	0x48(%RSP),%R8

0x43b7f6 MOV	0x8(%RBX),%RSI

0x43b7fa ADD	%EDI,%R9D

0x43b7fd ADD	%EDI,%EAX

0x43b7ff MOV	0x90(%RSP),%RDX

0x43b807 MOV	0x40(%RSP),%RDI

0x43b80c MOVSXD	%R9D,%R12

0x43b80f MOV	%EAX,0x74(%RSP)

0x43b813 MOV	0x78(%RSP),%RAX

0x43b818 VMOVQ	0x48(%RBX),%XMM4

0x43b81d VMOVQ	0x58(%RBX),%XMM7

0x43b822 VMOVQ	0x40(%RBX),%XMM6

0x43b827 MOV	%RBX,0x48(%RSP)

0x43b82c MOVB	$0,0xa4(%RSP)

0x43b834 VMOVQ	0x50(%RBX),%XMM8

0x43b839 MOVSXD	(%R13),%R11

0x43b83d IMUL	%R12,%RCX

0x43b841 MOV	0x88(%RSP),%R13

0x43b849 MOV	(%RSI),%R15D

0x43b84c MOV	0x60(%RSP),%RSI

0x43b851 IMUL	%R12,%RAX

0x43b855 IMUL	%R12,%RDX

0x43b859 VMOVQ	%XMM7,%R10

0x43b85e VMOVQ	%XMM6,%RBX

0x43b863 ADD	%R11,%R8

0x43b866 IMUL	%R13,%R12

0x43b86a LEA	0x2(%R15),%R14D

0x43b86e ADD	%R11,%RDI

0x43b871 ADD	%RCX,%R8

0x43b874 MOV	0x58(%RSP),%RCX

0x43b879 ADD	%R11,%RSI

0x43b87c ADD	%RAX,%RDI

0x43b87f ADD	%RDX,%RSI

0x43b882 MOV	%R15D,0x54(%RSP)

0x43b887 MOV	%R14D,0xb0(%RSP)

0x43b88f VMOVQ	%R11,%XMM9

0x43b894 MOV	%R11D,0xb8(%RSP)

0x43b89c ADD	%R11,%RCX

0x43b89f ADD	%R12,%RCX

0x43b8a2 CMP	%R14D,%R11D

0x43b8a5 CMOVGE	%R11D,%R14D

0x43b8a9 SUB	%R11D,%R15D

0x43b8ac VMOVQ	%XMM4,%R11

0x43b8b1 MOV	%R14D,0x70(%RSP)

0x43b8b6 LEA	0x2(%R15),%R14D

0x43b8ba MOV	%R15D,0x58(%RSP)

0x43b8bf LEA	0x1(%R15),%R15D

0x43b8c3 MOV	%R14D,%R12D

0x43b8c6 MOV	%R14D,%EAX

0x43b8c9 AND	$0x7,%R14D

0x43b8cd MOV	%R15D,0x6c(%RSP)

0x43b8d2 SHR	$0x3,%R12D

0x43b8d6 MOV	%R14D,0x60(%RSP)

0x43b8db SAL	$0x6,%R12

0x43b8df AND	$-0x8,%EAX

0x43b8e2 MOV	%R12,0xa8(%RSP)

0x43b8ea MOV	%EAX,0x68(%RSP)

0x43b8ee XCHG	%AX,%AX

(296) 0x43b8f0 MOV	0xb0(%RSP),%EDX

(296) 0x43b8f7 CMP	%EDX,0xb8(%RSP)

(296) 0x43b8fe JGE	43bca4

(296) 0x43b904 CMPL	$0x6,0x6c(%RSP)

(296) 0x43b909 JBE	43bda0

(296) 0x43b90f MOV	0xa8(%RSP),%RDX

(296) 0x43b917 VMOVQ	%XMM8,%R12

(296) 0x43b91c XOR	%EAX,%EAX

(296) 0x43b91e LEA	(%R11,%R8,8),%R15

(296) 0x43b922 LEA	(%RBX,%RDI,8),%R14

(296) 0x43b926 LEA	(%R10,%RSI,8),%R13

(296) 0x43b92a LEA	(%R12,%RCX,8),%R12

(296) 0x43b92e SUB	$0x40,%RDX

(296) 0x43b932 SHR	$0x6,%RDX

(296) 0x43b936 INC	%RDX

(296) 0x43b939 AND	$0x7,%EDX

(296) 0x43b93c JE	43ba46

(296) 0x43b942 CMP	$0x1,%RDX

(296) 0x43b946 JE	43ba17

(296) 0x43b94c CMP	$0x2,%RDX

(296) 0x43b950 JE	43b9f6

(296) 0x43b956 CMP	$0x3,%RDX

(296) 0x43b95a JE	43b9d5

(296) 0x43b95c CMP	$0x4,%RDX

(296) 0x43b960 JE	43b9b4

(296) 0x43b962 CMP	$0x5,%RDX

(296) 0x43b966 JE	43b993

(296) 0x43b968 CMP	$0x6,%RDX

(296) 0x43b96c JNE	43bd50

(296) 0x43b972 VMOVUPD	(%R15,%RAX,1),%ZMM0

(296) 0x43b979 VMOVUPD	%ZMM0,(%R14,%RAX,1)

(296) 0x43b980 VMOVUPD	(%R13,%RAX,1),%ZMM5

(296) 0x43b988 VMOVUPD	%ZMM5,(%R12,%RAX,1)

(296) 0x43b98f ADD	$0x40,%RAX

(296) 0x43b993 VMOVUPD	(%R15,%RAX,1),%ZMM1

(296) 0x43b99a VMOVUPD	%ZMM1,(%R14,%RAX,1)

(296) 0x43b9a1 VMOVUPD	(%R13,%RAX,1),%ZMM2

(296) 0x43b9a9 VMOVUPD	%ZMM2,(%R12,%RAX,1)

(296) 0x43b9b0 ADD	$0x40,%RAX

(296) 0x43b9b4 VMOVUPD	(%R15,%RAX,1),%ZMM10

(296) 0x43b9bb VMOVUPD	%ZMM10,(%R14,%RAX,1)

(296) 0x43b9c2 VMOVUPD	(%R13,%RAX,1),%ZMM11

(296) 0x43b9ca VMOVUPD	%ZMM11,(%R12,%RAX,1)

(296) 0x43b9d1 ADD	$0x40,%RAX

(296) 0x43b9d5 VMOVUPD	(%R15,%RAX,1),%ZMM12

(296) 0x43b9dc VMOVUPD	%ZMM12,(%R14,%RAX,1)

(296) 0x43b9e3 VMOVUPD	(%R13,%RAX,1),%ZMM13

(296) 0x43b9eb VMOVUPD	%ZMM13,(%R12,%RAX,1)

(296) 0x43b9f2 ADD	$0x40,%RAX

(296) 0x43b9f6 VMOVUPD	(%R15,%RAX,1),%ZMM14

(296) 0x43b9fd VMOVUPD	%ZMM14,(%R14,%RAX,1)

(296) 0x43ba04 VMOVUPD	(%R13,%RAX,1),%ZMM4

(296) 0x43ba0c VMOVUPD	%ZMM4,(%R12,%RAX,1)

(296) 0x43ba13 ADD	$0x40,%RAX

(296) 0x43ba17 VMOVUPD	(%R15,%RAX,1),%ZMM6

(296) 0x43ba1e VMOVUPD	%ZMM6,(%R14,%RAX,1)

(296) 0x43ba25 VMOVUPD	(%R13,%RAX,1),%ZMM7

(296) 0x43ba2d VMOVUPD	%ZMM7,(%R12,%RAX,1)

(296) 0x43ba34 ADD	$0x40,%RAX

(296) 0x43ba38 CMP	%RAX,0xa8(%RSP)

(296) 0x43ba40 JE	43bb57

  (297) 0x43ba46 VMOVUPD	(%R15,%RAX,1),%ZMM3

  (297) 0x43ba4d VMOVUPD	%ZMM3,(%R14,%RAX,1)

  (297) 0x43ba54 VMOVUPD	(%R13,%RAX,1),%ZMM15

  (297) 0x43ba5c VMOVUPD	%ZMM15,(%R12,%RAX,1)

  (297) 0x43ba63 VMOVUPD	0x40(%R15,%RAX,1),%ZMM0

  (297) 0x43ba6b VMOVUPD	%ZMM0,0x40(%R14,%RAX,1)

  (297) 0x43ba73 VMOVUPD	0x40(%R13,%RAX,1),%ZMM5

  (297) 0x43ba7b VMOVUPD	%ZMM5,0x40(%R12,%RAX,1)

  (297) 0x43ba83 VMOVUPD	0x80(%R15,%RAX,1),%ZMM1

  (297) 0x43ba8b VMOVUPD	%ZMM1,0x80(%R14,%RAX,1)

  (297) 0x43ba93 VMOVUPD	0x80(%R13,%RAX,1),%ZMM2

  (297) 0x43ba9b VMOVUPD	%ZMM2,0x80(%R12,%RAX,1)

  (297) 0x43baa3 VMOVUPD	0xc0(%R15,%RAX,1),%ZMM10

  (297) 0x43baab VMOVUPD	%ZMM10,0xc0(%R14,%RAX,1)

  (297) 0x43bab3 VMOVUPD	0xc0(%R13,%RAX,1),%ZMM11

  (297) 0x43babb VMOVUPD	%ZMM11,0xc0(%R12,%RAX,1)

  (297) 0x43bac3 VMOVUPD	0x100(%R15,%RAX,1),%ZMM12

  (297) 0x43bacb VMOVUPD	%ZMM12,0x100(%R14,%RAX,1)

  (297) 0x43bad3 VMOVUPD	0x100(%R13,%RAX,1),%ZMM13

  (297) 0x43badb VMOVUPD	%ZMM13,0x100(%R12,%RAX,1)

  (297) 0x43bae3 VMOVUPD	0x140(%R15,%RAX,1),%ZMM14

  (297) 0x43baeb VMOVUPD	%ZMM14,0x140(%R14,%RAX,1)

  (297) 0x43baf3 VMOVUPD	0x140(%R13,%RAX,1),%ZMM4

  (297) 0x43bafb VMOVUPD	%ZMM4,0x140(%R12,%RAX,1)

  (297) 0x43bb03 VMOVUPD	0x180(%R15,%RAX,1),%ZMM6

  (297) 0x43bb0b VMOVUPD	%ZMM6,0x180(%R14,%RAX,1)

  (297) 0x43bb13 VMOVUPD	0x180(%R13,%RAX,1),%ZMM7

  (297) 0x43bb1b VMOVUPD	%ZMM7,0x180(%R12,%RAX,1)

  (297) 0x43bb23 VMOVUPD	0x1c0(%R15,%RAX,1),%ZMM3

  (297) 0x43bb2b VMOVUPD	%ZMM3,0x1c0(%R14,%RAX,1)

  (297) 0x43bb33 VMOVUPD	0x1c0(%R13,%RAX,1),%ZMM15

  (297) 0x43bb3b VMOVUPD	%ZMM15,0x1c0(%R12,%RAX,1)

  (297) 0x43bb43 ADD	$0x200,%RAX

  (297) 0x43bb49 CMP	%RAX,0xa8(%RSP)

  (297) 0x43bb51 JNE	43ba46

(296) 0x43bb57 MOV	0x68(%RSP),%EAX

(296) 0x43bb5b MOV	0xb8(%RSP),%R15D

(296) 0x43bb63 MOV	0x60(%RSP),%R13D

(296) 0x43bb68 MOV	%EAX,%R14D

(296) 0x43bb6b ADD	%R15D,%EAX

(296) 0x43bb6e TEST	%R13D,%R13D

(296) 0x43bb71 JE	43bca4

(296) 0x43bb77 MOV	0x58(%RSP),%R12D

(296) 0x43bb7c SUB	%R14D,%R12D

(296) 0x43bb7f LEA	0x2(%R12),%R13D

(296) 0x43bb84 INC	%R12D

(296) 0x43bb87 CMP	$0x2,%R12D

(296) 0x43bb8b JBE	43bbcd

(296) 0x43bb8d LEA	(%R14,%R8,1),%RDX

(296) 0x43bb91 LEA	(%RDI,%R14,1),%R15

(296) 0x43bb95 LEA	(%RSI,%R14,1),%R12

(296) 0x43bb99 ADD	%RCX,%R14

(296) 0x43bb9c VMOVUPD	(%R11,%RDX,8),%YMM0

(296) 0x43bba2 VMOVQ	%XMM8,%RDX

(296) 0x43bba7 VMOVUPD	%YMM0,(%RBX,%R15,8)

(296) 0x43bbad VMOVUPD	(%R10,%R12,8),%YMM5

(296) 0x43bbb3 VMOVUPD	%YMM5,(%RDX,%R14,8)

(296) 0x43bbb9 MOV	%R13D,%R14D

(296) 0x43bbbc AND	$-0x4,%R14D

(296) 0x43bbc0 ADD	%R14D,%EAX

(296) 0x43bbc3 AND	$0x3,%R13D

(296) 0x43bbc7 JE	43bca4

(296) 0x43bbcd VMOVQ	%XMM9,%RDX

(296) 0x43bbd2 MOV	%R8,%R15

(296) 0x43bbd5 MOV	%RDI,%R14

(296) 0x43bbd8 MOV	%RSI,%R13

(296) 0x43bbdb MOV	%RCX,%R12

(296) 0x43bbde SUB	%RDX,%R15

(296) 0x43bbe1 SUB	%RDX,%R14

(296) 0x43bbe4 SUB	%RDX,%R13

(296) 0x43bbe7 SUB	%RDX,%R12

(296) 0x43bbea MOVSXD	%EAX,%RDX

(296) 0x43bbed MOV	%R12,0x98(%RSP)

(296) 0x43bbf5 LEA	(%RDX,%R15,1),%R12

(296) 0x43bbf9 VMOVSD	(%R11,%R12,8),%XMM1

(296) 0x43bbff LEA	(%RDX,%R14,1),%R12

(296) 0x43bc03 VMOVSD	%XMM1,(%RBX,%R12,8)

(296) 0x43bc09 LEA	(%RDX,%R13,1),%R12

(296) 0x43bc0d VMOVSD	(%R10,%R12,8),%XMM2

(296) 0x43bc13 MOV	0x98(%RSP),%R12

(296) 0x43bc1b ADD	%R12,%RDX

(296) 0x43bc1e VMOVQ	%XMM8,%R12

(296) 0x43bc23 VMOVSD	%XMM2,(%R12,%RDX,8)

(296) 0x43bc29 LEA	0x1(%RAX),%EDX

(296) 0x43bc2c CMP	%EDX,0xb0(%RSP)

(296) 0x43bc33 JLE	43bca4

(296) 0x43bc35 MOVSXD	%EDX,%RDX

(296) 0x43bc38 LEA	(%R15,%RDX,1),%R12

(296) 0x43bc3c VMOVSD	(%R11,%R12,8),%XMM10

(296) 0x43bc42 LEA	(%R14,%RDX,1),%R12

(296) 0x43bc46 VMOVSD	%XMM10,(%RBX,%R12,8)

(296) 0x43bc4c LEA	(%R13,%RDX,1),%R12

(296) 0x43bc51 VMOVSD	(%R10,%R12,8),%XMM11

(296) 0x43bc57 MOV	0x98(%RSP),%R12

(296) 0x43bc5f ADD	%R12,%RDX

(296) 0x43bc62 VMOVQ	%XMM8,%R12

(296) 0x43bc67 VMOVSD	%XMM11,(%R12,%RDX,8)

(296) 0x43bc6d CMP	%EAX,0x54(%RSP)

(296) 0x43bc71 JLE	43bca4

(296) 0x43bc73 ADD	$0x2,%EAX

(296) 0x43bc76 CLTQ

(296) 0x43bc78 ADD	%RAX,%R15

(296) 0x43bc7b ADD	%RAX,%R14

(296) 0x43bc7e ADD	%RAX,%R13

(296) 0x43bc81 VMOVSD	(%R11,%R15,8),%XMM12

(296) 0x43bc87 MOV	0x98(%RSP),%R15

(296) 0x43bc8f VMOVSD	%XMM12,(%RBX,%R14,8)

(296) 0x43bc95 VMOVSD	(%R10,%R13,8),%XMM13

(296) 0x43bc9b ADD	%RAX,%R15

(296) 0x43bc9e VMOVSD	%XMM13,(%R12,%R15,8)

(296) 0x43bca4 MOV	0xb0(%RSP),%R14D

(296) 0x43bcac MOV	0xa0(%RSP),%R13D

(296) 0x43bcb4 MOVZX	0xa4(%RSP),%R12D

(296) 0x43bcbd MOV	0x80(%RSP),%R15

(296) 0x43bcc5 CMP	%R14D,0xb8(%RSP)

(296) 0x43bccd MOV	0x78(%RSP),%RAX

(296) 0x43bcd2 MOV	0x90(%RSP),%R14

(296) 0x43bcda MOV	$0x1,%EDX

(296) 0x43bcdf CMOVLE	0x70(%RSP),%R13D

(296) 0x43bce5 CMOVLE	%EDX,%R12D

(296) 0x43bce9 INC	%R9D

(296) 0x43bcec ADD	%R15,%R8

(296) 0x43bcef ADD	%RAX,%RDI

(296) 0x43bcf2 MOV	%R13D,0xa0(%RSP)

(296) 0x43bcfa MOV	0x88(%RSP),%R13

(296) 0x43bd02 ADD	%R14,%RSI

(296) 0x43bd05 MOV	%R12B,0xa4(%RSP)

(296) 0x43bd0d ADD	%R13,%RCX

(296) 0x43bd10 CMP	%R9D,0x74(%RSP)

(296) 0x43bd15 JG	43b8f0

0x43bd1b CMPB	$0,0xa4(%RSP)

0x43bd23 MOV	0x48(%RSP),%R9

0x43bd28 JE	43bdc1

0x43bd2e MOV	0xa0(%RSP),%R8D

0x43bd36 MOV	%R8D,0xe0(%R9)

0x43bd3d VZEROUPPER

0x43bd40 LEA	-0x28(%RBP),%RSP

0x43bd44 POP	%RBX

0x43bd45 POP	%R12

0x43bd47 POP	%R13

0x43bd49 POP	%R14

0x43bd4b POP	%R15

0x43bd4d POP	%RBP

0x43bd4e RET

0x43bd4f NOP

(296) 0x43bd50 VMOVUPD	(%R15),%ZMM3

(296) 0x43bd56 MOV	$0x40,%EAX

(296) 0x43bd5b VMOVUPD	%ZMM3,(%R14)

(296) 0x43bd61 VMOVUPD	(%R13),%ZMM15

(296) 0x43bd68 VMOVUPD	%ZMM15,(%R12)

(296) 0x43bd6f JMP	43b972

0x43bd74 NOPW	%CS:(%RAX,%RAX,1)

0x43bd7f NOP

(299) 0x43bd80 MOV	0x74(%RSP),%EBX

(299) 0x43bd84 XOR	%ECX,%ECX

(299) 0x43bd86 MOV	%EBX,0xb8(%RSP)

(299) 0x43bd8d JMP	43b638

0x43bd92 NOPW	%CS:(%RAX,%RAX,1)

0x43bd9d NOPL	(%RAX)

(296) 0x43bda0 MOV	0xb8(%RSP),%EAX

(296) 0x43bda7 XOR	%R14D,%R14D

(296) 0x43bdaa JMP	43bb77

0x43bdaf INC	%EAX

0x43bdb1 XOR	%EDX,%EDX

0x43bdb3 JMP	43b7d0

0x43bdb8 INC	%EAX

0x43bdba XOR	%EDX,%EDX

0x43bdbc JMP	43b267

0x43bdc1 VZEROUPPER

0x43bdc4 LEA	-0x28(%RBP),%RSP

0x43bdc8 POP	%RBX

0x43bdc9 POP	%R12

0x43bdcb POP	%R13

0x43bdcd POP	%R14

0x43bdcf POP	%R15

0x43bdd1 POP	%RBP

0x43bdd2 RET

0x43bdd3 XOR	%R10D,%R10D

0x43bdd6 NOPW	%CS:(%RAX,%RAX,1)

(298) 0x43bde0 INC	%EDX

(298) 0x43bde2 CMP	%ECX,%EAX

(298) 0x43bde4 JE	43bdfd

(298) 0x43bde6 CMP	%EDX,0xa4(%RSP)

(298) 0x43bded JG	43bde0

0x43bdef TEST	%R10B,%R10B

0x43bdf2 JNE	43b7a4

0x43bdf8 JMP	43b7ab

(298) 0x43bdfd CMP	%EDX,0xa4(%RSP)

(298) 0x43be04 JLE	43b7a1

(298) 0x43be0a MOV	%EAX,%R14D

(298) 0x43be0d MOV	$0x1,%R10D

(298) 0x43be13 JMP	43bde0

0x43be15 NOPW	%CS:(%RAX,%RAX,1)

Coverage (%)	Name	Source Location	Module
►99.91+	GOMP_parallel	libgomp.h:982	libgomp.so.1.0.0
○	reset_field_kernel	reset_field_kernel.f90:70	exec
○	reset_field	reset_field.f90:41	exec
○	hydro	hydro.f90:70	exec
○	main	clover_leaf.f90:41	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	clover_leaf.f90:41	exec

Coverage (%)	Name	Source Location	Module
►86.69+	gomp_thread_start	team.c:130	libgomp.so.1.0.0
○	start_thread		libc.so.6
○	__GI___clone3		libc.so.6
►11.86+	GOMP_parallel	libgomp.h:982	libgomp.so.1.0.0
○	reset_field_kernel	reset_field_kernel.f90:70	exec
○	reset_field	reset_field.f90:41	exec
○	hydro	hydro.f90:70	exec
○	main	clover_leaf.f90:41	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	clover_leaf.f90:41	exec
►1.45+	GOMP_parallel	libgomp.h:982	libgomp.so.1.0.0
○	reset_field_kernel	reset_field_kernel.f90:70	exec
○	reset_field	reset_field.f90:41	exec
○	hydro	hydro.f90:70	exec

Coverage (%)	Name	Source Location	Module
►91.65+	gomp_thread_start	team.c:130	libgomp.so.1.0.0
○	start_thread		libc.so.6
○	__GI___clone3		libc.so.6
►7.56+	GOMP_parallel	libgomp.h:982	libgomp.so.1.0.0
○	reset_field_kernel	reset_field_kernel.f90:70	exec
○	reset_field	reset_field.f90:41	exec
○	hydro	hydro.f90:70	exec
○	main	clover_leaf.f90:41	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	clover_leaf.f90:41	exec

Coverage (%)	Name	Source Location	Module
►93.17+	gomp_thread_start	team.c:130	libgomp.so.1.0.0
○	start_thread		libc.so.6
○	__GI___clone3		libc.so.6
►6.74+	GOMP_parallel	libgomp.h:982	libgomp.so.1.0.0
○	reset_field_kernel	reset_field_kernel.f90:70	exec
○	reset_field	reset_field.f90:41	exec
○	hydro	hydro.f90:70	exec
○	main	clover_leaf.f90:41	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	clover_leaf.f90:41	exec

Coverage (%)	Name	Source Location	Module
►95.31+	gomp_thread_start	team.c:130	libgomp.so.1.0.0
○	start_thread		libc.so.6
○	__GI___clone3		libc.so.6
►4.11+	GOMP_parallel	libgomp.h:982	libgomp.so.1.0.0
○	reset_field_kernel	reset_field_kernel.f90:70	exec
○	reset_field	reset_field.f90:41	exec
○	hydro	hydro.f90:70	exec
○	main	clover_leaf.f90:41	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	clover_leaf.f90:41	exec

Coverage (%)	Name	Source Location	Module
►95.62+	gomp_thread_start	team.c:130	libgomp.so.1.0.0
○	start_thread		libc.so.6
○	__GI___clone3		libc.so.6
►3.34+	GOMP_parallel	libgomp.h:982	libgomp.so.1.0.0
○	reset_field_kernel	reset_field_kernel.f90:70	exec
○	reset_field	reset_field.f90:41	exec
○	hydro	hydro.f90:70	exec
○	main	clover_leaf.f90:41	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	clover_leaf.f90:41	exec

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run 8x1

Source file and lines	reset_field_kernel.f90:47-63
Module	exec

The function is defined in /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/reset_field_kernel.f90:47-63.

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 29.13 to 4.25 cycles (6.85x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)
To reference allocatable arrays, use "allocatable" instead of "pointer" pointers or qualify them with the "contiguous" attribute (Fortran 2008)
For structures, limit to one indirection. For example, use a_b%c instead of a%b%c with a_b set to a%b before this function

Vectorization

Your function is probably not vectorized. Only 9% of vector register length is used (average across all SSE/AVX instructions). By vectorizing your function, you can lower the cost of an iteration from 29.13 to 1.39 cycles (21.00x speedup).

Details

Store and arithmetical SSE/AVX instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): do i a(i)%x = b(i)%x (slow, non stride 1) => do i a%x(i) = b%x(i) (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

unknown: 3 occurrences►
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/reset_field_kernel.f90:48
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/reset_field_kernel.f90:48
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/reset_field_kernel.f90:50

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

CMOVGE: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/reset_field_kernel.f90:60
CMOVLE: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/reset_field_kernel.f90:50
IDIV: 2 occurrences►
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/reset_field_kernel.f90:48
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/reset_field_kernel.f90:58

Conversion instructions

Detected expensive conversion instructions.

Details

CLTD: 2 occurrences►
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/reset_field_kernel.f90:48
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/reset_field_kernel.f90:58

Workaround

Avoid mixing data with different types. In particular, check if the type of constants is the same as array elements.

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 397 bytes. The binary function is storing 185 bytes.

General properties

nb instructions	237
nb uops	233
loop length	1001
used x86 registers	16
used mmx registers	0
used xmm registers	7
used ymm registers	0
used zmm registers	0
nb stack references	22

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	29.13 cycles
front end	29.13 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	16.00	16.00	16.00	16.00	16.00	16.00	23.50	23.50	23.50	23.50	0.00	0.00	0.00	0.00	4.00	4.00
cycles	16.00	16.00	16.00	16.00	16.00	16.00	23.50	23.50	23.50	23.50	0.00	0.00	0.00	0.00	4.00	4.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

12.00

Cycles summary

Front-end	29.13
Dispatch	23.50
DIV/SQRT	12.00
Overall L1	29.13

Vectorization ratios

all	3%
load	0%
store	0%
mul	0%
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	0%
other	7%

Vector efficiency ratios

all	9%
load	10%
store	8%
mul	10%
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	6%
other	9%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 29.13 cycles. At this rate:

5% of peak load performance is reached (13.63 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
4% of peak store performance is reached (6.35 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Performance is limited by instruction throughput (loading/decoding program instructions to execution core) (front-end is a bottleneck). By removing all these bottlenecks, you can lower the cost of an iteration from 29.13 to 23.50 cycles (1.24x speedup).

ASM code

In the binary file, the address of the function is: 43b1b0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %RDI,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
AND $-0x40,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB $0xc0,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0xd0(%RDI),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0xc8(%RDI),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0xc0(%RDI),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0xb8(%RDI),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0xb0(%RDI),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0xa8(%RDI),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0xa0(%RDI),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0xd8(%RDI),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x10(%RDI),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RDX,0x90(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RCX,0x58(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RSI,0x88(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R8,0x48(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R9,0x80(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R10,0x40(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R11,0x78(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RAX,0x60(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV (%RDI),%R15D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
CALL 402370 <@plt_start@+0x350>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV %EAX,%R13D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %EAX,0x68(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
CALL 4022e0 <@plt_start@+0x2c0>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV %EAX,%R12D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
MOV 0x18(%RBX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%EAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
INC %EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB %R15D,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CLTD																				scal (6.3%)
IDIV %R13D	2	0	0	0	2	0	0	0	0	0	0	0	0	0	0	0	0	9-14	6	scal (6.3%)
CMP %EDX,%R12D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
JL 43bdb8 <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0+0xc08>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV %EAX,%ECX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
IMUL %R12D,%ECX	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	scal (6.3%)
ADD %ECX,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD %EDX,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP %EAX,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
JGE 43b7ab <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0+0x5fb>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV (%RBX),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
VMOVQ 0x70(%RBX),%XMM6	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MOV 0x78(%RBX),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
ADD %R15D,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x8(%RBX),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOVSXD %EDX,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
VMOVQ 0x60(%RBX),%XMM7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVQ 0x90(%RBX),%XMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
ADD %R15D,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
VMOVQ 0x80(%RBX),%XMM9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVQ 0x38(%RBX),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MOV 0x28(%RBX),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %EAX,0xa4(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
VMOVQ 0x30(%RBX),%XMM4	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MOV 0x20(%RBX),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOVSXD (%RSI),%R10	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	N/A
VMOVQ %XMM6,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
MOV (%R8),%EAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x98(%RBX),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
VMOVQ %XMM7,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
IMUL %RCX,%RDI	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	N/A
IMUL %RCX,%RSI	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	N/A
ADD %R10,%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R10D,0x74(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
ADD %RDI,%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x68(%RBX),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
ADD %R10,%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %EAX,0x98(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV %R9,0xb8(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMOVQ %XMM8,%R9	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
INC %EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
IMUL %RCX,%R9	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	N/A
ADD %R10,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD %R9,%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x88(%RBX),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
ADD %RSI,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
VMOVQ %XMM9,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
IMUL %RSI,%RCX	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	scal (12.5%)
MOV 0x98(%RSP),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
ADD %R10,%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD %RCX,%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R10D,%ECX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
CMP %ESI,%R10D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
CMOVLE %EAX,%ECX	2	0.33	0.33	0.33	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	scal (6.3%)
JG 43bdd3 <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0+0xc23>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
SUB %R10D,%ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R12D,0x54(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV %R13,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
VMOVQ %R10,%XMM3	1	0	0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2	1	scal (12.5%)
MOV %ESI,0xa8(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
INC %ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R15,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VMOVQ %XMM0,%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
MOV %ESI,%R14D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
MOV %ESI,%R11D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
AND $0x7,%ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R12,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %ESI,0x6c(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV 0xb8(%RSP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
AND $-0x8,%R11D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
MOV %ECX,0x50(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV %R11D,0x70(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV %RBX,0x38(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
SHR $0x3,%R14D	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	scal (6.3%)
SAL $0x6,%R14	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	scal (12.5%)
MOV %R14,0xb0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
MOV 0x54(%RSP),%R12D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (6.3%)
MOV 0x50(%RSP),%ECX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (6.3%)
MOV 0x38(%RSP),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
VZEROUPPER	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
MOV %ECX,%R14D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
MOV %R14D,0xe0(%RBX)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
CALL 402360 <@plt_start@+0x340>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV 0x18(%RBX),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x10(%RBX),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%R8),%EAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RDX),%EDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
ADD $0x2,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB %EDI,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CLTD																				scal (6.3%)
IDIVL 0x68(%RSP)	2	0	0	0	2	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	10-17	6	scal (6.3%)
CMP %EDX,%R12D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
JL 43bdaf <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0+0xbff>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV %R12D,%R9D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
IMUL %EAX,%R9D	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	N/A
ADD %EDX,%R9D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD %R9D,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP %EAX,%R9D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
JGE 43bd40 <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0+0xb90>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV (%RBX),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x80(%RSP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x48(%RSP),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x8(%RBX),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
ADD %EDI,%R9D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD %EDI,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x90(%RSP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x40(%RSP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOVSXD %R9D,%R12	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
MOV %EAX,0x74(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV 0x78(%RSP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
VMOVQ 0x48(%RBX),%XMM4	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVQ 0x58(%RBX),%XMM7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVQ 0x40(%RBX),%XMM6	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MOV %RBX,0x48(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOVB $0,0xa4(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (1.6%)
VMOVQ 0x50(%RBX),%XMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MOVSXD (%R13),%R11	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	scal (6.3%)
IMUL %R12,%RCX	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	scal (12.5%)
MOV 0x88(%RSP),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RSI),%R15D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x60(%RSP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
IMUL %R12,%RAX	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	N/A
IMUL %R12,%RDX	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	N/A
VMOVQ %XMM7,%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVQ %XMM6,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
ADD %R11,%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
IMUL %R13,%R12	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	scal (12.5%)
LEA 0x2(%R15),%R14D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ADD %R11,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD %RCX,%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x58(%RSP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
ADD %R11,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD %RAX,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD %RDX,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R15D,0x54(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV %R14D,0xb0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
VMOVQ %R11,%XMM9	1	0	0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2	1	scal (12.5%)
MOV %R11D,0xb8(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
ADD %R11,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
ADD %R12,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
CMP %R14D,%R11D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
CMOVGE %R11D,%R14D	2	0.33	0.33	0.33	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	scal (6.3%)
SUB %R11D,%R15D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
VMOVQ %XMM4,%R11	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
MOV %R14D,0x70(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
LEA 0x2(%R15),%R14D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %R15D,0x58(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
LEA 0x1(%R15),%R15D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %R14D,%R12D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
MOV %R14D,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
AND $0x7,%R14D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
MOV %R15D,0x6c(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
SHR $0x3,%R12D	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	scal (6.3%)
MOV %R14D,0x60(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
SAL $0x6,%R12	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	scal (12.5%)
AND $-0x8,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R12,0xa8(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %EAX,0x68(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
XCHG %AX,%AX	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
CMPB $0,0xa4(%RSP)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	scal (1.6%)
MOV 0x48(%RSP),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
JE 43bdc1 <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0+0xc11>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV 0xa0(%RSP),%R8D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %R8D,0xe0(%R9)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
VZEROUPPER	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
LEA -0x28(%RBP),%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
RET	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
NOP	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOP	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
INC %EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
XOR %EDX,%EDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
JMP 43b7d0 <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0+0x620>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
INC %EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
XOR %EDX,%EDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
JMP 43b267 <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0+0xb7>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
VZEROUPPER	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
LEA -0x28(%RBP),%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
RET	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
XOR %R10D,%R10D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
TEST %R10B,%R10B	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JNE 43b7a4 <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0+0x5f4>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
JMP 43b7ab <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0+0x5fb>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run 8x1

Source file and lines	reset_field_kernel.f90:47-63
Module	exec

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 29.13 to 4.25 cycles (6.85x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)
To reference allocatable arrays, use "allocatable" instead of "pointer" pointers or qualify them with the "contiguous" attribute (Fortran 2008)
For structures, limit to one indirection. For example, use a_b%c instead of a%b%c with a_b set to a%b before this function

Vectorization

Details

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): do i a(i)%x = b(i)%x (slow, non stride 1) => do i a%x(i) = b%x(i) (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

unknown: 3 occurrences►
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/reset_field_kernel.f90:48
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/reset_field_kernel.f90:48
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/reset_field_kernel.f90:50

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

CMOVGE: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/reset_field_kernel.f90:60
CMOVLE: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/reset_field_kernel.f90:50
IDIV: 2 occurrences►
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/reset_field_kernel.f90:48
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/reset_field_kernel.f90:58

Conversion instructions

Detected expensive conversion instructions.

Details

CLTD: 2 occurrences►
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/reset_field_kernel.f90:48
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/reset_field_kernel.f90:58

Workaround

Avoid mixing data with different types. In particular, check if the type of constants is the same as array elements.

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 397 bytes. The binary function is storing 185 bytes.

General properties

nb instructions	237
nb uops	233
loop length	1001
used x86 registers	16
used mmx registers	0
used xmm registers	7
used ymm registers	0
used zmm registers	0
nb stack references	22

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	29.13 cycles
front end	29.13 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	16.00	16.00	16.00	16.00	16.00	16.00	23.50	23.50	23.50	23.50	0.00	0.00	0.00	0.00	4.00	4.00
cycles	16.00	16.00	16.00	16.00	16.00	16.00	23.50	23.50	23.50	23.50	0.00	0.00	0.00	0.00	4.00	4.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

12.00

Cycles summary

Front-end	29.13
Dispatch	23.50
DIV/SQRT	12.00
Overall L1	29.13

Vectorization ratios

all	3%
load	0%
store	0%
mul	0%
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	0%
other	7%

Vector efficiency ratios

all	9%
load	10%
store	8%
mul	10%
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	6%
other	9%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 29.13 cycles. At this rate:

5% of peak load performance is reached (13.63 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
4% of peak store performance is reached (6.35 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

ASM code

In the binary file, the address of the function is: 43b1b0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %RDI,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
AND $-0x40,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB $0xc0,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0xd0(%RDI),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0xc8(%RDI),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0xc0(%RDI),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0xb8(%RDI),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0xb0(%RDI),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0xa8(%RDI),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0xa0(%RDI),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0xd8(%RDI),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x10(%RDI),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RDX,0x90(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RCX,0x58(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RSI,0x88(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R8,0x48(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R9,0x80(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R10,0x40(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R11,0x78(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RAX,0x60(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV (%RDI),%R15D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
CALL 402370 <@plt_start@+0x350>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV %EAX,%R13D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %EAX,0x68(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
CALL 4022e0 <@plt_start@+0x2c0>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV %EAX,%R12D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
MOV 0x18(%RBX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%EAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
INC %EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB %R15D,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CLTD																				scal (6.3%)
IDIV %R13D	2	0	0	0	2	0	0	0	0	0	0	0	0	0	0	0	0	9-14	6	scal (6.3%)
CMP %EDX,%R12D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
JL 43bdb8 <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0+0xc08>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV %EAX,%ECX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
IMUL %R12D,%ECX	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	scal (6.3%)
ADD %ECX,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD %EDX,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP %EAX,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
JGE 43b7ab <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0+0x5fb>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV (%RBX),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
VMOVQ 0x70(%RBX),%XMM6	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MOV 0x78(%RBX),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
ADD %R15D,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x8(%RBX),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOVSXD %EDX,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
VMOVQ 0x60(%RBX),%XMM7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVQ 0x90(%RBX),%XMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
ADD %R15D,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
VMOVQ 0x80(%RBX),%XMM9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVQ 0x38(%RBX),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MOV 0x28(%RBX),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %EAX,0xa4(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
VMOVQ 0x30(%RBX),%XMM4	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MOV 0x20(%RBX),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOVSXD (%RSI),%R10	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	N/A
VMOVQ %XMM6,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
MOV (%R8),%EAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x98(%RBX),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
VMOVQ %XMM7,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
IMUL %RCX,%RDI	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	N/A
IMUL %RCX,%RSI	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	N/A
ADD %R10,%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R10D,0x74(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
ADD %RDI,%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x68(%RBX),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
ADD %R10,%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %EAX,0x98(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV %R9,0xb8(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMOVQ %XMM8,%R9	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
INC %EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
IMUL %RCX,%R9	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	N/A
ADD %R10,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD %R9,%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x88(%RBX),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
ADD %RSI,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
VMOVQ %XMM9,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
IMUL %RSI,%RCX	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	scal (12.5%)
MOV 0x98(%RSP),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
ADD %R10,%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD %RCX,%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R10D,%ECX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
CMP %ESI,%R10D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
CMOVLE %EAX,%ECX	2	0.33	0.33	0.33	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	scal (6.3%)
JG 43bdd3 <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0+0xc23>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
SUB %R10D,%ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R12D,0x54(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV %R13,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
VMOVQ %R10,%XMM3	1	0	0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2	1	scal (12.5%)
MOV %ESI,0xa8(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
INC %ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R15,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VMOVQ %XMM0,%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
MOV %ESI,%R14D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
MOV %ESI,%R11D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
AND $0x7,%ESI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R12,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %ESI,0x6c(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV 0xb8(%RSP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
AND $-0x8,%R11D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
MOV %ECX,0x50(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV %R11D,0x70(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV %RBX,0x38(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
SHR $0x3,%R14D	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	scal (6.3%)
SAL $0x6,%R14	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	scal (12.5%)
MOV %R14,0xb0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
MOV 0x54(%RSP),%R12D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (6.3%)
MOV 0x50(%RSP),%ECX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (6.3%)
MOV 0x38(%RSP),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
VZEROUPPER	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
MOV %ECX,%R14D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
MOV %R14D,0xe0(%RBX)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
CALL 402360 <@plt_start@+0x340>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV 0x18(%RBX),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x10(%RBX),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%R8),%EAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RDX),%EDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
ADD $0x2,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB %EDI,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CLTD																				scal (6.3%)
IDIVL 0x68(%RSP)	2	0	0	0	2	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	10-17	6	scal (6.3%)
CMP %EDX,%R12D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
JL 43bdaf <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0+0xbff>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV %R12D,%R9D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
IMUL %EAX,%R9D	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	N/A
ADD %EDX,%R9D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD %R9D,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP %EAX,%R9D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
JGE 43bd40 <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0+0xb90>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV (%RBX),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x80(%RSP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x48(%RSP),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x8(%RBX),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
ADD %EDI,%R9D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD %EDI,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x90(%RSP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x40(%RSP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOVSXD %R9D,%R12	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
MOV %EAX,0x74(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV 0x78(%RSP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
VMOVQ 0x48(%RBX),%XMM4	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVQ 0x58(%RBX),%XMM7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVQ 0x40(%RBX),%XMM6	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MOV %RBX,0x48(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOVB $0,0xa4(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (1.6%)
VMOVQ 0x50(%RBX),%XMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MOVSXD (%R13),%R11	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	scal (6.3%)
IMUL %R12,%RCX	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	scal (12.5%)
MOV 0x88(%RSP),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RSI),%R15D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x60(%RSP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
IMUL %R12,%RAX	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	N/A
IMUL %R12,%RDX	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	N/A
VMOVQ %XMM7,%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVQ %XMM6,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
ADD %R11,%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
IMUL %R13,%R12	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	scal (12.5%)
LEA 0x2(%R15),%R14D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ADD %R11,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD %RCX,%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x58(%RSP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
ADD %R11,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD %RAX,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD %RDX,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R15D,0x54(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV %R14D,0xb0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
VMOVQ %R11,%XMM9	1	0	0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2	1	scal (12.5%)
MOV %R11D,0xb8(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
ADD %R11,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
ADD %R12,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
CMP %R14D,%R11D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
CMOVGE %R11D,%R14D	2	0.33	0.33	0.33	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	scal (6.3%)
SUB %R11D,%R15D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
VMOVQ %XMM4,%R11	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
MOV %R14D,0x70(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
LEA 0x2(%R15),%R14D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %R15D,0x58(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
LEA 0x1(%R15),%R15D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %R14D,%R12D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
MOV %R14D,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
AND $0x7,%R14D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
MOV %R15D,0x6c(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
SHR $0x3,%R12D	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	scal (6.3%)
MOV %R14D,0x60(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
SAL $0x6,%R12	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	scal (12.5%)
AND $-0x8,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R12,0xa8(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %EAX,0x68(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
XCHG %AX,%AX	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
CMPB $0,0xa4(%RSP)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	scal (1.6%)
MOV 0x48(%RSP),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
JE 43bdc1 <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0+0xc11>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV 0xa0(%RSP),%R8D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %R8D,0xe0(%R9)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
VZEROUPPER	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
LEA -0x28(%RBP),%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
RET	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
NOP	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOP	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
INC %EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
XOR %EDX,%EDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
JMP 43b7d0 <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0+0x620>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
INC %EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
XOR %EDX,%EDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
JMP 43b267 <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0+0xb7>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
VZEROUPPER	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
LEA -0x28(%RBP),%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
RET	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
XOR %R10D,%R10D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
TEST %R10B,%R10B	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JNE 43b7a4 <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0+0x5f4>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
JMP 43b7ab <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0+0x5fb>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A

▶Scalability Runs Description

Run 8x1	Number processes: 8Number nodes: 1Run Command: <executable>MPI Command: mpirun -n <number_processes> Dataset: Run Directory: /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/run/oneview_runs/multicore/gcc_7/oneview_run_1740498538OMP_NUM_THREADS: 1I_MPI_PIN_ORDER: bunchOMP_DISPLAY_AFFINITY: TRUEOMP_PROC_BIND: spreadOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEI_MPI_PIN_DOMAIN: autoI_MPI_DEBUG: 4OMP_PLACES: threads
Run 8x8	Number processes: 8Number nodes: 1Run Command: <executable>MPI Command: mpirun -n <number_processes> Dataset: Run Directory: /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/run/oneview_runs/multicore/gcc_7/oneview_run_1740498538OMP_NUM_THREADS: 8I_MPI_PIN_ORDER: bunchOMP_DISPLAY_AFFINITY: TRUEOMP_PROC_BIND: spreadOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEI_MPI_PIN_DOMAIN: autoI_MPI_DEBUG: 4OMP_PLACES: threads
Run 8x12	Number processes: 8Number nodes: 1Run Command: <executable>MPI Command: mpirun -n <number_processes> Dataset: Run Directory: /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/run/oneview_runs/multicore/gcc_7/oneview_run_1740498538OMP_NUM_THREADS: 12I_MPI_PIN_ORDER: bunchOMP_DISPLAY_AFFINITY: TRUEOMP_PROC_BIND: spreadOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEI_MPI_PIN_DOMAIN: autoI_MPI_DEBUG: 4OMP_PLACES: threads
Run 8x16	Number processes: 8Number nodes: 1Run Command: <executable>MPI Command: mpirun -n <number_processes> Dataset: Run Directory: /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/run/oneview_runs/multicore/gcc_7/oneview_run_1740498538OMP_NUM_THREADS: 16I_MPI_PIN_ORDER: bunchOMP_DISPLAY_AFFINITY: TRUEOMP_PROC_BIND: spreadOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEI_MPI_PIN_DOMAIN: autoI_MPI_DEBUG: 4OMP_PLACES: threads
Run 8x20	Number processes: 8Number nodes: 1Run Command: <executable>MPI Command: mpirun -n <number_processes> Dataset: Run Directory: /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/run/oneview_runs/multicore/gcc_7/oneview_run_1740498538OMP_NUM_THREADS: 20I_MPI_PIN_ORDER: bunchOMP_DISPLAY_AFFINITY: TRUEOMP_PROC_BIND: spreadOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEI_MPI_PIN_DOMAIN: autoI_MPI_DEBUG: 4OMP_PLACES: threads
Run 8x24	Number processes: 8Number nodes: 1Run Command: <executable>MPI Command: mpirun -n <number_processes> Dataset: Run Directory: /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/run/oneview_runs/multicore/gcc_7/oneview_run_1740498538OMP_NUM_THREADS: 24I_MPI_PIN_ORDER: bunchOMP_DISPLAY_AFFINITY: TRUEOMP_PROC_BIND: spreadOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEI_MPI_PIN_DOMAIN: autoI_MPI_DEBUG: 4OMP_PLACES: threads

(8x1) Efficiency	(8x1) Potential Speed-Up (%)	(8x8) Efficiency	(8x8) Potential Speed-Up (%)	(8x12) Efficiency	(8x12) Potential Speed-Up (%)	(8x16) Efficiency	(8x16) Potential Speed-Up (%)	(8x20) Efficiency	(8x20) Potential Speed-Up (%)	(8x24) Efficiency	(8x24) Potential Speed-Up (%)
1	0	0.24	3.69	0.16	4.44	0.12	4.35	0.1	4.29	0.08	4.87

Speed-Up and Efficiency

▶Detailed Speed-Up and Efficiency

Run	Number of threads	Efficiency (ideal is 1)	Speedup	Ideal Speedup	Time (s)	Coverage (%)
8x1	8	1	1	1	3.6850004196167	3.5777432918549
8x8	64	0.24	1.95	8	2.0249996185303	4.8824782371521
8x12	96	0.16	1.88	12	2.0000002384186	5.265013217926
8x16	128	0.12	1.91	16	2.1150007247925	4.9373617172241
8x20	160	0.1	1.93	20	2.1550002098083	4.7451190948486
8x24	192	0.08	1.88	24	2.05499958992	5.2826795578003

Name	Coverage (%)	Time (s)
▼__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0–	3.58	3.67
▼Loop 296 - reset_field_kernel.f90:50-63 - exec–	0.00	0.00
○Loop 297 - reset_field_kernel.f90:62-63 - exec	1.78	1.82
○Loop 298 - reset_field_kernel.f90:50-50 - exec	0.00	0.00
▼Loop 299 - reset_field_kernel.f90:50-53 - exec–	0.00	0.00
○Loop 300 - reset_field_kernel.f90:52-53 - exec	1.79	1.83

Report Configuration

Code clean check

Workaround

Vectorization

Details

Workaround

Execution units bottlenecks

CALL instructions

Details

Complex instructions

Details

Conversion instructions

Details

Workaround

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code

Code clean check

Workaround

Vectorization

Details

Workaround

Execution units bottlenecks

CALL instructions

Details

Complex instructions

Details

Conversion instructions

Details

Workaround

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code

▶Scalability Runs Description

▼Columns Filter

Speed-Up and Efficiency

▶Detailed Speed-Up and Efficiency