OV - exec - Function __nv_pack_kernel_module_clover_pack_message_left__PARALLEL_F2L61

	Function: __nv_pack_kernel_module_clover_pack_message_left__PARALLEL_F2L61_1	Module: exec	Source: pack_kernel.f90:61-68	Coverage (incl. loops): 0.01% \| (excl. loops): 0.00%

/home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/pack_kernel.f90: 61 - 68

--------------------------------------------------------------------------------

61:     !$OMP PARALLEL DO PRIVATE(index)

62:     DO k=y_min-depth,y_max+y_inc+depth

63:     !$OMP SIMD

64:       DO j=1,depth

65:         index= buffer_offset + j+(k+depth-1)*depth

66:         left_snd_buffer(index)=field(x_min+x_inc-1+j,k)

67:       ENDDO

68:     ENDDO

0x2376f0 PUSH	%RBP

0x2376f1 PUSH	%R15

0x2376f3 PUSH	%R14

0x2376f5 PUSH	%R13

0x2376f7 PUSH	%R12

0x2376f9 PUSH	%RBX

0x2376fa SUB	$0x78,%RSP

0x2376fe MOV	%RDX,%R14

0x237701 MOV	(%RDX),%RAX

0x237704 MOV	0x8(%RDX),%RBX

0x237708 MOV	0x10(%RDX),%RDX

0x23770c MOVL	$0,0x34(%RSP)

0x237714 MOV	(%RDI),%ESI

0x237716 MOV	0x18(%R14),%RDI

0x23771a MOV	(%RBX),%ECX

0x23771c MOV	(%RDX),%EBP

0x23771e MOV	(%RAX),%EAX

0x237720 ADD	%ECX,%EBP

0x237722 ADD	(%RDI),%EBP

0x237724 SUB	%ECX,%EAX

0x237726 MOVL	$0x1,0x30(%RSP)

0x23772e MOV	%EAX,0xc(%RSP)

0x237732 MOV	%EBP,0x8(%RSP)

0x237736 SUB	$0x8,%RSP

0x23773a LEA	0x38(%RSP),%RAX

0x23773f LEA	0x3c(%RSP),%RCX

0x237744 LEA	0x14(%RSP),%R8

0x237749 LEA	0x10(%RSP),%R9

0x23774e XOR	%EDI,%EDI

0x237750 MOV	%ESI,0x2c(%RSP)

0x237754 MOV	$0x22,%EDX

0x237759 PUSH	$0x1

0x23775b PUSH	$0x1

0x23775d PUSH	%RAX

0x23775e CALL	27ccb0 <@plt_start@+0xa0>

0x237763 ADD	$0x20,%RSP

0x237767 MOVSXD	0xc(%RSP),%RAX

0x23776c CMP	%EBP,%EAX

0x23776e JG	237a0d

0x237774 MOVSXD	0x8(%RSP),%RCX

0x237779 MOV	%RCX,0x70(%RSP)

0x23777e CMP	%EAX,%ECX

0x237780 JL	237a0d

0x237786 MOV	(%RBX),%EDX

0x237788 TEST	%EDX,%EDX

0x23778a JLE	237a0d

0x237790 MOV	0x20(%R14),%RCX

0x237794 MOV	0x28(%R14),%RSI

0x237798 MOV	0x50(%R14),%RDI

0x23779c LEA	-0x1(%RDX),%R11

0x2377a0 MOV	(%RCX),%R15D

0x2377a3 MOV	0xa0(%R14),%RCX

0x2377aa MOV	(%RCX),%R8D

0x2377ad MOV	0xa8(%R14),%RCX

0x2377b4 MOV	(%RCX),%EBX

0x2377b6 MOV	0x80(%R14),%RCX

0x2377bd MOV	(%RCX),%RCX

0x2377c0 MOV	%RCX,0x68(%RSP)

0x2377c5 MOV	0x98(%R14),%RCX

0x2377cc MOV	(%RCX),%R9

0x2377cf MOV	0x48(%R14),%RCX

0x2377d3 LEA	-0x1(%RDX,%RAX,1),%R14D

0x2377d8 IMUL	%EDX,%R14D

0x2377dc MOV	(%RCX),%R10

0x2377df LEA	(%R8,%RBX,1),%ECX

0x2377e3 LEA	-0x1(%R8,%RBX,1),%R8D

0x2377e8 LEA	(%R15,%R14,1),%EBP

0x2377ec LEA	0x1(%R15,%R14,1),%R14D

0x2377f1 LEA	0x1(%RDX),%RBX

0x2377f5 MOV	%RCX,0x18(%RSP)

0x2377fa ADD	%R11D,%ECX

0x2377fd MOV	%RBX,0x58(%RSP)

0x237802 MOV	%ECX,0x28(%RSP)

0x237806 MOV	%EDX,%ECX

0x237808 AND	$-0x20,%ECX

0x23780b MOV	%R8,0x60(%RSP)

0x237810 MOV	%R14D,0x2c(%RSP)

0x237815 MOV	%R14D,%EBX

0x237818 MOV	%RCX,0x10(%RSP)

0x23781d INC	%RCX

0x237820 MOV	%RCX,0x38(%RSP)

0x237825 MOV	%EDX,%ECX

0x237827 AND	$-0x4,%ECX

0x23782a MOV	%RCX,%R8

0x23782d NEG	%R8

0x237830 MOV	%RCX,0x50(%RSP)

0x237835 INC	%RCX

0x237838 MOV	%R8,0x48(%RSP)

0x23783d XOR	%R8D,%R8D

0x237840 MOV	%RCX,0x40(%RSP)

0x237845 JMP	237869

0x237847 NOPW	(%RAX,%RAX,1)

(332) 0x237850 LEA	0x1(%RAX),%RCX

(332) 0x237854 INC	%R8D

(332) 0x237857 ADD	%EDX,%EBX

(332) 0x237859 ADD	%EDX,%EBP

(332) 0x23785b CMP	0x70(%RSP),%RAX

(332) 0x237860 MOV	%RCX,%RAX

(332) 0x237863 JE	237a0d

(332) 0x237869 MOV	0x68(%RSP),%R15

(332) 0x23786e MOV	$0x1,%R12D

(332) 0x237874 IMUL	%RAX,%R15

(332) 0x237878 CMP	$0x4,%EDX

(332) 0x23787b JB	2379c0

(332) 0x237881 MOV	%R11,%R14

(332) 0x237884 SHR	$0x20,%R14

(332) 0x237888 JNE	2379c0

(332) 0x23788e MOV	%EDX,%R14D

(332) 0x237891 IMUL	%R8D,%R14D

(332) 0x237895 ADD	0x2c(%RSP),%R14D

(332) 0x23789a LEA	(%R14,%R11,1),%R13D

(332) 0x23789e CMP	%R14D,%R13D

(332) 0x2378a1 JL	2379c0

(332) 0x2378a7 MOV	0x28(%RSP),%ECX

(332) 0x2378ab CMP	%ECX,0x18(%RSP)

(332) 0x2378af JG	2379c0

(332) 0x2378b5 CMP	$0x20,%EDX

(332) 0x2378b8 JAE	2378c2

(332) 0x2378ba XOR	%R13D,%R13D

(332) 0x2378bd JMP	237961

(332) 0x2378c2 MOV	0x10(%RSP),%R12

(332) 0x2378c7 MOV	0x18(%RSP),%R14

(332) 0x2378cc MOV	%EBX,%R13D

(332) 0x2378cf NOP

  (333) 0x2378d0 MOVSXD	%R14D,%R14

  (333) 0x2378d3 MOVSXD	%R13D,%R13

  (333) 0x2378d6 LEA	(%R15,%R14,1),%RCX

  (333) 0x2378da ADD	$0x20,%R14D

  (333) 0x2378de ADD	%R9,%RCX

  (333) 0x2378e1 VMOVUPS	-0x8(%RDI,%RCX,8),%ZMM0

  (333) 0x2378ec VMOVUPS	0x38(%RDI,%RCX,8),%ZMM1

  (333) 0x2378f7 VMOVUPS	0x78(%RDI,%RCX,8),%ZMM2

  (333) 0x237902 VMOVUPS	0xb8(%RDI,%RCX,8),%ZMM3

  (333) 0x23790d LEA	(%R10,%R13,1),%RCX

  (333) 0x237911 ADD	$0x20,%R13D

  (333) 0x237915 ADD	$-0x20,%R12

  (333) 0x237919 VMOVUPS	%ZMM0,-0x8(%RSI,%RCX,8)

  (333) 0x237924 VMOVUPS	%ZMM1,0x38(%RSI,%RCX,8)

  (333) 0x23792f VMOVUPS	%ZMM2,0x78(%RSI,%RCX,8)

  (333) 0x23793a VMOVUPS	%ZMM3,0xb8(%RSI,%RCX,8)

  (333) 0x237945 JNE	2378d0

(332) 0x237947 CMP	%RDX,0x10(%RSP)

(332) 0x23794c JE	237850

(332) 0x237952 MOV	0x10(%RSP),%R13

(332) 0x237957 MOV	0x38(%RSP),%R12

(332) 0x23795c TEST	$0x1c,%DL

(332) 0x23795f JE	2379c0

(332) 0x237961 MOV	0x18(%RSP),%RCX

(332) 0x237966 LEA	(%RBX,%R13,1),%R14D

(332) 0x23796a LEA	(%RCX,%R13,1),%R12D

(332) 0x23796e ADD	0x48(%RSP),%R13

(332) 0x237973 NOPW	%CS:(%RAX,%RAX,1)

  (334) 0x237980 MOVSXD	%R12D,%R12

  (334) 0x237983 MOVSXD	%R14D,%R14

  (334) 0x237986 LEA	(%R15,%R12,1),%RCX

  (334) 0x23798a ADD	$0x4,%R12D

  (334) 0x23798e ADD	%R9,%RCX

  (334) 0x237991 VMOVUPS	-0x8(%RDI,%RCX,8),%YMM0

  (334) 0x237997 LEA	(%R10,%R14,1),%RCX

  (334) 0x23799b ADD	$0x4,%R14D

  (334) 0x23799f ADD	$0x4,%R13

  (334) 0x2379a3 VMOVUPS	%YMM0,-0x8(%RSI,%RCX,8)

  (334) 0x2379a9 JNE	237980

(332) 0x2379ab MOV	0x40(%RSP),%R12

(332) 0x2379b0 CMP	%RDX,0x50(%RSP)

(332) 0x2379b5 JE	237850

(332) 0x2379bb NOPL	(%RAX,%RAX,1)

(332) 0x2379c0 MOV	0x58(%RSP),%R13

(332) 0x2379c5 MOV	0x60(%RSP),%RCX

(332) 0x2379ca SUB	%R12,%R13

(332) 0x2379cd LEA	(%RCX,%R12,1),%R14D

(332) 0x2379d1 ADD	%EBP,%R12D

(332) 0x2379d4 NOPW	%CS:(%RAX,%RAX,1)

  (331) 0x2379e0 MOVSXD	%R14D,%R14

  (331) 0x2379e3 MOVSXD	%R12D,%R12

  (331) 0x2379e6 LEA	(%R15,%R14,1),%RCX

  (331) 0x2379ea INC	%R14D

  (331) 0x2379ed ADD	%R9,%RCX

  (331) 0x2379f0 VMOVSD	-0x8(%RDI,%RCX,8),%XMM0

  (331) 0x2379f6 LEA	(%R10,%R12,1),%RCX

  (331) 0x2379fa INC	%R12D

  (331) 0x2379fd DEC	%R13

  (331) 0x237a00 VMOVSD	%XMM0,-0x8(%RSI,%RCX,8)

  (331) 0x237a06 JNE	2379e0

(332) 0x237a08 JMP	237850

0x237a0d MOV	0x24(%RSP),%ESI

0x237a11 XOR	%EDI,%EDI

0x237a13 VZEROUPPER

0x237a16 CALL	27ccc0 <@plt_start@+0xb0>

0x237a1b ADD	$0x78,%RSP

0x237a1f POP	%RBX

0x237a20 POP	%R12

0x237a22 POP	%R13

0x237a24 POP	%R14

0x237a26 POP	%R15

0x237a28 POP	%RBP

0x237a29 RET

0x237a2a NOPW	(%RAX,%RAX,1)

Coverage (%)	Name	Source Location	Module

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run aocc_10

Source file and lines	pack_kernel.f90:61-68
Module	exec

The function is defined in /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/pack_kernel.f90:61-68.

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Vectorization

Your function is probably not vectorized. Only 9% of vector register length is used (average across all SSE/AVX instructions). By vectorizing your function, you can lower the cost of an iteration from 13.50 to 0.97 cycles (13.88x speedup).

Details

Store and arithmetical SSE/AVX instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): do i a(i)%x = b(i)%x (slow, non stride 1) => do i a%x(i) = b%x(i) (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

unknown: 2 occurrences►
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/pack_kernel.f90:62
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/pack_kernel.f90:68

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

LEA: 3 occurrences►
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/pack_kernel.f90:67
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/pack_kernel.f90:67
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/pack_kernel.f90:67

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 168 bytes. The binary function is storing 108 bytes.

General properties

nb instructions	105
nb uops	108
loop length	387
used x86 registers	16
used mmx registers	0
used xmm registers	0
used ymm registers	0
used zmm registers	0
nb stack references	19

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	13.50 cycles
front end	13.50 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	6.33	6.33	6.33	6.33	6.33	6.33	12.25	12.25	12.25	12.25	0.00	0.00	0.00	0.00	0.00	0.00
cycles	6.33	6.33	6.33	6.33	6.33	6.33	12.25	12.25	12.25	12.25	0.00	0.00	0.00	0.00	0.00	0.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	13.50
Dispatch	12.25
Overall L1	13.50

Vectorization ratios

all	3%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	25%

Vector efficiency ratios

all	9%
load	8%
store	9%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	6%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	10%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 13.50 cycles. At this rate:

4% of peak load performance is reached (12.44 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
6% of peak store performance is reached (8.00 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Performance is limited by instruction throughput (loading/decoding program instructions to execution core) (front-end is a bottleneck). By removing all these bottlenecks, you can lower the cost of an iteration from 13.50 to 12.25 cycles (1.10x speedup).

ASM code

In the binary file, the address of the function is: 2376f0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB $0x78,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV %RDX,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV (%RDX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0x8(%RDX),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0x10(%RDX),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOVL $0,0x34(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
MOV (%RDI),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (6.3%)
MOV 0x18(%R14),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV (%RBX),%ECX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV (%RDX),%EBP	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (6.3%)
MOV (%RAX),%EAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
ADD %ECX,%EBP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
ADD (%RDI),%EBP	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	1	0.25	scal (6.3%)
SUB %ECX,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOVL $0x1,0x30(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
MOV %EAX,0xc(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
MOV %EBP,0x8(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
SUB $0x8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
LEA 0x38(%RSP),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA 0x3c(%RSP),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA 0x14(%RSP),%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA 0x10(%RSP),%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
XOR %EDI,%EDI	1	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV %ESI,0x2c(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
MOV $0x22,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RAX	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CALL 27ccb0 <@plt_start@+0xa0>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0.50	N/A
ADD $0x20,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOVSXD 0xc(%RSP),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	1	0.25	N/A
CMP %EBP,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
JG 237a0d <__nv_pack_kernel_module_clover_pack_message_left__PARALLEL_F2L61_1_+0x31d>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOVSXD 0x8(%RSP),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	1	0.25	N/A
MOV %RCX,0x70(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
CMP %EAX,%ECX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
JL 237a0d <__nv_pack_kernel_module_clover_pack_message_left__PARALLEL_F2L61_1_+0x31d>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV (%RBX),%EDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
TEST %EDX,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
JLE 237a0d <__nv_pack_kernel_module_clover_pack_message_left__PARALLEL_F2L61_1_+0x31d>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV 0x20(%R14),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0x28(%R14),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (12.5%)
MOV 0x50(%R14),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
LEA -0x1(%RDX),%R11	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
MOV (%RCX),%R15D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0xa0(%R14),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV (%RCX),%R8D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0xa8(%R14),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV (%RCX),%EBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0x80(%R14),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV (%RCX),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RCX,0x68(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x98(%R14),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV (%RCX),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (12.5%)
MOV 0x48(%R14),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
LEA -0x1(%RDX,%RAX,1),%R14D	2	0	0	0.50	0.50	0	0	0.25	0.25	0.25	0.25	2	0.50	N/A
IMUL %EDX,%R14D	1	0.33	0.33	0.33	0	0	0	0	0	0	0	3	0.33	N/A
MOV (%RCX),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (12.5%)
LEA (%R8,%RBX,1),%ECX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA -0x1(%R8,%RBX,1),%R8D	2	0	0	0.50	0.50	0	0	0.25	0.25	0.25	0.25	2	0.50	N/A
LEA (%R15,%R14,1),%EBP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA 0x1(%R15,%R14,1),%R14D	2	0	0	0.50	0.50	0	0	0.25	0.25	0.25	0.25	2	0.50	N/A
LEA 0x1(%RDX),%RBX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
MOV %RCX,0x18(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
ADD %R11D,%ECX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV %RBX,0x58(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %ECX,0x28(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
MOV %EDX,%ECX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
AND $-0x20,%ECX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV %R8,0x60(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %R14D,0x2c(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
MOV %R14D,%EBX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RCX,0x10(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
INC %RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV %RCX,0x38(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %EDX,%ECX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
AND $-0x4,%ECX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV %RCX,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NEG %R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV %RCX,0x50(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
INC %RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV %R8,0x48(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
XOR %R8D,%R8D	1	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV %RCX,0x40(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
JMP 237869 <__nv_pack_kernel_module_clover_pack_message_left__PARALLEL_F2L61_1_+0x179>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	1	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
MOV 0x24(%RSP),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (6.3%)
XOR %EDI,%EDI	1	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
VZEROUPPER	1	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 27ccc0 <@plt_start@+0xb0>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0.50	N/A
ADD $0x78,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
RET	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run aocc_10

Source file and lines	pack_kernel.f90:61-68
Module	exec

The function is defined in /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/pack_kernel.f90:61-68.

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Vectorization

Details

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): do i a(i)%x = b(i)%x (slow, non stride 1) => do i a%x(i) = b%x(i) (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

unknown: 2 occurrences►
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/pack_kernel.f90:62
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/pack_kernel.f90:68

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

LEA: 3 occurrences►
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/pack_kernel.f90:67
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/pack_kernel.f90:67
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/pack_kernel.f90:67

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 168 bytes. The binary function is storing 108 bytes.

General properties

nb instructions	105
nb uops	108
loop length	387
used x86 registers	16
used mmx registers	0
used xmm registers	0
used ymm registers	0
used zmm registers	0
nb stack references	19

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	13.50 cycles
front end	13.50 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	6.33	6.33	6.33	6.33	6.33	6.33	12.25	12.25	12.25	12.25	0.00	0.00	0.00	0.00	0.00	0.00
cycles	6.33	6.33	6.33	6.33	6.33	6.33	12.25	12.25	12.25	12.25	0.00	0.00	0.00	0.00	0.00	0.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	13.50
Dispatch	12.25
Overall L1	13.50

Vectorization ratios

all	3%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	25%

Vector efficiency ratios

all	9%
load	8%
store	9%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	6%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	10%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 13.50 cycles. At this rate:

4% of peak load performance is reached (12.44 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
6% of peak store performance is reached (8.00 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

ASM code

In the binary file, the address of the function is: 2376f0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB $0x78,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV %RDX,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV (%RDX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0x8(%RDX),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0x10(%RDX),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOVL $0,0x34(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
MOV (%RDI),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (6.3%)
MOV 0x18(%R14),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV (%RBX),%ECX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV (%RDX),%EBP	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (6.3%)
MOV (%RAX),%EAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
ADD %ECX,%EBP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
ADD (%RDI),%EBP	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	1	0.25	scal (6.3%)
SUB %ECX,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOVL $0x1,0x30(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
MOV %EAX,0xc(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
MOV %EBP,0x8(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
SUB $0x8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
LEA 0x38(%RSP),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA 0x3c(%RSP),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA 0x14(%RSP),%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA 0x10(%RSP),%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
XOR %EDI,%EDI	1	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV %ESI,0x2c(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
MOV $0x22,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RAX	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CALL 27ccb0 <@plt_start@+0xa0>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0.50	N/A
ADD $0x20,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOVSXD 0xc(%RSP),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	1	0.25	N/A
CMP %EBP,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
JG 237a0d <__nv_pack_kernel_module_clover_pack_message_left__PARALLEL_F2L61_1_+0x31d>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOVSXD 0x8(%RSP),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	1	0.25	N/A
MOV %RCX,0x70(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
CMP %EAX,%ECX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
JL 237a0d <__nv_pack_kernel_module_clover_pack_message_left__PARALLEL_F2L61_1_+0x31d>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV (%RBX),%EDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
TEST %EDX,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
JLE 237a0d <__nv_pack_kernel_module_clover_pack_message_left__PARALLEL_F2L61_1_+0x31d>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV 0x20(%R14),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0x28(%R14),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (12.5%)
MOV 0x50(%R14),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
LEA -0x1(%RDX),%R11	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
MOV (%RCX),%R15D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0xa0(%R14),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV (%RCX),%R8D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0xa8(%R14),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV (%RCX),%EBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0x80(%R14),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV (%RCX),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RCX,0x68(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x98(%R14),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV (%RCX),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (12.5%)
MOV 0x48(%R14),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
LEA -0x1(%RDX,%RAX,1),%R14D	2	0	0	0.50	0.50	0	0	0.25	0.25	0.25	0.25	2	0.50	N/A
IMUL %EDX,%R14D	1	0.33	0.33	0.33	0	0	0	0	0	0	0	3	0.33	N/A
MOV (%RCX),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (12.5%)
LEA (%R8,%RBX,1),%ECX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA -0x1(%R8,%RBX,1),%R8D	2	0	0	0.50	0.50	0	0	0.25	0.25	0.25	0.25	2	0.50	N/A
LEA (%R15,%R14,1),%EBP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA 0x1(%R15,%R14,1),%R14D	2	0	0	0.50	0.50	0	0	0.25	0.25	0.25	0.25	2	0.50	N/A
LEA 0x1(%RDX),%RBX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
MOV %RCX,0x18(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
ADD %R11D,%ECX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV %RBX,0x58(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %ECX,0x28(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
MOV %EDX,%ECX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
AND $-0x20,%ECX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV %R8,0x60(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %R14D,0x2c(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
MOV %R14D,%EBX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RCX,0x10(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
INC %RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV %RCX,0x38(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %EDX,%ECX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
AND $-0x4,%ECX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV %RCX,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NEG %R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV %RCX,0x50(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
INC %RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV %R8,0x48(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
XOR %R8D,%R8D	1	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV %RCX,0x40(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
JMP 237869 <__nv_pack_kernel_module_clover_pack_message_left__PARALLEL_F2L61_1_+0x179>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	1	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
MOV 0x24(%RSP),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (6.3%)
XOR %EDI,%EDI	1	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
VZEROUPPER	1	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 27ccc0 <@plt_start@+0xb0>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0.50	N/A
ADD $0x78,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
RET	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A

Name	Coverage (%)	Time (s)
▼__nv_pack_kernel_module_clover_pack_message_left__PARALLEL_F2L61_1–	0.01	0.00
▼Loop 332 - pack_kernel.f90:66-68 - exec–	0.00	0.00
○Loop 331 - pack_kernel.f90:66-67 - exec	0.01	0.01
○Loop 333 - pack_kernel.f90:66-66 - exec	0.00	0.00
○Loop 334 - pack_kernel.f90:66-66 - exec	0.00	0.00

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