OV - exec - Function __nv_accelerate_kernel_module_accelerate_kernel__PARALLEL_F2L57

	Function: __nv_accelerate_kernel_module_accelerate_kernel__PARALLEL_F2L57_1	Module: exec	Source: accelerate_kernel.f90:57-81 [...]	Coverage (incl. loops): 5.30% \| (excl. loops): 0.00%

/home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/accelerate_kernel.f90: 57 - 81

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57:     !$OMP PARALLEL

58:

59:     !$OMP DO PRIVATE(j,k,stepbymass_s)

60:     DO k=y_min,y_max+1

61:     !$OMP SIMD

62:       DO j=x_min,x_max+1

63:         stepbymass_s=halfdt/((density0(j-1,k-1)*volume(j-1,k-1)  &

[...]

69:         xvel1(j,k)=xvel0(j,k)-stepbymass_s*(xarea(j  ,k  )*(pressure(j  ,k  )-pressure(j-1,k  ))    &

70:           +xarea(j  ,k-1)*(pressure(j  ,k-1)-pressure(j-1,k-1)))

71:         yvel1(j,k)=yvel0(j,k)-stepbymass_s*(yarea(j  ,k  )*(pressure(j  ,k  )-pressure(j  ,k-1))    &

72:           +yarea(j-1,k  )*(pressure(j-1,k  )-pressure(j-1,k-1)))

73:         xvel1(j,k)=xvel1(j,k)-stepbymass_s*(xarea(j  ,k  )*(viscosity(j  ,k  )-viscosity(j-1,k  )) &

74:           +xarea(j  ,k-1)*(viscosity(j  ,k-1)-viscosity(j-1,k-1)))

75:         yvel1(j,k)=yvel1(j,k)-stepbymass_s*(yarea(j  ,k  )*(viscosity(j  ,k  )-viscosity(j  ,k-1)) &

76:           +yarea(j-1,k  )*(viscosity(j-1,k  )-viscosity(j-1,k-1)))

77:       ENDDO

78:     ENDDO

79:   !$OMP END DO

80:

81:   !$OMP END PARALLEL

0x223aa0 PUSH	%RBP

0x223aa1 PUSH	%R15

0x223aa3 PUSH	%R14

0x223aa5 PUSH	%R13

0x223aa7 PUSH	%R12

0x223aa9 PUSH	%RBX

0x223aaa SUB	$0x158,%RSP

0x223ab1 MOV	0x8(%RDX),%RCX

0x223ab5 MOV	(%RDX),%RAX

0x223ab8 MOVL	$0,0xe4(%RSP)

0x223ac3 MOV	(%RDI),%ESI

0x223ac5 MOV	%RDX,%R14

0x223ac8 MOV	(%RCX),%EBX

0x223aca MOV	(%RAX),%EAX

0x223acc MOVL	$0x1,0xe0(%RSP)

0x223ad7 INC	%EBX

0x223ad9 MOV	%EAX,0x1c(%RSP)

0x223add MOV	%EBX,0x18(%RSP)

0x223ae1 SUB	$0x8,%RSP

0x223ae5 MOV	$0x22,%EDX

0x223aea LEA	0xe8(%RSP),%RAX

0x223af2 LEA	0xec(%RSP),%RCX

0x223afa LEA	0x24(%RSP),%R8

0x223aff LEA	0x20(%RSP),%R9

0x223b04 XOR	%EDI,%EDI

0x223b06 MOV	%ESI,0xe4(%RSP)

0x223b0d PUSH	$0x1

0x223b0f PUSH	$0x1

0x223b11 PUSH	%RAX

0x223b12 CALL	27ccb0 <@plt_start@+0xa0>

0x223b17 ADD	$0x20,%RSP

0x223b1b MOVSXD	0x1c(%RSP),%RDX

0x223b20 CMP	%EBX,%EDX

0x223b22 JG	2244af

0x223b28 MOVSXD	0x18(%RSP),%RAX

0x223b2d MOV	%RAX,0x150(%RSP)

0x223b35 CMP	%EDX,%EAX

0x223b37 JL	2244af

0x223b3d MOV	0x18(%R14),%RCX

0x223b41 MOV	0x10(%R14),%RAX

0x223b45 MOV	%RDX,0x8(%RSP)

0x223b4a MOVSXD	(%RCX),%RCX

0x223b4d MOVSXD	(%RAX),%RDX

0x223b50 MOV	%ECX,%EAX

0x223b52 SUB	%EDX,%EAX

0x223b54 MOV	%RDX,0x120(%RSP)

0x223b5c MOV	0x8(%RSP),%RDX

0x223b61 MOV	%RCX,0xd0(%RSP)

0x223b69 ADD	$0x2,%EAX

0x223b6c TEST	%EAX,%EAX

0x223b6e JLE	2244af

0x223b74 MOV	%R14,%R8

0x223b77 MOV	0x38(%R14),%RAX

0x223b7b MOV	0x70(%R8),%RCX

0x223b7f MOV	0x120(%RSP),%RBX

0x223b87 MOV	0x20(%R14),%R12

0x223b8b MOV	0xc8(%R8),%R11

0x223b92 MOV	0x68(%R8),%RBP

0x223b96 MOV	0xf0(%R8),%R13

0x223b9d VBROADCASTSD	-0x21d66(%RIP),%YMM1

0x223ba6 VBROADCASTSD	-0x21d70(%RIP),%ZMM3

0x223bb0 VMOVSD	-0x21d78(%RIP),%XMM2

0x223bb8 MOV	(%RAX),%RDI

0x223bbb MOV	0x60(%R14),%RAX

0x223bbf VBROADCASTSD	(%RCX),%ZMM0

0x223bc5 MOV	0x88(%R8),%RCX

0x223bcc MOV	(%RCX),%R9

0x223bcf MOV	(%RAX),%R14

0x223bd2 LEA	-0x1(%RDX),%RCX

0x223bd6 MOV	%RDI,%R15

0x223bd9 IMUL	%RCX,%R15

0x223bdd LEA	(%R15,%RBX,1),%RDX

0x223be1 SAL	$0x3,%R15

0x223be5 SUB	%R14,%RDX

0x223be8 LEA	(,%R9,8),%RAX

0x223bf0 LEA	(%R11,%RDX,8),%R10

0x223bf4 LEA	(%R13,%RDX,8),%RSI

0x223bf9 MOV	%RAX,0x148(%RSP)

0x223c01 LEA	(%RBP,%RDX,8),%RAX

0x223c06 MOV	%R10,0xa8(%RSP)

0x223c0e MOV	%R9,%R10

0x223c11 IMUL	%RCX,%R9

0x223c15 LEA	(%R12,%RDX,8),%RCX

0x223c19 MOV	%RSI,0xc8(%RSP)

0x223c21 MOV	%R12,%RSI

0x223c24 IMUL	0x8(%RSP),%R10

0x223c2a MOV	%RAX,0x78(%RSP)

0x223c2f MOV	0xe0(%R8),%RAX

0x223c36 MOV	%RCX,0x98(%RSP)

0x223c3e LEA	(,%RDI,8),%RCX

0x223c46 IMUL	0x8(%RSP),%RDI

0x223c4c MOV	%RCX,0x140(%RSP)

0x223c54 LEA	(%RDI,%RBX,1),%RCX

0x223c58 SAL	$0x3,%RDI

0x223c5c SUB	%R14,%RCX

0x223c5f SAL	$0x3,%R14

0x223c63 LEA	(%R13,%RCX,8),%RDX

0x223c68 LEA	(%R11,%RCX,8),%R12

0x223c6c SUB	%R14,%R15

0x223c6f SUB	%R14,%RDI

0x223c72 LEA	(%RBP,%R15,1),%R14

0x223c77 MOV	%RDX,0x70(%RSP)

0x223c7c LEA	(%RAX,%RCX,8),%RDX

0x223c80 MOV	%R12,0x90(%RSP)

0x223c88 MOV	%RAX,%R12

0x223c8b LEA	(%RSI,%RCX,8),%RAX

0x223c8f ADD	%RDI,%R12

0x223c92 MOV	%RAX,0x60(%RSP)

0x223c97 LEA	(%RBP,%RCX,8),%RAX

0x223c9c MOV	%RDX,0x68(%RSP)

0x223ca1 MOV	%RSI,%RDX

0x223ca4 LEA	(%R13,%R15,1),%RSI

0x223ca9 ADD	%RDI,%R13

0x223cac ADD	%RDI,%RBP

0x223caf MOV	%RSI,0x40(%RSP)

0x223cb4 LEA	(%R11,%R15,1),%RSI

0x223cb8 ADD	%RDI,%R11

0x223cbb ADD	%RDX,%R15

0x223cbe ADD	%RDX,%RDI

0x223cc1 LEA	(%R10,%RBX,1),%RDX

0x223cc5 SAL	$0x3,%R10

0x223cc9 MOV	%RBP,0x30(%RSP)

0x223cce MOV	0xd0(%R8),%RBP

0x223cd5 MOV	%R13,0x20(%RSP)

0x223cda MOV	%RAX,0x58(%RSP)

0x223cdf MOV	0xa8(%R8),%RAX

0x223ce6 MOV	%R11,0x28(%RSP)

0x223ceb MOV	(%RAX),%RCX

0x223cee LEA	(%R9,%RBX,1),%RAX

0x223cf2 SAL	$0x3,%R9

0x223cf6 SUB	%RCX,%RAX

0x223cf9 SUB	%RCX,%RDX

0x223cfc SAL	$0x3,%RCX

0x223d00 MOV	%RAX,0x50(%RSP)

0x223d05 MOV	0x78(%R8),%RAX

0x223d09 SUB	%RCX,%R10

0x223d0c SUB	%RCX,%R9

0x223d0f MOV	0xb8(%R8),%RCX

0x223d16 MOV	%RAX,0x48(%RSP)

0x223d1b MOV	0xb0(%R8),%RAX

0x223d22 MOV	0xd8(%R8),%R8

0x223d29 ADD	%RCX,%R9

0x223d2c LEA	(%R8,%RDX,8),%R11

0x223d30 ADD	%R10,%R8

0x223d33 LEA	(%RAX,%RDX,8),%R13

0x223d37 ADD	%R10,%RAX

0x223d3a MOV	%R8,0x38(%RSP)

0x223d3f MOV	%R11,0xc0(%RSP)

0x223d47 LEA	(%RBP,%RDX,8),%R11

0x223d4c MOV	%R13,0xb0(%RSP)

0x223d54 ADD	%R10,%RBP

0x223d57 LEA	(%RCX,%R10,1),%R13

0x223d5b MOV	%R11,0xb8(%RSP)

0x223d63 MOV	0x48(%RSP),%R11

0x223d68 LEA	(%R11,%RDX,8),%R8

0x223d6c ADD	%R11,%R10

0x223d6f MOV	0xd0(%RSP),%R11

0x223d77 LEA	(%RCX,%RDX,8),%RDX

0x223d7b MOV	%R8,0xa0(%RSP)

0x223d83 MOV	0x50(%RSP),%R8

0x223d88 MOV	%RDX,0x88(%RSP)

0x223d90 MOV	0x8(%RSP),%RDX

0x223d95 INC	%R11

0x223d98 MOV	%R11,0xd0(%RSP)

0x223da0 LEA	(%RCX,%R8,8),%R8

0x223da4 MOV	%R8,0x80(%RSP)

0x223dac MOV	%R11,%R8

0x223daf SUB	%RBX,%R8

0x223db2 INC	%R8

0x223db5 MOV	%R8,%R11

0x223db8 AND	$-0x8,%R11

0x223dbc MOV	%R8,%RCX

0x223dbf MOV	%R8,0x10(%RSP)

0x223dc4 AND	$-0x4,%R8

0x223dc8 LEA	(%R11,%RBX,1),%RCX

0x223dcc MOV	%R8,0x138(%RSP)

0x223dd4 ADD	%RBX,%R8

0x223dd7 MOV	%R11,0xe8(%RSP)

0x223ddf MOV	%RCX,0x128(%RSP)

0x223de7 MOV	%R8,0x130(%RSP)

0x223def JMP	223ee6

0x223df4 NOPW	%CS:(%RAX,%RAX,1)

(49) 0x223e00 MOV	0x140(%RSP),%RDX

(49) 0x223e08 MOV	0x148(%RSP),%RCX

(49) 0x223e10 ADD	%RDX,%R11

(49) 0x223e13 ADD	%RCX,%RAX

(49) 0x223e16 ADD	%RDX,%R12

(49) 0x223e19 ADD	%RDX,%R8

(49) 0x223e1c ADD	%RDX,%RBP

(49) 0x223e1f ADD	%RDX,0xc8(%RSP)

(49) 0x223e27 ADD	%RDX,0xa8(%RSP)

(49) 0x223e2f ADD	%RDX,0x98(%RSP)

(49) 0x223e37 ADD	%RDX,0x78(%RSP)

(49) 0x223e3c ADD	%RDX,0x70(%RSP)

(49) 0x223e41 ADD	%RDX,0x68(%RSP)

(49) 0x223e46 ADD	%RDX,0x90(%RSP)

(49) 0x223e4e ADD	%RDX,0x60(%RSP)

(49) 0x223e53 ADD	%RDX,0x58(%RSP)

(49) 0x223e58 ADD	%RDX,%RSI

(49) 0x223e5b ADD	%RDX,%R14

(49) 0x223e5e ADD	%RDX,%R15

(49) 0x223e61 ADD	%RDX,%RBX

(49) 0x223e64 ADD	%RDX,%RDI

(49) 0x223e67 MOV	0x8(%RSP),%RDX

(49) 0x223e6c ADD	%RCX,0xb8(%RSP)

(49) 0x223e74 ADD	%RCX,0xc0(%RSP)

(49) 0x223e7c ADD	%RCX,0xa0(%RSP)

(49) 0x223e84 ADD	%RCX,0x88(%RSP)

(49) 0x223e8c ADD	%RCX,0xb0(%RSP)

(49) 0x223e94 ADD	%RCX,0x80(%RSP)

(49) 0x223e9c ADD	%RCX,%R13

(49) 0x223e9f ADD	%RCX,%R10

(49) 0x223ea2 ADD	%RCX,%R9

(49) 0x223ea5 MOV	%R11,0x28(%RSP)

(49) 0x223eaa MOV	0x48(%RSP),%R11

(49) 0x223eaf MOV	%RAX,0x38(%RSP)

(49) 0x223eb4 MOV	0x50(%RSP),%RAX

(49) 0x223eb9 MOV	%R12,0x40(%RSP)

(49) 0x223ebe MOV	%R8,0x20(%RSP)

(49) 0x223ec3 MOV	%RBP,0x30(%RSP)

(49) 0x223ec8 MOV	%RBX,%R12

(49) 0x223ecb ADD	%RCX,%R11

(49) 0x223ece ADD	%RCX,%RAX

(49) 0x223ed1 MOV	%R11,%RBP

(49) 0x223ed4 CMP	0x150(%RSP),%RDX

(49) 0x223edc LEA	0x1(%RDX),%RDX

(49) 0x223ee0 JE	2244af

(49) 0x223ee6 MOV	%RBP,0x48(%RSP)

(49) 0x223eeb MOV	%RAX,0x50(%RSP)

(49) 0x223ef0 MOV	%RDX,0x8(%RSP)

(49) 0x223ef5 MOV	%R12,%RBX

(49) 0x223ef8 MOV	0x120(%RSP),%RDX

(49) 0x223f00 CMPQ	$0x4,0x10(%RSP)

(49) 0x223f06 MOV	0x40(%RSP),%R12

(49) 0x223f0b MOV	0x38(%RSP),%RAX

(49) 0x223f10 MOV	0x30(%RSP),%RBP

(49) 0x223f15 MOV	0x28(%RSP),%R11

(49) 0x223f1a MOV	0x20(%RSP),%R8

(49) 0x223f1f JB	224380

(49) 0x223f25 CMPQ	$0x8,0x10(%RSP)

(49) 0x223f2b MOV	%R13,0xf0(%RSP)

(49) 0x223f33 MOV	%R10,0xf8(%RSP)

(49) 0x223f3b MOV	%RBX,0x100(%RSP)

(49) 0x223f43 MOV	%R14,0x108(%RSP)

(49) 0x223f4b MOV	%RSI,0x110(%RSP)

(49) 0x223f53 MOV	%R9,0x118(%RSP)

(49) 0x223f5b JAE	224140

(49) 0x223f61 XOR	%ECX,%ECX

(49) 0x223f63 MOV	0x58(%RSP),%R9

(49) 0x223f68 MOV	0x60(%RSP),%RSI

(49) 0x223f6d MOV	0x78(%RSP),%R12

(49) 0x223f72 MOV	0x70(%RSP),%RAX

(49) 0x223f77 MOV	0x68(%RSP),%R14

(49) 0x223f7c MOV	0x98(%RSP),%RDX

(49) 0x223f84 MOV	0x90(%RSP),%RBX

(49) 0x223f8c MOV	0xa0(%RSP),%R13

(49) 0x223f94 MOV	0x88(%RSP),%RBP

(49) 0x223f9c MOV	0x80(%RSP),%R8

(49) 0x223fa4 MOV	0x138(%RSP),%R10

(49) 0x223fac NOPL	(%RAX)

  (51) 0x223fb0 VMOVUPD	-0x8(%RSI,%RCX,8),%YMM4

  (51) 0x223fb6 VMOVUPD	(%RSI,%RCX,8),%YMM5

  (51) 0x223fbb VMOVUPD	(%RDX,%RCX,8),%YMM7

  (51) 0x223fc0 MOV	0xa8(%RSP),%R11

  (51) 0x223fc8 VMOVUPD	-0x8(%RDX,%RCX,8),%YMM6

  (51) 0x223fce VMOVUPD	(%R8,%RCX,8),%YMM8

  (51) 0x223fd4 VMOVUPD	-0x8(%RBX,%RCX,8),%YMM9

  (51) 0x223fda VMOVUPD	(%RBX,%RCX,8),%YMM10

  (51) 0x223fdf VMOVUPD	(%RBP,%RCX,8),%YMM12

  (51) 0x223fe5 VMOVUPD	-0x8(%RAX,%RCX,8),%YMM16

  (51) 0x223ff0 VMOVUPD	(%RAX,%RCX,8),%YMM14

  (51) 0x223ff5 VMULPD	-0x8(%R9,%RCX,8),%YMM4,%YMM4

  (51) 0x223ffc VFMADD231PD	(%R9,%RCX,8),%YMM5,%YMM4

  (51) 0x224002 VMOVUPD	-0x8(%R11,%RCX,8),%YMM5

  (51) 0x224009 VFMADD231PD	(%R12,%RCX,8),%YMM7,%YMM4

  (51) 0x22400f VSUBPD	%YMM10,%YMM9,%YMM11

  (51) 0x224014 VSUBPD	%YMM14,%YMM16,%YMM15

  (51) 0x22401a VFMADD231PD	-0x8(%R12,%RCX,8),%YMM6,%YMM4

  (51) 0x224021 VMOVUPD	(%R11,%RCX,8),%YMM6

  (51) 0x224027 MOV	0xb0(%RSP),%R11

  (51) 0x22402f VSUBPD	%YMM6,%YMM5,%YMM7

  (51) 0x224033 VSUBPD	%YMM9,%YMM5,%YMM5

  (51) 0x224038 VMOVUPD	(%R14,%RCX,8),%YMM9

  (51) 0x22403e VSUBPD	%YMM10,%YMM6,%YMM6

  (51) 0x224043 VMULPD	%YMM1,%YMM4,%YMM4

  (51) 0x224047 VMULPD	%YMM7,%YMM8,%YMM7

  (51) 0x22404b VFMADD213PD	%YMM7,%YMM12,%YMM11

  (51) 0x224050 VDIVPD	%YMM4,%YMM0,%YMM4

  (51) 0x224054 VMOVUPD	-0x8(%R14,%RCX,8),%YMM7

  (51) 0x22405b VFMADD213PD	(%R11,%RCX,8),%YMM4,%YMM11

  (51) 0x224061 MOV	0xc0(%RSP),%R11

  (51) 0x224069 VMULPD	%YMM5,%YMM7,%YMM5

  (51) 0x22406d VFMADD213PD	%YMM5,%YMM9,%YMM6

  (51) 0x224072 VFMADD213PD	(%R11,%RCX,8),%YMM4,%YMM6

  (51) 0x224078 MOV	0xc8(%RSP),%R11

  (51) 0x224080 VMOVUPD	-0x8(%R11,%RCX,8),%YMM5

  (51) 0x224087 VMOVUPD	(%R11,%RCX,8),%YMM10

  (51) 0x22408d MOV	0xb8(%RSP),%R11

  (51) 0x224095 VSUBPD	%YMM10,%YMM5,%YMM13

  (51) 0x22409a VSUBPD	%YMM16,%YMM5,%YMM5

  (51) 0x2240a0 VMULPD	%YMM8,%YMM13,%YMM8

  (51) 0x2240a5 VFMADD213PD	%YMM8,%YMM12,%YMM15

  (51) 0x2240aa VSUBPD	%YMM14,%YMM10,%YMM8

  (51) 0x2240af VMULPD	%YMM9,%YMM8,%YMM8

  (51) 0x2240b4 VFMADD213PD	%YMM11,%YMM4,%YMM15

  (51) 0x2240b9 VFMADD231PD	%YMM5,%YMM7,%YMM8

  (51) 0x2240be VMOVUPD	%YMM15,(%R13,%RCX,8)

  (51) 0x2240c5 VFMADD213PD	%YMM6,%YMM4,%YMM8

  (51) 0x2240ca VMOVUPD	%YMM8,(%R11,%RCX,8)

  (51) 0x2240d0 ADD	$0x4,%RCX

  (51) 0x2240d4 CMP	%RCX,%R10

  (51) 0x2240d7 JNE	223fb0

(49) 0x2240dd MOV	0x130(%RSP),%RDX

(49) 0x2240e5 MOV	0x118(%RSP),%R9

(49) 0x2240ed MOV	0x40(%RSP),%R12

(49) 0x2240f2 MOV	0x110(%RSP),%RSI

(49) 0x2240fa MOV	0x108(%RSP),%R14

(49) 0x224102 MOV	0x100(%RSP),%RBX

(49) 0x22410a MOV	0x38(%RSP),%RAX

(49) 0x22410f MOV	0x30(%RSP),%RBP

(49) 0x224114 MOV	0x28(%RSP),%R11

(49) 0x224119 MOV	0x20(%RSP),%R8

(49) 0x22411e MOV	0xf0(%RSP),%R13

(49) 0x224126 CMP	%R10,0x10(%RSP)

(49) 0x22412b MOV	0xf8(%RSP),%R10

(49) 0x224133 JE	223e00

(49) 0x224139 JMP	224380

0x22413e XCHG	%AX,%AX

(49) 0x224140 MOV	0x58(%RSP),%R9

(49) 0x224145 MOV	0x60(%RSP),%RSI

(49) 0x22414a MOV	0xa8(%RSP),%R12

(49) 0x224152 MOV	0x98(%RSP),%RDX

(49) 0x22415a MOV	0x90(%RSP),%RBX

(49) 0x224162 MOV	0x88(%RSP),%R14

(49) 0x22416a MOV	0x80(%RSP),%R13

(49) 0x224172 MOV	0xe8(%RSP),%RBP

(49) 0x22417a MOV	0x78(%RSP),%RAX

(49) 0x22417f MOV	0x70(%RSP),%R8

(49) 0x224184 MOV	0x68(%RSP),%R10

(49) 0x224189 XOR	%ECX,%ECX

(49) 0x22418b NOPL	(%RAX,%RAX,1)

  (50) 0x224190 VMOVUPD	-0x8(%RSI,%RCX,8),%ZMM4

  (50) 0x22419b VMOVUPD	(%RSI,%RCX,8),%ZMM5

  (50) 0x2241a2 VMOVUPD	(%RDX,%RCX,8),%ZMM7

  (50) 0x2241a9 VMOVUPD	-0x8(%RDX,%RCX,8),%ZMM6

  (50) 0x2241b4 VMOVUPD	(%R13,%RCX,8),%ZMM8

  (50) 0x2241bc VMOVUPD	-0x8(%RBX,%RCX,8),%ZMM9

  (50) 0x2241c7 VMOVUPD	(%RBX,%RCX,8),%ZMM10

  (50) 0x2241ce VMOVUPD	(%R14,%RCX,8),%ZMM12

  (50) 0x2241d5 MOV	0xb0(%RSP),%R11

  (50) 0x2241dd VMOVUPD	-0x8(%R8,%RCX,8),%ZMM16

  (50) 0x2241e8 VMOVUPD	(%R8,%RCX,8),%ZMM14

  (50) 0x2241ef VMULPD	-0x8(%R9,%RCX,8),%ZMM4,%ZMM4

  (50) 0x2241fa VFMADD231PD	(%R9,%RCX,8),%ZMM5,%ZMM4

  (50) 0x224201 VMOVUPD	-0x8(%R12,%RCX,8),%ZMM5

  (50) 0x22420c VFMADD231PD	(%RAX,%RCX,8),%ZMM7,%ZMM4

  (50) 0x224213 VSUBPD	%ZMM10,%ZMM9,%ZMM11

  (50) 0x224219 VSUBPD	%ZMM14,%ZMM16,%ZMM15

  (50) 0x22421f VFMADD231PD	-0x8(%RAX,%RCX,8),%ZMM6,%ZMM4

  (50) 0x22422a VMOVUPD	(%R12,%RCX,8),%ZMM6

  (50) 0x224231 VSUBPD	%ZMM6,%ZMM5,%ZMM7

  (50) 0x224237 VSUBPD	%ZMM9,%ZMM5,%ZMM5

  (50) 0x22423d VMOVUPD	(%R10,%RCX,8),%ZMM9

  (50) 0x224244 VSUBPD	%ZMM10,%ZMM6,%ZMM6

  (50) 0x22424a VMULPD	%ZMM3,%ZMM4,%ZMM4

  (50) 0x224250 VMULPD	%ZMM8,%ZMM7,%ZMM7

  (50) 0x224256 VFMADD213PD	%ZMM7,%ZMM12,%ZMM11

  (50) 0x22425c VDIVPD	%ZMM4,%ZMM0,%ZMM4

  (50) 0x224262 VMOVUPD	-0x8(%R10,%RCX,8),%ZMM7

  (50) 0x22426d VFMADD213PD	(%R11,%RCX,8),%ZMM4,%ZMM11

  (50) 0x224274 MOV	0xc0(%RSP),%R11

  (50) 0x22427c VMULPD	%ZMM5,%ZMM7,%ZMM5

  (50) 0x224282 VFMADD213PD	%ZMM5,%ZMM9,%ZMM6

  (50) 0x224288 VFMADD213PD	(%R11,%RCX,8),%ZMM4,%ZMM6

  (50) 0x22428f MOV	0xc8(%RSP),%R11

  (50) 0x224297 VMOVUPD	-0x8(%R11,%RCX,8),%ZMM5

  (50) 0x2242a2 VMOVUPD	(%R11,%RCX,8),%ZMM10

  (50) 0x2242a9 MOV	0xa0(%RSP),%R11

  (50) 0x2242b1 VSUBPD	%ZMM10,%ZMM5,%ZMM13

  (50) 0x2242b7 VSUBPD	%ZMM14,%ZMM10,%ZMM10

  (50) 0x2242bd VSUBPD	%ZMM16,%ZMM5,%ZMM5

  (50) 0x2242c3 VMULPD	%ZMM8,%ZMM13,%ZMM8

  (50) 0x2242c9 VFMADD213PD	%ZMM8,%ZMM12,%ZMM15

  (50) 0x2242cf VMULPD	%ZMM9,%ZMM10,%ZMM8

  (50) 0x2242d5 VFMADD231PD	%ZMM5,%ZMM7,%ZMM8

  (50) 0x2242db VFMADD213PD	%ZMM11,%ZMM4,%ZMM15

  (50) 0x2242e1 VFMADD213PD	%ZMM6,%ZMM4,%ZMM8

  (50) 0x2242e7 VMOVUPD	%ZMM15,(%R11,%RCX,8)

  (50) 0x2242ee MOV	0xb8(%RSP),%R11

  (50) 0x2242f6 VMOVUPD	%ZMM8,(%R11,%RCX,8)

  (50) 0x2242fd ADD	$0x8,%RCX

  (50) 0x224301 CMP	%RCX,%RBP

  (50) 0x224304 JNE	224190

(49) 0x22430a MOV	0x118(%RSP),%R9

(49) 0x224312 MOV	0x40(%RSP),%R12

(49) 0x224317 MOV	0x110(%RSP),%RSI

(49) 0x22431f MOV	0x108(%RSP),%R14

(49) 0x224327 MOV	0x100(%RSP),%RBX

(49) 0x22432f MOV	0x38(%RSP),%RAX

(49) 0x224334 MOV	0xf8(%RSP),%R10

(49) 0x22433c MOV	0x28(%RSP),%R11

(49) 0x224341 MOV	0x20(%RSP),%R8

(49) 0x224346 MOV	0xf0(%RSP),%R13

(49) 0x22434e CMP	%RBP,0x10(%RSP)

(49) 0x224353 MOV	0x30(%RSP),%RBP

(49) 0x224358 JE	223e00

(49) 0x22435e MOV	0xe8(%RSP),%RCX

(49) 0x224366 MOV	0x128(%RSP),%RDX

(49) 0x22436e TESTB	$0x4,0x10(%RSP)

(49) 0x224373 JNE	223f63

(49) 0x224379 NOPL	(%RAX)

(49) 0x224380 DEC	%RDX

(49) 0x224383 NOPW	%CS:(%RAX,%RAX,1)

  (48) 0x224390 VMOVSD	(%RDI,%RDX,8),%XMM4

  (48) 0x224395 VMOVSD	0x8(%RDI,%RDX,8),%XMM5

  (48) 0x22439b VMOVSD	0x8(%R15,%RDX,8),%XMM7

  (48) 0x2243a2 VMOVSD	(%R15,%RDX,8),%XMM6

  (48) 0x2243a8 VMOVSD	(%R11,%RDX,8),%XMM9

  (48) 0x2243ae VMOVSD	0x8(%R11,%RDX,8),%XMM10

  (48) 0x2243b5 VMOVSD	(%RBX,%RDX,8),%XMM17

  (48) 0x2243bc VMOVSD	0x8(%R9,%RDX,8),%XMM8

  (48) 0x2243c3 VMOVSD	(%R8,%RDX,8),%XMM16

  (48) 0x2243ca VMOVSD	0x8(%R8,%RDX,8),%XMM14

  (48) 0x2243d1 VMOVSD	0x8(%R13,%RDX,8),%XMM12

  (48) 0x2243d8 MOV	0x50(%RSP),%RCX

  (48) 0x2243dd VMULSD	(%RBP,%RDX,8),%XMM4,%XMM4

  (48) 0x2243e3 VFMADD231SD	0x8(%RBP,%RDX,8),%XMM5,%XMM4

  (48) 0x2243ea VMOVSD	(%RSI,%RDX,8),%XMM5

  (48) 0x2243ef VFMADD231SD	0x8(%R14,%RDX,8),%XMM7,%XMM4

  (48) 0x2243f6 VSUBSD	%XMM10,%XMM9,%XMM11

  (48) 0x2243fb VSUBSD	%XMM14,%XMM16,%XMM15

  (48) 0x224401 VFMADD231SD	(%R14,%RDX,8),%XMM6,%XMM4

  (48) 0x224407 VMOVSD	0x8(%RSI,%RDX,8),%XMM6

  (48) 0x22440d VSUBSD	%XMM6,%XMM5,%XMM7

  (48) 0x224411 VSUBSD	%XMM9,%XMM5,%XMM5

  (48) 0x224416 VMOVSD	0x8(%RBX,%RDX,8),%XMM9

  (48) 0x22441c VSUBSD	%XMM10,%XMM6,%XMM6

  (48) 0x224421 VMOVSD	0x8(%R12,%RDX,8),%XMM10

  (48) 0x224428 VMULSD	%XMM5,%XMM17,%XMM5

  (48) 0x22442e VMULSD	%XMM2,%XMM4,%XMM4

  (48) 0x224432 VMULSD	%XMM7,%XMM8,%XMM7

  (48) 0x224436 VDIVSD	%XMM4,%XMM0,%XMM4

  (48) 0x22443a VFMADD213SD	%XMM7,%XMM12,%XMM11

  (48) 0x22443f VFMADD213SD	%XMM5,%XMM9,%XMM6

  (48) 0x224444 VMOVSD	(%R12,%RDX,8),%XMM5

  (48) 0x22444a VFMADD213SD	0x8(%RCX,%RDX,8),%XMM4,%XMM11

  (48) 0x224451 VFMADD213SD	0x8(%RAX,%RDX,8),%XMM4,%XMM6

  (48) 0x224458 MOV	0x48(%RSP),%RCX

  (48) 0x22445d VSUBSD	%XMM10,%XMM5,%XMM13

  (48) 0x224462 VSUBSD	%XMM16,%XMM5,%XMM5

  (48) 0x224468 VMULSD	%XMM8,%XMM13,%XMM8

  (48) 0x22446d VFMADD213SD	%XMM8,%XMM12,%XMM15

  (48) 0x224472 VSUBSD	%XMM14,%XMM10,%XMM8

  (48) 0x224477 VMULSD	%XMM9,%XMM8,%XMM8

  (48) 0x22447c VFMADD213SD	%XMM11,%XMM4,%XMM15

  (48) 0x224481 VFMADD231SD	%XMM5,%XMM17,%XMM8

  (48) 0x224487 VMOVSD	%XMM15,0x8(%R10,%RDX,8)

  (48) 0x22448e VFMADD213SD	%XMM6,%XMM4,%XMM8

  (48) 0x224493 VMOVSD	%XMM8,0x8(%RCX,%RDX,8)

  (48) 0x224499 INC	%RDX

  (48) 0x22449c CMP	%RDX,0xd0(%RSP)

  (48) 0x2244a4 JNE	224390

(49) 0x2244aa JMP	223e00

0x2244af MOV	0xdc(%RSP),%EBX

0x2244b6 XOR	%EDI,%EDI

0x2244b8 MOV	%EBX,%ESI

0x2244ba VZEROUPPER

0x2244bd CALL	27ccc0 <@plt_start@+0xb0>

0x2244c2 XOR	%EDI,%EDI

0x2244c4 MOV	%EBX,%ESI

0x2244c6 CALL	27ccd0 <@plt_start@+0xc0>

0x2244cb ADD	$0x158,%RSP

0x2244d2 POP	%RBX

0x2244d3 POP	%R12

0x2244d5 POP	%R13

0x2244d7 POP	%R14

0x2244d9 POP	%R15

0x2244db POP	%RBP

0x2244dc RET

0x2244dd INT	$0x3

0x2244de INT	$0x3

0x2244df INT	$0x3

Coverage (%)	Name	Source Location	Module

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run aocc_10

Source file and lines	accelerate_kernel.f90:57-81
Module	exec

The function is defined in /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/accelerate_kernel.f90:57-63,69-81.

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 25.00 to 2.00 cycles (12.50x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)
To reference allocatable arrays, use "allocatable" instead of "pointer" pointers or qualify them with the "contiguous" attribute (Fortran 2008)
For structures, limit to one indirection. For example, use a_b%c instead of a%b%c with a_b set to a%b before this function

Vectorization

Your function is probably not vectorized. Only 11% of vector register length is used (average across all SSE/AVX instructions). By vectorizing your function, you can lower the cost of an iteration from 25.00 to 1.92 cycles (13.01x speedup).

Details

Store and arithmetical SSE/AVX instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): do i a(i)%x = b(i)%x (slow, non stride 1) => do i a%x(i) = b%x(i) (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

unknown: 3 occurrences►
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/accelerate_kernel.f90:60
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/accelerate_kernel.f90:78
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/accelerate_kernel.f90:79

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 312 bytes. The binary function is storing 292 bytes.

General properties

nb instructions	202
nb uops	200
loop length	915
used x86 registers	16
used mmx registers	0
used xmm registers	1
used ymm registers	1
used zmm registers	2
nb stack references	40

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	25.00 cycles
front end	25.00 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	14.83	14.83	14.83	14.83	14.83	14.83	21.25	21.25	21.25	21.25	0.00	0.00	0.00	0.00	0.00	0.00
cycles	14.83	14.83	14.83	14.83	14.83	14.83	21.25	21.25	21.25	21.25	0.00	0.00	0.00	0.00	0.00	0.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	25.00
Dispatch	21.25
Overall L1	25.00

Vectorization ratios

INT

all	2%
load	NA (no load vectorizable/vectorized instructions)
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
other	25%

all	0%
load	0%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

INT+FP

all	2%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	14%

Vector efficiency ratios

INT

all	11%
load	NA (no load vectorizable/vectorized instructions)
store	11%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
other	10%

all	12%
load	12%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	12%

INT+FP

all	11%
load	12%
store	11%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	11%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 25.00 cycles. At this rate:

4% of peak load performance is reached (12.48 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
9% of peak store performance is reached (11.68 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Performance is limited by instruction throughput (loading/decoding program instructions to execution core) (front-end is a bottleneck). By removing all these bottlenecks, you can lower the cost of an iteration from 25.00 to 21.25 cycles (1.18x speedup).

ASM code

In the binary file, the address of the function is: 223aa0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB $0x158,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x8(%RDX),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RDX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOVL $0,0xe4(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV (%RDI),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RDX,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV (%RCX),%EBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%EAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOVL $0x1,0xe0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
INC %EBX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %EAX,0x1c(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV %EBX,0x18(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
SUB $0x8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV $0x22,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LEA 0xe8(%RSP),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA 0xec(%RSP),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA 0x24(%RSP),%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA 0x20(%RSP),%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
XOR %EDI,%EDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV %ESI,0xe4(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CALL 27ccb0 <@plt_start@+0xa0>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
ADD $0x20,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVSXD 0x1c(%RSP),%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	N/A
CMP %EBX,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
JG 2244af <__nv_accelerate_kernel_module_accelerate_kernel__PARALLEL_F2L57_1_+0xa0f>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOVSXD 0x18(%RSP),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	N/A
MOV %RAX,0x150(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
CMP %EDX,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
JL 2244af <__nv_accelerate_kernel_module_accelerate_kernel__PARALLEL_F2L57_1_+0xa0f>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV 0x18(%R14),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x10(%R14),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RDX,0x8(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOVSXD (%RCX),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	N/A
MOVSXD (%RAX),%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	N/A
MOV %ECX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
SUB %EDX,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RDX,0x120(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x8(%RSP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RCX,0xd0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
ADD $0x2,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
TEST %EAX,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
JLE 2244af <__nv_accelerate_kernel_module_accelerate_kernel__PARALLEL_F2L57_1_+0xa0f>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV %R14,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV 0x38(%R14),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x70(%R8),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x120(%RSP),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x20(%R14),%R12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0xc8(%R8),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x68(%R8),%RBP	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0xf0(%R8),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
VBROADCASTSD -0x21d66(%RIP),%YMM1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
VBROADCASTSD -0x21d70(%RIP),%ZMM3	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMOVSD -0x21d78(%RIP),%XMM2	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MOV (%RAX),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x60(%R14),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
VBROADCASTSD (%RCX),%ZMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x88(%R8),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RCX),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%R14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
LEA -0x1(%RDX),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %RDI,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
IMUL %RCX,%R15	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	N/A
LEA (%R15,%RBX,1),%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
SAL $0x3,%R15	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
SUB %R14,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LEA (,%R9,8),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA (%R11,%RDX,8),%R10	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA (%R13,%RDX,8),%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %RAX,0x148(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
LEA (%RBP,%RDX,8),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %R10,0xa8(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R9,%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
IMUL %RCX,%R9	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	N/A
LEA (%R12,%RDX,8),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %RSI,0xc8(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R12,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
IMUL 0x8(%RSP),%R10	1	0.33	0.33	0.33	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.33	N/A
MOV %RAX,0x78(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xe0(%R8),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RCX,0x98(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
LEA (,%RDI,8),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
IMUL 0x8(%RSP),%RDI	1	0.33	0.33	0.33	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.33	N/A
MOV %RCX,0x140(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
LEA (%RDI,%RBX,1),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
SAL $0x3,%RDI	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
SUB %R14,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SAL $0x3,%R14	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
LEA (%R13,%RCX,8),%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA (%R11,%RCX,8),%R12	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
SUB %R14,%R15	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB %R14,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LEA (%RBP,%R15,1),%R14	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %RDX,0x70(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
LEA (%RAX,%RCX,8),%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %R12,0x90(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RAX,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA (%RSI,%RCX,8),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ADD %RDI,%R12	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RAX,0x60(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
LEA (%RBP,%RCX,8),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %RDX,0x68(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RSI,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA (%R13,%R15,1),%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ADD %RDI,%R13	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD %RDI,%RBP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RSI,0x40(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
LEA (%R11,%R15,1),%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ADD %RDI,%R11	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD %RDX,%R15	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD %RDX,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LEA (%R10,%RBX,1),%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
SAL $0x3,%R10	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
MOV %RBP,0x30(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xd0(%R8),%RBP	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %R13,0x20(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RAX,0x58(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xa8(%R8),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %R11,0x28(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV (%RAX),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
LEA (%R9,%RBX,1),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
SAL $0x3,%R9	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
SUB %RCX,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB %RCX,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SAL $0x3,%RCX	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
MOV %RAX,0x50(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x78(%R8),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
SUB %RCX,%R10	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB %RCX,%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0xb8(%R8),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,0x48(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xb0(%R8),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0xd8(%R8),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
ADD %RCX,%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LEA (%R8,%RDX,8),%R11	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ADD %R10,%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LEA (%RAX,%RDX,8),%R13	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ADD %R10,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R8,0x38(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R11,0xc0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
LEA (%RBP,%RDX,8),%R11	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %R13,0xb0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
ADD %R10,%RBP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LEA (%RCX,%R10,1),%R13	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %R11,0xb8(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x48(%RSP),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
LEA (%R11,%RDX,8),%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ADD %R11,%R10	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0xd0(%RSP),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
LEA (%RCX,%RDX,8),%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %R8,0xa0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x50(%RSP),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RDX,0x88(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x8(%RSP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
INC %R11	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R11,0xd0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
LEA (%RCX,%R8,8),%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %R8,0x80(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R11,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
SUB %RBX,%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
INC %R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R8,%R11	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
AND $-0x8,%R11	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R8,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R8,0x10(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
AND $-0x4,%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LEA (%R11,%RBX,1),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %R8,0x138(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
ADD %RBX,%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R11,0xe8(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RCX,0x128(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R8,0x130(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
JMP 223ee6 <__nv_accelerate_kernel_module_accelerate_kernel__PARALLEL_F2L57_1_+0x446>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
XCHG %AX,%AX	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
MOV 0xdc(%RSP),%EBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
XOR %EDI,%EDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV %EBX,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VZEROUPPER	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 27ccc0 <@plt_start@+0xb0>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
XOR %EDI,%EDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV %EBX,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CALL 27ccd0 <@plt_start@+0xc0>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
ADD $0x158,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
RET	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
INT $0x3																				N/A
INT $0x3																				N/A
INT $0x3																				N/A

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run aocc_10

Source file and lines	accelerate_kernel.f90:57-81
Module	exec

gain
potential
hint
expert

Code clean check

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)
To reference allocatable arrays, use "allocatable" instead of "pointer" pointers or qualify them with the "contiguous" attribute (Fortran 2008)
For structures, limit to one indirection. For example, use a_b%c instead of a%b%c with a_b set to a%b before this function

Vectorization

Details

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): do i a(i)%x = b(i)%x (slow, non stride 1) => do i a%x(i) = b%x(i) (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

unknown: 3 occurrences►
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/accelerate_kernel.f90:60
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/accelerate_kernel.f90:78
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/accelerate_kernel.f90:79

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 312 bytes. The binary function is storing 292 bytes.

General properties

nb instructions	202
nb uops	200
loop length	915
used x86 registers	16
used mmx registers	0
used xmm registers	1
used ymm registers	1
used zmm registers	2
nb stack references	40

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	25.00 cycles
front end	25.00 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	14.83	14.83	14.83	14.83	14.83	14.83	21.25	21.25	21.25	21.25	0.00	0.00	0.00	0.00	0.00	0.00
cycles	14.83	14.83	14.83	14.83	14.83	14.83	21.25	21.25	21.25	21.25	0.00	0.00	0.00	0.00	0.00	0.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	25.00
Dispatch	21.25
Overall L1	25.00

Vectorization ratios

INT

all	2%
load	NA (no load vectorizable/vectorized instructions)
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
other	25%

all	0%
load	0%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

INT+FP

all	2%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	14%

Vector efficiency ratios

INT

all	11%
load	NA (no load vectorizable/vectorized instructions)
store	11%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
other	10%

all	12%
load	12%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	12%

INT+FP

all	11%
load	12%
store	11%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	11%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 25.00 cycles. At this rate:

4% of peak load performance is reached (12.48 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
9% of peak store performance is reached (11.68 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

ASM code

In the binary file, the address of the function is: 223aa0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB $0x158,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x8(%RDX),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RDX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOVL $0,0xe4(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV (%RDI),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RDX,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV (%RCX),%EBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%EAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOVL $0x1,0xe0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
INC %EBX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %EAX,0x1c(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV %EBX,0x18(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
SUB $0x8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV $0x22,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LEA 0xe8(%RSP),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA 0xec(%RSP),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA 0x24(%RSP),%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA 0x20(%RSP),%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
XOR %EDI,%EDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV %ESI,0xe4(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CALL 27ccb0 <@plt_start@+0xa0>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
ADD $0x20,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVSXD 0x1c(%RSP),%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	N/A
CMP %EBX,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
JG 2244af <__nv_accelerate_kernel_module_accelerate_kernel__PARALLEL_F2L57_1_+0xa0f>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOVSXD 0x18(%RSP),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	N/A
MOV %RAX,0x150(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
CMP %EDX,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
JL 2244af <__nv_accelerate_kernel_module_accelerate_kernel__PARALLEL_F2L57_1_+0xa0f>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV 0x18(%R14),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x10(%R14),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RDX,0x8(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOVSXD (%RCX),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	N/A
MOVSXD (%RAX),%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	N/A
MOV %ECX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
SUB %EDX,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RDX,0x120(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x8(%RSP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RCX,0xd0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
ADD $0x2,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
TEST %EAX,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
JLE 2244af <__nv_accelerate_kernel_module_accelerate_kernel__PARALLEL_F2L57_1_+0xa0f>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV %R14,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV 0x38(%R14),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x70(%R8),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x120(%RSP),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x20(%R14),%R12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0xc8(%R8),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x68(%R8),%RBP	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0xf0(%R8),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
VBROADCASTSD -0x21d66(%RIP),%YMM1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
VBROADCASTSD -0x21d70(%RIP),%ZMM3	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMOVSD -0x21d78(%RIP),%XMM2	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MOV (%RAX),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x60(%R14),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
VBROADCASTSD (%RCX),%ZMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x88(%R8),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RCX),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%R14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
LEA -0x1(%RDX),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %RDI,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
IMUL %RCX,%R15	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	N/A
LEA (%R15,%RBX,1),%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
SAL $0x3,%R15	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
SUB %R14,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LEA (,%R9,8),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA (%R11,%RDX,8),%R10	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA (%R13,%RDX,8),%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %RAX,0x148(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
LEA (%RBP,%RDX,8),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %R10,0xa8(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R9,%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
IMUL %RCX,%R9	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	N/A
LEA (%R12,%RDX,8),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %RSI,0xc8(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R12,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
IMUL 0x8(%RSP),%R10	1	0.33	0.33	0.33	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.33	N/A
MOV %RAX,0x78(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xe0(%R8),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RCX,0x98(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
LEA (,%RDI,8),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
IMUL 0x8(%RSP),%RDI	1	0.33	0.33	0.33	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.33	N/A
MOV %RCX,0x140(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
LEA (%RDI,%RBX,1),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
SAL $0x3,%RDI	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
SUB %R14,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SAL $0x3,%R14	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
LEA (%R13,%RCX,8),%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA (%R11,%RCX,8),%R12	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
SUB %R14,%R15	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB %R14,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LEA (%RBP,%R15,1),%R14	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %RDX,0x70(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
LEA (%RAX,%RCX,8),%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %R12,0x90(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RAX,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA (%RSI,%RCX,8),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ADD %RDI,%R12	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RAX,0x60(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
LEA (%RBP,%RCX,8),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %RDX,0x68(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RSI,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA (%R13,%R15,1),%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ADD %RDI,%R13	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD %RDI,%RBP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RSI,0x40(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
LEA (%R11,%R15,1),%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ADD %RDI,%R11	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD %RDX,%R15	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD %RDX,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LEA (%R10,%RBX,1),%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
SAL $0x3,%R10	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
MOV %RBP,0x30(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xd0(%R8),%RBP	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %R13,0x20(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RAX,0x58(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xa8(%R8),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %R11,0x28(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV (%RAX),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
LEA (%R9,%RBX,1),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
SAL $0x3,%R9	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
SUB %RCX,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB %RCX,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SAL $0x3,%RCX	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
MOV %RAX,0x50(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x78(%R8),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
SUB %RCX,%R10	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB %RCX,%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0xb8(%R8),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,0x48(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xb0(%R8),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0xd8(%R8),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
ADD %RCX,%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LEA (%R8,%RDX,8),%R11	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ADD %R10,%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LEA (%RAX,%RDX,8),%R13	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ADD %R10,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R8,0x38(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R11,0xc0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
LEA (%RBP,%RDX,8),%R11	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %R13,0xb0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
ADD %R10,%RBP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LEA (%RCX,%R10,1),%R13	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %R11,0xb8(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x48(%RSP),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
LEA (%R11,%RDX,8),%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ADD %R11,%R10	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0xd0(%RSP),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
LEA (%RCX,%RDX,8),%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %R8,0xa0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x50(%RSP),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RDX,0x88(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x8(%RSP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
INC %R11	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R11,0xd0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
LEA (%RCX,%R8,8),%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %R8,0x80(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R11,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
SUB %RBX,%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
INC %R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R8,%R11	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
AND $-0x8,%R11	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R8,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R8,0x10(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
AND $-0x4,%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LEA (%R11,%RBX,1),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %R8,0x138(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
ADD %RBX,%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R11,0xe8(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RCX,0x128(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R8,0x130(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
JMP 223ee6 <__nv_accelerate_kernel_module_accelerate_kernel__PARALLEL_F2L57_1_+0x446>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
XCHG %AX,%AX	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
MOV 0xdc(%RSP),%EBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
XOR %EDI,%EDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV %EBX,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VZEROUPPER	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 27ccc0 <@plt_start@+0xb0>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
XOR %EDI,%EDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV %EBX,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CALL 27ccd0 <@plt_start@+0xc0>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
ADD $0x158,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
RET	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
INT $0x3																				N/A
INT $0x3																				N/A
INT $0x3																				N/A

Name	Coverage (%)	Time (s)
▼__nv_accelerate_kernel_module_accelerate_kernel__PARALLEL_F2L57_1–	5.30	1.98
▼Loop 49 - accelerate_kernel.f90:63-78 - exec–	0.00	0.01
○Loop 50 - accelerate_kernel.f90:63-75 - exec	5.30	1.97
○Loop 48 - accelerate_kernel.f90:63-77 - exec	0.00	0.01
○Loop 51 - accelerate_kernel.f90:63-75 - exec	0.00	0.00

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