| Loop Id: 234 | Module: exec | Source: initialise_chunk_kernel.f90:129-129 | Coverage: 0.01% |
|---|
| Loop Id: 234 | Module: exec | Source: initialise_chunk_kernel.f90:129-129 | Coverage: 0.01% |
|---|
0x435fcb VMOVUPD (%R10,%RAX,1),%ZMM14 [1] |
0x435fd2 VMOVUPD %ZMM14,(%RDX,%RAX,1) [2] |
0x435fd9 VMOVUPD 0x40(%R10,%RAX,1),%ZMM13 [1] |
0x435fe1 VMOVUPD %ZMM13,0x40(%RDX,%RAX,1) [2] |
0x435fe9 VMOVUPD 0x80(%R10,%RAX,1),%ZMM0 [1] |
0x435ff1 VMOVUPD %ZMM0,0x80(%RDX,%RAX,1) [2] |
0x435ff9 VMOVUPD 0xc0(%R10,%RAX,1),%ZMM4 [1] |
0x436001 VMOVUPD %ZMM4,0xc0(%RDX,%RAX,1) [2] |
0x436009 VMOVUPD 0x100(%R10,%RAX,1),%ZMM2 [1] |
0x436011 VMOVUPD %ZMM2,0x100(%RDX,%RAX,1) [2] |
0x436019 VMOVUPD 0x140(%R10,%RAX,1),%ZMM3 [1] |
0x436021 VMOVUPD %ZMM3,0x140(%RDX,%RAX,1) [2] |
0x436029 VMOVUPD 0x180(%R10,%RAX,1),%ZMM15 [1] |
0x436031 VMOVUPD %ZMM15,0x180(%RDX,%RAX,1) [2] |
0x436039 VMOVUPD 0x1c0(%R10,%RAX,1),%ZMM10 [1] |
0x436041 VMOVUPD %ZMM10,0x1c0(%RDX,%RAX,1) [2] |
0x436049 ADD $0x200,%RAX |
0x43604f CMP %RAX,%R8 |
0x436052 JNE 435fcb |
/home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/initialise_chunk_kernel.f90: 129 - 129 |
-------------------------------------------------------------------------------- |
129: yarea(j,k)=celldx(j) |
| Coverage (%) | Name | Source Location | Module |
|---|---|---|---|
| ►96.00+ | gomp_thread_start | team.c:130 | libgomp.so.1.0.0 |
| ○ | start_thread | libc.so.6 | |
| ○ | __GI___clone3 | libc.so.6 | |
| ►4.00+ | GOMP_parallel | libgomp.h:982 | libgomp.so.1.0.0 |
| ○ | initialise_chunk_kernel | initialise_chunk_kernel.f90:135 | exec |
| ○ | initialise_chunk | initialise_chunk.f90:58 | exec |
| ○ | start | start.f90:106 | exec |
| ○ | initialise | initialise.f90:141 | exec |
| ○ | main | clover_leaf.f90:72 | exec |
| ○ | __libc_start_call_main | libc.so.6 | |
| ○ | __libc_start_main | libc.so.6 | |
| ○ | _start | clover_leaf.f90:41 | exec |
| min | med | avg | max |
|---|---|---|---|
| Percentile Index | 10 | 20 | 30 | 40 | 50 | 60 | 70 | 80 | 90 | 100 |
|---|---|---|---|---|---|---|---|---|---|---|
| Value |
| min | med | avg | max |
|---|---|---|---|
| Percentile Index | 10 | 20 | 30 | 40 | 50 | 60 | 70 | 80 | 90 | 100 |
|---|---|---|---|---|---|---|---|---|---|---|
| Value |
| Path / |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.00 |
| CQA speedup if FP arith vectorized | 1.00 |
| CQA speedup if fully vectorized | 1.00 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.78 |
| Bottlenecks | P6, P7, P8, P9, P14, P15, |
| Function | __initialise_chunk_kernel_module_MOD_initialise_chunk_kernel._omp_fn.0 |
| Source | initialise_chunk_kernel.f90:129-129 |
| Source loop unroll info | not unrolled or unrolled with no peel/tail loop |
| Source loop unroll confidence level | max |
| Unroll/vectorization loop type | NA |
| Unroll factor | NA |
| CQA cycles | 4.00 |
| CQA cycles if no scalar integer | 4.00 |
| CQA cycles if FP arith vectorized | 4.00 |
| CQA cycles if fully vectorized | 4.00 |
| Front-end cycles | 2.25 |
| P0 cycles | 0.33 |
| P1 cycles | 0.33 |
| P2 cycles | 0.33 |
| P3 cycles | 0.33 |
| P4 cycles | 0.33 |
| P5 cycles | 0.33 |
| P6 cycles | 4.00 |
| P7 cycles | 4.00 |
| P8 cycles | 4.00 |
| P9 cycles | 4.00 |
| P10 cycles | 0.00 |
| P11 cycles | 0.00 |
| P12 cycles | 0.00 |
| P13 cycles | 0.00 |
| P14 cycles | 4.00 |
| P15 cycles | 4.00 |
| DIV/SQRT cycles | 0.00 |
| Inter-iter dependencies cycles | 1 |
| FE+BE cycles (UFS) | NA |
| Stall cycles (UFS) | NA |
| Nb insns | 19.00 |
| Nb uops | 18.00 |
| Nb loads | 8.00 |
| Nb stores | 8.00 |
| Nb stack references | 0.00 |
| FLOP/cycle | 0.00 |
| Nb FLOP add-sub | 0.00 |
| Nb FLOP mul | 0.00 |
| Nb FLOP fma | 0.00 |
| Nb FLOP div | 0.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 256.00 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 512.00 |
| Bytes stored | 512.00 |
| Stride 0 | 0.00 |
| Stride 1 | 2.00 |
| Stride n | 0.00 |
| Stride unknown | 0.00 |
| Stride indirect | 0.00 |
| Vectorization ratio all | 100.00 |
| Vectorization ratio load | 100.00 |
| Vectorization ratio store | 100.00 |
| Vectorization ratio mul | NA |
| Vectorization ratio add_sub | NA |
| Vectorization ratio fma | NA |
| Vectorization ratio div_sqrt | NA |
| Vectorization ratio other | NA |
| Vector-efficiency ratio all | 100.00 |
| Vector-efficiency ratio load | 100.00 |
| Vector-efficiency ratio store | 100.00 |
| Vector-efficiency ratio mul | NA |
| Vector-efficiency ratio add_sub | NA |
| Vector-efficiency ratio fma | NA |
| Vector-efficiency ratio div_sqrt | NA |
| Vector-efficiency ratio other | NA |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.00 |
| CQA speedup if FP arith vectorized | 1.00 |
| CQA speedup if fully vectorized | 1.00 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.78 |
| Bottlenecks | P6, P7, P8, P9, P14, P15, |
| Function | __initialise_chunk_kernel_module_MOD_initialise_chunk_kernel._omp_fn.0 |
| Source | initialise_chunk_kernel.f90:129-129 |
| Source loop unroll info | not unrolled or unrolled with no peel/tail loop |
| Source loop unroll confidence level | max |
| Unroll/vectorization loop type | NA |
| Unroll factor | NA |
| CQA cycles | 4.00 |
| CQA cycles if no scalar integer | 4.00 |
| CQA cycles if FP arith vectorized | 4.00 |
| CQA cycles if fully vectorized | 4.00 |
| Front-end cycles | 2.25 |
| P0 cycles | 0.33 |
| P1 cycles | 0.33 |
| P2 cycles | 0.33 |
| P3 cycles | 0.33 |
| P4 cycles | 0.33 |
| P5 cycles | 0.33 |
| P6 cycles | 4.00 |
| P7 cycles | 4.00 |
| P8 cycles | 4.00 |
| P9 cycles | 4.00 |
| P10 cycles | 0.00 |
| P11 cycles | 0.00 |
| P12 cycles | 0.00 |
| P13 cycles | 0.00 |
| P14 cycles | 4.00 |
| P15 cycles | 4.00 |
| DIV/SQRT cycles | 0.00 |
| Inter-iter dependencies cycles | 1 |
| FE+BE cycles (UFS) | NA |
| Stall cycles (UFS) | NA |
| Nb insns | 19.00 |
| Nb uops | 18.00 |
| Nb loads | 8.00 |
| Nb stores | 8.00 |
| Nb stack references | 0.00 |
| FLOP/cycle | 0.00 |
| Nb FLOP add-sub | 0.00 |
| Nb FLOP mul | 0.00 |
| Nb FLOP fma | 0.00 |
| Nb FLOP div | 0.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 256.00 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 512.00 |
| Bytes stored | 512.00 |
| Stride 0 | 0.00 |
| Stride 1 | 2.00 |
| Stride n | 0.00 |
| Stride unknown | 0.00 |
| Stride indirect | 0.00 |
| Vectorization ratio all | 100.00 |
| Vectorization ratio load | 100.00 |
| Vectorization ratio store | 100.00 |
| Vectorization ratio mul | NA |
| Vectorization ratio add_sub | NA |
| Vectorization ratio fma | NA |
| Vectorization ratio div_sqrt | NA |
| Vectorization ratio other | NA |
| Vector-efficiency ratio all | 100.00 |
| Vector-efficiency ratio load | 100.00 |
| Vector-efficiency ratio store | 100.00 |
| Vector-efficiency ratio mul | NA |
| Vector-efficiency ratio add_sub | NA |
| Vector-efficiency ratio fma | NA |
| Vector-efficiency ratio div_sqrt | NA |
| Vector-efficiency ratio other | NA |
| Path / |
| Function | __initialise_chunk_kernel_module_MOD_initialise_chunk_kernel._omp_fn.0 |
| Source file and lines | initialise_chunk_kernel.f90:129-129 |
| Module | exec |
 |
| nb instructions | 19 |
| nb uops | 18 |
| loop length | 141 |
| used x86 registers | 4 |
| used mmx registers | 0 |
| used xmm registers | 0 |
| used ymm registers | 0 |
| used zmm registers | 8 |
| nb stack references | 0 |
| micro-operation queue | 2.25 cycles |
| front end | 2.25 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | P15 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 0.33 | 0.33 | 0.33 | 0.33 | 0.33 | 0.33 | 4.00 | 4.00 | 4.00 | 4.00 | 0.00 | 0.00 | 0.00 | 0.00 | 4.00 | 4.00 |
| cycles | 0.33 | 0.33 | 0.33 | 0.33 | 0.33 | 0.33 | 4.00 | 4.00 | 4.00 | 4.00 | 0.00 | 0.00 | 0.00 | 0.00 | 4.00 | 4.00 |
| Cycles executing div or sqrt instructions | NA |
| Longest recurrence chain latency (RecMII) | 1.00 |
| Front-end | 2.25 |
| Dispatch | 4.00 |
| Data deps. | 1.00 |
| Overall L1 | 4.00 |
| all | 100% |
| load | 100% |
| store | 100% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | NA (no other vectorizable/vectorized instructions) |
| all | 100% |
| load | 100% |
| store | 100% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | NA (no other vectorizable/vectorized instructions) |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | P15 | Latency | Recip. throughput | Vectorization |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| VMOVUPD (%R10,%RAX,1),%ZMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMOVUPD %ZMM14,(%RDX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 | vect (100.0%) |
| VMOVUPD 0x40(%R10,%RAX,1),%ZMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMOVUPD %ZMM13,0x40(%RDX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 | vect (100.0%) |
| VMOVUPD 0x80(%R10,%RAX,1),%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMOVUPD %ZMM0,0x80(%RDX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 | vect (100.0%) |
| VMOVUPD 0xc0(%R10,%RAX,1),%ZMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMOVUPD %ZMM4,0xc0(%RDX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 | vect (100.0%) |
| VMOVUPD 0x100(%R10,%RAX,1),%ZMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMOVUPD %ZMM2,0x100(%RDX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 | vect (100.0%) |
| VMOVUPD 0x140(%R10,%RAX,1),%ZMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMOVUPD %ZMM3,0x140(%RDX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 | vect (100.0%) |
| VMOVUPD 0x180(%R10,%RAX,1),%ZMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMOVUPD %ZMM15,0x180(%RDX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 | vect (100.0%) |
| VMOVUPD 0x1c0(%R10,%RAX,1),%ZMM10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMOVUPD %ZMM10,0x1c0(%RDX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 | vect (100.0%) |
| ADD $0x200,%RAX | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| CMP %RAX,%R8 | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| JNE 435fcb <__initialise_chunk_kernel_module_MOD_initialise_chunk_kernel._omp_fn.0+0x240b> | 1 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
| Function | __initialise_chunk_kernel_module_MOD_initialise_chunk_kernel._omp_fn.0 |
| Source file and lines | initialise_chunk_kernel.f90:129-129 |
| Module | exec |
|
| nb instructions | 19 |
| nb uops | 18 |
| loop length | 141 |
| used x86 registers | 4 |
| used mmx registers | 0 |
| used xmm registers | 0 |
| used ymm registers | 0 |
| used zmm registers | 8 |
| nb stack references | 0 |
| micro-operation queue | 2.25 cycles |
| front end | 2.25 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | P15 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 0.33 | 0.33 | 0.33 | 0.33 | 0.33 | 0.33 | 4.00 | 4.00 | 4.00 | 4.00 | 0.00 | 0.00 | 0.00 | 0.00 | 4.00 | 4.00 |
| cycles | 0.33 | 0.33 | 0.33 | 0.33 | 0.33 | 0.33 | 4.00 | 4.00 | 4.00 | 4.00 | 0.00 | 0.00 | 0.00 | 0.00 | 4.00 | 4.00 |
| Cycles executing div or sqrt instructions | NA |
| Longest recurrence chain latency (RecMII) | 1.00 |
| Front-end | 2.25 |
| Dispatch | 4.00 |
| Data deps. | 1.00 |
| Overall L1 | 4.00 |
| all | 100% |
| load | 100% |
| store | 100% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | NA (no other vectorizable/vectorized instructions) |
| all | 100% |
| load | 100% |
| store | 100% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | NA (no other vectorizable/vectorized instructions) |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | P15 | Latency | Recip. throughput | Vectorization |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| VMOVUPD (%R10,%RAX,1),%ZMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMOVUPD %ZMM14,(%RDX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 | vect (100.0%) |
| VMOVUPD 0x40(%R10,%RAX,1),%ZMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMOVUPD %ZMM13,0x40(%RDX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 | vect (100.0%) |
| VMOVUPD 0x80(%R10,%RAX,1),%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMOVUPD %ZMM0,0x80(%RDX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 | vect (100.0%) |
| VMOVUPD 0xc0(%R10,%RAX,1),%ZMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMOVUPD %ZMM4,0xc0(%RDX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 | vect (100.0%) |
| VMOVUPD 0x100(%R10,%RAX,1),%ZMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMOVUPD %ZMM2,0x100(%RDX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 | vect (100.0%) |
| VMOVUPD 0x140(%R10,%RAX,1),%ZMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMOVUPD %ZMM3,0x140(%RDX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 | vect (100.0%) |
| VMOVUPD 0x180(%R10,%RAX,1),%ZMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMOVUPD %ZMM15,0x180(%RDX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 | vect (100.0%) |
| VMOVUPD 0x1c0(%R10,%RAX,1),%ZMM10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMOVUPD %ZMM10,0x1c0(%RDX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 | vect (100.0%) |
| ADD $0x200,%RAX | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| CMP %RAX,%R8 | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| JNE 435fcb <__initialise_chunk_kernel_module_MOD_initialise_chunk_kernel._omp_fn.0+0x240b> | 1 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |