OV - exec - Function __flux_calc_kernel_module_MOD_flux_calc_kernel._omp

	Function: __flux_calc_kernel_module_MOD_flux_calc_kernel._omp_fn.0	Module: exec	Source: flux_calc_kernel.f90:49-60	Coverage (incl. loops): 4.24% \| (excl. loops): 0.00%

/home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/flux_calc_kernel.f90: 49 - 60

--------------------------------------------------------------------------------

49:     !$OMP PARALLEL

50:

51:     ! Note that the loops calculate one extra flux than required, but this

52:     ! allows loop fusion that improves performance

53:     !$OMP DO

54:     DO k=y_min,y_max+1

55:     !$OMP SIMD

56:       DO j=x_min,x_max+1

57:         vol_flux_x(j,k)=0.25_8*dt*xarea(j,k)                  &

58:           *(xvel0(j,k)+xvel0(j,k+1)+xvel1(j,k)+xvel1(j,k+1))

59:         vol_flux_y(j,k)=0.25_8*dt*yarea(j,k)                  &

60:           *(yvel0(j,k)+yvel0(j+1,k)+yvel1(j,k)+yvel1(j+1,k))

0x42d990 PUSH	%RBP

0x42d991 MOV	%RSP,%RBP

0x42d994 PUSH	%R15

0x42d996 PUSH	%R14

0x42d998 PUSH	%R13

0x42d99a PUSH	%R12

0x42d99c PUSH	%RBX

0x42d99d MOV	%RDI,%R15

0x42d9a0 AND	$-0x40,%RSP

0x42d9a4 SUB	$0x180,%RSP

0x42d9ab MOV	0x10(%RDI),%RAX

0x42d9af MOV	%RDI,0x90(%RSP)

0x42d9b7 MOV	(%RAX),%R12D

0x42d9ba CALL	402380 <@plt_start@+0x360>

0x42d9bf MOV	%EAX,%EBX

0x42d9c1 CALL	4022f0 <@plt_start@+0x2d0>

0x42d9c6 MOV	0x18(%R15),%RDX

0x42d9ca MOV	%EAX,%ECX

0x42d9cc MOV	(%RDX),%EAX

0x42d9ce ADD	$0x2,%EAX

0x42d9d1 SUB	%R12D,%EAX

0x42d9d4 CLTD

0x42d9d5 IDIV	%EBX

0x42d9d7 CMP	%EDX,%ECX

0x42d9d9 JL	42e7c8

0x42d9df IMUL	%EAX,%ECX

0x42d9e2 ADD	%ECX,%EDX

0x42d9e4 ADD	%EDX,%EAX

0x42d9e6 CMP	%EAX,%EDX

0x42d9e8 JGE	42e79d

0x42d9ee LEA	(%R12,%RDX,1),%R8D

0x42d9f2 ADD	%R12D,%EAX

0x42d9f5 MOV	0x90(%RSP),%R12

0x42d9fd MOV	%EAX,0x110(%RSP)

0x42da04 MOV	%R8D,0x118(%RSP)

0x42da0c MOV	0x8(%R12),%R9

0x42da11 MOV	(%R12),%RDI

0x42da15 VMOVQ	0x98(%R12),%XMM20

0x42da1d VMOVQ	0x88(%R12),%XMM13

0x42da27 VMOVQ	0x38(%R12),%XMM7

0x42da2e MOV	0xa0(%R12),%R13

0x42da36 MOV	0x90(%R12),%RAX

0x42da3e VMOVQ	0x28(%R12),%XMM17

0x42da46 VMOVQ	0x68(%R12),%XMM12

0x42da4d VMOVQ	0x58(%R12),%XMM16

0x42da55 VMOVQ	0x40(%R12),%XMM5

0x42da5c VMOVQ	0x20(%R12),%XMM1

0x42da63 VMOVQ	0x48(%R12),%XMM6

0x42da6a VMOVQ	0x30(%R12),%XMM15

0x42da71 MOV	(%R9),%R14D

0x42da74 MOVSXD	(%RDI),%R10

0x42da77 MOVSXD	%R8D,%R9

0x42da7a VMOVQ	0x50(%R12),%XMM4

0x42da81 VMOVQ	%XMM20,%RDI

0x42da87 MOV	%R13,0x148(%RSP)

0x42da8f MOV	%RAX,0x170(%RSP)

0x42da97 VMOVQ	0x60(%R12),%XMM14

0x42da9e IMUL	%R9,%RDI

0x42daa2 VMOVQ	%XMM7,%R11

0x42daa7 VMOVQ	%XMM17,%R8

0x42daad VMOVQ	%XMM13,%RCX

0x42dab2 SAL	$0x3,%RCX

0x42dab6 MOV	%R14D,0x60(%RSP)

0x42dabb MOV	%RDI,0x158(%RSP)

0x42dac3 VMOVQ	%XMM20,%RSI

0x42dac9 MOV	%R10D,0x154(%RSP)

0x42dad1 LEA	0x2(%R14),%R15D

0x42dad5 VMOVQ	%XMM13,%R14

0x42dada ADD	%R10,%R13

0x42dadd ADD	%R10,%RAX

0x42dae0 IMUL	%R9,%R14

0x42dae4 MOV	%R15D,0x150(%RSP)

0x42daec LEA	(%R13,%RDI,1),%R15

0x42daf1 VMOVQ	%RCX,%XMM23

0x42daf7 LEA	(%R11,%R15,8),%RDI

0x42dafb MOV	%R15,0x58(%RSP)

0x42db00 LEA	0x1(%R9),%R11

0x42db04 VMOVQ	%XMM20,%R15

0x42db0a IMUL	%R11,%R15

0x42db0e VMOVQ	%XMM7,%RCX

0x42db13 LEA	(%RAX,%R14,1),%RDX

0x42db17 VMOVQ	%XMM12,%RAX

0x42db1c MOV	%RDX,0xd0(%RSP)

0x42db24 LEA	(%R8,%RDX,8),%R8

0x42db28 MOV	0x70(%R12),%RDX

0x42db2d LEA	(%R15,%R13,1),%RBX

0x42db31 VMOVQ	%XMM12,%R13

0x42db36 IMUL	%R9,%R13

0x42db3a MOV	%RBX,0x40(%RSP)

0x42db3f SAL	$0x3,%RSI

0x42db43 SAL	$0x3,%RAX

0x42db47 MOV	%RDX,0x168(%RSP)

0x42db4f VMOVQ	%RSI,%XMM18

0x42db55 LEA	(%RCX,%RBX,8),%RSI

0x42db59 LEA	(%R10,%RDX,1),%RBX

0x42db5d VMOVQ	%RAX,%XMM22

0x42db63 VMOVQ	%XMM16,%RCX

0x42db69 LEA	(%RBX,%R13,1),%RAX

0x42db6d MOV	%RAX,0xc8(%RSP)

0x42db75 VMOVQ	0xb8(%R12),%XMM11

0x42db7f LEA	(%RCX,%RAX,8),%RCX

0x42db83 MOV	0xc0(%R12),%RAX

0x42db8b VMOVQ	0x78(%R12),%XMM10

0x42db92 MOV	%RAX,0x160(%RSP)

0x42db9a LEA	(%R10,%RAX,1),%RAX

0x42db9e VMOVQ	%XMM11,%RBX

0x42dba3 VMOVQ	%XMM11,%RDX

0x42dba8 IMUL	%R9,%RBX

0x42dbac SAL	$0x3,%RDX

0x42dbb0 ADD	%RBX,%RAX

0x42dbb3 VMOVQ	%RDX,%XMM21

0x42dbb9 VMOVQ	%XMM15,%RDX

0x42dbbe MOV	%RAX,0xc0(%RSP)

0x42dbc6 LEA	(%RDX,%RAX,8),%RAX

0x42dbca MOV	%R12,%RDX

0x42dbcd VMOVQ	%XMM10,%R12

0x42dbd2 SAL	$0x3,%R12

0x42dbd6 MOV	%RAX,0xf0(%RSP)

0x42dbde MOV	0x80(%RDX),%RAX

0x42dbe5 VMOVQ	%R12,%XMM24

0x42dbeb VMOVQ	%XMM10,%R12

0x42dbf0 IMUL	%R9,%R12

0x42dbf4 VMOVQ	%XMM14,%RDX

0x42dbf9 MOV	%RAX,0x178(%RSP)

0x42dc01 LEA	(%RAX,%R10,1),%RAX

0x42dc05 ADD	%R12,%RAX

0x42dc08 MOV	%RAX,0xa8(%RSP)

0x42dc10 LEA	(%RDX,%RAX,8),%RAX

0x42dc14 MOV	0x170(%RSP),%RDX

0x42dc1c ADD	%RDX,%R14

0x42dc1f MOV	0x90(%RSP),%RDX

0x42dc27 MOV	%R14,0x130(%RSP)

0x42dc2f MOV	0x168(%RSP),%R14

0x42dc37 VMOVQ	0xc8(%RDX),%XMM9

0x42dc3f VMOVQ	0xd8(%RDX),%XMM8

0x42dc47 ADD	%R14,%R13

0x42dc4a MOV	%R13,0xa0(%RSP)

0x42dc52 MOV	0x160(%RSP),%R13

0x42dc5a VMOVQ	%XMM9,%R14

0x42dc5f LEA	(%RBX,%R13,1),%RBX

0x42dc63 MOV	0xd0(%RDX),%R13

0x42dc6a IMUL	%R9,%R14

0x42dc6e MOV	%RBX,0x128(%RSP)

0x42dc76 MOV	0xe0(%RDX),%RBX

0x42dc7d MOV	%R13,0x170(%RSP)

0x42dc85 ADD	%R14,%R13

0x42dc88 MOV	%R13,0x168(%RSP)

0x42dc90 VMOVQ	%XMM8,%R13

0x42dc95 IMUL	%R9,%R13

0x42dc99 LEA	(%R13,%RBX,1),%RDX

0x42dc9e ADD	%R10,%RBX

0x42dca1 ADD	%RBX,%R13

0x42dca4 MOV	%RDX,0x160(%RSP)

0x42dcac MOV	0x90(%RSP),%RBX

0x42dcb4 MOV	0x178(%RSP),%RDX

0x42dcbc MOV	%R13,0xb0(%RSP)

0x42dcc4 SAL	$0x3,%R13

0x42dcc8 MOV	%R13,0xf8(%RSP)

0x42dcd0 VMOVQ	0xa8(%RBX),%XMM19

0x42dcd7 ADD	%R12,%RDX

0x42dcda MOV	0x170(%RSP),%R12

0x42dce2 MOV	%RDX,0x120(%RSP)

0x42dcea LEA	(%R10,%R12,1),%RDX

0x42dcee LEA	(%RDX,%R14,1),%R14

0x42dcf2 VMOVQ	%XMM19,%R12

0x42dcf8 VMOVQ	%XMM9,%RDX

0x42dcfd SAL	$0x3,%R12

0x42dd01 MOV	%R14,0xb8(%RSP)

0x42dd09 VMOVQ	%XMM19,%R13

0x42dd0f SAL	$0x3,%RDX

0x42dd13 VMOVQ	%R12,%XMM26

0x42dd19 SAL	$0x3,%R14

0x42dd1d VMOVQ	%RDX,%XMM27

0x42dd23 MOV	%R14,0x100(%RSP)

0x42dd2b MOV	0x158(%RSP),%RDX

0x42dd33 MOV	0x148(%RSP),%R12

0x42dd3b IMUL	%R13,%R9

0x42dd3f MOV	0xb0(%RBX),%RBX

0x42dd46 VMOVQ	%XMM8,%R14

0x42dd4b VMOVQ	%XMM5,0x158(%RSP)

0x42dd54 MOVQ	$0,0x138(%RSP)

0x42dd60 IMUL	%R13,%R11

0x42dd64 MOV	0x154(%RSP),%R13D

0x42dd6c VMOVQ	%XMM7,0x178(%RSP)

0x42dd75 MOVQ	$0,0x140(%RSP)

0x42dd81 MOVQ	$0,0x108(%RSP)

0x42dd8d MOVB	$0,0x11f(%RSP)

0x42dd95 VMOVSD	0x74b7b(%RIP),%XMM2

0x42dd9d MOV	%RAX,0x148(%RSP)

0x42dda5 SAL	$0x3,%R14

0x42dda9 LEA	(%R12,%R15,1),%R15

0x42ddad VMOVQ	%R14,%XMM31

0x42ddb3 LEA	(%RDX,%R12,1),%R14

0x42ddb7 LEA	(%R9,%RBX,1),%RDX

0x42ddbb MOV	%R15,0x30(%RSP)

0x42ddc0 MOV	0x60(%RSP),%R15D

0x42ddc5 MOV	%RDX,0x28(%RSP)

0x42ddca MOV	%R14,0x38(%RSP)

0x42ddcf LEA	(%RBX,%R11,1),%R14

0x42ddd3 MOV	%R14,0x20(%RSP)

0x42ddd8 SUB	%R13D,%R15D

0x42dddb ADD	%RBX,%R10

0x42ddde LEA	0x1(%R15),%EDX

0x42dde2 LEA	(%R10,%R9,1),%RBX

0x42dde6 VMOVQ	%XMM6,%R9

0x42ddeb LEA	(%R10,%R11,1),%R10

0x42ddef MOV	%EDX,0x98(%RSP)

0x42ddf6 MOV	0x150(%RSP),%EDX

0x42ddfd LEA	(%R9,%RBX,8),%R12

0x42de01 MOV	%R15D,0x64(%RSP)

0x42de06 LEA	0x2(%R15),%R15D

0x42de0a LEA	(%R9,%R10,8),%R14

0x42de0e MOV	%R12,0x88(%RSP)

0x42de16 MOV	%RBX,0x50(%RSP)

0x42de1b MOV	%R15D,%R9D

0x42de1e MOV	%R15D,%R12D

0x42de21 VMOVQ	%XMM4,%RBX

0x42de26 MOV	%R10,0x48(%RSP)

0x42de2b MOV	%R14,0x80(%RSP)

0x42de33 CMP	%EDX,%R13D

0x42de36 CMOVGE	%R13D,%EDX

0x42de3a AND	$0x7,%R15D

0x42de3e VMOVQ	%XMM5,%R13

0x42de43 ADD	$0x8,%RBX

0x42de47 SHR	$0x3,%R9D

0x42de4b MOV	%R15D,0x68(%RSP)

0x42de50 MOV	%EDX,0x9c(%RSP)

0x42de57 MOV	%RBX,0x70(%RSP)

0x42de5c VMOVDQA64	%XMM23,%XMM5

0x42de62 MOV	0xf0(%RSP),%R15

0x42de6a ADD	$0x8,%R13

0x42de6e AND	$-0x8,%R12D

0x42de72 MOV	%R13,0x78(%RSP)

0x42de77 MOV	%R12D,0x6c(%RSP)

0x42de7c SAL	$0x6,%R9

0x42de80 MOV	%R9,0x170(%RSP)

0x42de88 VMOVQ	%XMM1,%R9

0x42de8d VMOVDQA64	%XMM24,%XMM1

0x42de93 NOPW	%CS:(%RAX,%RAX,1)

0x42de9e XCHG	%AX,%AX

(177) 0x42dea0 MOV	0x150(%RSP),%EAX

(177) 0x42dea7 INCL	0x118(%RSP)

(177) 0x42deae CMP	%EAX,0x154(%RSP)

(177) 0x42deb5 JGE	42e62f

(177) 0x42debb CMPL	$0x6,0x98(%RSP)

(177) 0x42dec3 JBE	42e7b0

(177) 0x42dec9 MOV	0x108(%RSP),%R13

(177) 0x42ded1 MOV	0x80(%RSP),%RDX

(177) 0x42ded9 MOV	0x88(%RSP),%R14

(177) 0x42dee1 MOV	0xf8(%RSP),%R10

(177) 0x42dee9 MOV	0x100(%RSP),%R12

(177) 0x42def1 MOV	0x158(%RSP),%RBX

(177) 0x42def9 MOV	0x78(%RSP),%RAX

(177) 0x42defe VMOVQ	%XMM4,%R11

(177) 0x42df03 VMOVAPD	%XMM2,%XMM3

(177) 0x42df07 LEA	(%R13,%R14,1),%R14

(177) 0x42df0c LEA	(%R13,%RDX,1),%R13

(177) 0x42df11 MOV	0x70(%RSP),%RDX

(177) 0x42df16 LEA	(%R10,%R11,1),%R11

(177) 0x42df1a ADD	%R12,%RBX

(177) 0x42df1d LEA	(%RAX,%R12,1),%R12

(177) 0x42df21 ADD	%RDX,%R10

(177) 0x42df24 VMOVQ	%R10,%XMM7

(177) 0x42df29 XOR	%R10D,%R10D

(177) 0x42df2c TESTB	$0x40,0x170(%RSP)

(177) 0x42df34 JE	42dfcc

(177) 0x42df3a VMOVUPD	(%RSI),%ZMM0

(177) 0x42df40 VADDPD	(%RDI),%ZMM0,%ZMM0

(177) 0x42df46 VMULSD	(%R9),%XMM2,%XMM25

(177) 0x42df4c VBROADCASTSD	%XMM25,%ZMM28

(177) 0x42df52 VADDPD	(%R14),%ZMM0,%ZMM0

(177) 0x42df58 VMULPD	(%R8),%ZMM28,%ZMM29

(177) 0x42df5e VMOVQ	%XMM7,%RAX

(177) 0x42df63 MOV	0x148(%RSP),%R10

(177) 0x42df6b VADDPD	(%R13),%ZMM0,%ZMM0

(177) 0x42df72 MOV	0x170(%RSP),%RDX

(177) 0x42df7a VMULPD	%ZMM29,%ZMM0,%ZMM0

(177) 0x42df80 VMOVUPD	%ZMM0,(%RCX)

(177) 0x42df86 VMOVUPD	(%R12),%ZMM0

(177) 0x42df8d VADDPD	(%RBX),%ZMM0,%ZMM0

(177) 0x42df93 VMULSD	(%R9),%XMM2,%XMM30

(177) 0x42df99 VADDPD	(%R11),%ZMM0,%ZMM0

(177) 0x42df9f VBROADCASTSD	%XMM30,%ZMM23

(177) 0x42dfa5 VMULPD	(%R15),%ZMM23,%ZMM24

(177) 0x42dfab VADDPD	(%RAX),%ZMM0,%ZMM0

(177) 0x42dfb1 VMULPD	%ZMM24,%ZMM0,%ZMM0

(177) 0x42dfb7 VMOVUPD	%ZMM0,(%R10)

(177) 0x42dfbd MOV	$0x40,%R10D

(177) 0x42dfc3 CMP	%RDX,%R10

(177) 0x42dfc6 JE	42e0ff

(177) 0x42dfcc MOV	0x148(%RSP),%RAX

(177) 0x42dfd4 VMOVQ	%R11,%XMM28

  (178) 0x42dfda VMOVUPD	(%RSI,%R10,1),%ZMM0

  (178) 0x42dfe1 VADDPD	(%RDI,%R10,1),%ZMM0,%ZMM0

  (178) 0x42dfe8 VMULSD	(%R9),%XMM2,%XMM25

  (178) 0x42dfee VBROADCASTSD	%XMM25,%ZMM29

  (178) 0x42dff4 VADDPD	(%R14,%R10,1),%ZMM0,%ZMM0

  (178) 0x42dffb VMULPD	(%R8,%R10,1),%ZMM29,%ZMM30

  (178) 0x42e002 VMOVQ	%XMM28,%R11

  (178) 0x42e008 VADDPD	(%R13,%R10,1),%ZMM0,%ZMM0

  (178) 0x42e010 VMOVQ	%XMM7,%RDX

  (178) 0x42e015 VMULPD	%ZMM30,%ZMM0,%ZMM0

  (178) 0x42e01b VMOVUPD	%ZMM0,(%RCX,%R10,1)

  (178) 0x42e022 VMOVUPD	(%R12,%R10,1),%ZMM0

  (178) 0x42e029 VADDPD	(%RBX,%R10,1),%ZMM0,%ZMM0

  (178) 0x42e030 VMULSD	(%R9),%XMM2,%XMM23

  (178) 0x42e036 VADDPD	(%R11,%R10,1),%ZMM0,%ZMM0

  (178) 0x42e03d VBROADCASTSD	%XMM23,%ZMM24

  (178) 0x42e043 VMULPD	(%R15,%R10,1),%ZMM24,%ZMM25

  (178) 0x42e04a VADDPD	(%RDX,%R10,1),%ZMM0,%ZMM0

  (178) 0x42e051 VMULPD	%ZMM25,%ZMM0,%ZMM0

  (178) 0x42e057 VMOVUPD	%ZMM0,(%RAX,%R10,1)

  (178) 0x42e05e VMOVUPD	0x40(%RSI,%R10,1),%ZMM0

  (178) 0x42e066 VADDPD	0x40(%RDI,%R10,1),%ZMM0,%ZMM0

  (178) 0x42e06e VMULSD	(%R9),%XMM2,%XMM29

  (178) 0x42e074 VADDPD	0x40(%R14,%R10,1),%ZMM0,%ZMM0

  (178) 0x42e07c VBROADCASTSD	%XMM29,%ZMM30

  (178) 0x42e082 VMULPD	0x40(%R8,%R10,1),%ZMM30,%ZMM23

  (178) 0x42e08a VADDPD	0x40(%R13,%R10,1),%ZMM0,%ZMM0

  (178) 0x42e092 VMULPD	%ZMM23,%ZMM0,%ZMM0

  (178) 0x42e098 VMOVUPD	%ZMM0,0x40(%RCX,%R10,1)

  (178) 0x42e0a0 VMOVUPD	0x40(%R12,%R10,1),%ZMM0

  (178) 0x42e0a8 VADDPD	0x40(%RBX,%R10,1),%ZMM0,%ZMM0

  (178) 0x42e0b0 VMULSD	(%R9),%XMM2,%XMM24

  (178) 0x42e0b6 VADDPD	0x40(%R11,%R10,1),%ZMM0,%ZMM0

  (178) 0x42e0be VBROADCASTSD	%XMM24,%ZMM25

  (178) 0x42e0c4 VMULPD	0x40(%R10,%R15,1),%ZMM25,%ZMM29

  (178) 0x42e0cc MOV	0x170(%RSP),%R11

  (178) 0x42e0d4 VADDPD	0x40(%RDX,%R10,1),%ZMM0,%ZMM0

  (178) 0x42e0dc VMULPD	%ZMM29,%ZMM0,%ZMM0

  (178) 0x42e0e2 VMOVUPD	%ZMM0,0x40(%RAX,%R10,1)

  (178) 0x42e0ea SUB	$-0x80,%R10

  (178) 0x42e0ee CMP	%R11,%R10

  (178) 0x42e0f1 JNE	42dfda

(177) 0x42e0f7 MOV	%RAX,0x148(%RSP)

(177) 0x42e0ff MOV	0x6c(%RSP),%R14D

(177) 0x42e104 MOV	0x154(%RSP),%R13D

(177) 0x42e10c MOV	0x68(%RSP),%EBX

(177) 0x42e110 MOV	%R14D,%R10D

(177) 0x42e113 LEA	(%R14,%R13,1),%R11D

(177) 0x42e117 TEST	%EBX,%EBX

(177) 0x42e119 JE	42e62f

(177) 0x42e11f MOV	0x64(%RSP),%R12D

(177) 0x42e124 SUB	%R10D,%R12D

(177) 0x42e127 LEA	0x2(%R12),%R13D

(177) 0x42e12c INC	%R12D

(177) 0x42e12f CMP	$0x2,%R12D

(177) 0x42e133 JBE	42e263

(177) 0x42e139 MOV	0xb8(%RSP),%RAX

(177) 0x42e141 MOV	0x58(%RSP),%RBX

(177) 0x42e146 MOV	0x140(%RSP),%R12

(177) 0x42e14e VMULSD	(%R9),%XMM3,%XMM28

(177) 0x42e154 VBROADCASTSD	%XMM28,%YMM30

(177) 0x42e15a MOV	0xb0(%RSP),%RDX

(177) 0x42e162 LEA	(%R10,%RAX,1),%R14

(177) 0x42e166 MOV	0x40(%RSP),%RAX

(177) 0x42e16b LEA	(%R10,%RBX,1),%RBX

(177) 0x42e16f ADD	%R12,%RBX

(177) 0x42e172 LEA	(%R10,%R12,1),%R12

(177) 0x42e176 LEA	(%R10,%RDX,1),%RDX

(177) 0x42e17a ADD	%RAX,%R12

(177) 0x42e17d MOV	0x178(%RSP),%RAX

(177) 0x42e185 VMOVUPD	(%RAX,%R12,8),%YMM7

(177) 0x42e18b VADDPD	(%RAX,%RBX,8),%YMM7,%YMM0

(177) 0x42e190 MOV	0x138(%RSP),%RBX

(177) 0x42e198 MOV	0x50(%RSP),%R12

(177) 0x42e19d VMOVQ	%XMM6,%RAX

(177) 0x42e1a2 LEA	(%R10,%RBX,1),%RBX

(177) 0x42e1a6 LEA	(%RBX,%R12,1),%R12

(177) 0x42e1aa VADDPD	(%RAX,%R12,8),%YMM0,%YMM7

(177) 0x42e1b0 MOV	0x48(%RSP),%R12

(177) 0x42e1b5 ADD	%R12,%RBX

(177) 0x42e1b8 VADDPD	(%RAX,%RBX,8),%YMM7,%YMM0

(177) 0x42e1bd MOV	0xd0(%RSP),%RBX

(177) 0x42e1c5 VMOVQ	%XMM17,%RAX

(177) 0x42e1cb LEA	(%R10,%RBX,1),%R12

(177) 0x42e1cf MOV	0xc8(%RSP),%RBX

(177) 0x42e1d7 VMULPD	(%RAX,%R12,8),%YMM30,%YMM23

(177) 0x42e1de VMOVQ	%XMM16,%RAX

(177) 0x42e1e4 LEA	(%R10,%RBX,1),%R12

(177) 0x42e1e8 MOV	0x158(%RSP),%RBX

(177) 0x42e1f0 VMULPD	%YMM23,%YMM0,%YMM7

(177) 0x42e1f6 VMOVUPD	%YMM7,(%RAX,%R12,8)

(177) 0x42e1fc VMOVUPD	0x8(%RBX,%R14,8),%YMM0

(177) 0x42e203 VADDPD	(%RBX,%R14,8),%YMM0,%YMM7

(177) 0x42e209 VMOVQ	%XMM4,%R14

(177) 0x42e20e VADDPD	(%R14,%RDX,8),%YMM7,%YMM0

(177) 0x42e214 VMOVQ	%XMM15,%RAX

(177) 0x42e219 MOV	0xa8(%RSP),%RBX

(177) 0x42e221 VADDPD	0x8(%R14,%RDX,8),%YMM0,%YMM7

(177) 0x42e228 MOV	0xc0(%RSP),%RDX

(177) 0x42e230 VMOVQ	%XMM14,%R14

(177) 0x42e235 LEA	(%R10,%RDX,1),%R12

(177) 0x42e239 ADD	%RBX,%R10

(177) 0x42e23c VMULPD	(%RAX,%R12,8),%YMM30,%YMM24

(177) 0x42e243 VMULPD	%YMM24,%YMM7,%YMM0

(177) 0x42e249 VMOVUPD	%YMM0,(%R14,%R10,8)

(177) 0x42e24f MOV	%R13D,%R10D

(177) 0x42e252 AND	$-0x4,%R10D

(177) 0x42e256 ADD	%R10D,%R11D

(177) 0x42e259 AND	$0x3,%R13D

(177) 0x42e25d JE	42e62f

(177) 0x42e263 MOV	0x138(%RSP),%R12

(177) 0x42e26b MOV	0x28(%RSP),%RBX

(177) 0x42e270 MOV	0x140(%RSP),%R13

(177) 0x42e278 MOV	0x30(%RSP),%RDX

(177) 0x42e27d MOV	0x38(%RSP),%RAX

(177) 0x42e282 VMULSD	(%R9),%XMM3,%XMM25

(177) 0x42e288 LEA	(%R12,%RBX,1),%R10

(177) 0x42e28c LEA	(%R13,%RDX,1),%R14

(177) 0x42e291 MOV	%R10,0xe0(%RSP)

(177) 0x42e299 MOVSXD	%R11D,%R10

(177) 0x42e29c MOV	%R14,0xe8(%RSP)

(177) 0x42e2a4 ADD	%R13,%RAX

(177) 0x42e2a7 LEA	(%R10,%R14,1),%RBX

(177) 0x42e2ab MOV	0x178(%RSP),%R14

(177) 0x42e2b3 MOV	0x20(%RSP),%R13

(177) 0x42e2b8 MOV	%RAX,0xf0(%RSP)

(177) 0x42e2c0 LEA	(%R10,%RAX,1),%RAX

(177) 0x42e2c4 VMOVSD	(%R14,%RAX,8),%XMM0

(177) 0x42e2ca MOV	0xe0(%RSP),%RAX

(177) 0x42e2d2 ADD	%R13,%R12

(177) 0x42e2d5 VADDSD	(%R14,%RBX,8),%XMM0,%XMM7

(177) 0x42e2db MOV	%R12,0xd8(%RSP)

(177) 0x42e2e3 MOV	0xd8(%RSP),%R13

(177) 0x42e2eb MOV	0xa0(%RSP),%R12

(177) 0x42e2f3 VMOVQ	%XMM6,%R14

(177) 0x42e2f8 LEA	(%R10,%RAX,1),%RBX

(177) 0x42e2fc MOV	0x130(%RSP),%RAX

(177) 0x42e304 VADDSD	(%R14,%RBX,8),%XMM7,%XMM0

(177) 0x42e30a ADD	%R10,%R13

(177) 0x42e30d VMOVQ	%XMM17,%RBX

(177) 0x42e313 LEA	(%R10,%R12,1),%RDX

(177) 0x42e317 VADDSD	(%R14,%R13,8),%XMM0,%XMM7

(177) 0x42e31d VMOVQ	%XMM16,%R14

(177) 0x42e323 ADD	%R10,%RAX

(177) 0x42e326 VMULSD	(%RBX,%RAX,8),%XMM25,%XMM29

(177) 0x42e32d MOV	0x168(%RSP),%RAX

(177) 0x42e335 VMULSD	%XMM29,%XMM7,%XMM0

(177) 0x42e33b VMOVSD	%XMM0,(%R14,%RDX,8)

(177) 0x42e341 MOV	0x160(%RSP),%R14

(177) 0x42e349 LEA	0x1(%R11),%EDX

(177) 0x42e34d VMULSD	(%R9),%XMM3,%XMM30

(177) 0x42e353 MOVSXD	%EDX,%RBX

(177) 0x42e356 LEA	(%RAX,%RBX,1),%R13

(177) 0x42e35a VMOVQ	%R13,%XMM24

(177) 0x42e360 LEA	(%R14,%RBX,1),%R13

(177) 0x42e364 LEA	(%R10,%R14,1),%R14

(177) 0x42e368 VMOVQ	%R13,%XMM23

(177) 0x42e36e MOV	0x120(%RSP),%R13

(177) 0x42e376 ADD	%R10,%R13

(177) 0x42e379 VMOVQ	%R13,%XMM25

(177) 0x42e37f LEA	(%R10,%RAX,1),%R13

(177) 0x42e383 MOV	0x158(%RSP),%RAX

(177) 0x42e38b VMOVSD	(%RAX,%R13,8),%XMM7

(177) 0x42e391 VMOVQ	%XMM24,%R13

(177) 0x42e397 VADDSD	(%RAX,%R13,8),%XMM7,%XMM0

(177) 0x42e39d VMOVQ	%XMM4,%R13

(177) 0x42e3a2 VADDSD	(%R13,%R14,8),%XMM0,%XMM7

(177) 0x42e3a9 VMOVQ	%XMM23,%R14

(177) 0x42e3af VADDSD	(%R13,%R14,8),%XMM7,%XMM0

(177) 0x42e3b6 MOV	0x128(%RSP),%R13

(177) 0x42e3be VMOVQ	%XMM15,%R14

(177) 0x42e3c3 ADD	%R13,%R10

(177) 0x42e3c6 VMOVQ	%XMM25,%R13

(177) 0x42e3cc VMULSD	(%R14,%R10,8),%XMM30,%XMM29

(177) 0x42e3d3 MOV	0x150(%RSP),%R14D

(177) 0x42e3db VMOVQ	%XMM14,%R10

(177) 0x42e3e0 VMULSD	%XMM29,%XMM0,%XMM7

(177) 0x42e3e6 VMOVSD	%XMM7,(%R10,%R13,8)

(177) 0x42e3ec CMP	%R14D,%EDX

(177) 0x42e3ef JGE	42e62f

(177) 0x42e3f5 MOV	0xe8(%RSP),%R10

(177) 0x42e3fd MOV	0x178(%RSP),%R14

(177) 0x42e405 LEA	(%R12,%RBX,1),%RDX

(177) 0x42e409 VMULSD	(%R9),%XMM3,%XMM25

(177) 0x42e40f ADD	%RBX,%R10

(177) 0x42e412 VMOVQ	%R10,%XMM0

(177) 0x42e417 MOV	0xf0(%RSP),%R10

(177) 0x42e41f VMOVQ	%XMM0,%R13

(177) 0x42e424 VMOVSD	(%R14,%R13,8),%XMM7

(177) 0x42e42a VMOVQ	%XMM6,%R13

(177) 0x42e42f ADD	%RBX,%R10

(177) 0x42e432 VADDSD	(%R14,%R10,8),%XMM7,%XMM0

(177) 0x42e438 MOV	0xe0(%RSP),%R10

(177) 0x42e440 LEA	(%R10,%RBX,1),%R14

(177) 0x42e444 MOV	0xd8(%RSP),%R10

(177) 0x42e44c VADDSD	(%R13,%R14,8),%XMM0,%XMM7

(177) 0x42e453 MOV	0x130(%RSP),%R14

(177) 0x42e45b ADD	%RBX,%R10

(177) 0x42e45e VADDSD	(%R13,%R10,8),%XMM7,%XMM0

(177) 0x42e465 ADD	%RBX,%R14

(177) 0x42e468 VMOVQ	%XMM17,%R13

(177) 0x42e46e VMOVQ	%XMM16,%R10

(177) 0x42e474 VMULSD	(%R13,%R14,8),%XMM25,%XMM28

(177) 0x42e47c MOV	0x160(%RSP),%R14

(177) 0x42e484 VMULSD	%XMM28,%XMM0,%XMM7

(177) 0x42e48a VMOVSD	%XMM7,(%R10,%RDX,8)

(177) 0x42e490 LEA	0x2(%R11),%EDX

(177) 0x42e494 MOV	0x120(%RSP),%R13

(177) 0x42e49c MOVSXD	%EDX,%R10

(177) 0x42e49f MOV	0x168(%RSP),%RDX

(177) 0x42e4a7 ADD	%R10,%R14

(177) 0x42e4aa VMOVQ	%R14,%XMM7

(177) 0x42e4af LEA	(%RBX,%R13,1),%R14

(177) 0x42e4b3 VMOVQ	%XMM24,%R13

(177) 0x42e4b9 VMULSD	(%R9),%XMM3,%XMM24

(177) 0x42e4bf ADD	%R10,%RDX

(177) 0x42e4c2 VMOVQ	%R14,%XMM30

(177) 0x42e4c8 VMOVQ	%XMM23,%R14

(177) 0x42e4ce VMOVSD	(%RAX,%RDX,8),%XMM0

(177) 0x42e4d3 VADDSD	(%RAX,%R13,8),%XMM0,%XMM0

(177) 0x42e4d9 VMOVQ	%XMM4,%RAX

(177) 0x42e4de VMOVQ	%XMM7,%R13

(177) 0x42e4e3 VADDSD	(%RAX,%R14,8),%XMM0,%XMM0

(177) 0x42e4e9 VADDSD	(%RAX,%R13,8),%XMM0,%XMM0

(177) 0x42e4ef MOV	0x128(%RSP),%RAX

(177) 0x42e4f7 VMOVQ	%XMM15,%R14

(177) 0x42e4fc VMOVQ	%XMM30,%R13

(177) 0x42e502 ADD	%RAX,%RBX

(177) 0x42e505 VMULSD	(%R14,%RBX,8),%XMM24,%XMM23

(177) 0x42e50c VMOVQ	%XMM14,%RBX

(177) 0x42e511 VMULSD	%XMM23,%XMM0,%XMM0

(177) 0x42e517 VMOVSD	%XMM0,(%RBX,%R13,8)

(177) 0x42e51d CMP	%R11D,0x60(%RSP)

(177) 0x42e522 JLE	42e62f

(177) 0x42e528 LEA	(%R12,%R10,1),%RBX

(177) 0x42e52c MOV	0xe8(%RSP),%R14

(177) 0x42e534 MOV	0xf0(%RSP),%R12

(177) 0x42e53c MOV	0x178(%RSP),%RAX

(177) 0x42e544 MOV	0xe0(%RSP),%R13

(177) 0x42e54c VMULSD	(%R9),%XMM3,%XMM29

(177) 0x42e552 ADD	$0x3,%R11D

(177) 0x42e556 MOVSXD	%R11D,%R11

(177) 0x42e559 ADD	%R10,%R12

(177) 0x42e55c ADD	%R10,%R14

(177) 0x42e55f VMOVSD	(%RAX,%R12,8),%XMM0

(177) 0x42e565 ADD	%R10,%R13

(177) 0x42e568 VADDSD	(%RAX,%R14,8),%XMM0,%XMM0

(177) 0x42e56e VMOVQ	%XMM6,%R12

(177) 0x42e573 MOV	0xd8(%RSP),%RAX

(177) 0x42e57b VADDSD	(%R12,%R13,8),%XMM0,%XMM0

(177) 0x42e581 MOV	0x130(%RSP),%R13

(177) 0x42e589 VMOVQ	%XMM16,%R14

(177) 0x42e58f ADD	%R10,%RAX

(177) 0x42e592 VADDSD	(%R12,%RAX,8),%XMM0,%XMM0

(177) 0x42e598 LEA	(%R13,%R10,1),%R12

(177) 0x42e59d VMOVQ	%XMM17,%RAX

(177) 0x42e5a3 MOV	0x168(%RSP),%R13

(177) 0x42e5ab VMULSD	(%RAX,%R12,8),%XMM29,%XMM25

(177) 0x42e5b2 MOV	0x158(%RSP),%RAX

(177) 0x42e5ba VMULSD	%XMM25,%XMM0,%XMM0

(177) 0x42e5c0 VMOVSD	%XMM0,(%R14,%RBX,8)

(177) 0x42e5c6 MOV	0x160(%RSP),%R14

(177) 0x42e5ce MOV	0x120(%RSP),%RBX

(177) 0x42e5d6 VMULSD	(%R9),%XMM3,%XMM3

(177) 0x42e5db LEA	(%R13,%R11,1),%R12

(177) 0x42e5e0 VMOVQ	%XMM4,%R13

(177) 0x42e5e5 VMOVSD	(%RAX,%R12,8),%XMM0

(177) 0x42e5eb VADDSD	(%RAX,%RDX,8),%XMM0,%XMM0

(177) 0x42e5f0 VMOVQ	%XMM7,%RDX

(177) 0x42e5f5 VMOVQ	%XMM15,%R12

(177) 0x42e5fa ADD	%R14,%R11

(177) 0x42e5fd VADDSD	(%R13,%RDX,8),%XMM0,%XMM7

(177) 0x42e604 LEA	(%RBX,%R10,1),%RBX

(177) 0x42e608 VADDSD	(%R13,%R11,8),%XMM7,%XMM0

(177) 0x42e60f MOV	0x128(%RSP),%R11

(177) 0x42e617 ADD	%R11,%R10

(177) 0x42e61a VMULSD	(%R12,%R10,8),%XMM3,%XMM7

(177) 0x42e620 VMOVQ	%XMM14,%R10

(177) 0x42e625 VMULSD	%XMM7,%XMM0,%XMM0

(177) 0x42e629 VMOVSD	%XMM0,(%R10,%RBX,8)

(177) 0x42e62f MOV	0x150(%RSP),%EBX

(177) 0x42e636 MOV	0x114(%RSP),%EAX

(177) 0x42e63d MOVZX	0x11f(%RSP),%R13D

(177) 0x42e646 MOV	$0x1,%EDX

(177) 0x42e64b CMP	%EBX,0x154(%RSP)

(177) 0x42e652 VMOVQ	%XMM18,%R11

(177) 0x42e658 VMOVQ	%XMM5,%R14

(177) 0x42e65d CMOVLE	0x9c(%RSP),%EAX

(177) 0x42e665 VMOVQ	%XMM22,%R12

(177) 0x42e66b VMOVQ	%XMM21,%R10

(177) 0x42e671 VMOVQ	%XMM1,%RBX

(177) 0x42e676 CMOVLE	%EDX,%R13D

(177) 0x42e67a VMOVQ	%XMM11,%RDX

(177) 0x42e67f ADD	%RBX,0x148(%RSP)

(177) 0x42e687 ADD	%R14,%R8

(177) 0x42e68a MOV	%EAX,0x114(%RSP)

(177) 0x42e691 VMOVQ	%XMM9,%R14

(177) 0x42e696 VMOVQ	%XMM13,%RAX

(177) 0x42e69b MOV	%R13B,0x11f(%RSP)

(177) 0x42e6a3 ADD	%RAX,0x130(%RSP)

(177) 0x42e6ab VMOVQ	%XMM12,%R13

(177) 0x42e6b0 ADD	%RAX,0xd0(%RSP)

(177) 0x42e6b8 ADD	%R13,0xa0(%RSP)

(177) 0x42e6c0 ADD	%R13,0xc8(%RSP)

(177) 0x42e6c8 ADD	%R11,%RDI

(177) 0x42e6cb ADD	%R11,%RSI

(177) 0x42e6ce ADD	%R12,%RCX

(177) 0x42e6d1 VMOVQ	%XMM8,%R11

(177) 0x42e6d6 VMOVQ	%XMM10,%R12

(177) 0x42e6db ADD	%R11,0x160(%RSP)

(177) 0x42e6e3 ADD	%R12,0x120(%RSP)

(177) 0x42e6eb ADD	%R11,0xb0(%RSP)

(177) 0x42e6f3 ADD	%RDX,0x128(%RSP)

(177) 0x42e6fb ADD	%R14,0x168(%RSP)

(177) 0x42e703 ADD	%RDX,0xc0(%RSP)

(177) 0x42e70b ADD	%R14,0xb8(%RSP)

(177) 0x42e713 ADD	%R12,0xa8(%RSP)

(177) 0x42e71b MOV	0x118(%RSP),%R13D

(177) 0x42e723 ADD	%R10,%R15

(177) 0x42e726 VMOVQ	%XMM26,%R11

(177) 0x42e72c VMOVQ	%XMM27,%R12

(177) 0x42e732 ADD	%R11,0x108(%RSP)

(177) 0x42e73a ADD	%R12,0x100(%RSP)

(177) 0x42e742 VMOVQ	%XMM31,%R10

(177) 0x42e748 VMOVQ	%XMM20,%RBX

(177) 0x42e74e ADD	%R10,0xf8(%RSP)

(177) 0x42e756 ADD	%RBX,0x140(%RSP)

(177) 0x42e75e VMOVQ	%XMM19,%RAX

(177) 0x42e764 ADD	%RAX,0x138(%RSP)

(177) 0x42e76c CMP	%R13D,0x110(%RSP)

(177) 0x42e774 JG	42dea0

0x42e77a CMPB	$0,0x11f(%RSP)

0x42e782 JE	42e7d1

0x42e784 MOV	0x90(%RSP),%R8

0x42e78c MOV	0x114(%RSP),%EDI

0x42e793 MOV	%EDI,0xe8(%R8)

0x42e79a VZEROUPPER

0x42e79d LEA	-0x28(%RBP),%RSP

0x42e7a1 POP	%RBX

0x42e7a2 POP	%R12

0x42e7a4 POP	%R13

0x42e7a6 POP	%R14

0x42e7a8 POP	%R15

0x42e7aa POP	%RBP

0x42e7ab RET

0x42e7ac NOPL	(%RAX)

(177) 0x42e7b0 MOV	0x154(%RSP),%R11D

(177) 0x42e7b8 XOR	%R10D,%R10D

(177) 0x42e7bb VMOVSD	0x74155(%RIP),%XMM3

(177) 0x42e7c3 JMP	42e11f

0x42e7c8 INC	%EAX

0x42e7ca XOR	%EDX,%EDX

0x42e7cc JMP	42d9df

0x42e7d1 VZEROUPPER

0x42e7d4 LEA	-0x28(%RBP),%RSP

0x42e7d8 POP	%RBX

0x42e7d9 POP	%R12

0x42e7db POP	%R13

0x42e7dd POP	%R14

0x42e7df POP	%R15

0x42e7e1 POP	%RBP

0x42e7e2 RET

0x42e7e3 NOPW	%CS:(%RAX,%RAX,1)

0x42e7ee XCHG	%AX,%AX

Coverage (%)	Name	Source Location	Module
►95.69+	gomp_thread_start	team.c:130	libgomp.so.1.0.0
○	start_thread		libc.so.6
○	__GI___clone3		libc.so.6
►4.20+	GOMP_parallel	libgomp.h:982	libgomp.so.1.0.0
○	flux_calc_kernel	flux_calc_kernel.f90:49	exec
○	flux_calc	flux_calc.f90:41	exec
○	hydro	hydro.f90:62	exec
○	main	clover_leaf.f90:41	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	clover_leaf.f90:41	exec

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run gcc_0

Source file and lines	flux_calc_kernel.f90:49-60
Module	exec

The function is defined in /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/flux_calc_kernel.f90:49-60.

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 33.38 to 14.50 cycles (2.30x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)
To reference allocatable arrays, use "allocatable" instead of "pointer" pointers or qualify them with the "contiguous" attribute (Fortran 2008)
For structures, limit to one indirection. For example, use a_b%c instead of a%b%c with a_b set to a%b before this function

Vectorization

Your function is probably not vectorized. Only 11% of vector register length is used (average across all SSE/AVX instructions). By vectorizing your function, you can lower the cost of an iteration from 33.38 to 2.14 cycles (15.59x speedup).

Details

Store and arithmetical SSE/AVX instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): do i a(i)%x = b(i)%x (slow, non stride 1) => do i a%x(i) = b%x(i) (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

unknown: 2 occurrences►
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/flux_calc_kernel.f90:53
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/flux_calc_kernel.f90:53

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

CMOVGE: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/flux_calc_kernel.f90:60
IDIV: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/flux_calc_kernel.f90:53

Conversion instructions

Detected expensive conversion instructions.

Details

CLTD: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/flux_calc_kernel.f90:53

Workaround

Avoid mixing data with different types. In particular, check if the type of constants is the same as array elements.

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 369 bytes. The binary function is storing 381 bytes.

General properties

nb instructions	269
nb uops	267
loop length	1390
used x86 registers	16
used mmx registers	0
used xmm registers	26
used ymm registers	0
used zmm registers	0
nb stack references	48

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	33.38 cycles
front end	33.38 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	17.50	17.50	17.50	17.50	17.50	17.50	26.75	26.75	26.75	26.75	0.00	0.00	0.00	0.00	14.50	14.50
cycles	17.50	17.50	17.50	17.50	17.50	17.50	26.75	26.75	26.75	26.75	0.00	0.00	0.00	0.00	14.50	14.50

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

6.00

Cycles summary

Front-end	33.38
Dispatch	26.75
DIV/SQRT	6.00
Overall L1	33.38

Vectorization ratios

INT

all	3%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
other	8%

all	0%
load	0%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	NA (no other vectorizable/vectorized instructions)

INT+FP

all	3%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	0%
other	8%

Vector efficiency ratios

INT

all	11%
load	11%
store	10%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
other	12%

all	12%
load	12%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	NA (no other vectorizable/vectorized instructions)

INT+FP

all	11%
load	11%
store	10%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	6%
other	12%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 33.38 cycles. At this rate:

4% of peak load performance is reached (11.06 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
8% of peak store performance is reached (11.42 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Performance is limited by instruction throughput (loading/decoding program instructions to execution core) (front-end is a bottleneck). By removing all these bottlenecks, you can lower the cost of an iteration from 33.38 to 26.75 cycles (1.25x speedup).

ASM code

In the binary file, the address of the function is: 42d990

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %RDI,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
AND $-0x40,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB $0x180,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x10(%RDI),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RDI,0x90(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV (%RAX),%R12D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
CALL 402380 <@plt_start@+0x360>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV %EAX,%EBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CALL 4022f0 <@plt_start@+0x2d0>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV 0x18(%R15),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %EAX,%ECX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV (%RDX),%EAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
ADD $0x2,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB %R12D,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CLTD																				scal (6.3%)
IDIV %EBX	2	0	0	0	2	0	0	0	0	0	0	0	0	0	0	0	0	9-14	6	scal (6.3%)
CMP %EDX,%ECX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
JL 42e7c8 <__flux_calc_kernel_module_MOD_flux_calc_kernel._omp_fn.0+0xe38>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
IMUL %EAX,%ECX	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	N/A
ADD %ECX,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD %EDX,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP %EAX,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
JGE 42e79d <__flux_calc_kernel_module_MOD_flux_calc_kernel._omp_fn.0+0xe0d>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
LEA (%R12,%RDX,1),%R8D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ADD %R12D,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x90(%RSP),%R12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %EAX,0x110(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV %R8D,0x118(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV 0x8(%R12),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%R12),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
VMOVQ 0x98(%R12),%XMM20	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVQ 0x88(%R12),%XMM13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVQ 0x38(%R12),%XMM7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MOV 0xa0(%R12),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x90(%R12),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
VMOVQ 0x28(%R12),%XMM17	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVQ 0x68(%R12),%XMM12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVQ 0x58(%R12),%XMM16	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVQ 0x40(%R12),%XMM5	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVQ 0x20(%R12),%XMM1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVQ 0x48(%R12),%XMM6	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVQ 0x30(%R12),%XMM15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MOV (%R9),%R14D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOVSXD (%RDI),%R10	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	N/A
MOVSXD %R8D,%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
VMOVQ 0x50(%R12),%XMM4	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVQ %XMM20,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
MOV %R13,0x148(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RAX,0x170(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMOVQ 0x60(%R12),%XMM14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
IMUL %R9,%RDI	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	N/A
VMOVQ %XMM7,%R11	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVQ %XMM17,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVQ %XMM13,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
SAL $0x3,%RCX	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
MOV %R14D,0x60(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV %RDI,0x158(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMOVQ %XMM20,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
MOV %R10D,0x154(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
LEA 0x2(%R14),%R15D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
VMOVQ %XMM13,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
ADD %R10,%R13	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD %R10,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
IMUL %R9,%R14	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	N/A
MOV %R15D,0x150(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
LEA (%R13,%RDI,1),%R15	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
VMOVQ %RCX,%XMM23	1	0	0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2	1	scal (12.5%)
LEA (%R11,%R15,8),%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %R15,0x58(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
LEA 0x1(%R9),%R11	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
VMOVQ %XMM20,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
IMUL %R11,%R15	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	N/A
VMOVQ %XMM7,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
LEA (%RAX,%R14,1),%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
VMOVQ %XMM12,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
MOV %RDX,0xd0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
LEA (%R8,%RDX,8),%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV 0x70(%R12),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
LEA (%R15,%R13,1),%RBX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
VMOVQ %XMM12,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
IMUL %R9,%R13	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	N/A
MOV %RBX,0x40(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
SAL $0x3,%RSI	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	scal (12.5%)
SAL $0x3,%RAX	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
MOV %RDX,0x168(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMOVQ %RSI,%XMM18	1	0	0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2	1	scal (12.5%)
LEA (%RCX,%RBX,8),%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA (%R10,%RDX,1),%RBX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
VMOVQ %RAX,%XMM22	1	0	0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2	1	scal (12.5%)
VMOVQ %XMM16,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
LEA (%RBX,%R13,1),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %RAX,0xc8(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMOVQ 0xb8(%R12),%XMM11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
LEA (%RCX,%RAX,8),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV 0xc0(%R12),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
VMOVQ 0x78(%R12),%XMM10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MOV %RAX,0x160(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
LEA (%R10,%RAX,1),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
VMOVQ %XMM11,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVQ %XMM11,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
IMUL %R9,%RBX	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	N/A
SAL $0x3,%RDX	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
ADD %RBX,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
VMOVQ %RDX,%XMM21	1	0	0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2	1	scal (12.5%)
VMOVQ %XMM15,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
MOV %RAX,0xc0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
LEA (%RDX,%RAX,8),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %R12,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VMOVQ %XMM10,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
SAL $0x3,%R12	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
MOV %RAX,0xf0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x80(%RDX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
VMOVQ %R12,%XMM24	1	0	0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2	1	scal (12.5%)
VMOVQ %XMM10,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
IMUL %R9,%R12	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	N/A
VMOVQ %XMM14,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
MOV %RAX,0x178(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
LEA (%RAX,%R10,1),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ADD %R12,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RAX,0xa8(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
LEA (%RDX,%RAX,8),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV 0x170(%RSP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
ADD %RDX,%R14	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x90(%RSP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %R14,0x130(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x168(%RSP),%R14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
VMOVQ 0xc8(%RDX),%XMM9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVQ 0xd8(%RDX),%XMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
ADD %R14,%R13	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R13,0xa0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x160(%RSP),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
VMOVQ %XMM9,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
LEA (%RBX,%R13,1),%RBX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV 0xd0(%RDX),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
IMUL %R9,%R14	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	N/A
MOV %RBX,0x128(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xe0(%RDX),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %R13,0x170(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
ADD %R14,%R13	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R13,0x168(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMOVQ %XMM8,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
IMUL %R9,%R13	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	N/A
LEA (%R13,%RBX,1),%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ADD %R10,%RBX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD %RBX,%R13	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RDX,0x160(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x90(%RSP),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x178(%RSP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %R13,0xb0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
SAL $0x3,%R13	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
MOV %R13,0xf8(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMOVQ 0xa8(%RBX),%XMM19	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
ADD %R12,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x170(%RSP),%R12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RDX,0x120(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
LEA (%R10,%R12,1),%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA (%RDX,%R14,1),%R14	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
VMOVQ %XMM19,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVQ %XMM9,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
SAL $0x3,%R12	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
MOV %R14,0xb8(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMOVQ %XMM19,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
SAL $0x3,%RDX	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
VMOVQ %R12,%XMM26	1	0	0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2	1	scal (12.5%)
SAL $0x3,%R14	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
VMOVQ %RDX,%XMM27	1	0	0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2	1	scal (12.5%)
MOV %R14,0x100(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x158(%RSP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x148(%RSP),%R12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
IMUL %R13,%R9	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	N/A
MOV 0xb0(%RBX),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
VMOVQ %XMM8,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVQ %XMM5,0x158(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
MOVQ $0,0x138(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
IMUL %R13,%R11	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	N/A
MOV 0x154(%RSP),%R13D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
VMOVQ %XMM7,0x178(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
MOVQ $0,0x140(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOVQ $0,0x108(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOVB $0,0x11f(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (1.6%)
VMOVSD 0x74b7b(%RIP),%XMM2	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MOV %RAX,0x148(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
SAL $0x3,%R14	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
LEA (%R12,%R15,1),%R15	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
VMOVQ %R14,%XMM31	1	0	0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2	1	scal (12.5%)
LEA (%RDX,%R12,1),%R14	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA (%R9,%RBX,1),%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %R15,0x30(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x60(%RSP),%R15D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RDX,0x28(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R14,0x38(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
LEA (%RBX,%R11,1),%R14	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %R14,0x20(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
SUB %R13D,%R15D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD %RBX,%R10	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LEA 0x1(%R15),%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA (%R10,%R9,1),%RBX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
VMOVQ %XMM6,%R9	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
LEA (%R10,%R11,1),%R10	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %EDX,0x98(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV 0x150(%RSP),%EDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
LEA (%R9,%RBX,8),%R12	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %R15D,0x64(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
LEA 0x2(%R15),%R15D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA (%R9,%R10,8),%R14	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %R12,0x88(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RBX,0x50(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R15D,%R9D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R15D,%R12D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VMOVQ %XMM4,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
MOV %R10,0x48(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R14,0x80(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
CMP %EDX,%R13D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
CMOVGE %R13D,%EDX	2	0.33	0.33	0.33	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
AND $0x7,%R15D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
VMOVQ %XMM5,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
ADD $0x8,%RBX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SHR $0x3,%R9D	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
MOV %R15D,0x68(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV %EDX,0x9c(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV %RBX,0x70(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMOVDQA64 %XMM23,%XMM5	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
MOV 0xf0(%RSP),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
ADD $0x8,%R13	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
AND $-0x8,%R12D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R13,0x78(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R12D,0x6c(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
SAL $0x6,%R9	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
MOV %R9,0x170(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMOVQ %XMM1,%R9	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVDQA64 %XMM24,%XMM1	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
XCHG %AX,%AX	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
CMPB $0,0x11f(%RSP)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	scal (1.6%)
JE 42e7d1 <__flux_calc_kernel_module_MOD_flux_calc_kernel._omp_fn.0+0xe41>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV 0x90(%RSP),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x114(%RSP),%EDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %EDI,0xe8(%R8)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
VZEROUPPER	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
LEA -0x28(%RBP),%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
RET	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
INC %EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
XOR %EDX,%EDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
JMP 42d9df <__flux_calc_kernel_module_MOD_flux_calc_kernel._omp_fn.0+0x4f>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
VZEROUPPER	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
LEA -0x28(%RBP),%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
RET	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
XCHG %AX,%AX	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run gcc_0

Source file and lines	flux_calc_kernel.f90:49-60
Module	exec

gain
potential
hint
expert

Code clean check

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)
To reference allocatable arrays, use "allocatable" instead of "pointer" pointers or qualify them with the "contiguous" attribute (Fortran 2008)
For structures, limit to one indirection. For example, use a_b%c instead of a%b%c with a_b set to a%b before this function

Vectorization

Details

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): do i a(i)%x = b(i)%x (slow, non stride 1) => do i a%x(i) = b%x(i) (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

unknown: 2 occurrences►
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/flux_calc_kernel.f90:53
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/flux_calc_kernel.f90:53

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

CMOVGE: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/flux_calc_kernel.f90:60
IDIV: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/flux_calc_kernel.f90:53

Conversion instructions

Detected expensive conversion instructions.

Details

CLTD: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/flux_calc_kernel.f90:53

Workaround

Avoid mixing data with different types. In particular, check if the type of constants is the same as array elements.

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 369 bytes. The binary function is storing 381 bytes.

General properties

nb instructions	269
nb uops	267
loop length	1390
used x86 registers	16
used mmx registers	0
used xmm registers	26
used ymm registers	0
used zmm registers	0
nb stack references	48

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	33.38 cycles
front end	33.38 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	17.50	17.50	17.50	17.50	17.50	17.50	26.75	26.75	26.75	26.75	0.00	0.00	0.00	0.00	14.50	14.50
cycles	17.50	17.50	17.50	17.50	17.50	17.50	26.75	26.75	26.75	26.75	0.00	0.00	0.00	0.00	14.50	14.50

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

6.00

Cycles summary

Front-end	33.38
Dispatch	26.75
DIV/SQRT	6.00
Overall L1	33.38

Vectorization ratios

INT

all	3%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
other	8%

all	0%
load	0%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	NA (no other vectorizable/vectorized instructions)

INT+FP

all	3%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	0%
other	8%

Vector efficiency ratios

INT

all	11%
load	11%
store	10%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
other	12%

all	12%
load	12%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	NA (no other vectorizable/vectorized instructions)

INT+FP

all	11%
load	11%
store	10%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	6%
other	12%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 33.38 cycles. At this rate:

4% of peak load performance is reached (11.06 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
8% of peak store performance is reached (11.42 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

ASM code

In the binary file, the address of the function is: 42d990

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %RDI,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
AND $-0x40,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB $0x180,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x10(%RDI),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RDI,0x90(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV (%RAX),%R12D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
CALL 402380 <@plt_start@+0x360>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV %EAX,%EBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CALL 4022f0 <@plt_start@+0x2d0>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV 0x18(%R15),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %EAX,%ECX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV (%RDX),%EAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
ADD $0x2,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB %R12D,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CLTD																				scal (6.3%)
IDIV %EBX	2	0	0	0	2	0	0	0	0	0	0	0	0	0	0	0	0	9-14	6	scal (6.3%)
CMP %EDX,%ECX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
JL 42e7c8 <__flux_calc_kernel_module_MOD_flux_calc_kernel._omp_fn.0+0xe38>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
IMUL %EAX,%ECX	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	N/A
ADD %ECX,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD %EDX,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP %EAX,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
JGE 42e79d <__flux_calc_kernel_module_MOD_flux_calc_kernel._omp_fn.0+0xe0d>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
LEA (%R12,%RDX,1),%R8D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ADD %R12D,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x90(%RSP),%R12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %EAX,0x110(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV %R8D,0x118(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV 0x8(%R12),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%R12),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
VMOVQ 0x98(%R12),%XMM20	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVQ 0x88(%R12),%XMM13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVQ 0x38(%R12),%XMM7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MOV 0xa0(%R12),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x90(%R12),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
VMOVQ 0x28(%R12),%XMM17	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVQ 0x68(%R12),%XMM12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVQ 0x58(%R12),%XMM16	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVQ 0x40(%R12),%XMM5	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVQ 0x20(%R12),%XMM1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVQ 0x48(%R12),%XMM6	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVQ 0x30(%R12),%XMM15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MOV (%R9),%R14D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOVSXD (%RDI),%R10	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	N/A
MOVSXD %R8D,%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
VMOVQ 0x50(%R12),%XMM4	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVQ %XMM20,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
MOV %R13,0x148(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RAX,0x170(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMOVQ 0x60(%R12),%XMM14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
IMUL %R9,%RDI	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	N/A
VMOVQ %XMM7,%R11	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVQ %XMM17,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVQ %XMM13,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
SAL $0x3,%RCX	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
MOV %R14D,0x60(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV %RDI,0x158(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMOVQ %XMM20,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
MOV %R10D,0x154(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
LEA 0x2(%R14),%R15D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
VMOVQ %XMM13,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
ADD %R10,%R13	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD %R10,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
IMUL %R9,%R14	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	N/A
MOV %R15D,0x150(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
LEA (%R13,%RDI,1),%R15	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
VMOVQ %RCX,%XMM23	1	0	0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2	1	scal (12.5%)
LEA (%R11,%R15,8),%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %R15,0x58(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
LEA 0x1(%R9),%R11	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
VMOVQ %XMM20,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
IMUL %R11,%R15	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	N/A
VMOVQ %XMM7,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
LEA (%RAX,%R14,1),%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
VMOVQ %XMM12,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
MOV %RDX,0xd0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
LEA (%R8,%RDX,8),%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV 0x70(%R12),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
LEA (%R15,%R13,1),%RBX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
VMOVQ %XMM12,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
IMUL %R9,%R13	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	N/A
MOV %RBX,0x40(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
SAL $0x3,%RSI	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	scal (12.5%)
SAL $0x3,%RAX	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
MOV %RDX,0x168(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMOVQ %RSI,%XMM18	1	0	0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2	1	scal (12.5%)
LEA (%RCX,%RBX,8),%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA (%R10,%RDX,1),%RBX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
VMOVQ %RAX,%XMM22	1	0	0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2	1	scal (12.5%)
VMOVQ %XMM16,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
LEA (%RBX,%R13,1),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %RAX,0xc8(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMOVQ 0xb8(%R12),%XMM11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
LEA (%RCX,%RAX,8),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV 0xc0(%R12),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
VMOVQ 0x78(%R12),%XMM10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MOV %RAX,0x160(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
LEA (%R10,%RAX,1),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
VMOVQ %XMM11,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVQ %XMM11,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
IMUL %R9,%RBX	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	N/A
SAL $0x3,%RDX	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
ADD %RBX,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
VMOVQ %RDX,%XMM21	1	0	0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2	1	scal (12.5%)
VMOVQ %XMM15,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
MOV %RAX,0xc0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
LEA (%RDX,%RAX,8),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %R12,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VMOVQ %XMM10,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
SAL $0x3,%R12	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
MOV %RAX,0xf0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x80(%RDX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
VMOVQ %R12,%XMM24	1	0	0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2	1	scal (12.5%)
VMOVQ %XMM10,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
IMUL %R9,%R12	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	N/A
VMOVQ %XMM14,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
MOV %RAX,0x178(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
LEA (%RAX,%R10,1),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ADD %R12,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RAX,0xa8(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
LEA (%RDX,%RAX,8),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV 0x170(%RSP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
ADD %RDX,%R14	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x90(%RSP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %R14,0x130(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x168(%RSP),%R14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
VMOVQ 0xc8(%RDX),%XMM9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVQ 0xd8(%RDX),%XMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
ADD %R14,%R13	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R13,0xa0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x160(%RSP),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
VMOVQ %XMM9,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
LEA (%RBX,%R13,1),%RBX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV 0xd0(%RDX),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
IMUL %R9,%R14	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	N/A
MOV %RBX,0x128(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xe0(%RDX),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %R13,0x170(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
ADD %R14,%R13	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R13,0x168(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMOVQ %XMM8,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
IMUL %R9,%R13	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	N/A
LEA (%R13,%RBX,1),%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ADD %R10,%RBX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD %RBX,%R13	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RDX,0x160(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x90(%RSP),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x178(%RSP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %R13,0xb0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
SAL $0x3,%R13	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
MOV %R13,0xf8(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMOVQ 0xa8(%RBX),%XMM19	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
ADD %R12,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x170(%RSP),%R12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RDX,0x120(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
LEA (%R10,%R12,1),%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA (%RDX,%R14,1),%R14	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
VMOVQ %XMM19,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVQ %XMM9,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
SAL $0x3,%R12	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
MOV %R14,0xb8(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMOVQ %XMM19,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
SAL $0x3,%RDX	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
VMOVQ %R12,%XMM26	1	0	0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2	1	scal (12.5%)
SAL $0x3,%R14	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
VMOVQ %RDX,%XMM27	1	0	0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2	1	scal (12.5%)
MOV %R14,0x100(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x158(%RSP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x148(%RSP),%R12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
IMUL %R13,%R9	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	N/A
MOV 0xb0(%RBX),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
VMOVQ %XMM8,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVQ %XMM5,0x158(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
MOVQ $0,0x138(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
IMUL %R13,%R11	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	N/A
MOV 0x154(%RSP),%R13D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
VMOVQ %XMM7,0x178(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
MOVQ $0,0x140(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOVQ $0,0x108(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOVB $0,0x11f(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (1.6%)
VMOVSD 0x74b7b(%RIP),%XMM2	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MOV %RAX,0x148(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
SAL $0x3,%R14	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
LEA (%R12,%R15,1),%R15	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
VMOVQ %R14,%XMM31	1	0	0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2	1	scal (12.5%)
LEA (%RDX,%R12,1),%R14	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA (%R9,%RBX,1),%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %R15,0x30(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x60(%RSP),%R15D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RDX,0x28(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R14,0x38(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
LEA (%RBX,%R11,1),%R14	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %R14,0x20(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
SUB %R13D,%R15D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD %RBX,%R10	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LEA 0x1(%R15),%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA (%R10,%R9,1),%RBX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
VMOVQ %XMM6,%R9	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
LEA (%R10,%R11,1),%R10	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %EDX,0x98(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV 0x150(%RSP),%EDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
LEA (%R9,%RBX,8),%R12	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %R15D,0x64(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
LEA 0x2(%R15),%R15D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA (%R9,%R10,8),%R14	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %R12,0x88(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RBX,0x50(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R15D,%R9D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R15D,%R12D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VMOVQ %XMM4,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
MOV %R10,0x48(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R14,0x80(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
CMP %EDX,%R13D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
CMOVGE %R13D,%EDX	2	0.33	0.33	0.33	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
AND $0x7,%R15D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
VMOVQ %XMM5,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
ADD $0x8,%RBX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SHR $0x3,%R9D	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
MOV %R15D,0x68(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV %EDX,0x9c(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV %RBX,0x70(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMOVDQA64 %XMM23,%XMM5	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
MOV 0xf0(%RSP),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
ADD $0x8,%R13	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
AND $-0x8,%R12D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R13,0x78(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R12D,0x6c(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
SAL $0x6,%R9	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
MOV %R9,0x170(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMOVQ %XMM1,%R9	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVDQA64 %XMM24,%XMM1	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
XCHG %AX,%AX	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
CMPB $0,0x11f(%RSP)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	scal (1.6%)
JE 42e7d1 <__flux_calc_kernel_module_MOD_flux_calc_kernel._omp_fn.0+0xe41>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV 0x90(%RSP),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x114(%RSP),%EDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %EDI,0xe8(%R8)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
VZEROUPPER	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
LEA -0x28(%RBP),%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
RET	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
INC %EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
XOR %EDX,%EDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
JMP 42d9df <__flux_calc_kernel_module_MOD_flux_calc_kernel._omp_fn.0+0x4f>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
VZEROUPPER	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
LEA -0x28(%RBP),%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
RET	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
XCHG %AX,%AX	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A

Name	Coverage (%)	Time (s)
▼__flux_calc_kernel_module_MOD_flux_calc_kernel._omp_fn.0–	4.24	1.59
▼Loop 177 - flux_calc_kernel.f90:49-60 - exec–	0.00	0.01
○Loop 178 - flux_calc_kernel.f90:58-60 - exec	4.23	1.59

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